JP4349274B2 - Magnetic disk drive and control method - Google Patents

Description

  The present invention relates to a magnetic disk device and a control method thereof, and more particularly to power consumption of a battery power supply while protecting cache data by performing control according to the data type in the cache memory and the remaining battery level when external power is cut off due to a failure. It is related with the technology which reduces.

  For example, a magnetic disk device such as a disk array device has a cache memory. When writing data, the write data is once taken into the cache memory and then written to the magnetic disk. When reading data, the read data is stored in the cache memory. Next, high-speed access is possible when a read request for the same data is received next. Since the cache memory is volatile and the stored data will be erased when the power is cut off, this type of device has a backup power supply and the contents of the cache memory when the power is unexpectedly cut off. To keep.

  The configuration of this magnetic disk device is shown in FIG. This apparatus controls a plurality of hard disk devices 100-1 to 100-n by a RAID system, and includes an HDD control circuit 107, an external power supply circuit 120 connected to an external commercial power supply (not shown), and an upper circuit 101. A battery circuit 102, a power supply control circuit 103, and a plurality of cache memories 105-1 to 105-n. In a normal state in which external power is supplied, power obtained from the external power supply circuit 120 is supplied to each element. When the power supplied from the external power supply circuit 120 is interrupted due to a failure, the power supply control circuit 103 switches the power supply line to the cache memories 105-1 to 105-n to the battery circuit 102 and holds the contents of all the cache memories 105. It is configured as follows.

  Therefore, when the number of cache memories is large, there is a problem that the battery circuit 102 is consumed quickly and it is difficult to hold cache data for a long time. In other words, it is necessary to increase the capacity of the battery circuit 102 in order to hold the contents of a large number of cache memories for a long time.

  In addition, there is an apparatus in which the contents of a cache memory are written into a hard disk device using a battery power source in the event of a power failure so that the contents can be restored later (for example, Patent Document 1). The configuration of this type of disk array device is shown in FIG. As shown in the figure, in this device, the hard disk devices 200-1 to 200-n are also connected to the power supply control circuit 203, and the data in the cache memory when the power supply from the external power supply circuit 220 is interrupted due to a failure. Are written to the hard disk devices 200-1 to 200-n. However, in the configuration in which data in the cache memories 205-1 to 205-n is written to the hard disk devices 200-1 to 200-n by the RAID method, it is necessary to drive all the hard disk devices 200-1 to 200-n. There is a problem that battery power consumption becomes intense. Further, when the power supply from the external power supply is resumed, it is necessary to read out necessary data from the hard disk devices 200-1 to 200-n and return the cache memory to the same state as before the power failure. There is also a problem that it takes time to restore the contents of the cache memory even if it is short.

  In the embodiment of Patent Document 1, the write cache and the read cache are divided into memory modules. In the event of a power failure, only the write cache data write module is energized as a backup target, while the read cache data is transferred to the memory module. It is disclosed that the power supply is cut off to reduce the power consumption of the battery power supply. In another document, when saving the cache memory data to the backup disk in the event of a power failure, only some hard disks are used, and the power supply of the non-backup disk is stopped to stop the power consumption of the auxiliary power supply. The proposal which suppresses is made | formed (for example, patent document 2).

JP 2004-78963 A Japanese Patent Laid-Open No. 11-327811

  As described in Patent Document 1, it is possible to suppress the consumption of the backup power source by supplying the backup power only to the memory module in which the backup target data exists at the time of a power failure. However, if the amount of data that needs to be backed up is small but the data is fragmented and scattered across multiple cache memory modules, it is necessary to supply backup power to all of these cache memories. There is a problem that the consumption of the backup power source cannot be suppressed.

  In addition, since the read cache is discarded when the power from the external power supply is stopped, for example, even when a power failure is restored in a short time, there is no inconvenience that there is no read cache, and the subsequent read operation takes time. .

  The present invention reduces the amount of cache memory to be retained by executing defragmentation whenever there is no access to the cache memory, and saving necessary data to the hard disk device according to the battery capacity, thereby depleting battery power. An object of the present invention is to provide a magnetic disk device that extends the retention period while suppressing the occurrence of a failure and that can quickly perform cache memory reconfiguration when the power failure is restored.

  The present invention includes at least one hard disk, a plurality of cache memory modules in which write data from a host device and read data from the hard disk device are registered, and a battery power source that supplies power in the event of an external power failure. In the method of controlling a magnetic disk device provided, the cache memory modules are defragmented and / or rearranged to centralize cache data, and power supply to the cache memory modules without backup target data is stopped when driven by the battery power supply Doing is the main feature.

  It is effective that the defragmentation and / or rearrangement of the cache memory module is executed when there is no access to the cache memory module.

  In an embodiment, it is effective to include a step of deleting cache data read out from the cache memory module from the oldest when the remaining amount becomes equal to or less than a predetermined first value when driven by the battery power source. .

  Further, it is effective to include a step of deleting read cache control information in addition to read cache data from the cache memory module when the remaining amount becomes equal to or less than a predetermined second value when driven by the battery power source. It is.

  In this case, in the step of deleting the read cache control information, it is effective to supply power to one of the hard disks to write the read cache control information and then delete it from the cache memory module.

  Further, it is effective to write the write cache data and the write cache control information to the hard disk when the remaining amount becomes equal to or less than a predetermined third value when driven by the battery power source.

  In an environment with multiple cache memory modules, reduce the number of cache memory modules used by defragmentation and rearrangement as much as possible, thereby reducing the number of modules that should be powered on to retain data during a power outage Can do. By stopping power supply to unnecessary modules, it is possible to reduce battery power consumption as much as possible in the event of a power outage and extend the power backup period. If this defragmentation and rearrangement are always performed when there is no access to the cache memory, it is possible to save power quickly without defragmentation time even if a sudden power failure occurs.

  In addition, even if the read cache data is erased, there is no problem with the operation of the device. Therefore, if the external power supply continues to be stopped, deleting it and turning off the cache memory module will consume battery power. It can be further suppressed. In this case, if the read cache control information is saved in the hard disk device, the read cache data can be restored from the hard disk, and the cache data can be restored when the external power is restored.

  Further, when the external power is continuously stopped, if the write cache data and the write cache control information are saved in the hard disk, it is possible to reliably avoid a trouble after the recovery.

  The best mode for carrying out the present invention will be described in detail below with reference to the drawings.

  FIG. 1 is a block diagram showing the configuration of a magnetic disk apparatus according to the present invention. As shown in FIG. 1, the magnetic disk device controls a plurality of hard disk devices 10-1, 10-2... 10-n by a RAID system, and is connected to an HDD control circuit 7 and an external commercial power source. The external power supply circuit 20, the upper circuit 1, the battery circuit 2, the power supply control circuit 3, the plurality of cache memory modules 5-1 to 5-n, the cache memory module 5 and the first hard disk device 10-1 And a control unit 4 that controls the supply of power to and the saving of cache data, and is connected to the host device 21.

  The host circuit 1 communicates with the host device 21, sends write data sent from the host device 21 to the control circuit 4, receives read data from the control circuit 4, and sends it to the host device 21. The power from the external power supply circuit 20 is supplied to the power supply control circuit 3 and the second and subsequent hard disk devices 10-2 to 10-n. The upper circuit 1 operates with power from the external power supply circuit 20 during normal operation. However, when power supply from the external power supply circuit 20 is stopped, the internal circuit 1 is required by the battery power supply 2 supplied via the power control circuit 3. Only some of the circuits operate, and the host device 21 is notified that the external power supply has been disconnected.

  The battery circuit 2 is composed of a storage battery or the like, and is charged by an external power source during normal operation, and supplies power to necessary elements via the power control circuit 3 during a power failure. The power supply control circuit 3 switches between external power from the upper circuit 1 and battery power from the battery circuit 2, manages the charge state of the battery circuit 2 and detects the remaining battery level at the time of discharge. 4 and a circuit that notifies the upper circuit 1. During normal operation, power supplied from the external power supply circuit 20 via the upper circuit 1 is supplied to the control circuit 4, the cache memory modules 5-1 to 5-n, the HDD control circuit 7, the first hard disk device 10-1, and the like. To charge the battery circuit 2. When the supply power from the external power supply circuit 20 becomes equal to or less than the threshold, the control unit 4 is notified, and the power supply source is switched to the battery circuit 2 according to a command from the control unit 4 to supply battery power to the above elements.

  The hard disk devices 10-1 to 10-n are magnetic disk drives that are RAID-controlled by the HDD control circuit 7, and perform normal disk array operations and read / write data during normal operation. As described above, the second and subsequent hard disk devices 10-2 to 10-n among the hard disk devices 10 are driven by the externally supplied power from the upper circuit 1, and the power supply is cut off and the operation is stopped when the external power supply fails. . On the other hand, the first hard disk device 10-1 receives power from the power supply control circuit 3, and is configured to operate with the power of the battery circuit 2 even in the event of a power failure. A cache data saving area 8 is secured in the hard disk device 10-1, and the hard disk device 10-1 can be activated at the time of a power failure and necessary cache data can be written in the hard disk device 10-1.

  The cache memory modules 5-1 to 5 -n are volatile memory circuits, and write cache data and write cache control information sent from the upper circuit 1 and read cache from the HDD control circuit 7 under the control of the control unit 4. Holds data and read cache control information. Here, the write cache control information is control information such as a cached write address, and the read cache control information is control information such as an address scheduled to be prefetched and an address currently cached. These cache memory modules 5-1 to 5-n are individually supplied with power from the power supply control circuit 3, and can be individually controlled to be turned on / off. The power supply control circuit 3 supplies the power of the battery circuit 2 to the cache memory 5 when the external power supply fails.

  The control circuit 4 manages the operation of the cache memory 5 and the hard disk device 10, and controls the power supply control circuit 3 when the external power supply fails, and switches the power supply source to the necessary elements to the battery circuit 2. The control circuit 4 monitors the power supply status from the external power supply circuit 20 via the power supply control circuit 3, and when the external power supply circuit 20 stops, the control circuit 4 switches to the power supply control circuit 3 to switch to the power supplied from the battery circuit 2. An instruction is issued, and the status and remaining amount of the battery circuit 2 are monitored thereafter. Further, during normal operation when external power is supplied, the state of the cache memory 5 is monitored, the cache memory 5 is defragmented, data is written, read, and rearranged, and the HDD controller 7 is read / written. Send and receive. When the power supply from the external power supply circuit 20 is stopped, the battery power supply destination is determined according to the remaining amount of the battery circuit 2, the cache memory 5 is defragmented, data is written, read, and rearranged. The cache data is written into the hard disk device 10-1, and the cache data is restored when the external power supply circuit 20 is restored.

  The function of the control circuit 4 will be specifically described. During normal operation, the control circuit 4 writes the write data sent from the upper circuit 1 as write cache data to the cache memory modules 5-1 to 5 -n, and reads the write cache data from the cache memory 5 when necessary to read out the HDD. The data is sent to the control circuit 7 and the write cache data is deleted from the cache memory. Also, in response to a data read command from the host device 21, data is read from the hard disks 10-1 to 10-n via the HDD control circuit 7, and written to the cache memories 5-1 to 5-n as read cache data. At this stage, the read cache data is read from the cache memory 5 and sent to the upper circuit 1. This operation is the same as the conventional write / read operation, and detailed description is omitted. For example, if the corresponding data is already in the cache memory 5 when the read command is received, the cache is not read from the hard disk device 10. Data is sent to the upper circuit 1, and when a further write command is received at the address of the write cache data that has not been written to the hard disk device 10, the corresponding write cache data is updated to realize high-speed data access. To do.

  In the present invention, the control circuit 4 constantly monitors the arrangement of the cache data in the cache memory 5 and performs defragmentation and rearrangement of the cache data when there is no access to the cache memory 5, thereby concentrating the memory area used. I am trying. The defragmentation and rearrangement are arranged in the order of (1) write cache control information, (2) write cache data, (3) read cache control information, and (4) read cache data from the front of the cache memory 5 address. Further, the read cache data is arranged in order from the newly cached data to the old data. In this embodiment, even when the external power supply circuit 20 is stopped, the defragmentation and rearrangement are performed using the power of the battery power supply 2. Due to the defragment processing, the cache data is concentrated in front of the address in the cache area, and an empty area is generated in the latter half of the cache area.

  When the power supply from the external power supply circuit 20 is stopped, the control circuit 4 supplies the battery power to the cache memory 5 in order to retain the cache data. If there is a memory module, the power supply control circuit 3 is notified to stop the power supply to the module. In an environment including a plurality of cache memory modules 5-1 to 5-n as described above, when data is concentrated on the front side of the address due to defragmentation and rearrangement and there is a space on the back side, the back side of the address without data It is not necessary to energize some memory modules, and by stopping the power supply to such memory modules, it is possible to reduce the consumption of the battery circuit 2 and extend the data retention period at the time of a power failure.

  If the external power is restored during the first stage, the power supply control circuit 3 notifies the control circuit 4 that the power supply control circuit 3 uses the power from the external power supply circuit 20 via the host circuit 1. Give instructions. This allows the device to continue normal operation with no change from before the power failure.

  When the power failure continues and the remaining battery level of the battery circuit 2 becomes less than a certain threshold value, the control circuit 4 deletes the read cache data on the cache memory 5 from the old one as a second stage, and the cache becomes unnecessary If there is a memory module, issue an instruction to stop the power supply. As described above, since the old read cache data is arranged behind the address in the cache memory modules 5-1 to 5-n by defragmentation and rearrangement, the control unit 4 refers to the read cache control information to read the old read data. When the cache data is deleted, the rear side of the cache memory 5 is further vacated. This eliminates the need to energize the cache memory module in which the cache data has been written in the cache memory 5, so that the consumption of the battery circuit 2 can be reduced by cutting off the power. The old read cache data may be deleted after a predetermined period from writing to the cache memory 5, for example, every time the remaining battery level decreases by 5% from the threshold, the cache memory capacity of 10 is deleted. You may make it carry out in steps, such as deleting% part. Also, the old read cache data is registered by referring to the read cache control information instead of turning off the power of the cache memory module in which the old read cache data is stored after being electrically deleted. An instruction may be issued to turn off the power of the cache memory module. When the power is turned off, the read cache data held by the cache memory module is erased. Therefore, the result is the same as when the cache memory module is turned off after the cache data is deleted. In this case, the cache memory module may be turned off step by step in accordance with the remaining battery level.

  When the external power is recovered during the second stage, the control unit 4 refers to the read cache control information and instructs the recovery of the deleted read cache data. That is, since the address of the read data that has been cached is registered in the read cache control information, the corresponding data is read from the hard disk device 10 based on this and stored again in the cache memory 5. Thereby, the registered contents of the cache memory 5 can be restored to the state before the power failure.

  Further, when the power failure continues and the remaining battery level becomes low, the control unit 4 deletes all of the read cache data and turns off the power of the cache memory module that is no longer needed as a third step. Give instructions. This reduces the number of cache memory modules to be energized and suppresses battery power consumption. Note that this process may be a result of continuing the above-described second-stage process, or, separately from the second-stage process, when the remaining battery level falls below a certain threshold value, the interrupt is preferentially executed. You may do it.

  Further, when the remaining battery level is low due to power failure, the control unit 4 saves the read cache control information from the hard disk 5 after saving the read cache control information to the hard disk as a fourth step, and deletes the cache memory module that is no longer needed. The power supply control circuit 3 is instructed to stop energization. That is, the control unit 4 is activated by supplying power to the HDD control circuit 7 and the first hard disk device 10-1, reads the read cache control information from the cache memory 5, and stores the cache data saving area of the hard disk device 10-1. 8 is sent to the HDD control unit 7 to write data to the hard disk device 10-1, the HDD control unit 7, and the cache memory module in which read cache control information is stored if necessary data is not stored. Stop power supply to. In this case, the fact that the read cache control information has been saved is stored so that it can be recovered later.

  When the external power supply is restored during the fourth stage, the control unit 4 reads the read cache control information saved in the hard disk device 10-1 and registers it in the cache memory, and further, based on the read cache control information. Read cache data is read from the hard disk devices 10-1 to 10-5 and restored on the cache memory. As a result, the same state as before the power failure can be restored.

  In another embodiment, the read cache control information may be deleted from the cache memory without saving the hard disk device 10-1. Actually, the read cache data is for accelerating the data read process, and since it only has to be read from the hard disk, a system error or the like does not occur even if it cannot be recovered. If the configuration is such that the read cache control information is deleted as it is, no power is required to save the hard disk device, and consumption of battery power can be suppressed.

  Further, when the remaining battery level is low due to a power failure, the control unit 4 saves the write cache data and the write cache control information in the cache memory in the hard disk device 10-1 as the fifth stage, and stores that fact. To do. That is, the HDD control circuit 7 and the hard disk device 10-1 are activated by supplying power, and the write cache data and the write cache control information are read from the cache memory 5 and written to the cache data saving area 8 of the hard disk device 10-1. The data is sent to the HDD control unit 7, and the power supply to the hard disk device 10-1 and the HDD control unit 7 is stopped after writing is completed. Unlike the read cache data described above, the write cache data and the control information are cache data in the middle of data writing and are inconsistent when erased. Therefore, all of them are saved in the hard disk. Also in this case, since only the hard disk device 10-1 is driven and saved in the cache data saving area 8, less power is consumed than when all the hard disk devices 10-1 to 10-n are activated and written. I'm sorry. Therefore, the data retention performance can be improved by extending the backup time by the battery power source.

  Thereafter, when the external power supply is restored, the control unit 4 reads out the write cache control information, write cache data, and read cache control information saved in the cache data save area 8 of the hard disk device 10-1 and registers them in the cache memory. . Similarly to the fourth stage, the read cache data is read from the hard disk devices 10-1 to 10-5 based on the read cache control information, and restored on the cache memory. As a result, the same state as before the power failure can be restored. Note that when the external power supply is restored during the fifth stage, the write cache data and control information remain in the cache memory 5, so that only the read cache control information is read to restore the read cache data. It's enough. After data recovery, the contents of the cache data saving area 8 of the hard disk device 10-1 are erased.

  The specific operation of this magnetic disk apparatus will be described with reference to FIGS. FIG. 2 is a diagram showing the registered contents of the cache memory 5, and FIGS. 3 to 5 are flowcharts for explaining the operation of the magnetic disk device. As a premise, during a normal operation in which power is supplied from an external power supply, the power supply control circuit 3 passes through the upper circuit 1 to the control circuit 4, the cache memory 5, the HDD control circuit 7, and the first hard disk device 10-1. The power from the external power supply circuit 20 is supplied. Further, the battery circuit 2 is charged with external power, and the control circuit 4 is notified of the state of charge and the state of the external power supply circuit 20. The second and subsequent hard disk devices 10-2 to 10-n operate by receiving power from the upper circuit 1.

  The control circuit 4 performs a normal cache operation for the read / write instruction transmitted from the upper circuit 1, and performs defragmentation and rearrangement of the cache memory 5 when there is no access to the cache memory 5. As shown in FIG. 2A, in normal cache operation, the cache data is fragmented and stored in the entire area of the cache memory 5. By defragmenting and rearranging the cache data, FIG. ). In this embodiment, five cache memory modules 5-1 to 5-5 are provided, and are arranged in the order of write cache control information, write cache data, read cache control information, and read cache data from the front of the address. Further, newly registered read cache data is arranged on the front side.

  As shown in FIG. 3, the control circuit 4 receives a signal from the power supply control circuit 3 and constantly monitors the state of the external power supply circuit 20 (step S1). When the external power supply 20 is stopped (step S2), the power supply control circuit 3 notifies the control circuit 4 that the external power supply circuit 20 has been stopped, the power supply source is switched to the battery circuit 2, and the upper circuit 1, the control circuit 4, This is supplied to the cache memories 5-1 to 5-n. Further, the control circuit 4 informs the host device 21 that the external power supply circuit 20 has stopped via the host circuit 1 (step S3), and then stops the power supply to the host circuit 1. In this state, power supply to the hard disk devices 10-1 to 10-n and the HDD control device 7 is stopped. Also at this time, the control circuit 4 performs defragmentation and rearrangement of the cache memory 5 to concentrate data on the minimum number of cache memory modules.

  After completion of the defragmentation, the control unit 4 refers to the cache memory 5 to check whether there is a cache memory module that has no cache data and no longer requires power supply (step S4). If there is, supply power to the module. Is stopped (step S5), and a message to that effect is stored in a nonvolatile manner. In the example shown in FIG. 2B, the cache memory module 5-5 is empty due to defragmentation and rearrangement, and the power supply to the module 5-5 is cut off. As a result, battery power can be saved and the data retention period can be prolonged as compared with the case where the power supply of all the cache memory modules 5-1 to 5-5 is continued.

  When the external power supply circuit 20 is restored at this time (step S6), the power supply control circuit 3 switches from the battery circuit 2 to the power supplied from the external power supply circuit 20, and the upper circuit 1, the control circuit 4, the cache memory 5, and the HDD control circuit 7 are switched. Then, power is supplied to the hard disk device 10-1. Further, the hard disk devices 10-2 to 10-n are also recovered by obtaining power from the upper circuit 1. At this time, since the contents of the cache memory 5 maintain the state before the power failure, the magnetic disk device can be immediately restored to the state before the power failure. If the power failure does not recover, proceed to step A.

  As shown in FIG. 4, at the time of a power failure, the control circuit 4 monitors the remaining battery level notified from the power supply control circuit 3, and when the power failure is not restored and the remaining battery level falls below a certain threshold (step S11), the cache memory 5, the old read cache data is deleted, and the power supply to the cache memory module that is no longer needed is stopped (steps S12 to S13). As shown in FIG. 2C, the read cache data is arranged in the newest order from the front side of the address. When the old read cache data on the rear side is deleted, the cache memory module 5-4 becomes free. The power supply to is stopped and the fact is stored in a nonvolatile manner. If the external power is not restored, this process is repeated stepwise until all read cache data is exhausted (step S13). This state is shown in FIG. When all the read cache data is exhausted, the process proceeds to step B. When the external power supply circuit 20 is restored at this stage, the power supply control circuit 3 switches the power supply source to the external power supply circuit 20, and the control circuit 4 determines the read cache control information remaining in the cache memory 5 as necessary. The read cache data is read from the hard disk devices 10-1 to 10-n and registered in the cache memory 5 (step S14). In this case, the cache data that has passed for a long time since the last access may be assumed not to be accessed again and may not be recovered. When the cache data is restored in this way, the normal operation is resumed (C: go to step S1 in FIG. 3).

  Further, as shown in FIG. 5, when the external power is not restored (step S21) and the remaining battery level is further reduced (step S22), the controller 4 turns on the HDD control circuit 7 and the hard disk device 10-1. Then, the read cache control information is saved in the hard disk device 10-1 and then deleted from the cache memory 5, the power supply to the memory modules that are no longer needed is stopped, and this is stored in a nonvolatile manner (step S23). This state is shown in FIG. Thereafter, when the external power is restored (step S24), the saved read control information is read from the hard disk device 10-1 (step S27), and the read cache information is restored based on the read control information (D: go to step S15 in FIG. 4). ).

  In the embodiment in which the read cache control information is deleted without being saved in the hard disk, the read cache data cannot be recovered even when the external power is restored, but the write cache data and the write cache control information are stored in the cache memory 5. Since it is placed, the operation can be resumed without any particular problem.

  When the power failure continues (step S24) and the remaining battery level further decreases (step S25), the control circuit 4 turns on the power of the HDD control circuit 7 and the hard disk device 10-1 via the power supply control circuit 3 to write data. The cache data and write cache control information are saved in the cache data save area 8 of the hard disk device 10-1, and the fact is stored in a nonvolatile manner (step S26). As a result, even when the remaining battery power runs out and all the cache memory modules are powered off, when the power is restored, the write cache data and control information are read from the hard disk device 10-1 and placed on the cache memory 5, in particular. The operation can be resumed without problems.

  In this way, cache data and control information in the fragmented cache memory is concentrated by defragmentation and rearrangement, and power is supplied only to the minimum necessary memory modules, thereby extending the data retention time by the battery circuit. In addition, it is possible to reduce the recovery time of the cache memory contents when the external power is restored by leaving the data in the cache memory as much as possible according to the duration of the external power failure (that is, the remaining battery level) it can.

  Although one embodiment of the present invention has been described in detail above, the present invention is not limited to the above embodiment, and can be realized as various other embodiments. For example, although FIG. 2 illustrates an apparatus having five memory modules, the number of cache memory modules may be four or less or six or more. Any number of hard disk devices can be used as long as the number is one or more. Further, in the defragmenting process of the embodiment, the cache data is concentrated on the front side of the address of the cache memory, but this need not be on the front side, and as long as the control unit 4 grasps it, it concentrates on any module. It may be.

  The magnetic disk device and the control method thereof according to the present invention realize a longer retention of cache memory contents and a shorter recovery time when external power is stopped due to a failure, such as a mass storage device or an Internet server. It can be suitably used in the computer industry.

1 is a diagram showing a configuration of a magnetic disk device according to an embodiment of the present invention. It is a figure which shows the content image of a cache memory. 4 is a flowchart for explaining the operation of the magnetic disk device. 4 is a flowchart for explaining the operation of the magnetic disk device. 4 is a flowchart for explaining the operation of the magnetic disk device. It is a figure which shows the structure of the conventional magnetic disk apparatus. It is a figure which shows the structure of the conventional magnetic disk apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 High-order circuit 2 Battery circuit 3 Power supply control circuit 4 Control circuit 5-1 to 5-n Cache memory 7 HDD control circuit 10-1 to 10-n Hard disk device 20 External power supply circuit 21 High-order device

Claims (10)

A magnetic disk comprising at least one hard disk device, a plurality of cache memory modules in which write data from the host device and read data from the hard disk device are registered, and a battery power source for supplying power in the event of an external power failure In the apparatus, the cache memory modules are defragmented and / or the cache data is rearranged to centralize the cache data, and power supply to the cache memory module having no backup target data is stopped when driven by the battery power supply . In addition, when the remaining amount becomes less than a predetermined first value when driven by the battery power supply, the read cache data is deleted from the cache memory module, and the remaining amount of the battery power supply is the second Below the value (No. Value> second value), read cache control information is deleted from the cache memory module in addition to read cache data, and the remaining amount of battery power is equal to or less than a third value (second value). > 3rd value), the write cache data and the write cache control information are written to the hard disk. 2. The magnetic disk apparatus according to claim 1, wherein the read cache data is deleted from the previously cached data . 3. The magnetic disk device according to claim 1 , wherein when the external power source is restored when the remaining amount of the battery power source is equal to or less than a first value and greater than a second value, reading of the cache memory module is performed. A magnetic disk device, wherein the deleted read cache data is read from the hard disk device and restored on the cache memory based on cache control information . 4. The magnetic disk device according to claim 1, wherein when the cache control information is deleted, the cache control information is written in the hard disk, and the remaining amount of the battery power is second. If the external power supply is restored when the value is less than the third value and greater than the third value, the cache control information is read from the hard disk onto the cache memory, and the read cache data is read based on the cache control information. A magnetic disk device which is restored on a cache memory. A magnetic disk device comprising one or more hard disks, a plurality of cache memory modules in which write data from a host device and read data from the hard disk device are registered, and a battery power supply for supplying power in the event of an external power failure The cache memory module is defragmented and / or rearranged to centralize cache data, and the remaining amount becomes equal to or less than a predetermined first value when driven by the battery power supply In addition, when the read cache data is deleted from the cache memory module and the remaining amount of the battery power becomes equal to or less than a predetermined second value (first value> second value), the cache memory module Delete the read cache control information in addition to the read cache data If the remaining capacity of the battery power supply is equal to or less than a predetermined third value (second value> third value), it writes the write cache data and write cache control information to the hard disk, in the battery power supply A method for controlling a magnetic disk device, comprising: stopping power supply to a cache memory module having no data to be backed up at the time of driving. 6. The method of controlling a magnetic disk device according to claim 5 , wherein the defragmentation and / or rearrangement of the cache memory module is executed when there is no access to the cache memory module. 7. The method of controlling a magnetic disk device according to claim 5 , wherein the read cache data is deleted from the previously cached data. 8. The method according to claim 5 , wherein the step of deleting the read cache control information is performed by supplying power to one of the hard disks and writing the read cache control information. A method for controlling a magnetic disk device, comprising: 9. The method according to any one of claims 5 to 8, wherein when the external power source is restored when the remaining amount of the battery power source is less than or equal to a first value and greater than a second value, the cache memory A method for controlling a magnetic disk device, comprising: reading the deleted read cache data from the hard disk device based on module read cache control information and restoring the read cache data on the cache memory. 10. The method according to claim 5, wherein when the cache control information is deleted, the cache control information is written in the hard disk, and the remaining amount of the battery power is a second value. If the external power supply is restored when the external power is greater than the third value, the cache control information is read from the hard disk onto the cache memory, and the read cache data is read from the cache memory based on the cache control information. A method for controlling a magnetic disk device, comprising:

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