JP4323476B2 - Memory card controller, memory card drive device, and program - Google Patents

Description

  The present invention relates to a memory card drive device that controls data transfer between a host device and a memory card, and more particularly, to an improvement in technology for controlling transfer of large-capacity data.

  In the field of video equipment for professional use, it is required to support large-capacity high-quality moving image data. Therefore, when a memory card is used as a recording medium in professional video equipment, use of a memory card drive device capable of connecting a plurality of memory cards has been proposed. As a prior art regarding a technique of forming a memory card array by connecting a plurality of memory cards, there is one described in Patent Document 1.

A memory card drive device in the form of a PC card using an SD memory card (hereinafter referred to as “SD card”) as a memory card will be described below.
When a memory card drive device in the form of a PC card is used, the video equipment (hereinafter referred to as “host device”) and the memory card drive device are connected via a card bus, and the host device supports a general PC card. Data write and read (hereinafter collectively referred to as “data transfer”) are requested using ATA commands in the same procedure as access. Normally, in the control by the ATA command, the head logical address for starting data transfer and the number of transfer sectors are instructed.

On the other hand, an SD command must be used for a data transfer instruction to the SD card. In the control by the SD command, an SD command (hereinafter referred to as “transfer start instruction”) instructing the start of transfer is issued, and then an SD command (hereinafter referred to as “transfer end instruction”) instructing the end of transfer is issued. Data transfer is continuously executed during the period up to.
Due to the interface difference between the devices, the memory card drive device needs to control the operation of the SD card as shown in FIG.

FIG. 8 is a timing chart showing an example of a data read operation from a memory card by a PC card type memory card drive device.
The host device issues an ATA command to the memory card drive device at the timings A [1], A [2], A [3], and A [4] shown in the stage (a). In response to this, the memory card drive device interprets the ATA command and starts transfer at the timing of S [1], S [2], S [3], S [4] as shown in the stage (c). The instruction and the read head logical address are asserted to the SD card.

In the SD card that has received the transfer start command, the head logical address is converted to a physical address at the timing when it is blacked out at the stage (e), and is recorded in the internal nonvolatile memory at the timing shown at the stage (f). Data is read from the converted physical address and transferred.
When the amount of data requested by the ATA command is transferred from the SD, the memory card drive device issues a transfer end command to the SD card at the timing when it is blacked out at the stage (c), and the SD card. The card reading operation is terminated, and a transfer end interrupt is issued to the host device as shown in the stage (b). As a result, the data transfer operation can be executed in synchronization between the host device and the SD card.

In this way, each time an ATA command requesting data transfer is issued from the host device, the memory card drive device issues an SD command of a transfer start command and a transfer end command at an appropriate timing to operate the SD card. By controlling this, the host device can execute data transfer by equating a plurality of SD cards attached to the memory card drive device with one PC card.
JP 2002-189992 JP

However, since the process for converting an ATA command into an SD command in the memory card drive device and the process for converting a logical address into a physical address in the memory card are required each time an ATA command is issued, data directly from the SD card is used. Compared with the case of reading out, the overhead is a deterioration of the transfer rate.
By the way, high-quality moving image data may have a data amount of several hundred megabytes to several gigabytes. In the control using the SD command originally, when reading a large amount of data written in a continuous area, a transfer start command is issued by designating the start address of the large amount of data, and transferred when the end of the data is read. An end command may be issued.

  However, in the control using the ATA command, the data that can be transferred at one time is limited to a maximum of 64 kbytes. Therefore, when reading such a large amount of data from the SD card, the host device repeatedly issues hundreds or thousands of ATA commands. Here, in order to synchronize the read operation between the host device and the memory card even if data transfer to a continuous area of the memory card is requested in a plurality of ATA commands, the memory card drive device has 64 kbytes. Every time data is read, it is necessary to finish the data transfer operation in the memory card.

  As a result, there is a problem that the influence of the overhead on the transfer rate becomes more noticeable when reading large-capacity data than when reading data directly from the SD card. In particular, when a plurality of memory cards arranged in an array are arrayed and data reading is performed in parallel, the data length read from each memory card in response to one ATA command is further reduced as the number of connected cards is increased. Has a greater effect on the transfer rate.

  It is an object of the present invention to provide an overhead for a read transfer rate while synchronizing a host device and a memory card when a host device is instructed to read a large amount of data using a command with a short readable data length. The present invention provides a memory card controller, a memory card drive device, and a program that can suppress the influence exerted thereon.

In order to achieve the above object, a memory card controller according to the present invention issues a command specifying a data amount and requests data transfer with a host device that transfers data from a transfer start command until a transfer end command is received. A memory card controller that controls data transfer with a memory card that executes an operation, wherein the memory card converts a logical address specified by the transfer start instruction into a physical address and is built in the memory card. When the amount of data transferred by executing the transfer operation reaches the data amount specified by the preceding command requesting data transfer, the memory card For temporarily stopping the transfer operation in the memory and the transfer operation of the memory card If the succeeding command received when in the state is a command for requesting data transfer to the address next to the end address of the data transfer according to the preceding command, the memory card can be started from the paused state. And resuming means for resuming the transfer operation.

  With the above configuration, the memory card controller according to the present invention does not need to issue a transfer start command every time a command is received when a command requesting data transfer to a continuous area is issued continuously from the host device. Therefore, overhead processing such as command conversion in the memory card controller and address conversion in the memory card can be reduced. On the other hand, since the data transfer operation in the memory card is temporarily stopped while the subsequent command issuance processing is performed in the host device after the data transfer according to the preceding command is completed, Synchronization of the data transfer operation with the memory card is not lost.

That is, it is possible to suppress the influence of overhead processing on the transfer rate while synchronizing the host device and the memory card.
The data transfer may be data reading from a memory card, and the transfer operation in the memory card may be a data reading operation.
This reduces the number of transfer start commands issued to the memory card while synchronizing the host device and the memory card when reading data from the memory card, thereby suppressing the effect of overhead on the read transfer rate. I can do it.

The temporary stop and restart of the data read operation in the memory card may be controlled by stopping and resupplying the clock signal to the memory card.
As a result, it is possible to quickly and temporarily resume and resume the reading operation in the memory card. Accordingly, it is possible to suppress the adverse effect on the transfer rate due to the pause and restart processing of the read operation.

  The memory card controller further comprises command issuing means for controlling the start and end of the data read operation in the memory card by issuing a transfer start command and a transfer end command, wherein the memory card controller is set in a predetermined state in the paused state. When the time has elapsed, the resuming unit may resume the supply of the clock signal to release the pause state, and the command issuing unit may issue a transfer end command to end the data reading operation in the memory card. .

  When reading a large amount of data recorded in a continuous area of the memory card, it is assumed that commands are frequently issued from the host device. Therefore, if a state in which no command is issued from the host device continues for a predetermined time or longer, it is assumed that reading of a large amount of data has ended, and the reading operation that has been temporarily stopped is ended. Thereafter, a command that is not continuous with the preceding command will be issued, but since the read operation has been completed, such a command can be processed quickly. Further, the state in which the reading operation is temporarily stopped does not continue for a predetermined time or more, and the operation of the memory card is stabilized.

Further, when the subsequent command is a command that does not require access to the memory card, the temporary stop means may maintain the temporary stopped state.
As a result, when the next command is a command for requesting data transfer with respect to an address continuous with the data transfer end address according to the preceding command, the number of transfer start instructions issued to the memory card can be reduced. , The influence of overhead on the transfer rate can be suppressed.

  The memory card controller further includes command issuing means for controlling the start and end of the transfer operation in the memory card by issuing a transfer start command and a transfer end command, wherein the subsequent command is a data write, When the command is a command requesting either data read end address or data read from a discontinuous address according to the preceding command, the restarting means restarts the supply of the clock signal and sets the pause state. The command issuing means may issue a transfer start command corresponding to the subsequent command after issuing a transfer end command to end the data reading operation in the memory card.

As a result, even when a command requesting data transfer to a data transfer end address and a continuous address according to the preceding command is not issued continuously, it can be dealt with only by issuing a transfer end instruction, so the transfer rate is greatly reduced. Will not cause.
The data transfer may be a data write to a memory card, and the transfer operation in the memory card may be a data write operation.

This reduces the number of transfer start commands issued to the memory card while synchronizing the host device and the memory card when writing data to the memory card, thus reducing the effect of overhead on the write transfer rate. I can do it.
In addition, the suspension and resumption of the data writing operation in the memory card may be controlled by stopping and resupplying the write data supply to the memory card.

As a result, it is possible to realize a high-speed pause and resumption of the write operation in the memory card. Accordingly, it is possible to suppress the adverse effect on the transfer rate of the pause and restart processing of the write operation.
The memory card controller may further include command issuing means for issuing a transfer end command and ending the data writing operation in the memory card when a predetermined time has elapsed in the paused state.

  When writing a large amount of data to a continuous area of the memory card, it is assumed that commands are frequently issued from the host device. Therefore, if a state in which no command is issued from the host device continues for a predetermined time or longer, it is assumed that writing of a large amount of data has ended, and the state in which the writing operation is temporarily stopped is ended. Thereafter, a command that is not continuous with the preceding command will be issued, but since the state in which the write operation is suspended is terminated, such a command can be processed quickly. Further, the state in which the writing operation is temporarily stopped does not continue for a predetermined time or more, and the operation of the memory card is stabilized.

Further, when the subsequent command is a command that does not require access to the memory card, the temporary stop means may maintain the temporary stopped state.
As a result, when the next command is a command for requesting data transfer with respect to an address continuous with the data transfer end address according to the preceding command, the number of transfer start instructions issued to the memory card can be reduced. , The influence of overhead on the transfer rate can be suppressed.

  The memory card controller may further request that the subsequent command is a data read request or a data write from an address that is not continuous with the data write end address according to the preceding command. In addition, after issuing a transfer end command to end the data writing operation in the memory card, it may include command issuing means for issuing a transfer start command corresponding to the subsequent command.

As a result, even when a command requesting data transfer to a data transfer end address and a continuous address according to the preceding command is not issued continuously, it can be dealt with only by issuing a transfer end instruction, so the transfer rate is greatly reduced. Will not cause.
In order to achieve the above object, a memory card drive device according to the present invention comprises a memory card controller according to claim 1, a first interface means for connecting to a host device, and a second for attaching one or more memory cards. Interface means, wherein the memory card controller accesses a memory card attached to the second interface means based on a command input from the first interface means.

  With the above configuration, the memory card drive device according to the present invention needs to issue a transfer start command every time a command is received when a command requesting data transfer to a continuous area is issued continuously from the host device. Therefore, overhead processing such as command conversion in the memory card controller and address conversion in the memory card can be reduced. On the other hand, since the data transfer operation in the memory card is temporarily stopped while the subsequent command issuance processing is performed in the host device after the data transfer according to the preceding command is completed, Synchronization of the data transfer operation with the memory card is not lost.

That is, it is possible to suppress the influence of overhead processing on the transfer rate while synchronizing the host device and the memory card.
In order to achieve the above object, a program according to the present invention performs a transfer operation from a host device that issues a command specifying a data amount to request data transfer and a transfer start command to a transfer end command. A memory card controller program for controlling data transfer to and from a memory card to be executed, wherein the memory card is incorporated by converting a logical address designated by the transfer start command into a physical address by the host device. When the amount of data transferred by executing the transfer operation reaches the data amount specified by the preceding command, the step of temporarily stopping the transfer operation in the memory card and the transfer operation of the memory card are performed. When in a paused state, the data transfer end address next to the preceding command If the subsequent command requesting the data transfer to the address is accepted, it is characterized in that to execute from said temporary stopped state and a step of resuming the transfer operation in the memory card to a processor of the memory card controller.

  With the above configuration, the program according to the present invention does not need to issue a transfer start instruction every time a command is received when a command requesting data transfer to a continuous area is issued continuously from the host device. Overhead processing such as command conversion in the memory card controller and address conversion in the memory card can be reduced. On the other hand, since the data transfer operation in the memory card is temporarily stopped while the subsequent command issuance processing is performed in the host device after the data transfer according to the preceding command is completed, Synchronization of the data transfer operation with the memory card is not lost.

  That is, it is possible to suppress the influence of overhead processing on the transfer rate while synchronizing the host device and the memory card.

  Embodiments of a memory card drive device according to the present invention will be described below. First, a photographing / reproducing system using the memory card drive device according to the present invention will be described. FIG. 1 is a diagram showing a photographing / reproducing system using a memory card drive device according to the present invention. The video recording / playback system shown in FIG. 1 is a system in which video and audio shot with video quality and audio quality equivalent to those of a digital video tape are recorded as moving image data on a memory card and played back.

Video equipment such as a personal computer or a video camera having a PCMCIA card slot can be used as a host device having a moving image data shooting function and a display function. An SD card is used as the memory card.
In FIG. 1, the memory card drive device according to the present invention is a memory card drive 200. This memory card drive 200 has four SD slots into which SD cards can be attached. With the SD cards 300a to 300d attached to the SD slots, the memory card drive 200 is inserted into the PCMCIA card slot of the host device 100a or the host device 100b. Used.

  FIG. 2 is a diagram showing an internal configuration relating to data transfer of each device constituting the photographing / reproducing system according to the present invention. The host device 100a includes a video signal input / output unit 101, a signal processing unit 102, and a drive control unit 103, and requests the memory card drive 200 for data transfer such as writing and reading of moving image data with these configurations. Although the internal configuration of the host device 100a is shown here, the host device 100b also has the same configuration.

  The video signal input / output means 101 controls input / output of video signals to and from the camera module and display module of the host device according to the operating state such as recording and playback. The signal processing unit 102 generates a video signal by compressing and encoding the video signal input from the video signal input / output unit 101 and restoring the video data read from the SD card. A codec having a function to The drive control means 103 has a function of controlling the memory card drive 200 by issuing an ATA command, and transmits / receives data to / from the external interface unit 1 of the memory card drive 200 according to the card bus standard. In general, an ATA command for requesting data transfer includes a command part for designating operations such as writing and reading, a logical address of the leading sector of the data transfer destination, and the number of sectors to be transferred. Here, the host devices 100a and 100b recognize the four SD cards connected to the memory card drive 200 as one virtual drive, and determine the logical address of the first sector of the data transfer destination and the number of sectors to be transferred. An ATA command is issued by using a logical address on the virtual drive. The sector here corresponds to the recording block on the SD card on a one-to-one basis. Since the ATA command is originally a command for a disk medium, the host devices 100a and 100b express the designation of the data transfer destination and the like using sectors.

The memory card drive 200 includes an external interface unit 1 and a memory card controller 2.
The external interface unit 1 has a function of transmitting / receiving data to / from the drive control means 103 of the host device according to the card bus standard.
The memory card controller 2 has a function of controlling the operations of the SD cards 300a to 300d attached to the SD slot in response to an ATA command from the host device. For the control of the SD cards 300a to 300d by the memory card controller 2, SD commands are used. At the start of data transfer, the memory card controller 2 converts the logical address of the virtual drive indicated by the ATA command into the logical address of each SD card, and instructs the start of data transfer such as writing and reading with the converted logical address. An SD command is issued to the SD card. If the start of writing is instructed, then the write data is sequentially transferred to the SD card. At the end of the data transfer, the memory card controller 2 issues a STOP command for instructing the end of the data transfer to the SD card, and asserts a transfer end interrupt indicating the completion of the data transfer to the host device.

The memory card controller 2 further has a function of controlling the supply of the clock signal to the SD card. By stopping the supply of the clock signal, the operation of the SD card is temporarily interrupted and the supply of the clock signal is resumed. Thus, the operation of the SD card that has been temporarily interrupted can be resumed.
The memory card controller 2 transfers data in a 25 Mbps band by operating the SD cards 300a to 300d in parallel by striping. Here, striping is to divide data to be written into recording block units and write the data in parallel on a plurality of memory cards. In this embodiment, since four SD cards are connected in series, the data to be written is divided into four.

  Specifically, the memory card controller 2 manages the SD cards 300a to 300d with card numbers 0 to 3, and when writing data, the remainder obtained by dividing the sector number to be written by 4 is the write card number. Then, data is written to the SD card managed by the writing card number. At the time of reading, the remainder obtained by dividing the sector number by 4 is used as a reading card number, and data is read from the SD card managed by the reading card number. By such striping, the SD cards 300a to 300d constitute one virtual drive. In such striping, if the number of sectors to which data is transferred is equal to or greater than the number of consecutive memory cards, the data transfer efficiency is increased.

The SD cards 300a to 300d are memory cards having a built-in rewritable nonvolatile memory, and record / reproduce data to / from the nonvolatile memory in synchronization with a clock signal. The operations of the SD cards 300a to 300d are controlled by SD commands issued from the memory card drive 200.
When a write start command is issued from the memory card controller 2, the SD cards 300a to 300d read the correlation table indicating the correspondence between the physical address and the logical address of the non-volatile memory, and physically output the logical address asserted together with the SD command. Data converted into an address and data transferred via the memory card controller 2 are written from the converted physical address. When a STOP command is issued from the memory card controller 2 during the write operation, the SD cards 300a to 300d end the data write operation and update the correlation table according to the write result.

  When a read start command is issued from the memory card controller 2, the SD cards 300a to 300d read the correlation table indicating the correspondence between the physical address and the logical address of the nonvolatile memory, and physically store the logical address asserted together with the SD command. The data is converted into an address, and the data recorded in the nonvolatile memory is read from the converted physical address and transferred to the memory card controller 2. When a STOP command is issued from the memory card controller 2 during the read operation, the SD cards 300a to 300d end the data read operation. This completes the description of the photographing / reproducing system using the memory card drive device according to the present invention.

Next, details of the internal configuration of the memory card drive 200 according to the present invention will be described. FIG. 3 is a diagram showing details of the configuration of the memory card drive 200.
The external interface unit 1 includes a PCI target 3 and a PCI bus master 4 inside. The PCI target 3 is in charge of sending and receiving ATA commands to and from the host devices 100a and 100b, and the PCI bus master 4 sends and receives data to and from the host devices 100a and 100b by DMA (Direct Memory Access) transfer. Here, DMA transfer is used to obtain a high transfer rate, but other transfer methods may be used for data transmission / reception.

The memory card controller 2 includes a command analysis unit 5, a command storage unit 6, a command conversion unit 7, and a data memory 11.
The command analysis unit 5 analyzes the ATA command received by the PCI target 3 and separates the logical address of the first sector and the number of sectors to be transferred from the command. The command storage unit 6 stores and temporarily holds ATA commands accepted in the past. The data memory 11 is a buffer memory between the SD card and the PCI bus master 4.

  The command conversion unit 7 includes a continuity verification unit 8, a command start / end control unit 9, and a clock start / end control unit 10, and an SD command corresponding to the ATA command analyzed by the command analysis unit 5. The operation of the SD card 300a is controlled by controlling issuance and clock supply to the SD card. In FIG. 3, only the configuration related to the interface with the SD card 300a is shown in order to avoid complexity, but the memory card controller 2 actually converts the commands to each of the SD cards 300b to 300d. The same configuration as the unit 7 is provided, and these realize the striping control.

The continuity checking unit 8 determines whether or not ATA commands for requesting data reading for consecutive sectors are continuously issued, and according to the determination result, a command start / end control unit 9 and a clock start / end control unit 10 is caused to execute the operation control process of the SD card 300a.
The command start / end control unit 9 starts and ends the writing and reading operations of the SD card 300a by issuing SD commands according to the types of ATA commands.

  The clock start / end control unit 10 temporarily stops and restarts the read operation in the SD card 300a by stopping and restarting the supply of the clock signal to the SD card 300a during the read operation. Here, the period in which the clock start / end control unit 10 stops the supply of the clock signal is a period from when the data requested by the preceding ATA command is read until the subsequent ATA command is received. The above is the detailed description of the internal configuration of the memory card drive 200 according to the present invention.

Next, details of the processing in the memory card controller 2 will be described with reference to FIG. FIG. 4 is a flowchart showing the processing procedure of the memory card controller 2.
After the power is turned on, the memory card controller 2 waits for the ATA command to be accepted at the PCI target 3 in the loop process consisting of step S1 and step S16, and when the ATA command is accepted (step S1: Yes), step S2 and subsequent steps. Execute the process.

In the process of step S2, the command analysis unit 5 analyzes the received ATA command and acquires the logical address of the leading sector of the data transfer destination and the number of sectors to be transferred. Hereinafter, after the power is turned on, the logical address of the transfer destination obtained by the analysis of the ATA command accepted Ith (I is a natural number) is denoted as X [I], and the number of sectors to be transferred is denoted as Y [I].
In step S3, the continuity checking unit 8 determines whether or not a clock signal is supplied to the SD card.

If it is determined in step S3 that the clock signal is being supplied to the SD card (step S3: No), the command start / end control unit 9 receives a request from the logical address X [I] in response to a request by the ATA command. An SD command, which is a write or read start command, is issued to the SD card (step S4).
If the SD command issued in step S4 is a write start command (step S5: No), the SD card starts a write operation in response to the command, and the memory card controller 2 performs the SD process by the processes in steps S6 to S8. Controls write operations on the card.

  In the processing from step S6 to step S8, the command start / end control unit 9 monitors the amount of write data supplied to the SD card during the write operation, and the supplied data amount is the number of sectors Y [I obtained from the ATA command. ] (Step S6: Yes), the SD command of the STOP instruction is issued to the SD card (step S7), the writing operation is terminated in the SD card in response to the STOP instruction, and the correspondence between the logical address and the physical address is reached. Is updated, the memory card controller 2 asserts an interrupt indicating completion of command execution to the host device (step S8). After execution of the processing of step S6 to step S8, the processing returns to the loop processing composed of step S1 and step S16.

If the SD command issued in step S4 is a read start command (step S5: Yes), the SD card starts a read operation in response to the command. In the memory card controller 2, the SD card is processed by steps S9 to S11. Controls the read operation in the card.
In the processing from step S9 to step S11, the clock start / end control unit 10 monitors the amount of data read and transferred from the SD card during the read operation, and the read data amount is obtained from the ATA command. When the number of sectors Y [I] is reached (step S9: Yes), the clock signal supply to the SD card is stopped and the sum of the logical address X [I] of the transfer destination and the number of sectors Y [I] is calculated. The calculated value is recorded in the command storage unit 6 as the continuous start address Z. (Step S10). The value of the continuous start address Z recorded here is held in the command storage unit 6 until the process of step S10 is executed again and a new value is notified. It should be noted that the process of calculating the continuous start address Z and recording it in the command storage unit 6 may be executed during execution of a read operation on the SD card, that is, before the read data amount reaches the number of sectors Y [I]. Good. Thereby, calculation and recording of the continuous start address Z can be processed without affecting the transfer rate.

When the supply of the clock signal is stopped and the SD card is temporarily stopped in the read operation execution state, the memory card controller 2 asserts an interrupt indicating the command execution completion to the host device (step S11). After execution of the processes in steps S9 to S11, the process returns to the loop process including steps S1 and S16.
In the processing procedure when a new ATA command is accepted after the processing of steps S9 to S11 is performed (step S1: Yes), the supply of the clock signal to the SD card is stopped in step S10. Therefore, after the determination in step S3, the processes in steps S12 to S15 are executed.

In the process of step S12, in order to determine whether or not the new ATA command currently being processed is a read command for requesting data to be read when the read operation of the SD card currently in a suspended state is resumed. Then, the continuity checking unit 8 determines whether or not the conditions 1) and 2) are both satisfied.
1) A new ATA command currently being processed is a command requesting reading.
2) The transfer destination acquired in step S2 based on the continuous start address Z recorded in the command storage unit 6 when step S10 was executed in the previous ATA command processing and the new ATA command currently being processed Matches the logical address X [I].

  When the continuity verification unit 8 notifies that both of the above conditions 1) and 2) are satisfied (step S12: Yes), the clock start / end control unit 10 resumes the supply of the clock signal to the SD card. (Step S13). When the supply of the clock signal is resumed, the read operation that was temporarily stopped in the SD card is resumed. In response to this, the memory card controller 2 controls the reading operation in the SD card by the processes in steps S9 to S11.

  When at least one of the above conditions 1) and 2) is not satisfied (step S12: No), that is, when a new ATA command currently being processed resumes the reading operation of the SD card that is currently paused If it is not a read command for requesting data to be read, the continuity checking unit 8 determines whether or not the condition 3) is satisfied (step S14).

3) The ATA command currently being processed is a command that requires memory access to the SD card.
When the continuity verification unit 8 notifies that the condition 3) is satisfied (step S14: Yes), the clock start / end control unit 10 resumes the supply of the clock signal to the SD card and starts the command. The termination control unit 9 issues an SD command of a STOP instruction to the SD card (step S15). When the reading operation that has been temporarily stopped in the SD card is completed in accordance with the execution of the process in step S15, the memory card controller 2 sequentially executes the processes in and after step S4.

  If the above condition 3) is not satisfied (step S14: No), the memory card controller 2 maintains the state where the clock signal supply to the SD card is stopped, and the ATA command does not cause memory access to the SD card. After executing the requested process, an interrupt indicating the completion of command execution is asserted to the host device in the process of step S11, and then the next ATA command is awaited in the loop process consisting of steps S1 and S16.

An ATA command that does not require memory access to the SD card is specifically an IDENTFY-DEVICE command.
Of the above processing flow, the processing flow of asserting an interrupt indicating the completion of command execution to the host device in the processing of step S11 includes steps S1 and S16 with the clock signal supply to the SD card stopped. The processing procedure moves to loop processing. When the clock signal supply is stopped and the next ATA command is not accepted for a predetermined time (for example, 1 second) (step S16: Yes), the clock start / end control unit 10 clocks the SD card. The signal supply is resumed, and then the command start / end control unit 9 issues an SD command of a STOP command to the SD card (step S17), thereby terminating the read operation that has been temporarily stopped in the SD card.

The details of the processing in the memory card controller 2 have been described above. The processing procedure of the memory card controller 2 described above can be realized by mounting with dedicated hardware, or by describing the processing procedure in a computer description language and causing the microprocessor to execute it.
Next, an operation example of the memory card drive 200 configured as described above will be described with reference to FIGS. 5 and 6. FIG. 5 is a diagram showing a processing sequence of the memory card drive 200, and FIG. 6 is a timing chart showing details of the read operation.

5 and 6, A [k] (k is a natural number) indicates the kth ATA command received after the memory card drive 200 is powered on, and DAT [k] is synchronized with the kth ATA command. S [k] indicates an SD command issued to the SD card in response to the kth ATA command.
In FIG. 6, the stage (a) shows the timing of ATA command issuance processing in the host device, and the stage (b) shows the generation timing of an interrupt indicating that the transfer corresponding to the ATA command has been completed. The stage (c) shows the timing of the SD command issuance processing in the memory card drive 200, the stage (d) shows how the clock signal is supplied to the SD card, and the stage (e) The operation timing of SD card internal processing such as conversion from a logical address to a physical address is shown, and the stage (f) shows the timing at which data is transferred.

  Here, the four ATA commands A [1] to A [4] are all ATA commands that request data reading, but the data requested to be read by A [1] to A [3] , A series of moving image data, in which logical addresses are recorded in a continuous recording area in the SD card. Therefore, in the ATA commands of A [2] and A [3], the read start sector number is continuous with the end sector number of the read by the immediately preceding ATA command (ie, A [1] and A [2]), respectively. is doing. On the other hand, the ATA command of A [4] is a command for requesting reading of data unrelated to A [1] to A [3], and the read start sector number of A [4] is A [3 ] Is not continuous with the sector number of the read end.

  First, a series of operations according to the ATA command of A [1] issued by the host device will be described. A [1] is composed of a read command, a start address, and the number of read sectors, and the memory card drive 200 that has received A [1] analyzes A [1] and determines from the read start command and the start address. S [1] is issued to the SD card. The SD card that has received S [1] performs data transfer of DAT [1] after processing internal processing such as conversion from a logical address to a physical address. When the data transfer of DAT [1] starts, the memory card drive 200 monitors the transfer data amount by the clock start / end control unit 10, and the read sector in which the transfer data amount of DAT [1] is obtained from A [1]. When the number reaches, the supply of the clock signal to the SD card is stopped and an interrupt is asserted to the host device. At this time, the clock start / end control unit 10 calculates the sum of the start sector number of A [1] and the number of read sectors and records it in the command storage unit 6. With the above-described series of sequences, the read according to A [1] is completed on the host device side, and on the other SD card side, the read operation is temporarily stopped by stopping the supply of the clock signal. Thus, no more data is read out. Thereby, synchronization of data transfer is maintained between the host device and the SD card.

  Next, when the completion of the transfer of DAT [1] corresponding to A [1] is detected due to the occurrence of an interrupt, the host device issues A [2]. The memory card drive 200 that has received A [2] analyzes A [2] in the command analysis unit 5 and the continuity checking unit 8 and checks the continuity between A [1] and A [2]. In this continuity check, A [2] is a read command, and the start sector number of A [2] is read from the start sector number of A [1] recorded in the command storage unit 6. This is confirmed by confirming that it is equal to the sum of the number of sectors. After confirming the continuity, the memory card drive 200 restarts the clock signal supply to the SD card by the clock start / end control unit 10. When the supply of the clock signal is resumed, the read operation which has been temporarily stopped in the SD card is resumed, and the data transfer generated thereby becomes the data transfer DAT [2] corresponding to A [2]. When the data transfer of DAT [2] starts, the memory card drive 200 monitors the transfer data amount by the clock start / end control unit 10, and when the transfer data amount reaches the number of read sectors obtained from A [2], The clock signal supply to the SD card is stopped, and an interrupt is asserted to the host device. At this time, the clock start / end control unit 10 records the sum of the start address of A [2] and the number of read sectors. As a result of the series of sequences described above, the read operation according to A [2] is completed on the host device side, and the read operation is once again paused on the SD card side, so that no more data can be read. .

  Thereafter, A [3] is issued from the host device in which the completion of the transfer process of DAT [2] corresponding to A [2] is detected, and thereafter, between the host device, the memory card drive 200, and the SD card. Thus, the same sequence as the sequence corresponding to A [2] is processed. As a result, the command storage unit 6 is in a state in which the sum of the start address of A [3] and the number of read sectors is recorded, the read operation is temporarily stopped in the SD card, and A [3] in the host device. An interrupt corresponding to is generated.

  From such a state, the host device that detects the completion of the transfer of DAT [3] corresponding to A [3] due to the occurrence of an interrupt issues A [4] next. The memory card drive 200 that has received A [4] analyzes A [4] in the command analysis unit 5 and the continuity checking unit 8 and checks the continuity between A [3] and A [4]. However, although A [4] is a read command, the start sector number of A [4] is equal to the sum of the start sector number of A [3] recorded in the command storage unit 6 and the number of read sectors. Therefore, the continuity between A [3] and A [4] is not confirmed. Therefore, the memory card drive 200 restarts the supply of the clock signal to the SD card and issues a STOP command at the same time. Thereby, in the SD card, the reading operation that has been paused is completed. Thereafter, the memory card drive 200 issues S [4] consisting of a read start command and a start address to the SD card. The SD card that has received S [4] executes data transfer of DAT [4] after processing internal processing such as conversion from a logical address to a physical address. When the data transfer of DAT [4] starts, the memory card drive 200 monitors the transfer data amount by the clock start / end control unit 10, and the read sector in which the transfer data amount of DAT [4] is obtained from A [4]. When the number reaches, the supply of the clock signal to the SD card is stopped and an interrupt is asserted to the host device. At this time, the clock start / end control unit 10 calculates the sum of the start sector number of A [4] and the number of read sectors, and updates the record in the command storage unit 6. With the series of sequences described above, the read according to A [4] is completed on the host device side, and the read operation is temporarily stopped on the SD card side, and no more data is read.

  In this operation example, the host device does not issue a new ATA command after A [4]. The memory card drive 200 counts the elapsed time after the supply of the clock signal to the SD card is stopped. However, since the next ATA command is not accepted, the supply of the clock signal to the SD card is resumed after a predetermined time has elapsed. At the same time, a STOP instruction is issued. Thereby, in the SD card, the reading operation that has been paused is completed. By such a sequence, the SD card is supplied with a clock signal and waits for an SD command. The above is the description of the operation example of the memory card drive 200.

  In the above operation example, a series of sequences corresponding to A [1] and A [4] results in data transfer overhead such as SD command issuance processing in the memory card drive 200 and address conversion processing in the SD card. Processing has occurred. However, in a series of sequences corresponding to A [2] and A [3], these overhead processes do not occur.

  Here, the time required to execute the SD command issuance process in the memory card drive 200 and the address conversion process in the SD card is a value u, and data transfer represented by each of DAT [1] to DAT [4]. T is the time required for a series of processing from the issuance of A [1] to the occurrence of an interrupt corresponding to A [1]. On the other hand, in A [2] and A [3], the time required for a series of processing until the corresponding interrupt is generated after the issuance is only t.

Therefore, the series of processing corresponding to A [1] to A [3] is shortened by 2u compared to the conventional operation shown in FIG.
In particular, when a plurality of SD cards are connected as shown in FIG. 1, the number of sectors read from one SD card by one ATA command decreases in inverse proportion to the number of connected cards due to striping, which is required for data transfer. The value of time t is similarly reduced. As a result, the difference between u, which is a constant value regardless of the number of continuous attachments, and t, which is inversely proportional to the number of continuous attachments, is small. Here, taking the number of continuous attachments where t = u as an example, a series of processing corresponding to A [1] to A [3] requires 6u in the conventional operation shown in FIG. In this embodiment, the process is completed in 4u. When this is compared with the transfer rate, it becomes 6u / 4u, and it can be seen that the transfer rate of the memory card drive 200 according to the present embodiment is improved by 50% compared to the conventional example.

  In this embodiment, the transfer rate is improved as the number of ATA commands continued from the read end sector of the ATA command preceded by the read start sector continues as shown in A [2] and A [3]. High efficiency is obtained. For example, with 8 ATA commands, when the read start sector is continuous with the read end sector of the preceding ATA command, the transfer rate is improved by 78% compared to the conventional example with t = u. .

  As described above, in the present embodiment, when reading a series of moving image data recorded in a recording area where logical addresses are continuous in the SD card, the size of the moving image data can be read according to one ATA command. If it exceeds 64 kbytes, the host device requests to read moving image data by dividing it by a plurality of ATA commands. However, when the memory card controller controls the supply of the clock signal to the SD card, the SD card is processed as one continuous read operation.

As a result, it is possible to suppress an adverse effect on the read rate by the overhead processing such as the conversion process from the ATA command to the SD command and the conversion process from the logical address to the physical address, thereby improving the read rate.
In this embodiment, reading of large-capacity data recorded in a continuous area is divided and processed as a plurality of read operations according to a plurality of ATA commands in the host device, and a set of transfer starts in the SD card. It is processed as a series of read operations by an instruction and a STOP instruction. However, since the read operation in the SD card is temporarily stopped during a period in which the data transfer is not accepted by the host device, the synchronization of the read operation between the host device and the SD card is not lost.

In the present embodiment, the configuration for improving the transfer rate during the SD card read operation has been described. However, the present invention is also applicable to the control of the write operation of the SD card.
Hereinafter, a modified example for improving the transfer rate for both writing and reading will be described. FIG. 7 is a flowchart showing a processing procedure of data transfer control by the memory card controller according to the modification of the present embodiment. In the flowchart shown in this figure, compared to the flowchart shown in FIG. 4, step S18 is added, the processing procedure of steps S5 to S8 related to the writing process is deleted, and the determination of step S12 is the determination of step S19. It is characterized in that it has been changed.

  Therefore, when an ATA command is received while a clock signal is being supplied to the SD card, the type of ATA command in the process of step S18, regardless of whether the ATA command is a command that requires writing or reading. Is recorded in the command storage unit 6 to determine whether the request is a write request or a read request, and then data transfer is controlled in the processes of steps S9 to S11.

Further, when the ATA command is received in a state where the clock signal supply to the SD card is stopped, the continuity checking condition determined in step S19 is changed to the following A) and B), When both conditions are satisfied, the process flow of step S13 is executed.
A) The type of the new ATA command currently being processed matches the type of the previously processed ATA command recorded in the command storage unit 6.
B) Transfer destination acquired in step S2 based on the continuous start address Z recorded in the command storage 6 when step S10 was executed in the previous ATA command processing and the new ATA command currently being processed Matches the logical address X [I].

As a result, this modification improves the transfer rate in both cases of writing and reading if the same type of ATA command for successive sectors is issued in succession in both writing and reading processes. Can do.
(Other variations)
Although the present invention has been described based on the above embodiment, it is needless to say that the present invention is not limited to the above embodiment. The following cases are also included in the present invention.

(1) The present invention may be the method described above. Further, the present invention may be a computer program that realizes these methods by a computer, or may be a digital signal composed of the computer program.
The present invention also provides a computer-readable recording medium such as a flexible disk, hard disk, CD-ROM, MO, DVD, DVD-ROM, DVD-RAM, BD (Blu-ray Disc). ), Recorded in a semiconductor memory or the like. Further, the present invention may be the computer program or the digital signal recorded on these recording media.

In the present invention, the computer program or the digital signal may be transmitted via an electric communication line, a wireless or wired communication line, a network represented by the Internet, or the like.
The present invention may be a computer system including a microprocessor and a memory, wherein the memory stores the computer program, and the microprocessor operates according to the computer program.

In addition, the program or the digital signal is recorded on the recording medium and transferred, or the program or the digital signal is transferred via the network or the like, and is executed by another independent computer system. It is good.
(2) In the above embodiment, the memory card drive device using an SD card as a memory card has been described. However, the present invention has the same effect as the above-described embodiment regardless of the memory card that is used as long as the memory card requires an instruction with a command having a different specification from the command issued from the host device. Of course, playing.

(3) In the above embodiment, the time is counted after the supply of the clock signal to the SD card is stopped, and the data transfer operation of the SD card is terminated as a timeout process after a predetermined time has elapsed. May be executed after a predetermined time has elapsed since the last processed ATA command was received.
(4) In the above embodiment, the host device is connected to the host device via a card bus. However, the host device may be connected to the host device via a PCI bus or SCSI.

(5) In the modified example of the above embodiment, the description has been given of the configuration in which the write operation is temporarily stopped by stopping the supply of the clock signal to the SD card. However, the write operation is suspended from the write from the SD card. It can also be realized by stopping the data supply.
(6) The above embodiment and the above modifications may be combined.

  As an application example of the present invention, there is a memory card drive device in the form of a PC card for controlling data transfer to an SD card.

The figure which shows the imaging | photography reproduction | regeneration system using the memory card drive device which concerns on this invention. The figure which shows the internal structure of each apparatus which comprises the imaging | photography reproduction | regeneration system based on this invention. FIG. 3 is a diagram showing details of the configuration of the memory card drive 200. 6 is a flowchart showing a processing procedure in the memory card controller according to the embodiment. The figure which shows the processing sequence of the memory card drive. 6 is a timing chart showing an example of a read operation by the memory card controller according to the present embodiment. 9 is a flowchart showing a processing procedure of data transfer control by a memory card controller according to a modification of the embodiment. 10 is a timing chart showing an operation example of a conventional memory card controller.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 External interface part 2 Memory card controller 3 PCI target 4 PCI bus master 5 Command analysis part 6 Command storage part 7 Command conversion part 8 Continuity verification part 9 Command start end control part 10 Clock start end control part 11 Data memory 100a, b Host device 101 Video signal input / output means 102 Signal processing means 103 Drive control means 200 Memory card drive 300a-d SD card

Claims (13)

A memory card that controls data transfer between a host device that issues a command specifying the amount of data and requests data transfer, and a memory card that executes a transfer operation from receipt of a transfer start command to receipt of a transfer end command A controller,
The memory card accesses a built-in nonvolatile memory by converting a logical address designated by the transfer start command by the host device into a physical address,
Receiving means for receiving a command from the host device;
When the amount of data transferred by execution of the transfer operation reaches the amount of data specified by the preceding command requesting data transfer, temporary stop means for temporarily stopping the transfer operation in the memory card;
When the subsequent command received when the transfer operation of the memory card is in a suspended state is a command for requesting data transfer to the address next to the end address of the data transfer according to the preceding command, the temporary A memory card controller comprising: restarting means for restarting the transfer operation in the memory card from the stopped state. The data transfer is data reading from a memory card,
The memory card controller according to claim 1, wherein the transfer operation in the memory card is a data read operation. 3. The memory card controller according to claim 2, wherein the temporary stop and restart of the data read operation in the memory card are controlled by stopping and resupplying a clock signal to the memory card. The memory card controller further comprises command issuing means for controlling the start and end of the data read operation in the memory card by issuing a transfer start command and a transfer end command,
Here, when a predetermined time has elapsed in the paused state, the restarting unit resumes the supply of the clock signal to release the paused state, and the command issuing unit issues a transfer end command to 4. The memory card controller according to claim 3, wherein the data reading operation in the card is terminated. 4. The memory card controller according to claim 3, wherein when the subsequent command is a command that does not require access to the memory card, the temporary stop unit maintains the temporarily stopped state. 5. The memory card controller further comprises command issuing means for controlling the start and end of the transfer operation in the memory card by issuing a transfer start command and a transfer end command,
Here, when the subsequent command is a command requesting either data write or data read from an address that is not continuous with an end address of data read according to the preceding command, the resuming means includes: The supply of the clock signal is resumed to release the pause state, and the command issuing means issues a transfer end command to end the data read operation in the memory card, and then transfers the transfer start command according to the subsequent command. The memory card controller according to claim 3, wherein the memory card controller is issued. The data transfer is data writing to a memory card,
The memory card controller according to claim 1, wherein the transfer operation in the memory card is a data write operation. 8. The memory card controller according to claim 7, wherein suspension and resumption of data writing operation in the memory card are controlled by stopping and resupplying write data to the memory card. 9. The memory card controller further comprises command issuing means for issuing a transfer end command and ending a data write operation in the memory card when a predetermined time has elapsed in the paused state. Memory card controller as described in 9. The memory card controller according to claim 8, wherein when the subsequent command is a command that does not require access to the memory card, the temporary stopping unit maintains the temporary stopped state. The memory card controller further transfers the data when the subsequent command is a command requesting either data reading or data writing from an address that is not continuous with an end address of data writing according to the preceding command. 9. The memory card controller according to claim 8, further comprising command issuing means for issuing a transfer start command according to the subsequent command after issuing an end command to end the data writing operation in the memory card. . A memory card controller according to claim 1;
First interface means for connecting to the host device;
Second interface means for attaching one or more memory cards;
Here, the memory card controller accesses the memory card attached to the second interface unit based on a command input from the first interface unit. A memory card that controls data transfer between a host device that issues a command specifying the amount of data and requests data transfer, and a memory card that executes a transfer operation from receipt of a transfer start command to receipt of a transfer end command A controller program,
The memory card accesses a built-in nonvolatile memory by converting a logical address designated by the transfer start command by the host device into a physical address,
When the amount of data transferred by execution of the transfer operation reaches the amount of data specified by the preceding command, temporarily stopping the transfer operation in the memory card;
When the transfer operation of the memory card is in a paused state, when a subsequent command requesting data transfer for the address next to the end address of the data transfer according to the preceding command is accepted, the pause is performed. A program for causing a processor of a memory card controller to execute a step of resuming a transfer operation in a memory card from a state where the memory card is in a state.

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