JP4314956B2 - Electronic device, information signal processing method therefor, program for executing the processing method, and information signal processing apparatus to which the program is connected - Google Patents

Description

  The present invention provides information for obtaining a second information signal by performing processing on the first information signal using predetermined data generated in advance based on a predetermined information signal corresponding to the first information signal. The present invention relates to an electronic device that is used by being detachably connected to a signal processing device, an information signal processing method therefor, a program for executing the processing method, and an information signal processing device to which the electronic signal processing device is connected.

  Specifically, according to the present invention, the predetermined amount for the first information signal is determined based on the feature amount extracted from the first information signal and the feature amount of the predetermined information signal every predetermined period of the first information signal. The suitability of the process using the data is determined, and at least the first information signal or its processing information for a predetermined period determined to be nonconforming is sequentially stored, and based on this stored information, the nonconformity is determined. The first information signal or its processing information effective for version upgrade development is sufficiently stored by determining whether or not the first information signal stored and the processing information has reached a predetermined amount. This relates to an electronic device or the like that can notify the user of replacement and collection.

  In recent years, the development of television receivers capable of obtaining higher-resolution images has been desired due to the increase in audio / visual orientation, and so-called high-vision has been developed in response to this demand. The number of high-definition scanning lines is 1125, which is more than twice the number of NTSC scanning lines, which is 525. The aspect ratio of the high-definition television is 9:16, whereas the aspect ratio of the NTSC system is 3: 4. For this reason, high-definition images can be displayed with a higher resolution and presence than in the NTSC system.

  Hi-vision has such excellent characteristics, but even if an NTSC image signal is supplied as it is, high-definition image display cannot be performed. This is because the standards differ between the NTSC system and the high vision as described above.

  Accordingly, the present applicant has previously proposed a conversion device for converting an NTSC image signal into a high-definition image signal in order to display an image corresponding to the NTSC image signal in a high-definition method (Patent Literature). 1).

  In this conversion apparatus, pixel data of a predetermined area corresponding to pixel data at a target position of a high-definition image signal is extracted from an NTSC image signal, and based on the level distribution pattern of the pixel data of the predetermined area, the above-described pixel data is extracted. The class to which the pixel data of the target position belongs is determined, and the pixel data of the target position is generated corresponding to this class.

JP-A-8-51599

  However, in the conversion device described in Patent Document 1 described above, pixel data of the target position is generated based on the estimation formula using coefficient data of the estimation formula generated in advance using a predetermined image signal. In this case, when the image signal to be actually processed has a quality different from that of the predetermined image signal, the pixel data of the target position cannot be generated satisfactorily by the arithmetic processing using the coefficient data.

  Therefore, when an electronic device is detachably connected to the conversion device, and an image signal having a quality different from a predetermined image signal is input to the storage medium in the electronic device and processed, It is conceivable that the image signal is stored as an incompatible image signal and used when obtaining the coefficient data of the above-described estimation formula at the time of version upgrade.

  However, the user usually does not know when to replace and retrieve the electronic device. Even if it is possible to replace and collect the electronic device at any time, there is no point in replacing and collecting the electronic device unless a meaningful image signal is stored in both quality and quantity.

  An object of the present invention is to enable a user to be notified of exchange and collection in a state where information signals effective for version upgrade development are sufficiently stored.

The electronic apparatus according to the present invention selects , based on the first information signal, a plurality of first information data located around the position of interest in the second information signal having a larger number of pixels than the first information signal. First data selection means for extracting, based on the plurality of first information data selected by the first data selection means, first feature quantity extraction means for extracting the first feature quantity, Based on the first feature quantity extracted by the one feature quantity extraction means, class detection means for detecting the class to which the information data of the position of interest in the second information signal belongs, and on the basis of the first information signal , Second data selection means for selecting a plurality of second information data located around the position of interest in the second information signal, and a plurality of second information data selected by the second data selection means And the predetermined data, Using the coefficient data used in the estimation formula of the class detected by the class detection means obtained using the predetermined data, the information data of the position of interest in the second information signal is calculated based on the estimation formula is removably connected to the information signal processing equipment and a calculation means may be, the first second corresponding to the feature quantity features and the second extracted in the first feature extraction means a second feature extraction means for extracting a third feature amount that is different from the characteristic quantity, each between a period of time or occasional the first information signal, first extracted by the second feature extraction means 2 For each class based on the first information indicating the frequency distribution of the third feature quantity for each class detected from the feature quantity and the second information corresponding to the first information related to the predetermined information signal Obtain the correlation coefficient of the frequency distribution, and based on the correlation coefficient, And determining conformity judging unit compatibility processing using the coefficient data in the information signal processing apparatus in Las, the first information signal or the predetermined period which is determined to be incompatible with at least conformity judging unit first Based on the information stored in the first storage means, the first storage means for sequentially storing the processing information indicating the frequency distribution of the third feature amount of one information signal, the first storage means And an information amount determining means for determining whether or not the stored first information signal or processing information determined to be nonconforming has reached a predetermined amount. For example, the electronic apparatus further includes a second storage unit that stores predetermined data.

The information signal processing method in the electronic device according to the present invention is based on the first information signal, and a plurality of first signals positioned around the target position in the second information signal having a larger number of pixels than the first information signal. First data selection means for selecting the information data, feature quantity extraction means for extracting the first feature quantity based on the plurality of first information data selected by the first data selection means, and feature Based on the first feature quantity extracted by the quantity extraction means, class detection means for detecting the class to which the information data of the target position in the second information signal belongs, and on the basis of the first information signal, the second information signal Second data selection means for selecting a plurality of second information data located around the position of interest in the information signal; a plurality of second information data selected by the second data selection means; and predetermined data Or the Using the coefficient data used in the estimation equation of the class detected by the class detection means obtained using the constant data, and calculating the information data of the position of interest in the second information signal based on the estimation equation obtaining the information signal processing apparatus having an arithmetic unit, an electronic device used by being detachably connected to a second corresponding to the first feature extracted by the feature amount extraction unit features and the second a feature amount extraction step of extracting a different third feature quantity and the feature quantity for each between a period of time or occasional the first information signal is detected from the second feature amounts extracted by the feature extraction means Correlation coefficient of frequency distribution of each class based on the first information indicating the frequency distribution of the third feature amount for each class and the second information corresponding to the first information relating to the predetermined information signal And based on the correlation coefficient A conformity judging step of determining the suitability of treatment with the coefficient data in the information signal processing apparatus according to class, the first information signal or the predetermined period which is determined to be incompatible with at least conformity judging step the A storage step for sequentially storing the processing information indicating the frequency distribution of the third feature amount of the one information signal , and the non-conformity determined in the storage step based on the information stored in the storage step. And an information amount determination step for determining whether or not one information signal or processing information has reached a predetermined amount.

  A program according to the present invention is for causing a computer to execute the information signal processing method in the electronic device described above.

  In the present invention, the feature amount of the first information signal is extracted. Based on the extracted feature amount and the feature amount of the predetermined information signal used when generating the predetermined data for each predetermined period of the first information signal, a predetermined amount for the first information signal is determined. The suitability of the processing using the data is determined. For example, the first information signal for a predetermined period for determining the suitability of the processing described above is set at regular intervals, or is set irregularly.

  Then, at least the first information signal for a predetermined period determined to be nonconforming or the processing information thereof are sequentially stored, and based on the stored information, the first information signal determined to be nonconforming and stored It is determined whether or not the processing information has reached a predetermined amount.

  For example, based on the determination result, the user is notified that the first information signal determined to be nonconforming or the processed information thereof has reached a predetermined amount. This notification may be performed on the information signal processing device side. This makes it possible to notify the user of replacement and collection in a state where the first information signal effective for version upgrade development or its processing information is sufficiently stored.

  In this case, the first feature quantity extraction unit includes a second feature quantity corresponding to the first feature quantity extracted by the second feature quantity extraction unit and a third feature different from the second feature quantity. The first information indicating the frequency distribution of the third feature value for each class detected from the second feature value for each predetermined period of the first information signal. And a correlation coefficient of the frequency distribution of each class based on the second information corresponding to the first information relating to the predetermined information signal, and the information signal processing device in each class based on the correlation coefficient The suitability of processing using the coefficient data is determined.

  In addition, for example, the first storage means includes, in addition to the first information signal for each predetermined period or the processed information thereof, the second information signal for the predetermined period or the processed information, The frequency information of each class detected from the feature amount of the first class, the correlation coefficient of the frequency distribution of each class determined based on the first information and the second information, and the correlation coefficient The conformity determination result of each class is stored, and the information amount determination means is based on the frequency information for each predetermined period, the correlation coefficient, and the conformity determination result stored in the first storage means. It is determined whether or not the first information signal determined to be incompatible or the processing information stored in the first storage means has reached a predetermined amount.

  Further, for example, the information signal processing apparatus further includes parameter input means for inputting a parameter value that determines the quality of the output obtained by the second information signal, and the estimation formula obtained for each class as the predetermined data. 2 further includes second storage means for storing coefficient seed data which is coefficient data in a generation formula including a parameter for generating coefficient data used in the above. For example, the first storage unit stores the parameter value in association with the first information signal for the predetermined period in addition to the first information signal for each processing period. By storing the parameter value in this way, it is possible to perform processing using this parameter value at the time of version upgrade.

  In addition, the information signal processing apparatus according to the present invention performs a process on the first information signal using predetermined data generated in advance based on a predetermined information signal corresponding to the first information signal. An information signal processing apparatus for obtaining a second information signal has a board connecting part for detachably connecting the electronic device described above. In the present invention, at the time of version upgrade, the electronic device can be exchanged and collected, and processing using the first information signal stored in the electronic device or processing information thereof can be performed.

  According to the present invention, the predetermined amount for the first information signal is determined for each predetermined period of the first information signal based on the feature amount extracted from the first information signal and the feature amount of the predetermined information signal. The suitability of the processing using the data is determined, and at least the first information signal or the processing information for a predetermined period determined to be nonconforming is sequentially stored, and based on this stored information, the nonconforming is determined. The first information signal stored or the processing information thereof is determined whether or not a predetermined amount, and the first information signal or the processing information effective for version upgrade development is sufficiently stored Can notify the user of replacement and collection.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration of a television receiver 10 as an embodiment.
The television receiver 10 converts a broadcast signal received by the tuner 12, that is, an SD (Standard Definition) signal called a 525i signal into an HD (High Definition) signal called a 1050i signal, and displays an image based on the HD signal. Has function. Here, the 525i signal is an interlaced image signal having 525 lines, and the 1050i signal is an interlaced image signal having 1050 lines.

  FIG. 2 shows the pixel position relationship of a frame (F) in which a 525i signal and a 1050i signal are present. The pixel position of an odd (o) field is indicated by a solid line, and the pixel position of an even (e) field is indicated by a broken line. ing. Large dots are pixels of 525i signal, and small dots are pixels of 1050i signal. As can be seen from FIG. 2, the pixel data of the 1050i signal includes line data L1 and L1 ′ at positions close to the line of the 525i signal and line data L2 and L2 ′ at positions far from the line of the 525i signal. Here, L1 and L2 are line data of odd fields, and L1 'and L2' are line data of even fields. The number of pixels in each line of the 1050i signal is twice the number of pixels in each line of the 525i signal.

  In the television receiver 10, a tuner 12, a decoder 13, a CPU (Central Processing Unit) 14, a RAM (Random Access Memory) 15, a ROM (Read Only Memory) 16, a DRC (Digital Reality Creation) are connected via an internal bus 11. In addition to the circuit 17 and the input / output interface 19 being connected to each other, the drive 20 is further connected as necessary.

  A board bay 18 which is an electronic device having a board structure is detachably connected to the DRC circuit 17. That is, the substrate bay 18 can be replaced and collected. A light receiving unit 22, a display unit 24, an HDD (Hard Disk Drive) 25, and an operation unit 26 are connected to the input / output interface 19.

  An optical signal output by the user operating the remote control transmitter 23 is input from the light receiving unit 22. The user can also input a command by operating the operation unit 26. CPU14 performs the process based on the received instruction | command. The user can input the values of parameters r and z for adjusting the image quality of the image displayed on the display unit 24 by operating the remote control transmitter 23, for example. In the present embodiment, the image quality to be adjusted is, for example, resolution and noise suppression degree.

  The CPU 14 executes various processes according to a program stored in the ROM 16 or a program loaded from the HDD 25 to the RAM 15. The RAM 15 also appropriately stores data necessary for the CPU 14 to execute various processes. The HDD 25 stores an OS (Operating Systems) executed by the CPU 14 and application programs.

  When the infrared signal RM is input from the remote control transmitter 23 to the light receiving unit 22 or a command is input to the operation unit 26 by the user based on the user's operation, the CPU 14 performs a broadcast (not shown) on the tuner 12. The broadcast signal from the station is received and the decoder 13 decodes it. The decoder 13 outputs an SD signal (525i signal) based on the decoded broadcast signal to the DRC circuit 17 via the internal bus 11.

  The DRC circuit 17 receives the SD signal (525i signal) and converts the SD signal into an HD signal (1050i signal). At this time, the DRC circuit 17 adjusts the resolution of the image by the HD signal and the degree of noise removal based on the above-described values of the parameters r and z of the resolution and the degree of noise removal, which are instructed by the user. A configuration example of the DRC circuit 17 and the substrate bay 18 connected thereto will be described later.

  The HD signal obtained by the DRC circuit 17 is output to the display unit 24 via the internal bus 11 and the input / output interface 19. The display unit 24 displays an image based on the HD signal. The display unit 24 includes, for example, a CRT (cathode-ray tube) display, an LCD (liquid crystal display), a PDP (Plasma Display Panel), or the like.

  The internal bus 11 is connected to the drive 20 as necessary, and a removable medium 21 composed of a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory is appropriately mounted, and a computer program read therefrom is read as necessary. Installed in the HDD 25.

The operation of the television receiver 10 shown in FIG. 1 will be described.
Broadcast signals received by the tuner 12 are supplied to the decoder 13 via the internal bus 11. In the decoder 13, the broadcast signal from the tuner 12 is subjected to decoding processing, error correction processing, and the like, and an SD signal (525i signal) based on this broadcast signal is obtained. The SD signal obtained by the decoder 13 is supplied to the DRC circuit 17 via the internal bus 11.

  The DRC circuit 17 performs processing for converting the SD signal from the decoder 13 into an HD signal (1050i signal). In this case, the resolution of the image by the HD signal and the degree of noise removal are adjusted based on the value of the parameter r and the value of the parameter z instructed by the user.

  The HD signal obtained by the DRC circuit 17 is supplied to the display unit 24 via the internal bus 11 and the input / output interface 19. An image based on the HD signal is displayed on the screen of the display unit 24.

  In the substrate bay 18, for example, the conformity of the SD signal (525i signal) processed by the DRC circuit 17 is determined every certain period, and at least for the predetermined period determined to be nonconforming, in this embodiment. An SD signal for one field is stored. Here, the certain period is a fixed period or an indefinite period. For example, the suitability of the SD signal is determined every time the power is turned on or whenever the user changes the values of the parameters r and z.

Thus, the SD signals for each field stored in the board bay 18 are converted into coefficient seed data w _{i0 to} w _i9 (i = 1 to n) stored in the ROM 119 when the board bay 18 is replaced at the time of version upgrade. ) Is used.

  Next, details of the DRC circuit 17 will be described. FIG. 3 shows the configuration of the DRC circuit 17.

  The DRC circuit 17 selectively selects a plurality of SD pixel data located around the target position in the HD signal (1050i signal) from the SD signal (525i signal) transmitted from the decoder 13 via the internal bus 11. It has first and second tap selection circuits 101 and 102 that take out and output.

  The first tap selection circuit 101 selectively extracts a plurality of SD pixel data used for prediction as prediction tap data xi. The second tap selection circuit 102 selectively extracts a plurality of SD pixel data used for class classification as class tap data. 4A and 4B show examples of class taps and prediction taps, respectively.

  Also, the DRC circuit 17 extracts a level distribution pattern as the first feature amount from the class tap data (a plurality of SD pixel data) selectively extracted by the second tap selection circuit 102, and this level distribution pattern Has a class detection circuit 103 for obtaining a class code CL corresponding to. The class detection circuit 103 performs a class of compression processing such as ADRC (Adaptive Dynamic Range Coding), DPCM (Predictive Coding), VQ (Vector Quantization), etc. on a plurality of SD pixel data, for example. Get the code CL.

  The case where ADRC is performed with K bits will be described. In the K-bit ADRC, a dynamic range DR = MAX−MIN that is a difference between the maximum value MAX and the minimum value MIN of a plurality of SD pixel data is detected, and a plurality of SD pixel data is converted to K bits based on the dynamic range DR. Is re-quantized.

That is, for each pixel data contained in the class tap, the minimum value MIN is subtracted from the pixel data, the subtracted value is divided (quantized) by DR / 2 ^K. As a result, a plurality of pixel data is re-quantized to K bits, and a bit string in which the pixel data are arranged in a predetermined order becomes a class code CL.

  Therefore, in 1-bit ADRC, for each pixel data included in the plurality of SD pixel data, the minimum value MIN is subtracted from the pixel data, and the subtracted value is divided by DR / 2. Thereby, a plurality of SD pixel data is requantized to 1 bit, and a bit string in which the SD pixel data is arranged in a predetermined order becomes the class code CL.

  Further, the DRC circuit 17 has a coefficient memory 104. This coefficient memory 104 stores, for each class, a plurality of coefficient data Wi used in the estimation formula used in the estimated prediction calculation circuit 106 described later. The coefficient data Wi is information for converting an SD signal (525i signal) into an HD signal (1050i signal).

  As described above, when the 525i signal is converted into the 1050i signal, it is necessary to obtain four pixels of the 1050i signal corresponding to one pixel of the 525i signal in each of the odd and even fields. In this case, the four pixels in the 2 × 2 unit pixel block constituting the 1050i signal in each of the odd and even fields have different phase shifts with respect to the central prediction tap.

FIG. 5 shows a phase shift from the center prediction tap SD ₀ in the four pixels HD _{1 to} HD ₄ in the 2 × 2 unit pixel block constituting the 1050i signal in the odd field. Here, the position of HD ₁ ~HD _4, respectively, k ₁ to k ₄ in the horizontal direction from the position of the SD _0, are offset in the vertical direction by m ₁ ~m _4.

FIG. 6 shows a phase shift from the center prediction tap SD ₀ ′ in the four pixels HD ₁ ′ to HD ₄ ′ in the 2 × 2 unit pixel block constituting the 1050i signal in the even field. Here, the position of HD ₁ '~HD _4', respectively, SD ₀ ~k ₄ 'k ₁ in the horizontal direction from the position of'deviates', vertically m ₁ 'only ~m _4'.

Therefore, coefficient data Wi is stored in the coefficient memory 104 for each combination of class and output pixels (HD _{1 to} HD ₄ , HD ₁ ′ to HD ₄ ′).

  The coefficient memory 104 is supplied with the class code CL obtained by the above-described class detection circuit 103 as read address information, and from the coefficient memory 104, coefficient data Wi (i = 1 to n) of the estimation formula corresponding to the class code CL. ) Is read out and supplied to the estimated prediction calculation circuit 106.

  Further, the DRC circuit 17 has an interface 105 for connecting the substrate bay 18. The SD signal (525i signal) is supplied to the substrate bay 18 through the interface 105. Further, the values of the parameters r and z that determine the resolution and the noise removal degree adjusted by the user are supplied to the substrate bay 18 via the interface 105. Further, the coefficient data Wi of the estimation formula of each class corresponding to the values of the parameters r and z generated in the board bay 18 is supplied from the board bay 18 to the coefficient memory 104 via the interface 105 and stored. .

  Further, the DRC circuit 17 includes an estimated prediction calculation circuit 106. The estimated prediction calculation circuit 106 uses (1) the prediction tap data (multiple SD pixel data) xi selectively extracted by the first tap selection circuit 101 and the coefficient data Wi read from the coefficient memory 104. Based on the estimated equation, pixel data of the HD signal to be created (pixel data at the target position) is calculated.

As described above, when an SD signal is converted into an HD signal, four pixels of the HD signal (HD _{1 to} HD ₄ in FIG. 5 and HD ₁ ′ to HD ₄ ′ in FIG. 6) with respect to one pixel of the SD signal. See). In the estimated prediction calculation circuit 106, pixel data is generated for each 2 × 2 unit pixel block constituting the HD signal.

That is, in the estimated prediction calculation circuit 106, the first tap selection circuit 101 configures the prediction tap data xi corresponding to four pixels (target pixel) in the unit pixel block and the coefficient memory 104 constitutes the unit pixel block. The coefficient data Wi corresponding to the four pixels to be supplied is supplied. Then, in the estimation predictive calculating circuit 106, four pixels data y ₁ ~y ₄ of constituting the unit pixel block is individually calculated by the estimation equation for each above-described equation (1).

Moreover, DRC circuit 17, chromatic estimated prediction calculation circuit 106 are sequentially output from the post-processing circuit 107 for outputting the format of the 1050i signal in line sequence data y ₁ ~y ₄ of 4 pixels in the unit pixel block is doing.

Next, the operation of the DRC circuit 17 shown in FIG. 3 will be described.
The second tap selection circuit 102 is located around the four pixels (the pixel at the target position) in the unit pixel block constituting the HD signal (1050i signal) to be created based on the SD signal (525i signal). A plurality of SD pixel data are selectively extracted as class tap data. The class tap data is supplied to the class detection circuit 103.

  In the class detection circuit 103, a plurality of SD pixel data is subjected to data compression processing such as ADRC to obtain a class code CL. The class code CL indicates a class to which four pixels (target pixel) in the unit pixel block belong to each unit pixel block constituting the HD signal (1050i signal) to be created. This class code CL is supplied to the coefficient memory 104 as read address information.

In the coefficient memory 104, for example, in each vertical blanking period, the class and output pixels (HD _{1 to} HD ₄ , HD ₁₎ generated in the substrate bay 18 corresponding to the values of the parameters r and z adjusted by the user are stored. Coefficient data Wi for each combination of ′ to HD ₄ ′) is stored. When the class code CL is supplied to the coefficient memory 104 as read address information, four output pixels corresponding to the class code CL (HD _{1 to} HD _{4 in} the odd field, HD ₁ ′ in the even field) are output from the coefficient memory 104. The coefficient data Wi of the estimation formula for .about.HD ₄ ′) is read and supplied to the estimated prediction calculation circuit 106.

  Further, the first tap selection circuit 101 is positioned around the four pixels (the pixel at the target position) in the unit pixel block constituting the HD signal (1050i signal) to be created based on the SD signal (525i signal). The plurality of SD pixel data are selectively extracted as the prediction tap data xi. The prediction tap data xi is supplied to the estimated prediction calculation circuit 106.

In the estimated prediction calculation circuit 106, four pixels in the unit pixel block constituting the HD signal to be created (of the target position) from the prediction tap data xi and the coefficient data Wi for four output pixels read from the coefficient memory 104. Pixel) data y _{1 to} y ₄ are calculated (see equation (1)). The data y _{1 to} y ₄ sequentially output from the estimated prediction calculation circuit 106 are supplied to the post-processing circuit 107.

In the post-processing circuit 107, the data y _{1 to} y ₄ sequentially supplied from the estimated prediction calculation circuit 106 are line-sequentially output in the format of a 1050i signal. That is, the post-processing circuit 107 outputs a 1050i signal as an HD signal.

Next, details of the substrate bay 18 will be described. FIG. 7 shows the configuration of the substrate bay 18.
The board bay 18 has an interface 111 for transmitting signals to and from the DRC circuit 17. The interface 111 takes in the SD signal and the values of the parameters r and z sent from the DRC circuit 17 side to the board bay 18 side, and receives the coefficient data Wi generated inside the board bay 18 side. To send.

  The board bay 18 also includes a buffer 112 that temporarily stores SD signals captured by the interface 111, and a feature amount extraction unit 113 that extracts feature amounts of the SD signals stored in the buffer 112. .

  The feature amount extraction unit 113 includes a tap selection circuit 114, a class detection circuit 115, and a dynamic range extraction circuit (DR extraction circuit) 116. The tap selection circuit 114 is configured in the same manner as the second tap selection circuit 102 (see FIG. 3) of the DRC circuit 17 described above, and an HD signal (1050i) is generated from an SD signal (525i signal) supplied from the DRC circuit 17 side. A plurality of SD pixel data located around the target position in the signal) is selectively extracted as class tap data.

  The class detection circuit 115 is configured in the same manner as the class detection circuit 103 of the DRC circuit 17 described above, and uses the class tap data (a plurality of SD pixel data) selectively extracted by the tap selection circuit 114 as a second feature amount. The level distribution pattern is extracted, and the class code CL corresponding to this level distribution pattern is acquired.

  The DR extraction circuit 116 uses the dynamic range DR (the difference between the maximum value AX and the minimum value MIN as a third feature amount from the class tap data (a plurality of SD pixel data) selectively extracted by the tap selection circuit 114. = MAX-MIN).

  The board bay 18 has an input signal compatibility determination unit 117. This input signal suitability determination unit 117 is provided with a class code CL and DR extraction circuit obtained by the class detection circuit 115 every predetermined period of the SD signal, and in this embodiment, every field of the SD signal. Based on the dynamic range DR extracted at 116, the suitability of the estimated prediction calculation process using the coefficient data Wi described above for this SD signal is determined.

  Note that the SD signal for one field for determining the suitability of this processing is set at regular intervals or is set at irregular intervals. As an irregular example, for example, when the values of the parameters r and z are changed, or when the television receiver 10 is turned on can be considered.

  The input signal compatibility determination unit 117 is based on a plurality of class codes CL obtained by the class detection circuit 115 and a plurality of dynamic ranges DR extracted by the DR extraction circuit 116 for one field of SD signals. 8B, for each class, a DR value frequency distribution indicating the frequency of each value of the dynamic range DR (hereinafter referred to as “DR value frequency distribution during user viewing” as appropriate) is generated. The DR value frequency distribution during user viewing constitutes first information.

The input signal suitability determination unit 117 includes a ROM 118. In this ROM 118, as shown in FIG. 8A, an SD signal which is a learning material at the time of development, that is, when coefficient seed data w _{i0 to} w _i9 (i = 1 to n) stored in the ROM 119 described later is generated. The DR value frequency distribution of each class (hereinafter referred to as “DR frequency distribution during development” as appropriate) is stored. The DR value frequency distribution at the time of development constitutes second information.

The input signal suitability determination unit 117 further obtains the above-described correlation coefficient c of the DR value frequency distribution at the time of development and user viewing based on the equation (2) for each class. In equation (2), freq _st (x) is the frequency of DR values x in the DR value frequency distribution during development, mfreq _st the frequency average in DR value frequency distribution during development, STDV _st the DR value frequency during development The frequency standard deviation in the distribution is shown (see FIG. 9A), freq _us (x) is the frequency of the DR value x in the DR value frequency distribution during user viewing, and mfreq _us is the frequency average in the DR value frequency distribution during user viewing. , Stdv _us indicates the frequency standard deviation in the DR value frequency distribution during user viewing (see FIG. 9B), and N indicates the number of values that the DR value x can take.

Furthermore, the input signal suitability determination unit 117 compares the correlation coefficient c with the threshold value Th for each class to obtain the input signal suitability determination results h _{1 to} h _N. In this case, when the correlation coefficient c is large and c ≧ Th, it is determined that there is compatibility. For example, a determination result “0” is output, while when the correlation coefficient c is small and c <Th, For example, the determination result “1” is output.

  When the correlation coefficient c is large, the DR value frequency distribution at the time of development and user viewing is similar, and the SD signal processed by the DRC circuit 17 is compatible with the SD signal that is the learning material at the time of development. Therefore, there is a high possibility that the result of the estimated prediction calculation process in the DRC circuit 17 has no problem. For this reason, the value of leaving this SD signal as history information for development is low.

  Conversely, when the correlation coefficient is small, the DR value frequency distribution at the time of development and user viewing is not similar, and the SD signal processed by the DRC circuit 17 is different from the SD signal that is the learning material at the time of development. There is no possibility of compatibility, and there is a high possibility that the result of the estimated prediction calculation processing in the DRC circuit 17 is broken. Therefore, it is highly worth leaving this SD signal as history information for development.

  Instead of this SD signal or together with this SD signal, processing information of the SD signal representing the characteristics of this SD signal, such as the DR value frequency distribution of each class described above, may be left as history information. . In the present embodiment, as will be described later, the SD signal itself is shown as history information.

  The board bay 18 has a ROM 119. In this ROM 119, coefficient seed data for each class is stored in advance. This coefficient seed data is coefficient data of a generation formula for generating coefficient data Wi to be stored in the coefficient memory 104 of the DRC circuit 17 described above.

  In the above-described estimated prediction calculation circuit 106 (see FIG. 3), the HD pixel data y to be generated is calculated from the prediction tap data xi and the coefficient data Wi read from the coefficient memory 104 by the estimation expression (1). Calculated.

The coefficient data Wi (i = 1 to n) of this estimation formula is generated by a generation formula including parameters r and z as shown in formula (3). As described above, r is a parameter that determines the resolution, and z is a parameter that determines the degree of noise removal. In the ROM 119, coefficient seed data w _{i0 to} w _i9 (i = 1 to n) which are coefficient data of this generation formula are stored in classes and output pixels (HD _{1 to} HD ₄ in FIG. 5, HD ₁ ′ to HD in FIG. 6). For each combination of HD ₄ '). A method for generating the coefficient seed data will be described later.

The board bay 18 uses the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) of each class and the values of the parameters r and z, and uses the equation (3) for each combination of class and output pixel. The coefficient generation circuit 120 generates coefficient data Wi (i = 1 to n) of the estimation formula corresponding to the values of the parameters r and z. The coefficient generation circuit 120 is loaded with coefficient seed data w _{i0 to} w _i9 (i = 1 to n) from the ROM 119. The coefficient generation circuit 120 is supplied with values of parameters r and z adjusted by the user from the DRC circuit 17 side via the interface 111.

  The coefficient data Wi (i = 1 to n) of each class generated by the coefficient generation circuit 120 is supplied to the DRC circuit 17 side via the interface 111 and stored in the coefficient memory 104 described above. The generation of the coefficient data Wi in the coefficient generation circuit 120 is performed, for example, every vertical blanking period. Thereby, even if the values of the parameters r and z are changed by the user's operation, the coefficient data Wi of each class stored in the coefficient memory 104 of the DRC circuit 17 is made to correspond to the values of the parameters r and z. It can be changed immediately, and the user can smoothly adjust the resolution and the degree of noise removal.

  The substrate bay 18 includes a history information control unit 121 and a history information storage unit 122. The history information control unit 121 sequentially stores history information in the history information storage unit 122 every time the above-described input signal suitability determination unit 117 determines suitability. FIG. 10 shows the stored contents of the history information storage unit 122. Here, N pieces of history information 1 to history information M are stored.

  The history information control unit 121 does not store history information when all classes are determined to be compatible. In this case, it is not worth keeping the SD signal as a history for development at the time of version upgrade.

  Each history information includes an input signal, determination information, and additional information. As described above, in the present embodiment, the SD signal for one field when the suitability is determined is stored as the input signal. The history information control unit 121 acquires the SD signal for one field from the buffer 112 and stores it in the history information storage unit 122. By storing the values of the parameters r and z in this way, processing using the values of the parameters r and z can be performed at the time of version upgrade. As described above, instead of this SD signal, processing information of the SD signal, for example, the DR value frequency distribution of each class may be stored. When the history information storage unit 122 stores the DR value frequency distribution of each class as an input signal, the history information storage unit 122 acquires the DR value frequency distribution of each class from the input signal suitability determination unit 117 and stores it in the history information storage unit 122. Remember.

  The additional information is the values of the parameters r and z when the suitability is determined. The history information control unit 121 stores the values of the parameters r and z supplied from the DRC circuit 17 side via the interface 111 in the history information storage unit 122. In addition, in the case where an SD signal is stored as an input signal as described above instead of the values of the parameters r and z, for example, as described above, the DR frequency distribution of each class may be stored as the additional information.

Further, as shown in FIG. 11, the determination information includes the frequencies freq _{1 to} freq _N of each class, the correlation coefficients c _{1 to} c _{N of} each class, and the compatibility determination results h _{1 to} h _N. The history information control unit 121 acquires the frequency, correlation coefficient, and suitability determination result of each class from the input signal suitability determination unit 117 and stores them in the history information storage unit 122.

  The board bay 18 includes a history information determination amount extraction unit 123 and a history information usefulness determination unit 124. The history information determination amount extraction unit 123 extracts a history information determination amount H for determining the usefulness of the history information based on the determination information of each history information stored in the history information storage unit 122. That is, the history information determination amount H is calculated based on the equation (4).

Since the frequency freq is included in the equation (4), the amount of SD signal can be determined by the history information determination amount H, and since the correlation coefficient c is included in the equation (4), the history information determination amount H Thus, the quality of the SD signal can be determined. In addition, the value which the correlation coefficient c can take is -1.0-1.0. In equation (4), (1-c _n (t)) is set so that the history information determination amount H increases when there is no correlation.

  The history information determination amount H obtained by the equation (4) becomes a larger value as the class determined not to be compatible and the frequency of the class are larger, and even when there is no compatibility, there is no further correlation. That is, as the history information determination amount H increases, it means that more SD signals useful for development are stored in the history information storage unit 122.

  The history information usefulness determination unit 124 compares the history information determination amount H obtained by the history information determination amount extraction unit 123 with the threshold th as described above, and stores the SD signal stored in the history information storage unit 122. Determine the usefulness of. In this case, when H ≧ th, it is determined that there is usefulness, for example, a determination result “1” is output. On the other hand, when H <th, it is determined that there is no usefulness, for example, a determination result “0” is output. To do.

  The board bay 18 also has a notification unit 125 for notifying the user of the determination result of the history information usability determination unit 124. The notification unit 125 includes a light emitting element such as an LED (Light Emitting Diode), for example, and emits light to notify the user when it is determined to be useful.

  Note that the user may be notified by voice. Further, the notification unit 125 may be provided on the main body side of the television receiver 10 instead of being provided in the detachable board bay 18. In that case, the determination result of the history information usability determination unit 124 may be transmitted to the DRC circuit 17 side via the interface 111.

  In this way, by notifying the user of the usefulness of the SD signal stored in the history information storage unit 122 by the notification unit 125, the user can replace the board bay 18, collect the recovery time, that is, develop the history information storage unit 122. It is possible to know that a sufficient amount of SD signals having a predetermined quality useful for storage are stored.

At the time of development, that is, when generating the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) to be stored in the ROM 119, the SD signal stored in the history information storage unit 122 is used as an SD signal as a learning material. Of these, by using an SD signal similar to the SD signal that is not suitable for _any class, the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) suitable for the SD signal in the user's viewing environment is generated. it can. By using such coefficient seed data w _{i0 to} w _i9 , it is possible to reduce the possibility that the result of the estimated prediction calculation process in the DRC circuit 17 will fail, and to obtain the HD signal with high accuracy.

Next, a procedure of processing related to storing history information of the substrate bay 18 shown in FIG. 7 will be described using the flowchart of FIG.
In step ST1, processing is started, and in step ST2, an SD signal (input signal) for one field is stored in the buffer 112. In step ST3, the feature amount extraction unit 113 performs processing.

  That is, the tap selection circuit 114 selectively selects a plurality of SD pixel data located around the target position in the HD signal (1050i signal) as class tap data from the SD signal for one field stored in the buffer 112. The extraction is repeated by sequentially changing the position of interest.

  Then, the class detection circuit 115 extracts the level distribution pattern as the second feature amount from the class tap data (a plurality of SD pixel data) sequentially extracted by the tap detection circuit 114, and class corresponding to the level distribution pattern. The code CL is acquired sequentially. The DR extraction circuit 116 sequentially extracts the dynamic range DR (= MAX−MIN) from the class tap data (a plurality of SD pixel data) sequentially extracted by the tap selection circuit 114.

  Next, in step ST4, the input signal suitability determination unit 117 performs coefficient data for the SD signal based on the class code CL sequentially obtained by the class detection circuit 115 and the dynamic range DR sequentially extracted by the DR extraction circuit 116. The suitability of the estimated prediction calculation process using Wi (i = 1 to n) is determined.

That is, the input signal suitability determination unit 117 generates a DR value frequency distribution (see FIG. 8B) indicating the frequency of each value of the dynamic range DR for each class, and the coefficient type stored in the ROM 119 Based on the DR value frequency distribution (see FIG. 8A) of each class stored in the ROM 118 relating to the SD signal that is the learning material when the data w _{i0 to} w _i9 (i = 1 to n) are generated. Each time, a correlation coefficient c is obtained (see equation (2)), and the correlation coefficient c of each class is compared with a threshold value Th to determine suitability for each class.

Next, in step ST <b> 5, the history information control unit 121 stores history information in the history information storage unit 122. The history information includes an SD signal (input signal), determination information, and additional information (values of parameters r and z) (see FIG. 10). The determination information includes the frequencies freq _{1 to} freq _N of each class, the correlation coefficients c _{1 to} c _{N of} each class, and the compatibility determination results h _{1 to} h _N (see FIG. 11). In this case, when all the classes are determined to be compatible, the history information is not stored.

  Next, in step ST6, the history information determination amount extraction unit 123 determines the history information based on the determination information in all the history information (history information 1 to M in FIG. 10) stored in the history information storage unit 122. The amount H is acquired (see equation (4)).

  In step ST <b> 7, the history information usability determination unit 124 compares the history information determination amount H with the threshold value th to determine the usefulness of the SD signal stored in the history information storage unit 122. When it is determined that there is no usefulness, the process returns to step ST2, and the same processing as described above is repeated after the next certain period, that is, after a certain period or irregularly. On the other hand, when it determines with there being usefulness, it transfers to step ST8.

  In step ST <b> 8, the notification unit 125 emits an LED, for example, and notifies the user of replacement and collection of the substrate bay 18. In step ST9, it is determined whether or not the substrate bay 18 has been replaced. When the substrate bay 18 has been replaced, the process is terminated. In this case, after determining that there is utility in step ST7, the process does not return to step ST2, and the history information is not further stored in the history information storage unit 122. This is because the history information storage unit 122 has already stored a sufficient amount of SD signals having a predetermined quality useful for development.

As described above, in the present embodiment, the board bay 18 classifies the suitability of the processing of the DRC circuit 17 for the SD signal for one field, that is, the estimation prediction calculation processing using the coefficient data Wi, for every certain period. If it is determined for each class and it is determined that at least one class is incompatible, the SD signal for one field is used as the determination information (frequency freq _{1 to} freq _N of each class, correlation coefficient c _{1 to} c of each class. _N , suitability determination results h _{1 to} h _N ) and additional information (values of parameters r and z) and stored as history information in the history information storage unit 122. When the board bay 18 determines the usefulness of the SD signal stored in the history information storage unit 122 based on the determination information stored in the history information storage unit 122 and determines that the SD signal is useful. The notification unit 125 notifies the user.

  Therefore, according to the present embodiment, the user replaces the substrate bay 18 and collects it, that is, the history information storage unit 122 confirms that a sufficient amount of SD signals having a predetermined quality useful for development are stored. The SD signal stored in the history information storage unit 122 can be quickly used for development.

For example, at the time of development, that is, when generating coefficient seed data w _{i0 to} w _i9 (i = 1 to n) to be stored in the ROM 119, the SD stored in the history information storage unit 122 as an SD signal that is a learning material. Among the signals, by using an SD signal similar to the SD signal that is incompatible with any class, coefficient seed data w _{i0 to} w _i9 (i = 1 to n) suitable for the SD signal in the user's viewing environment. Can be generated.

Then, by using such coefficient seed data w _{i0 to} w _i9 (i = 1 to n), there is a possibility that the result of the estimation prediction calculation process in the DRC circuit 17 may fail in the television receiver 10 shown in FIG. And the HD signal can be obtained with high accuracy.

Next, a method of generating coefficient class data w _{i0 to} w _i9 (i = 1 to n) of each class stored in the ROM 119 will be described.
Here, for the following explanation, tj (j = 0 to 9) is defined as in the equation (5).
t ₀ = 1, t ₁ = r, t ₂ = z, t ₃ = r ² , t ₄ = rz, t ₅ = z ² ,
^{_{t 6 = r 3, t 7}} = r 2 z, t 8 = rz 2, t 9 = z 3
... (5)
Using this equation (5), equation (3) can be rewritten as equation (6).

Finally, the undetermined coefficient w _ij is obtained by learning. That is, for each combination of class and output pixel, a coefficient value that minimizes the square error is determined using a plurality of SD pixel data and HD pixel data. This is a so-called least square method. Assuming that the learning number is m, the residual in the kth (1 ≦ k ≦ m) learning data is e _k , and the sum of the squared errors is E, using Eqs. (1) and (3), E is (7 ) Expression. Here, x _ik represents k-th pixel data at the i-th predicted tap position of the SD image, and y _k represents pixel data of the corresponding k-th HD image.

The solution according to the minimum square method, determine the w _ij such that 0 is partial differentiation by (7) of w _ij. This is shown by equation (8).

Hereinafter, when X _ipjq and Y _ip are defined as in equations (9) and (10), equation (8) is rewritten as equation (11) using a matrix.

This equation (11) is a normal equation for calculating coefficient seed data. Coefficient seed data w _{i0 to} w _i9 (i = 1 to n) can be obtained by solving this normal equation by a general solution method such as a sweep-out method (Gauss-Jordan elimination method).

  FIG. 13 shows the concept of the above-described coefficient seed data generation method. A plurality of SD signals as student signals are generated from the HD signals as teacher signals. Here, SD signals having different resolutions are generated by changing the frequency characteristics of the thinning filter used when the SD signal is generated from the HD signal.

  Coefficient seed data having different effects of increasing the resolution can be generated by SD signals having different resolutions. For example, when there is an SD signal from which an image with a large degree of blur can be obtained and an SD signal from which an image with a small degree of blur can be obtained, coefficient seed data having a strong effect of increasing the resolution by learning with the SD signal from which an image with a large degree of blur can be obtained. Is generated, and coefficient seed data having a weak effect of increasing the resolution is generated by learning with the SD signal from which an image with a small degree of blur can be obtained.

  Further, by adding noise to each of the SD signals having different resolutions, an SD signal with noise added is generated. By varying the amount of noise to be added, SD signals having different noise amounts are generated, thereby generating coefficient seed data having different noise removal effects. For example, if there is an SD signal with a lot of noise added and an SD signal with a little noise added, coefficient seed data with a strong noise removal effect is generated by learning with the SD signal with a lot of noise added, and SD with a little noise added. Coefficient seed data having a weak noise removal effect is generated by learning with a signal.

As the amount of noise to be added, for example, as shown in equation (12), when generating the pixel value x ′ of the SD signal with noise n added to the pixel value x of the SD signal, G is variable. To adjust the amount of noise.
x ′ = x + G · n (12)

  For example, the value of the parameter r for changing the frequency characteristic is changed in 9 steps from 0 to 8, and the value of the parameter z for changing the amount of noise to be added is changed in 9 steps from 0 to 8, for a total of 81 types of SD signals. Is generated. Learning is performed between the plurality of SD signals generated in this way and the HD signal to generate coefficient seed data. The parameters r and z correspond to the parameters r and z in the DRC circuit 17 of FIG.

Next, the coefficient seed data generation apparatus 200 for generating the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) stored in the ROM 119 of the board bay 18 described above will be described. FIG. 14 shows the configuration of the coefficient seed data generation device 200.

  The coefficient seed data generation device 200 performs an horizontal thinning process and a vertical thinning process on the input terminal 201 to which an HD signal as a teacher signal is input, and obtains an SD signal as a student signal. And a signal generation circuit 202. The SD signal generation circuit 202 is supplied with parameters r and z. Corresponding to the value of the parameter r, the frequency characteristic of the decimation filter used when generating the SD signal from the HD signal is varied. Further, the amount of noise added to the SD signal is varied corresponding to the value of the parameter z.

  Further, the coefficient seed data generation device 200 selectively extracts and outputs data of a plurality of SD pixels located around the target position in the HD signal based on the SD signal output from the SD signal generation circuit 202. 1 and 2 have tap selection circuits 203 and 204.

  The first and second tap selection circuits 203 and 204 are configured in the same manner as the first and second tap selection circuits 101 and 102 of the DRC circuit 17 described above. That is, the first tap selection circuit 203 selectively extracts prediction tap data, and the second tap selection circuit 204 selectively extracts class tap data.

  The coefficient seed data generation device 200 also includes a class detection circuit 205 that detects the class to which the pixel data at the position of interest in the HD signal belongs from the class tap data that is selectively extracted by the second tap selection circuit 204. ing. The class detection circuit 205 has the same configuration as the class detection circuit 103 of the DRC circuit 17 described above.

The coefficient seed data generation apparatus 200 includes a delay circuit 206 for adjusting the time of the HD signal input to the input terminal 201 and a normal equation generation unit 207. The normal equation generation unit 207 includes each HD pixel data y as target pixel data obtained from the HD signal delayed by the delay circuit 206 for time adjustment, and a first tap corresponding to each HD pixel data y. From the prediction tap data xi selectively extracted by the selection circuit 203, the class code CL obtained by the class detection circuit 205 corresponding to each HD pixel data y, and the values of the parameters r and z, the class and output For each pixel combination, a normal equation (see equation (11)) for generating coefficient seed data w _{i0 to} w _i9 (i = 1 to n) of each class is generated.

In this case, learning data is generated by a combination of one HD pixel data y and prediction tap data (a plurality of SD pixel data) xi corresponding thereto, but an HD signal as a teacher signal and a student signal as A large amount of learning data is generated for each class with the SD signal. Accordingly, the normal equation generation unit 207 generates a normal equation for obtaining coefficient seed data w _{i0 to} w _i9 (i = 1 to n) for each class.

In this case, the normal equation generation unit 207 generates a normal equation for each output pixel (see HD _{1 to} HD ₄ in FIG. 5 and HD ₁ ′ to HD ₄ ′ in FIG. 6). For example, normal equation corresponding to HD ₁ is shifted value with respect to the central prediction tap is generated from the learning data consisting of HD pixel data y in the same relationship as HD _1. As a result, the normal equation generation unit 207 generates a normal equation for each combination of class and output pixel.

In addition, the coefficient seed data generation device 200 includes a coefficient seed data determination unit 208 and a coefficient seed memory 209. The coefficient seed data determination unit 208 is supplied with the data of the normal equation from the normal equation generation unit 207, solves the normal equation by a sweep method or the like, and generates coefficient seed data w _{i0 to} w _{i9 for} each combination of class and output pixel _. (I = 1 to n) is obtained. The coefficient seed memory 209 stores coefficient seed data w _{i0 to} w _i9 (i = 1 to n) obtained by the coefficient seed data determination unit 208.

The operation of the coefficient seed data generation device 200 shown in FIG. 14 will be described.
The HD signal input to the input terminal 201 is subjected to horizontal and vertical thinning processing by the SD signal generation circuit 202 to generate an SD signal as a student signal. In this case, parameters r and z are supplied as control signals to the SD signal generation circuit 202, and a plurality of SD signals whose frequency characteristics and noise addition amount change stepwise are sequentially generated.

  From the SD signal obtained by the SD signal generation circuit 202, the second tap selection circuit 204 selectively extracts data of class taps located around the target position in the HD signal. The class tap data is supplied to the class detection circuit 205. In the class detection circuit 205, the ADRC process is performed on the data of the class tap to obtain the class code CL.

Further, from the SD signal obtained by the SD signal generation circuit 202, the first tap selection circuit 203 selectively extracts the data xi of the prediction tap located around the target position in the HD signal. Then, each HD pixel data y as target pixel data obtained from the HD signal time-adjusted by the delay circuit 206, and the first tap selection circuit 203 selectively corresponding to each HD pixel data y, respectively. The normal equation generation unit 207 determines the class and output from the predicted tap data xi, the class code CL output from the class detection circuit 205 corresponding to each HD pixel data y, and the values of the parameters r and z. For each pixel combination, a normal equation (see equation (11)) for generating coefficient seed data w _{i0 to} w _i9 (i = 1 to n) is generated.

The coefficient seed data determination unit 208 solves each normal equation to obtain coefficient seed data w _{i0 to} w _i9 (i = 1 to n). The coefficient seed data w _{i0 to} w _i9 (i = 1 to n). ) Is stored in the coefficient seed memory 209.

As described above, in the coefficient seed data generating apparatus 200 shown in FIG. 14, the coefficient seed data w _{i0 to} w _i9 (i =) for each combination of class and output pixel stored in the ROM 119 of the substrate bay 18 shown in FIG. 1-n) can be generated.

Further, in the coefficient seed data generation apparatus 200, for example, when the substrate bay 18 is replaced, the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) to be stored in the ROM 119 of the substrate bay 18 after replacement is obtained _. When generating, by using an SD signal similar to the SD signal that is stored in the history information storage unit 122 of the board bay 18 before the replacement and that is incompatible with any class, as the SD signal as the learning material. The coefficient seed data w _{i0 to} w _i9 (i = 1 to n) suitable for the SD signal in the viewing environment of the user can be generated.

As a result, by using the board bay 18 in which such coefficient seed data w _{i0 to} w _i9 (i = 1 to n) are stored in the ROM 119, the TV receiver 10 shown in FIG. The possibility that the result of the arithmetic processing will fail can be reduced, and the HD signal can be obtained with high accuracy.

In the above embodiment, the substrate bay 18 includes the coefficient generation circuit 120. However, the board bay 18 may be configured not to include the coefficient generation circuit 120. In that case, the coefficient generation circuit 120 is arranged in the DRC circuit 17, and the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) stored in the ROM 119 of the board bay 18 is transferred to the DRC circuit 17 via the interface 111. Supply to the side.

In the above-described embodiment, coefficient seed data w _{i0 to} w _i9 (i = 1 to 1), which are coefficient data in the generation formula for generating coefficient data Wi (i = 1 to n) in the ROM 119 of the substrate bay 18. n) shows what is stored. However, it is also conceivable to store the coefficient data Wi (i = 1 to n) itself in the ROM 119. In that case, the DRC circuit 17 can load the coefficient data Wi (i = 1 to n) stored in the ROM 119 into the coefficient memory 104 as it is and use it.

  In the above-described embodiment, the substrate bay 18 is detachably connected to the DRC circuit 17, but the connection location of the substrate bay 18 is not limited to this. For example, the input / output interface 19 may be detachably connected.

  Further, in the above-described embodiment, the feature amount extracted from the SD signal as the first information signal is the level distribution pattern (corresponding to the class code CL) obtained from the class tap data and the DR value. However, the present invention is not limited to this. That is, the feature quantity to be extracted may be one, or three or more, and various types are conceivable. For example, an absolute value sum of adjacent difference data obtained from class tap data, an average value of class tap data, or the like can be used as the feature amount. In short, it is effective if the feature quantity that affects the estimated prediction calculation process using the coefficient data Wi (i = 1 to n) in the DRC circuit 17 is extracted and the suitability of the SD signal can be determined using the feature quantity. is there.

In the above embodiment, the substrate bay 18 includes the ROM 119 in which the coefficient seed data w _{i0 to} w _i9 (i = 1 to n) are stored. There is no need to be. This ROM 119 may be in another board bay. For example, the DRC circuit 17 may be another board bay, and the ROM 119 may be in the board bay.

  Moreover, although the case where the information signal is an image signal has been described in the above embodiment, the present invention is not limited to this. For example, the present invention can be similarly applied when the information signal is an audio signal.

  The present invention is capable of notifying the user of exchange and collection in a state where the first information signal effective for version upgrade development is sufficiently stored, and in response to the first information signal, An electronic device having a substrate structure is detachably connected to an information signal processing device that obtains a second information signal by performing processing using predetermined data generated in advance based on a corresponding predetermined information signal. It can be applied to a purpose of collecting the first information signal that is effective for the development.

It is a block diagram which shows the structure of the television receiver as embodiment. It is a figure which shows the pixel positional relationship of a 525i signal and a 1050i signal. It is a block diagram which shows the structure of a DRC circuit and a board | substrate bay. It is a figure which shows an example of a class tap and a prediction tap. It is a figure which shows the phase shift (odd field) from the center prediction tap of 4 pixels in the unit pixel block of HD signal (1050i signal). It is a figure which shows the phase shift (even field) from the center prediction tap of 4 pixels in the unit pixel block of HD signal (1050i signal). It is a block diagram which shows the structure of a board | substrate bay. It is a figure which shows DR value frequency distribution of each class at the time of development and user viewing. It is a figure for demonstrating the correlation coefficient of DR value frequency distribution at the time of development and user viewing. It is a figure which shows the memory content of a log | history information storage part. It is a figure which shows the determination information of each log | history information. It is a flow chart for explaining processing concerning storage of history information on a substrate bay. It is a figure for demonstrating the production | generation method of coefficient seed data. It is a block diagram which shows the structure of a coefficient seed data generation apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Television receiver, 11 ... Internal bus, 12 ... Tuner, 13 ... Decoder, 14 ... CPU, 15 ... RAM, 16 ... ROM, 17 ... DRC Circuit, 18 ... Board bay, 19 ... Input / output interface, 20 ... Drive, 21 ... Removable media, 22 ... Light receiving unit, 23 ... Remote control transmitter, 24 ... Display , 25... HDD, 26... Operation unit, 101... First tap selection circuit, 102... Second tap selection circuit, 103. Memory, 105 ... interface, 106 ... estimated prediction calculation circuit, 107 ... post-processing circuit, 111 ... interface, 112 ... buffer, 113 ... feature quantity extraction unit, 114 ... Tap selection circuit 115: Class detection circuit, 116: Dynamic range extraction circuit, 117: Input signal suitability determination unit, 118, 119 ... ROM, 120 ... Coefficient generation circuit, 121 ... History information Control unit, 122 ... history information storage unit, 123 ... history information determination amount extraction unit, 124 ... history information usefulness determination unit, 125 ... notification unit, 200 ... coefficient seed data generation device

Claims (10)

First data selection means for selecting , based on the first information signal, a plurality of first information data located around the position of interest in the second information signal having a larger number of pixels than the first information signal; The first feature quantity extraction means for extracting the first feature quantity based on the plurality of first information data selected by the first data selection means, and the first feature quantity extraction means Class detection means for detecting a class to which the information data of the position of interest in the second information signal belongs based on the extracted first feature amount, and the second information based on the first information signal Second data selection means for selecting a plurality of second information data located around a target position in the signal; the plurality of second information data selected by the second data selection means; and the predetermined data Or the data Information of the position of interest in the second information signal is calculated based on the estimation formula using the coefficient data used in the estimation formula of the class detected by the class detection means obtained using the data of is removably connected to the information signal processing equipment having a computing means obtained by said second feature quantity and said corresponding to the first feature amounts extracted by the first feature extraction means 2 Second feature quantity extraction means for extracting a third feature quantity different from the feature quantity of
The frequency distribution of the third feature quantity for each class detected from the second feature quantity extracted by the second feature quantity extraction means for each fixed period or indefinite period of the first information signal. the calculated correlation coefficient of the frequency distribution of each class on the basis of the second information corresponding to the first information of the first information and the predetermined information signals indicating, each class based on said phase number relationship Suitability determination means for determining suitability of processing using the coefficient data in the information signal processing device in
The first information signal for the predetermined period determined to be non-conforming by at least the conformity determining means or the processing information indicating the frequency distribution of the third feature amount of the first information signal is sequentially stored. First storage means;
Based on the first information stored in the storage means, whether or not the it is determined that stored the nonconformity in the storage means of the first the first information signal or the processed information becomes a predetermined amount Ru electronic device and a determining information amount determining means. The first storage means is
In addition to the first information signal or the processed information in each predetermined period, in relation to the first information signal of each of a predetermined period, the frequency of each class to be detected from the second feature quantity Information, correlation coefficient of frequency distribution of each class obtained based on the first information and the second information, and a determination result of suitability of each class determined using the correlation coefficient And
The information amount determination means includes
Based on the frequency information for each predetermined period stored in the first storage unit, the correlation coefficient, and the determination result of the suitability, it is determined that the nonconformity is stored in the first storage unit. and the electronic apparatus according the first information signal or the processed information in 請 Motomeko 1 you determine whether or not a predetermined amount. Based on the determination result of the information amount determining means, further signaling means for the said incompatible with the determined said first information signal or the processed information in the first storage means to notify the user that a predetermined amount Ru equipped
The electronic device according to 請 Motomeko 1. Ru further comprising a second storage means for said predetermined data is stored
The electronic device according to 請 Motomeko 1. The information signal processing apparatus is
Parameter input means for inputting a parameter value that determines the quality of the output obtained by the second information signal;
As the predetermined data, obtained for each class, Ru second further comprising a storage means for storing coefficient seed data is coefficient data in a production equation containing the parameters for generating coefficient data used in the estimated equation
The electronic device according to 請 Motomeko 1. The first storage means is
In addition to the first information signal of the respective processing period, in relation to the first information signal the predetermined period fraction, it stores the value of the parameter
The electronic device according to 請 Motomeko 5. First data selection means for selecting , based on the first information signal, a plurality of first information data located around the position of interest in the second information signal having a larger number of pixels than the first information signal; ,
First feature quantity extraction means for extracting a first feature quantity based on the plurality of first information data selected by the first data selection means;
Class detection means for detecting a class to which the information data of the position of interest in the second information signal belongs based on the first feature quantity extracted by the first feature quantity extraction means;
Second data selection means for selecting a plurality of second information data located around the position of interest in the second information signal based on the first information signal;
The plurality of second information data selected by the second data selection means, the predetermined data, or the class detected by the class detection means, obtained using the predetermined data. Computing means obtained by calculating information data of a position of interest in the second information signal based on the estimation formula using coefficient data used in the estimation formula;
Thereby detachably connected to the electronic device supplies the coefficient data to said computing means, said first information signal and a board connecting portion to be supplied to the electronic device,
The electronic device
Based on the first information signal input through the board connection unit, a second feature amount corresponding to the first feature amount extracted by the first feature amount extraction unit and the second feature amount Second feature quantity extraction means for extracting a third feature quantity different from the feature quantity;
The frequency distribution of the third feature quantity for each class detected from the second feature quantity extracted by the second feature quantity extraction means for each fixed period or indefinite period of the first information signal. in the first information and the correlation coefficient of the frequency distribution of each class on the basis of the second information corresponding to said first information according to the predetermined information signals, each class based on said phase number relationships shown Suitability determination means for determining suitability of processing using the coefficient data in the information signal processing device ;
The first information signal for the predetermined period determined to be non-conforming by at least the conformity determining means or the processing information indicating the frequency distribution of the third feature amount of the first information signal is sequentially stored. First storage means;
Based on the first information stored in the storage means, whether or not the first the first it is determined that stored the nonconformity in storage means of the information signal or the processed information becomes a predetermined amount Information amount determination means for determining;
Second storage means for storing coefficient seed data, which is coefficient data of a generation formula for generating the coefficient data,
The information signal processing apparatus , wherein the coefficient data generated by using the coefficient seed data of the second storage means is supplied to the arithmetic means via the substrate connection section . Based on the determination result of the information amount determining means, that the incompatibility between the determined said first information signal or the processed information in the storage means further having a notifying means for notifying the user that a predetermined amount
Information signal processing apparatus according to 請 Motomeko 7. First data selection means for selecting , based on the first information signal, a plurality of first information data located around the position of interest in the second information signal having a larger number of pixels than the first information signal; , Based on the plurality of first information data selected by the first data selection means, a feature quantity extraction means for extracting a first feature quantity, and a first feature quantity extracted by the feature quantity extraction means Class detecting means for detecting a class to which the information data of the target position in the second information signal belongs based on the feature amount, and surroundings of the target position in the second information signal based on the first information signal A second data selection means for selecting a plurality of second information data located at a position, the plurality of second information data selected by the second data selection means, and the predetermined data, or The predetermined data Using the coefficient data used in the estimation formula of the class detected by the class detection means obtained by calculating the information data of the position of interest in the second information signal based on the estimation formula And an electronic device used by being detachably connected to an information signal processing device having a means ,
A feature amount extracting step of extracting a second feature amount corresponding to the first feature amount extracted by the feature amount extraction means and a third feature amount different from the second feature amount ;
A frequency distribution of the third feature quantity for each class detected from the second feature quantity extracted in the feature quantity extraction step for each fixed period or indefinite period of the first information signal . the correlation coefficient of the frequency distribution of each class on the basis of the second information corresponding to said first information according to the first information and the predetermined information signal, the information in each class on the basis of said phase number relationship A suitability determination step for determining suitability of processing using the coefficient data in the signal processing device ;
The first information signal for the predetermined period determined to be non-conforming at least in the conformity determining step or the processing information indicating the frequency distribution of the third feature amount of the first information signal is sequentially stored. A memory step;
Based on the information stored in the storing step, the information amount determining step of determining whether or not said first information signal or the processed information determined with the stored the incompatibility said storing step reaches a predetermined amount An information signal processing method in an electronic device comprising: First data selection means for selecting , based on the first information signal, a plurality of first information data located around the position of interest in the second information signal having a larger number of pixels than the first information signal; , Based on the plurality of first information data selected by the first data selection means, a feature quantity extraction means for extracting a first feature quantity, and a first feature quantity extracted by the feature quantity extraction means Class detecting means for detecting a class to which the information data of the target position in the second information signal belongs based on the feature amount, and surroundings of the target position in the second information signal based on the first information signal A second data selection means for selecting a plurality of second information data located at a position, the plurality of second information data selected by the second data selection means, and the predetermined data, or The predetermined data Using the coefficient data used in the estimation formula of the class detected by the class detection means obtained by calculating the information data of the position of interest in the second information signal based on the estimation formula And an electronic device used by being detachably connected to an information signal processing device having a means ,
A feature amount extracting step of extracting a second feature amount corresponding to the first feature amount extracted by the feature amount extraction means and a third feature amount different from the second feature amount ;
A frequency distribution of the third feature quantity for each class detected from the second feature quantity extracted in the feature quantity extraction step for each fixed period or indefinite period of the first information signal . the correlation coefficient of the frequency distribution of each class on the basis of the second information corresponding to said first information according to the first information and the predetermined information signal, the information in each class on the basis of said phase number relationship A suitability determination step for determining suitability of processing using the coefficient data in the signal processing device ;
The first information signal for the predetermined period determined to be non-conforming at least in the conformity determining step or the processing information indicating the frequency distribution of the third feature amount of the first information signal is sequentially stored. A memory step;
Based on the information stored in the storing step, the information amount determining step of determining whether or not said first information signal or the processed information determined with the stored the incompatibility said storing step reaches a predetermined amount A program for causing a computer to execute an information signal processing method in an electronic device comprising:

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