JP4308183B2 - Semiconductor device for switching power supply control and switching power supply device - Google Patents

Description

  The present invention relates to a switching power supply control semiconductor device for controlling an output voltage of a switching power supply by a switching operation and a switching power supply device.

  Conventionally, for household appliances such as home appliances, as a power supply device, a switching operation using a semiconductor (switching element such as a transistor) is used for the purpose of improving power efficiency by reducing power consumption. A switching power supply device having a switching power supply control semiconductor device that controls (stabilizes) an output voltage is widely used.

  In recent years, in particular, from the viewpoint of measures to prevent global warming, in household appliances and other devices, attention has been paid to reducing power consumption during standby (standby) operation, and switching power supplies with lower power consumption during standby are strongly used. It is requested.

  In order to meet this requirement, for example, in order to supply power at the rated load in the normal operation state (normal mode) of the device, one main power switching power supply (converter) can be used for standby in the standby operation state (standby mode) of the device. A power supply system is being developed that can reduce the current loss of the switching element at the time, reduce the power consumption at light loads, and easily obtain sufficiently high power efficiency in a wide range of loads including the standby mode. is there. In this case, as the switching power supply device, a partial resonance type has been often used from the viewpoint of power supply efficiency and noise (see Patent Document 1).

  However, in the semiconductor device for switching power supply control as described above, the demand for power saving during standby of the power supply can be realized. However, when the input voltage is low, The maximum output of the power supply is not the same at the time of high input voltage, and it is necessary to change the power supply design depending on the input voltage, or to select parts in anticipation of increasing stress on each part of the power supply at high input voltage There is a problem that leads to cost increase.

  In addition, the commercial power supply voltage around the world varies in voltage depending on the region, and an extremely low input voltage state and an extremely high input voltage state can be considered. In an extremely low input voltage state, the power supply starts at a certain voltage or higher, or when the power supply is stopped when the voltage falls below a certain voltage, or in an extremely high input voltage condition, When it is desired to prevent breakdown voltage breakdown of the switching element due to jumping to a voltage exceeding the breakdown voltage, it is necessary to separately configure a circuit for detecting and protecting the input voltage, resulting in an increase in the number of external components.

  FIG. 14 is a circuit diagram showing a configuration example of a conventional switching power supply apparatus. As shown in FIG. 14, this switching power supply apparatus is configured such that a commercial AC power supply is rectified by a rectifier 101 such as a diode bridge and smoothed by an input capacitor 102, thereby obtaining a DC input voltage VIN as a DC input voltage VIN. The voltage is applied to the switching element 1 through the primary winding 103a. By switching operation of the switching element 1, the DC output voltage Vo obtained by rectifying and smoothing the AC current generated in the secondary winding 103b of the transformer 103 by the rectifier 104 and the capacitor 105 is controlled to supply power to the load 109. To do.

  Further, the switching power supply device detects the reset state of the transformer 103 generated by the switching operation of the switching element 1 from the AC voltage generated in the tertiary winding 103c of the transformer 103, and outputs a transformer reset detection signal indicating the reset state. The change in the control current obtained through the output voltage detection circuit 106 and the phototransistor 110 based on the change in the output voltage Vo generated in the transformer reset detection circuit 11 to be output and the secondary winding 103b of the transformer 103 is expressed as the current. A light load as a load state indicating the magnitude of power supply to the load 109 based on the change of the output voltage VEAO from the IV converter 19 that converts the voltage value to the value and the IV converter 19 To control intermittent switching operation by the switching element 1 when time is detected Has a light load detecting circuit 22 for outputting a control signal, these constitute a part of a control circuit for driving the control electrode of the switching element 1 (the gate electrode).

  The light load detection circuit 22 switches the switching element 1 when the output voltage VEAO from the IV converter 19 becomes smaller than the light load detection lower limit voltage VR1 for detecting the light load. The operation is stopped, and the switching operation of the switching element 1 is resumed when the output voltage VEAO from the IV converter 19 becomes larger than the light load detection upper limit voltage VR2 for detecting the light load. In addition, a control signal for controlling the intermittent switching operation is output.

  Further, based on the transformer reset detection signal from the transformer reset detection circuit 11 and the control signal from the light load detection circuit 22, the control electrode (gate electrode) of the switching element 1 is driven to control the intermittent switching operation at light load. Is configured to do.

  A schematic operation of the switching power supply device configured as described above will be described. Here, the operation of the switching power supply control semiconductor device that performs the intermittent switching operation by the switching element when a light load is detected will be described.

  In FIG. 14, when the internal circuit rises to the reference voltage, the control circuit is activated, and then the voltage at the input terminal 36 is increased by the capacitor 118 connected between the switching element input terminal 36 and the switching element output terminal 37, and the activation voltage is increased. Then, the switching element 1 such as the power MOSFET is turned on and turned on, and the drain current is caused by the photocoupler current from the output voltage detection circuit 106 connected to the secondary winding 103b of the transformer 103 to the phototransistor 110. When the overcurrent detection level determined by the feedback current is reached, the switching element 1 is turned off and turned off. When the switching element 1 is turned off, the drain voltage performs a ringing operation by resonance between the inductance of the transformer 103 and the drain-source capacitance of the switching element 1 and the capacitance of the capacitor 118.

  Thus, when the semiconductor device for controlling the switching power supply is started, the next ON signal is detected by the tertiary winding (bias winding) 103c of the transformer 103, but the tertiary winding voltage (transformer reset) is detected inside the control circuit. When the detection signal is equal to or lower than the set value, an ON signal is output. Also, a resistor 116 and a capacitor 117 are connected to the transformer reset (tertiary winding) detection terminal 39 so that the timing at which the switching element 1 is turned on at the bottom of the drain voltage of the switching element 1 can be obtained. The time constant of each value of 116 and capacitor 117 is adjusted.

  The above operation is repeated to obtain a desired output voltage Vo. However, in order to improve the power supply efficiency at light load, when the feedback current flows over a certain value, the switching operation by the switching element 1 is stopped and the feedback is performed. By performing intermittent oscillation control (intermittent switching operation) in which the switching operation by the switching element 1 is resumed when the current falls below a certain value, the power efficiency at light load is improved and the power consumption is reduced.

  Further, the switching operation control method by the switching element 1 is quasi-resonant ringing choke converter (RCC) control. Since the basis of the quasi-resonant control is self-excitation, the oscillation frequency becomes smaller as the load becomes lighter. Get higher. Therefore, after the delay circuit 27 receives the drain current detection signal at the time of switching off, the delay circuit 27 gives a certain delay time to the drain current detection signal, so that the block corresponding to the delay time is provided. Within the ranking time, an on signal is sent to the switching element 1 so as not to accept the switching on control by the transformer reset pulse obtained by the transformer reset pulse generation circuit 25 based on the signal from the tertiary winding 103c of the transformer 103. The switching operation of the switching element 1 is stopped and the switching-on timing is delayed.

  As a result, the oscillation frequency does not increase at light loads, the increase in switching loss associated with switching operations is suppressed, and the frequency is limited so that it does not increase above a certain level, further improving power efficiency at light loads and reducing power consumption. Reduced.

In addition, since it is quasi-resonant control, it can reduce switching loss when the switching element is turned on, and can realize low noise, so it is suitable for a market that requires low noise, high efficiency, and high output. In addition, since intermittent switching operation is performed by intermittent oscillation control at light load, an increase in switching frequency at light load, which is generally a problem in RCC, is suppressed, and switching loss at light load is reduced to some extent.
JP 2002-315330 A

  However, in the switching power supply having such a configuration, the maximum current flowing through the switching element 1 shown in FIG. 14 is defined by the overcurrent protection reference voltage source 31 and becomes a value fixed by the switching power supply control semiconductor device 41. Yes. However, there is a certain delay time depending on the reaction delay time of each circuit, the switching time of the switching element 1, etc., and the maximum current that actually flows through the switching element 1 is slightly larger than the overcurrent protection level defined by the internal circuit. Value. And since it has an overcurrent protection delay time, the maximum drain current flowing through the switching element 1 becomes larger at the time of a high input voltage than at the time of a low input voltage.

  Further, the input power PIN per unit switching operation is expressed by the following equation (1) with respect to the input voltage VIN when the maximum current to the switching element 1 is IPEAK.

となり、高入力電圧時には、仮に低入力電圧時と同じ最大電流ＩＰＥＡＫとなるようにした場合にも入力電力ＰＩＮが大きくなり、出力電力ＰＯが同一の負荷条件においてはより軽負荷状態となるため、擬似共振型制御では発振周波数が高くなってしまう。そのため、高入力電圧時に電源としての最大出力電力が大きくなるという課題がある。

Thus, when the input voltage PIN is increased at the time of high input voltage, even if the maximum current IPEAK is the same as that at the time of low input voltage, the output power PO becomes lighter under the same load condition. In quasi-resonant control, the oscillation frequency becomes high. Therefore, there is a problem that the maximum output power as a power source becomes large at a high input voltage.

  The present invention is directed to solving the problems of the prior art, and suppresses switching loss by suppressing high-frequency operation at light loads, and improves power supply efficiency at light loads. In addition to reducing power consumption at light loads, it achieves high efficiency and low noise in the entire load range from light loads to heavy loads, and the maximum output power is constant regardless of the input voltage. An object of the present invention is to provide a switching power supply control semiconductor device and a switching power supply device that can be maintained at the same time.

  In order to achieve the above object, a switching power supply control semiconductor device according to claim 1 of the present invention applies a DC input voltage to a switching element through a primary winding of a transformer, thereby switching the switching element. Switching power supply control having a control circuit for controlling the switching operation of the switching element to control the DC voltage obtained by rectifying and smoothing the AC current generated in the secondary winding of the transformer by operation and supplying power to the load A drain current detection circuit for detecting a current flowing through the switching element in the control circuit, and a reset state of the transformer generated by a switching operation of the switching element from an AC voltage generated in the tertiary winding of the transformer. A transformer that detects and outputs a transformer reset detection signal indicating the reset state. Current detection circuit, a delay circuit that gives a predetermined delay time to the output signal of the drain current detection circuit, and a current value of a control current indicating a change in DC voltage based on an AC current generated in the secondary winding of the transformer An I-V converter that converts the output signal into a voltage value, a drain current detection comparator that compares the output signal of the IV converter and the output signal of the drain current detection circuit, and a reference voltage of the drain current detection comparator An overcurrent protection reference voltage source that determines the upper limit of the output signal of the I-V converter and a variable that receives an input signal from the external connection terminal and supplies an external variable signal to the input of the overcurrent protection reference voltage source as an output An overcurrent protection reference voltage source for controlling a switching operation based on a transformer reset detection signal of the transformer reset detection circuit and an output signal of the drain current detection circuit. Receiving an external variable signal, varying the overcurrent protection level, which is the upper limit of the reference voltage compared with the output signal of the drain current detection circuit, and detecting the transformer reset until the drain current detection signal delayed for a predetermined time is output from the delay circuit The control electrode of the switching element is driven so as to stop the switching operation by masking the transformer reset detection signal of the circuit.

  Further, the switching power supply control semiconductor device according to claim 2 applies a DC input voltage to the switching element through the primary winding of the transformer, and is generated in the secondary winding of the transformer by the switching operation of the switching element. A switching power supply control semiconductor device having a control circuit for controlling the switching operation of the switching element in order to control the direct current voltage obtained by rectifying and smoothing the alternating current and supplying power to the load. Transformer reset detection that detects the reset state of the transformer caused by the switching operation of the switching element from the drain current detection circuit that detects the current flowing through the switching element and the AC voltage generated in the tertiary winding of the transformer. Transformer reset detection circuit that outputs signals and drain current detection A delay circuit that gives a predetermined delay time to the output signal of the path, and an IV that converts a current value of a control current indicating a change in DC voltage based on an AC current generated in the secondary winding of the transformer into a voltage value A converter, a drain current detection comparator that compares the output signal of the IV converter and the output signal of the drain current detection circuit, and an output of the IV converter that serves as a reference voltage of the drain current detection comparator An overcurrent protection reference voltage source that determines the upper limit of the signal, and a variable signal generation circuit that receives an input signal from the external connection terminal and supplies an external variable signal to the input of the overcurrent protection reference voltage source and the delay circuit as an output In the control of the switching operation based on the transformer reset detection signal of the transformer reset detection circuit and the output signal of the drain current detection circuit, an overcurrent protection reference voltage source and a delay circuit are provided. By receiving the external variable signal, varying the overcurrent protection level and delay time that are the upper limit of the reference voltage compared with the output signal of the drain current detection circuit, until the drain current detection signal delayed by a predetermined time is output from the delay circuit, The control electrode is driven so as to stop the switching operation of the switching element by masking the transformer reset detection signal of the transformer reset detection circuit.

  The switching power supply control semiconductor device according to claim 3 or 4 is the switching power supply control semiconductor device according to claim 1 or 2, wherein the input signal from the external connection terminal is equal to or lower than a set value. The switching operation is stopped, or the switching operation of the switching element is stopped when the input signal from the external connection terminal is a set value or more.

  A switching power supply control semiconductor device according to claim 5 is the switching power supply control semiconductor device according to claims 1 to 4, wherein the input voltage is applied to the semiconductor substrate in which the control circuit and the switching element are integrated on the same substrate. A switching element input terminal for applying to the switching element via the primary winding of the transformer, a switching element output terminal for outputting a switching current obtained by the switching operation of the switching element, and a transformer by the switching operation of the switching element. A power supply input terminal for supplying a DC voltage based on the current generated in the tertiary winding of the power supply, a control signal input terminal for inputting a control signal for controlling the intermittent switching operation of the switching element, and a transformer reset detecting circuit. To input reset detection signal A scan reset detection terminal, characterized in that an external signal input terminal for inputting an external signal of variable signal generating circuit supplies an external variable signal to the overcurrent protection reference voltage source and the delay circuit.

  According to a sixth aspect of the present invention, there is provided a switching power supply device that uses the switching power supply control semiconductor device according to any one of the first to fifth aspects to switch a DC input voltage through a primary winding of a transformer. By applying to the element and performing the switching operation of the switching element, the DC voltage obtained by rectifying and smoothing the alternating current generated in the secondary winding of the transformer is controlled to supply power to the load. To do.

  According to the above configuration, by adjusting the input signal of the external signal input terminal, the overcurrent protection detection level of the switching element and the delay time for masking the transformer reset detection signal of the transformer reset detection circuit are corrected according to the input voltage. it can.

  According to the present invention, by adjusting the input signal of the external signal input terminal, the overcurrent protection detection level of the switching element and the delay time for masking the transformer reset detection signal of the transformer reset detection circuit can be corrected according to the input voltage. It is possible to make the maximum output power to the same level without depending on the input voltage, it is possible to suppress the rating of the parts used, not only improve the cost performance of the power supply, but also expand the usage of the same semiconductor device There is an effect that can be.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a circuit diagram showing a configuration example of a switching power supply control semiconductor device and a switching power supply device using the same according to Embodiment 1 of the present invention. Here, components corresponding to the components described in FIG. 14 showing the conventional example and having substantially the same functions are denoted by the same reference numerals, and the same applies to the following drawings.

  First, the switching power supply control semiconductor device according to the first embodiment will be described. The switching power supply control semiconductor device 41 shown in FIG. 1 is provided with a light load detection circuit 22 to which an output voltage VEAO obtained by converting the current flowing out from the control signal input terminal 40 into a voltage by the IV converter 19 is applied. Yes. The light load detection circuit 22 includes a light load detection comparator 20. The output voltage VEAO output from the IV converter 19 is given as the minus input of the light load detection comparator 20, and the reference voltage VR output from the reference voltage source 21 is given as the plus input. Is given. The light load detection comparator 20 compares the input output voltage VEAO with the reference voltage VR. When the output voltage VEAO falls below the reference voltage VR, a predetermined output signal V01 is sent via the inverter 23. And output as one input signal of the AND circuit 24. The output signal V01 of the light load detection comparator 20 is also supplied to the reference voltage source 21. The reference voltage source 21 receives the output signal V01 of the light load detection comparator 20 and receives the reference voltage. The VR changes.

  The AND circuit 24 detects the voltage of the transformer reset detection terminal 39 as the other input signal, and is provided with a transformer reset detection signal output from the transformer reset detection circuit 11 as a clock signal. A transformer reset pulse generating circuit 25 for generating a transformer reset pulse in the form of a one-shot pulse is provided. When detecting at light load, that is, when the switching element 1 is stopped, the amplitude of the resonance operation is reduced by the stop time, and the transformer reset pulse may not be detected, so that the transformer reset pulse generation circuit 25 is prevented from working. ing.

  The output signal V01 of the light load detection comparator 20 is input to the intermittent end pulse generation circuit 26 via the inverter 23. After the stop period, the output of the intermittent end pulse generation circuit 26 is the OR circuit 29. The output signal is input as a set signal of the RS flip-flop 30. The output signal of the RS flip-flop 30 is input to the NAND circuit 34, and the output is output to the gate electrode of the switching element 1 through the gate driver 35. As described above, when the light load detection comparator 20 detects the light load state which is the standby state, the transformer reset pulse generation circuit 25 is not operated, and the switching element 1 is output by the output signal of the intermittent end pulse generation circuit 26. The switching is controlled so as to resume the switching.

  In this switching power supply control semiconductor device 41, the switching element 1 using a power MOSFET or the like and a control circuit for performing switching control of the switching element 1 are integrated on the same semiconductor substrate, and the switching element input terminal 36 and the output Terminal 37, switching power control semiconductor device 41 for starting voltage detection and control circuit power input terminal 38, control signal input terminal 40 for inputting control signals, transformer 103 tertiary winding (bias winding) transformer A reset detection terminal (voltage detection terminal) 39 and an external signal input terminal 42 for inputting an external signal corresponding to the input voltage of the switching power supply are configured.

  The regulator 6 is connected between the switching element input terminal 36, the power supply input terminal 38, and the gate driver reference power supply (internal circuit reference voltage) 8, and when the voltage at the switching element input terminal 36 becomes a certain value or more. In addition, an internal circuit current of the switching power supply control semiconductor device 41 is supplied, and the voltage of the control circuit of the switching power supply control semiconductor device 41 and the gate driver reference power supply 8 is set by the comparator 9 in the internal circuit. It is controlled so as to be a constant value compared with the reference voltage.

  The output of the start / stop comparator 7 is input to the NAND circuit 34, and the output signal is output to the gate electrode of the switching element 1 through the gate driver 35, and the switching is performed according to the voltage level of the power input terminal 38. The oscillation and stop of the element 1 are controlled.

  The clamp circuit 12 is connected to the control signal input terminal 40 and is set to a constant potential because the phototransistor 110 and the like are connected to the outside of the switching power supply control semiconductor device 41.

  The IV converter 19 internally converts the current flowing out from the control signal input terminal 40 into a voltage. A transformer reset detection circuit 11 is connected to a transformer reset detection terminal 39 that detects the voltage of the tertiary winding 103c of the transformer 103. A turn-on signal of the switching element 1 is generated by a transformer reset pulse (one-shot pulse) generation circuit 25. The timing is determined.

  The start pulse generation circuit 10 generates an output based on the output signal of the start / stop comparator 7, that is, the start signal, and inputs the output to the set terminal of the RS flip-flop 30 through the OR circuit 29. The output Q of the RS flip-flop 30 is input to the NAND circuit 34.

  After the start-up, the output Q of the RS flip-flop 30 is set to the high level via the OR circuit 29 by the start-up pulse and the transformer reset pulse during the normal operation, and the switching element 1 is turned on.

  After the switching element 1 is turned on, the drain current detection circuit 32 detects the voltage caused by the current flowing through the switching element 1 and the on-resistance of the switching element 1, that is, the on-voltage, and is input to the positive side of the drain current detection comparator 33. When this voltage becomes higher than the negative potential, it is input as a reset signal of the RS flip-flop 30, and the switching element 1 is turned off. That is, the drain current is limited by detecting the on-resistance of the switching element 1.

  Further, on the negative side of the drain current detection comparator 33, an overcurrent protection reference voltage source 31 that defines the maximum voltage and an I-V converter 19 corresponding to the current flowing out from the control signal input terminal 40 are provided. The voltage is applied based on the converted output voltage VEAO, the upper limit of the drain current (maximum drain current) is limited by the overcurrent protection reference voltage source 31, and the output voltage VEAO from the IV converter 19 is The drain current of the switching element 1 can be changed depending on the level. That is, since the output voltage VEAO of the IV converter 19 decreases as the outflow current from the control signal input terminal 40 increases, the negative potential of the drain current detection comparator 33 decreases, and as a result, The drain current of the switching element 1 will decrease.

  As described above, the output voltage VEAO of the I-V converter 19 converted into the internal voltage by the current of the control signal input terminal 40 and the voltage of the tertiary winding 103c of the transformer 103 are detected by the transformer reset detection terminal 39, thereby switching the switching element. The on / off period of the switching element 1 is determined by the output signal of the transformer reset pulse generation circuit 25 that generates a transformer reset pulse by the output of the transformer reset detection circuit 11 that determines the timing of turning on 1.

  In a switching power supply using this switching power supply control semiconductor device, a commercial AC power supply is rectified by a rectifier 101 such as a diode bridge and smoothed by a capacitor 102 to be a DC input voltage VIN. The power conversion transformer 103 is provided. The transformer 103 for power conversion includes a primary winding 103a, a secondary winding 103b, and a tertiary winding (used as a bias winding) 103c, and a DC input voltage VIN is applied to the primary winding 103a.

  The DC input voltage VIN applied to the primary winding 103 a of the transformer 103 is extracted from the secondary winding 103 b of the transformer 103 by the switching operation of the switching element 1 in the semiconductor device 41 for switching power supply control. The current extracted to the secondary winding 103b is rectified and smoothed by the rectifier (diode) 104 and the capacitor 105 connected to the secondary winding 103b, and supplied to the load 109 using the output voltage Vo as DC power. .

  An output voltage detection circuit 106 composed of, for example, an LED 107 and a Zener diode 108 is connected to both ends of the capacitor 105, and a feedback signal for stabilizing the output voltage Vo is controlled by the switching power supply control semiconductor device 41. The signal is output to the phototransistor 110 connected to the signal input terminal 40.

  The transformer tertiary winding 103 c is connected to the power input terminal 38 via a transformer reset detection terminal 39 and a rectifier (diode) 112. Further, the capacitor 111 prevents the power input terminal 38 from rapidly decreasing. That is, the resistor 116 and the capacitor 117 that are to be stabilized and connected to the transformer reset detection terminal 39 generate a delay time, and thereby a transformer reset detection signal detected by the transformer reset detection terminal 39. The timing is adjusted. The capacitor 118 connected between the input and output of the switching element 1 is for determining the magnitude and period of ringing due to resonance with the transformer 103.

  With the above configuration, by performing intermittent control at light load, the switching loss due to the switching element 1 can be suppressed and the power supply efficiency at light load can be improved. However, as shown in FIG. After receiving the drain current detection signal at the time of OFF, by giving a certain delay time to the drain current detection signal by the delay circuit 27, the transformer 103 is within the blanking time corresponding to the delay time. The switching-on control by the transformer reset pulse obtained by the transformer reset pulse generating circuit 25 based on the signal from the tertiary winding 103c is not accepted, and the switching element 1 is not given an on-signal. Stop the switching operation of the It is configured to al.

  The switching power supply control semiconductor device 41 includes an external signal input terminal 42 connected to an external resistor. The DC input voltage VIN is resistance-divided by resistors 120 and 121, and the external signal input terminal 42 is connected. A signal is input to the variable signal generation circuit 43. In response to the first variable signal 45 input from the external signal input terminal 42 from the variable signal generation circuit 43 that changes according to the input voltage, the IV converter 19 is determined by the overcurrent protection reference voltage source 31. The maximum voltage of the output signal VEAO fluctuates, and the delay time of the delay circuit 27 fluctuates in response to the second variable signal 44 from the variable signal generation circuit 43.

  Hereinafter, the operation at the time of light load of the switching power supply using the semiconductor device 41 for controlling switching power supply configured as described above will be described. This switching power supply device is a ringing choke converter (RCC) that uses a partial resonance operation.

  FIG. 2 is a timing chart for explaining the operation of the switching power supply device using the switching power supply control semiconductor device according to the first embodiment, and FIG. 3 explains the operation of the reference voltage source in the switching power supply control semiconductor device. FIG. 4 is a circuit diagram showing a configuration example of an internal circuit of a reference voltage source in a semiconductor device for switching power supply control, FIG. 5A is a normal time, FIG. 4B is a light load, and FIG. ) Is a diagram showing a switching operation when there is no load.

  As shown in FIG. 1, when AC power from a commercial power source is input to the rectifier 101, it is rectified and smoothed by the rectifier 101 and the capacitor 102 and converted to a DC input voltage VIN. This input voltage VIN is applied to the primary winding 103 a of the transformer 103. When the input voltage VIN becomes a certain value or more, a charging current flows to the capacitor 111 via the regulator 6 in the switching power supply control semiconductor device 41, and the voltage of the power supply input terminal 38 of the switching power supply control semiconductor device 41 is changed. When the starting / stopping comparator 7 reaches a starting voltage that is an arbitrary reference voltage set in the internal circuit, control of the switching operation by the switching element 1 is started.

  A start pulse is generated by the start pulse generation circuit 10 based on the output signal of the start / stop comparator 7, and the switching element 1 is turned on. Further, since the output on the secondary winding 103b side is low at the time of start-up, no current flows through the zener diode 108 of the output voltage detection circuit 106, so no current flows through the phototransistor 110. Therefore, the output voltage VEAO of the IV converter 19 is higher than the overcurrent protection reference voltage source 31, and the minus side of the drain current detection comparator 33 is set to a voltage determined by the overcurrent protection reference voltage source 31. Has been. When a start pulse is generated by the start pulse generation circuit 10 and the switching element 1 is turned on, a current flows through the switching element 1 and an on voltage determined by the product of the on resistance is detected by the drain current detection circuit 32 and is used for detecting the drain current. Although it is input to the plus side of the comparator 33 and rises above the voltage determined on the minus side, a high level is input to the reset terminal signal of the RS flip-flop 30, and the switching element 1 is turned off.

  Thereafter, the resonance operation determined by the inductance of the transformer 103 and the capacitance between the input and output of the capacitor 118 and the switching element 1 causes the voltage of the tertiary winding (bias winding) 103c of the transformer 103 to change from positive to negative. When the voltage at the input terminal 36 decreases, the transformer reset pulse from the transformer reset pulse generation circuit 25 is input to the set terminal of the RS flip-flop 30 through the OR circuit 29 by the transformer reset detection circuit 11. The switching element 1 is turned on.

  A resistor 116 connected between the tertiary winding (bias winding) 103c of the transformer 103 and the transformer reset detection terminal 39, and between the switching element output terminal (ground terminal) 37 and the transformer reset detection terminal 39. The detection time of the transformer reset detection circuit 11 is adjusted by the capacitor 117 connected to the switching element 1, and the switching element 1 is turned on at the point where the voltage at the switching element input terminal 36 becomes substantially zero volts.

  The switching operation as described above is repeated, and the output voltage Vo rises. However, when the output voltage becomes equal to or higher than the voltage set by the output voltage detection circuit 106, the LED 107 is turned on, a current flows through the phototransistor 110, and the switching power supply A current flows out from the control signal input terminal 40 of the control semiconductor device 41. Since the output voltage VEAO of the IV converter 19 decreases due to the magnitude of this outflow current, the negative side of the drain current detection comparator 33 decreases, so the drain current of the switching element 1 decreases. Thus, the on-duty of the switching element 1 changes to an appropriate state. That is, the switching operation is turned on by the transformer reset pulse output from the transformer reset pulse generation circuit 25 by the output signal from the transformer reset detection circuit 11, and the on-duty of the switching element 1 is the current flowing out from the control signal input terminal 40. Determined by.

  That is, compared with the normal time shown in FIG. 5A, when the current supply to the load 109 is small as shown in FIG. 5B, the period during which the current IDS flows through the switching element 1 is short, and the normal operation is in progress. When the load is heavy, the period during which the current IDS flows through the switching element 1 becomes longer.

  As described above, the switching power supply control semiconductor device 41 controls the drain current IDS of the switching element 1 and changes the on-duty according to the power supplied to the load 109 of the switching power supply. In addition, the timing at which the switching element 1 is turned on is set so as to be output when the input voltage of the switching element 1 is reduced most during the resonance operation, so that there is almost no switching loss when the switching element 1 is turned on. That is, the partial resonance operation is performed so that the switching loss at the time of ON can be ignored. By performing such an operation, it is possible to achieve high efficiency and low noise during normal operation.

  Next, the light load detection comparator 20 compares the output voltage VEAO obtained by converting the current flowing out from the control signal input terminal 40 by the IV converter 19 with the reference voltage VR output from the reference voltage source 21. To do. The reference voltage VR of the reference voltage source 21 is initially the light-load detection lower limit voltage VR1 (normal time in FIG. 2). When the current supply to the load 109 connected to the output of the switching power supply device is small, such as during standby (load fluctuation state in FIG. 2), when the supply current to the load decreases, the output voltage Vo increases, The current of the phototransistor 110 due to the LED 107 increases. Since the current flowing out from the control signal input terminal 40 increases due to the current IFB, (Equation 2)

に従って、Ｉ−Ｖ変換器１９の出力電圧ＶＥＡＯが下降する。

Accordingly, the output voltage VEAO of the IV converter 19 decreases.

  Here, the voltage V0 is a reference voltage by a preset reference voltage source 18, R is a resistance value of the resistor 17, and I is a current flowing from the control signal input terminal 40 converted by the internal mirror circuits 13-16. The current value flowing through the resistor 17.

  Therefore, from (Equation 2), the output voltage VEAO of the IV converter 19 decreases as the outflow current from the control signal input terminal 40 increases. Along with this, the reference power supply (minus side) of the drain current detection comparator 33 decreases, the drain current of the switching element 1 gradually decreases, and the power supply to the load 109 decreases. When the output voltage VEAO of the IV converter 19 becomes lower than the light load detection lower limit voltage VR1, the light load detection state is entered, and the output of the light load detection comparator 20 is output as shown in FIG. The signal V01 changes from a low level to a high level.

  As a result, the output of the AND circuit 24 becomes low level via the inverter 23, and the transformer reset pulse of the transformer reset pulse generation circuit 25 is not outputted, so that the switching operation of the switching element 1 is stopped. At this time (at the time of no load in FIG. 2), the reference voltage VR output from the reference voltage source 21 in response to the output signal V01 of the light load detection comparator 20 is changed from the light load detection lower limit voltage VR1 to the light load. The hour detection upper limit voltage VR2 is changed.

  When the switching operation by the switching element 1 is stopped and the switching element 1 is turned off, no current flows through the switching element 1. As a result, power supply to the load 109 is lost, and the output voltage Vo to the load 109 gradually decreases. As a result, the output voltage VEAO of the IV converter 19 gradually increases, but the output voltage VR of the reference voltage source 21 becomes a light load detection upper limit voltage VR2 higher than the light load detection lower limit voltage VR1. Therefore, as shown in FIG. 3, the switching operation by the switching element 1 is not resumed immediately.

  Then, as shown in FIG. 2, the output voltage Vo to the load 109 further decreases, and as shown in FIG. 3, the output voltage VEAO of the IV converter 19 rises above the light load detection upper limit voltage VR2. Sometimes, the output signal V01 of the light load detection comparator 20 becomes low level, and the signal of the intermittent end pulse generation circuit 26 that has passed through the inverter 23 is outputted. Then, the switching operation of the switching element 1 is resumed by this output signal. At the same time, the transformer reset detection circuit 11 whose operation has been stopped by the AND circuit 24 becomes valid, and the switching element 1 resumes the normal partial resonance type on / off operation by the transformer reset pulse of the transformer reset pulse generation circuit 25 (see FIG. 2 in the same state as normal time).

  At the same time, as shown in FIG. 3, the reference voltage VR of the reference voltage source 21 is changed from the detection upper limit voltage VR2 at light load (standby) to the detection lower limit voltage VR1 at light load (standby). When the switching operation by the switching element 1 is resumed, the on-duty of the switching element 1 becomes larger than the on-duty at the time of light load detection, so that the power supply to the load 109 becomes excessive, and the load is supplied to the load again. The output voltage Vo increases, and the output voltage VEAO of the IV converter 19 decreases. When the light load is detected again, the switching operation by repeatedly turning on / off the switching element 1 is stopped.

  As described above, the reference voltage VR output from the reference voltage source 21 changes from the light load detection lower limit value VR1 to the light load detection upper limit value VR2 by detecting the light load, and thus the standby state is detected. During this time, the switching control that repeats the on / off operation of the switching element 1 is in an intermittent oscillation state (intermittent switching operation) in which the stop and restart are repeated.

  The output voltage Vo to the load 109 decreases during the intermittent oscillation stop period, and the degree of the decrease depends on the supply current to the load 109. That is, as the current consumed by the load 109 decreases, the output voltage Vo of the load 109 decreases more slowly, and the intermittent oscillation stop period becomes longer as the current consumed by the load 109 decreases. As it is, the switching operation of the switching element 1 is reduced.

  The reference voltage source 21 shown in FIG. 4 includes a constant current source 300 for determining the reference voltage VR of the reference voltage source 21, a constant current source 301, a resistor 303, a switching element 302 such as a P-type MOSFET, and an inverter 304. It is configured.

  The constant current source 300 supplies a constant current I1 and is connected to the resistor 303. The constant current source 301 supplies a constant current I2, and is connected to a resistor 303 via a switching element (P-type MOSFET) 302. The output signal V01 of the light load detection comparator 20 is input via an inverter 304 to an input terminal such as a gate electrode of the switching element 302. Further, the voltage generated by the constant current source 300, the constant current source 301 and the resistor 303 is output as the reference voltage VR of the reference voltage source 21, and is input to the plus side terminal of the light load detection comparator 20 of FIG. It has come to be.

  The operation of the light load detection circuit 22 configured as described above will be described below.

  As shown in FIG. 3, in the state before detection at light load, the output signal V01 of the light load detection comparator 20 is at a low level, so the switching element 302 is turned off. Accordingly, the reference voltage VR of the reference voltage source 21 at this time, that is, the light load detection lower limit voltage VR1 is (Equation 3)

で表される。

It is represented by

  On the other hand, in the light load detection state, the output signal V01 of the light load detection comparator 20 becomes high level, so that the switching element 302 is turned on, and the current I2 supplied from the constant current source 301 is also the resistor 303. Will flow to. Accordingly, the reference voltage VR of the reference voltage source 21 at this time, that is, the light load detection upper limit voltage VR2 is (Expression 4)

で表される。

It is represented by

  As described above, as shown in FIG. 3, the reference voltage VR of the reference voltage source 21 becomes the light load detection lower limit voltage VR1 or the light load detection is detected according to the output signal V01 of the light load detection comparator 20. By setting the upper limit voltage VR2, the intermittent oscillation state during standby can be created.

  In the first embodiment, the constant current value for setting the output voltage of the reference voltage source 21 is changed in accordance with the output signal V01 of the light load detection comparator 20. The resistance value for setting the output voltage of the reference voltage source 21 may be changed according to the output signal V01 of the hour detection comparator 20.

  FIG. 6 is a circuit diagram showing a configuration example of the delay circuit in the semiconductor device for controlling the switching power supply according to the first embodiment. The delay circuit shown in FIG. 5A, FIG. 5B, FIG. The operation of the circuit 27 will be described.

  First, the meaning of providing the delay circuit 27 will be described below regarding the limitation of the maximum frequency. Since the pseudo resonance is an RCC (ringing choke converter) and is basically self-excited, the lighter the load, the higher the oscillation frequency.

  In the switching power supply device, noise regulation is severe, and high frequency noise is generated when the oscillation frequency is 150 kHz or higher. This high-frequency noise generally refers to radio noise that becomes a problem in the frequency band (150 kHz to 1 GHz) that causes electromagnetic wave interference. This noise is caused by conductive noise transmitted through a power line or the like and space. It is divided roughly into radioactive noise radiated toward.

  For this reason, the maximum frequency is limited so that the oscillation frequency becomes high at light load and does not enter a frequency band that causes high frequency noise.

  Next, improvement of power supply efficiency at light load by reducing switching loss will be described. When the oscillation frequency increases at light loads, the number of switchings per unit time increases. Therefore, the switching loss accompanying the switching operation increases, and in order to reduce this loss, the frequency is restricted so as not to be higher than a certain level.

  In the delay method shown in FIG. 1 described above, when the off signal is output to the switching element (power MOSFET) 1, that is, after the drain current is detected by the on resistance of the switching element 1 corresponding to the load, A delay circuit 27 is inserted between the AND circuit 28 whose input is a transformer reset pulse. The ON signal from the transformer reset pulse generation circuit 25 is output when the transformer reset pulse (ON signal) is input at the time of AND based on the OFF signal from the drain current detection circuit 32, that is, the drain current detection state. If the OFF signal based on the drain current detection is not input to the AND circuit 28, the switching element 1 is not turned ON even if the transformer reset pulse signal is input.

  From the above, if a delay of a certain time is given to the OFF signal by the drain current detection by the delay circuit 27, the transformer reset pulse (ON signal) by ringing is output to the AND circuit 28 during the delay period. However, since the switching element 1 is not turned on, if the delay time (that is, the masking time of the ON state by the transformer reset pulse) is determined, even if the transformer reset detection signal is input within a shorter time, the switching element 1 Will not turn on.

  In actual operation, if the oscillation frequency is high at light load and the mask time is input later than the transformer reset detection signal, one ringing is skipped and the next transformer reset detection signal turns on. . In this way, the effects as described above can be obtained.

  Next, the operation of the switching power supply control semiconductor device 41 having the delay circuit 27 shown in FIG. 1 will be described with reference to FIG. .

  As shown in FIG. 5, as the load state becomes lighter from normal (FIG. 5 (a)) to light load (FIG. 5 (b)) and further to no load (FIG. 5 (c)), the oscillation frequency However, within the blanking time in which only the delay time by the delay circuit 27 masks the transformer reset pulse having the waveform timing corresponding to the waveform of the drain voltage VDS of the switching element 1, the switching element 1 Since it is not turned on, the drain current IDS does not flow, and its switching frequency does not become higher than a certain frequency.

  That is, as the load state becomes light and the period of the transformer reset pulse for turning on the switching element 1 becomes shorter, the drain of the switching element 1 becomes shorter as shown in FIGS. In the waveform of the transformer reset pulse corresponding to the voltage VDS, the number of skips increases depending on the blanking time with respect to the ON timing to the switching element 1, so even if the drain voltage VDS is 0 V during that period. The drain current IDS does not flow, and the oscillation frequency in the switching operation does not become higher than a certain level.

  Next, the operation of the delay circuit 27 will be described with reference to FIG. As shown in FIG. 6, the delay circuit 27 receives the off signal to the switching element 1, and when a high level is input as the output signal of the drain current detection comparator 33, the N-type MOSFET 404 is turned on. Then, the electric charge is discharged with the constant current I from the capacitance C of the capacitor 405 charged to the VDD level. That is, the capacitor C is discharged with a constant current I. When the potential of the capacitor C falls below the threshold value of the inverter 406 and becomes a low level, the output blanking cancel signal for canceling the blanking time for masking the output. Becomes high level.

  This mask time t is (Equation 5).

で決まる。
ここで、Ｖはインバータ４０６がハイレベルからローレベルに切り替わる閾値、Ｃはコンデンサ４０５の容量値である。

Determined by.
Here, V is a threshold value at which the inverter 406 switches from a high level to a low level, and C is a capacitance value of the capacitor 405.

  If the mirror ratio of the N-type MOSFET 401 and the N-type MOSFET 402 is M, the current of the constant current source 400 is I1, the current flowing through the N-type MOSFET 401 is I2, the current flowing through the N-type MOSFET 420 is I3, and the capacitance of the capacitor 405 is C. , Currents I and I2 are respectively (Equation 6)

で表される。

It is represented by

  Therefore, the blanking time t expressed by (Equation 5) is (Equation 7).

で表される。
（数５）からわかるように、コンデンサ４０５の容量Ｃを大きく、あるいは電流Ｉを小さくするとブランキング時間ｔが長くなる。つまり、（数７）において、Ｎ型ＭＯＳＦＥＴ４２０に流れる電流Ｉ３を大きくすることで、ブランキング時間ｔを長くすることができる。

It is represented by
As can be seen from (Equation 5), when the capacitance C of the capacitor 405 is increased or the current I is decreased, the blanking time t becomes longer. That is, in (Equation 7), the blanking time t can be lengthened by increasing the current I3 flowing through the N-type MOSFET 420.

  Since the oscillation frequency is higher in quasi-resonant control at high input voltage than at low input voltage, it is necessary to reduce the frequency and suppress the maximum output power by increasing the blanking time t. Is inputted to the variable signal generation circuit 43 from the external signal input terminal 42 and the current flowing through the N-type MOSFET 420 by the second variable signal 44 output from the variable signal generation circuit 43. I3 is configured to increase as the input voltage increases, and to increase the blanking time t.

  Next, FIG. 7 is a circuit diagram showing a configuration example of the variable signal generation circuit and the overcurrent protection reference voltage source in the switching power supply control semiconductor device according to the first embodiment. The operation of the variable signal generation circuit 43 will be described with reference to FIGS.

  In the variable signal generation circuit 43 shown in FIG. 7, the value of the current flowing through the N-type MOSFET 420 shown in FIG. 6 is adjusted by adjusting the signal input from the external signal input terminal 42, that is, the current ICL flowing from the external signal input terminal 42. The potential of the overcurrent protection reference voltage source 31 that clamps the upper limit of the output signal VEAO of the I-V converter 19 shown in I3 and FIG. 1 is varied to adjust the maximum switching frequency and the overcurrent protection level of the switching element 1.

  As the current ICL increases, the current flowing through the N-type MOSFET 260 increases, the current of the N-type MOSFET 261 connected to the N-type MOSFET 260 with the mirror ratio m1 also increases, and the current flowing from the constant current I201 of the constant current source 201 to the N-type MOSFET 262. Decreases, and the current of the N-type MOSFET 263 determined by the mirror ratio m2 decreases through the N-type MOSFET 262 and the RC filter. The current flowing from the constant current I202 of the constant current source 202 to the N-type MOSFET 264 increases, and the current value I3 flowing to the N-type MOSFET 420 shown in FIG. 6 connected to the N-type MOSFET 264 with the mirror ratio m4 increases. The ranking time t increases and the switching frequency decreases.

  Further, the current of the N-type MOSFET 265 connected to the N-type MOSFET 264 with the mirror ratio m3 also increases, the current flowing from the constant current I203 of the constant current source 203 to the resistor 240 decreases, and the potential V240 at the resistor 240 decreases. As a result, the potential of the overcurrent protection reference voltage source 31 that clamps the upper limit of the output signal VEAO of the IV converter 19 decreases, and the overcurrent protection level of the switching element 1 decreases.

  Also, the operating potential of the external signal input terminal 42 is set to a constant potential by inserting the P-type MOSFET 250 having the potential Vbg of the constant voltage source 259 input to the gate terminal between the external signal input terminal 42 and the N-type MOSFET 260. . With this setting, the current ICL can be easily set according to the values of the resistors 120 and 121 externally connected to the external signal input terminal 42, and the switching frequency and overcurrent can be easily set by the externally connected resistors 120 and 121. The protection level ILIMIT can be adjusted stably.

Even when the current ICL becomes too large, the lower limit of the current I2 flowing through the N-type MOSFET 401 is fixed by fixing the upper limit of the current I3 flowing through the N-type MOSFET 420 with the constant current I202, and the constant current I202 and the constant current At I203, the lower limit of the potential V240 is fixed.
Upper limit value of current I3 = constant current I202 × m4
Here, m4 is a mirror ratio of the N-type MOSFET 264 and the N-type MOSFET 420, where constant current I202 × m4 <constant current I1−current I2 (I1 is a constant current of the constant current source 400).
Lower limit value of potential V240 = R240 × (constant current I203−constant current I202 × m3)
R240 is a resistance value of the resistor 240, and m3 is a mirror ratio of the N-type MOSFET 264 and the N-type MOSFET 265.

Even when the current ICL becomes too small to be “0”, the upper limit of the current I2 is fixed by the constant current I1 from the constant current source 400 even if the current I3 flowing through the N-type MOSFET 420 stops flowing. The upper limit of the potential V240 is fixed by I203.
Potential V240 upper limit = R240 × I203
However, I201 × m2> I202, and m2 is a mirror ratio between the N-type MOSFET 262 and the N-type MOSFET 263.

  For this reason, the switching frequency and the overcurrent protection level can be adjusted by adjusting the external resistance or the like without extremely worrying about the resistance value. The relationship between the blanking time t and the overcurrent protection level ILIMIT for the current ICL at this time is shown in FIGS.

  Further, in order to generate a voltage VCL proportional to the input voltage VIN and input it to the external signal input terminal 42, the resistors 120 and 121 are connected so as to divide the input voltage VIN. The voltage VCL is (Equation 8)

であり、入力電圧ＶＩＮが高くなるに従って電圧ＶＣＬも高くなる。定電圧源２５９の電位Ｖｂｇと外部信号入力端子４２の電圧ＶＣＬとの電位差がＰ型ＭＯＳＦＥＴ２５０の電圧ＶＧＳであり（数９）

The voltage VCL increases as the input voltage VIN increases. The potential difference between the potential Vbg of the constant voltage source 259 and the voltage VCL of the external signal input terminal 42 is the voltage VGS of the P-type MOSFET 250 (Equation 9)

で表される。

It is represented by

  Therefore, as the input voltage VIN increases, the voltage VCL increases and the voltage VGS of the P-type MOSFET 250 increases, so that the current ICL increases. As a result, the blanking time t becomes longer and the overcurrent protection level ILIMIT is corrected so as to become smaller.

  In general, the output power PO is expressed by the following equation (10) using the efficiency η.

のように表される。

It is expressed as

  Therefore, when ILIMIT is internally constant, the maximum output power on the secondary winding side becomes larger at high input voltage than at low input voltage. Even for the problem that the time becomes higher, by adjusting the resistors 120 and 121, the point of the overcurrent protection level ILIMIT at the time of the high input voltage is set lower than that at the time of the low input voltage. The maximum output power on the winding side can be corrected to the same extent as when the input voltage is low.

  In order to improve the conventional problem that the overcurrent protection level ILIMIT becomes high at a high input voltage when the same overcurrent protection level is internally set as shown in FIG. As the input is higher, it is possible to apply a correction that lowers ILIMIT.

  As described above, high frequency operation at light load can be suppressed, switching loss can be reduced, power efficiency at light load can be improved, power consumption at light load can be reduced, and quasi-resonant operation can be achieved. Therefore, even during normal operation, high efficiency and low noise can be easily realized in the entire load range from light load to heavy load, and the maximum output power can be kept constant regardless of the input voltage. Can keep.

  Next, in the second embodiment, as shown in FIG. 1, in the configuration in which the switching operation by the switching element is an intermittent switching operation at the time of light load by using the light load detection circuit 22, Although the case where the signal input terminal 42 and the variable signal generation circuit 43 are used has been described, as shown in FIG. 10, the light load detection circuit 22 is not used, and the intermittent switching operation by the switching element is not performed. The same effect can be obtained.

  FIG. 11 is a circuit diagram showing a configuration example of a switching power supply control semiconductor device and a switching power supply using the same according to the second embodiment of the present invention, and FIG. 12 shows a switching power supply control semiconductor device of the second embodiment. 2 is a circuit diagram showing a configuration example of a variable signal generation circuit and an overcurrent protection reference voltage source in FIG.

  In the switching power supply control semiconductor device 41 according to the second embodiment, as shown in FIG. 11, the third variable signal 46 output from the variable signal generation circuit 43 ′ is provided and input to the NAND circuit 34. . With this configuration, the switching start / stop of the switching element 1 can be controlled by the output signal of the variable signal generation circuit 43 ′ with respect to the signal input from the external signal input terminal 42.

  That is, with the configuration shown in FIG. 11, the signal input to the external signal input terminal 42 changes according to the input voltage VIN, and the input voltage range in which the switching power supply device operates can be defined.

  12 adjusts the signal input from the external signal input terminal 42, that is, the current ICL flowing from the external signal input terminal 42, to the NAND circuit 34 shown in FIG. The oscillation and stop of the switching element 1 can be controlled by changing the input third variable signal 46. When the inflowing current ICL becomes equal to or higher than the first threshold current ICL1, the third variable signal 46 output from the inverter 284 changes from low level to high level, and the output of the NAND circuit 34 changes from low level to the gate driver 35. As a result, the gate electrode of the switching element 1 becomes a high level, and the switching operation is started. The first threshold current ICL1 at this time is determined as follows.

  First, the current ICL increases, the current flowing through the P-type MOSFET 250 and the N-type MOSFET 260 increases, the current flowing through the N-type MOSFET 266 connected to the N-type MOSFET 260 with the mirror ratio m5 increases, and the current flowing through the P-type MOSFET 251. Increases, and the current I252 of the P-type MOSFET 252 determined by the mirror ratio m6 increases through the P-type MOSFET 251 and the RC filter. As a result, when the current I252 becomes equal to or higher than the constant current I204 determined by the constant current source 204, and the potential V204 between the P-type MOSFET 252 and the constant current source 204 becomes equal to or higher than the threshold value of the inverter 281, the output of the inverter 281 is It goes to the low level and is input to the gate electrode of the P-type MOSFET 254. When the P-type MOSFET 254 is turned on, the potential V204 is further fixed at the high level. The current ICL at this time becomes the first threshold current ICL1 (Equation 11)

で表される。

It is represented by

  The current I255 of the P-type MOSFET 255 determined by the P-type MOSFET 251 and the mirror ratio m8 also increases, but the P-type MOSFET 251 and the P-type MOSFET 255 are set so that the current I255 is equal to or less than the constant current I205 determined by the constant current source 205. The mirror ratio m8 of (Equation 12)

で決定されている。

It has been determined by.

  Therefore, the potential V205 between the P-type MOSFET 255 and the constant current source 205 is kept at a low level, the output of the inverter 280 is held at a high level, and is input to the NAND circuit 283. At this time, the output of the NAND circuit 283 becomes low level, the output of the inverter 284 becomes high level, and is input to the NAND circuit 34 shown in FIG.

  As described above, when a current equal to or greater than the first threshold current ICL1 flows into the external signal input terminal 42, the switching operation is started.

  Further, when the current ICL further increases, the current I255 of the P-type MOSFET 255 determined by the P-type MOSFET 251 and the mirror ratio m8 increases, and the current I255 becomes equal to or higher than the constant current I205 determined by the constant current source 205, the potential V205 is Invert from low level to high level. At this time, the output of the inverter 280 is at a low level, and is input to the gate electrode of the P-type MOSFET 257. When the P-type MOSFET 257 is turned on, the potential V205 is further fixed at a high level. Further, the low level signal output from the inverter 280 is input to the NAND circuit 283, the output from the NAND circuit 283 becomes high level, the output from the inverter 284 is inverted from high level to low level, and the NAND circuit 34 shown in FIG. To stop the switching operation. At this time, the second threshold current ICL2 of the inflowing current ICL is expressed by (Equation 13).

としている。

It is said.

  FIG. 13 shows the relationship of the third variable signal 46 to be output with respect to the inflowing current ICL at this time. Switching control is performed between the first threshold current ICL1 and the second threshold current ICL2, and switching is stopped in the other current ICL ranges.

  Therefore, by adjusting the resistors 120 and 121, the range of the current ICL with respect to the input voltage can be set, the input voltage range of the power supply operation can be defined, the malfunction at the abnormally low input voltage is prevented, and the abnormally high input It is possible to prevent the switching element from being broken during voltage.

  The switching power supply control semiconductor device and the switching power supply according to the present invention mask the overcurrent protection detection level of the switching element and the transformer reset detection signal of the transformer reset detection circuit by adjusting the input signal of the external signal input terminal. The delay time can be corrected according to the input voltage, the maximum output power can be made to the same level without depending on the input voltage, the rating of the parts used can be suppressed, not only improving the cost performance of the power supply, It can be used in the same semiconductor device, and is useful as a switching power source for converting an AC power source from a commercial power source into a DC power source required for equipment.

1 is a circuit diagram showing a configuration example of a switching power supply control semiconductor device and a switching power supply device in Embodiment 1 of the present invention; Timing chart for explaining the operation of the switching power supply using the semiconductor device for controlling switching power supply according to the first embodiment Timing chart for explaining the operation of the reference voltage source in the semiconductor device for controlling switching power supply according to the first embodiment The circuit diagram which shows the example of 1 structure of the internal circuit of the reference voltage source in the semiconductor device for switching power supply control of this Embodiment 1 (A) of the first embodiment is a normal operation, (b) is a light load, and (c) is a diagram showing a switching operation at no load. The circuit diagram which shows one structural example of the delay circuit in the semiconductor device for switching power supply control of this Embodiment 1 The circuit diagram which shows the structural example of the variable signal generation circuit and overcurrent protection reference voltage source in the semiconductor device for switching power supply control of this Embodiment 1 (A) is blanking time t with respect to electric current ICL of this Embodiment 1, (b) is a figure which shows the change of overcurrent protection level ILIMIT. The figure which shows the characteristic waveform for demonstrating operation | movement of the semiconductor device for switching power supply control in this Embodiment 1. The circuit diagram which shows the other structure of the semiconductor device for switching power supply control in this Embodiment 1 The circuit diagram which shows the example of 1 structure of the semiconductor device for switching power supply control in Embodiment 2 of this invention, and a switching power supply device The circuit diagram which shows the example of 1 structure of the variable signal generation circuit and overcurrent protection reference voltage source in the semiconductor device for switching power supply control of this Embodiment 2 The figure which shows the change of the output state of the 3rd variable signal with respect to ICL in the semiconductor device for switching power supply control of this Embodiment 2. Circuit diagram showing a configuration example of a conventional switching power supply device

Explanation of symbols

1 Switching element (Power MOSFET)
2, 4 Constant current source 3, 5 Changeover switch 6 Regulator 7 Start / stop comparator 8 Gate driver reference power supply (internal circuit reference voltage)
9 Comparator 10 Start Pulse Generation Circuit 11 Transformer Reset Detection Circuit 12 Clamp Circuit 13, 14 P-type MOSFET
15,16 N-type MOSFET
17, 116, 120, 121 Resistors 18, 21 Reference voltage source 19 IV converter 20 Light load detection comparator 22 Light load detection circuit 23 Inverter 24, 28 AND circuit 25 Transformer reset pulse generation circuit 26 Intermittent End pulse generation circuit 27 Delay circuit 29 OR circuit 30 RS flip-flop 31 Overcurrent protection reference voltage source 32 Drain current detection circuit 33 Drain current detection comparator 34 NAND circuit 35 Gate driver 36 Switching element input terminal 37 Switching element output terminal ( Ground terminal)
38 Power input terminal 39 Transformer reset detection terminal 40 Control signal input terminal 41 Semiconductor device for switching power supply control 42 External signal input terminal 43 Variable signal generation circuit 44 Second variable signal 45 First variable signal 46 Third variable signal 101 , 104, 112 Rectifiers 102, 105, 111, 117, 118 Capacitor 103 Transformer 103a Primary winding 103b Secondary winding 103c Tertiary winding (bias winding)
106 Output voltage detection circuit 107 LED
108 Zener diode 109 Load 110 Phototransistor

Claims (6)

A DC input voltage obtained by applying a DC input voltage to the switching element through the primary winding of the transformer and rectifying and smoothing the AC current generated in the secondary winding of the transformer by the switching operation of the switching element. A switching power supply control semiconductor device having a control circuit for controlling a switching operation of the switching element to control and supply power to a load,
The control circuit detects a reset state of the transformer generated by a switching operation of the switching element from a drain current detection circuit that detects a current flowing through the switching element and an AC voltage generated in a tertiary winding of the transformer. A transformer reset detection circuit that outputs a transformer reset detection signal indicating the reset state, a delay circuit that gives a predetermined delay time to the output signal of the drain current detection circuit, and a secondary winding of the transformer. An IV converter that converts a current value of a control current indicating a change in DC voltage based on the AC current to a voltage value, and an output signal of the IV converter and an output signal of the drain current detection circuit are compared. A drain current detection comparator and an output signal of the IV converter serving as a reference voltage for the drain current detection comparator Comprising overcurrent protection reference voltage source for determining the upper limit, receiving the input signal from the external connection terminal, and a variable signal generating circuit supplies an external variable signal to an input of the overcurrent protection reference voltage source as an output,
In the control of the switching operation based on the transformer reset detection signal of the transformer reset detection circuit and the output signal of the drain current detection circuit, the overcurrent protection reference voltage source receives the external variable signal, and the drain current detection circuit The overcurrent protection level, which is the upper limit of the reference voltage to be compared with the output signal, is varied, and the transformer reset detection signal of the transformer reset detection circuit is masked until the drain current detection signal delayed by a predetermined time is output from the delay circuit. The switching power supply control semiconductor device is characterized in that the control electrode of the switching element is driven to stop the switching operation. A DC input voltage obtained by applying a DC input voltage to the switching element through the primary winding of the transformer and rectifying and smoothing the AC current generated in the secondary winding of the transformer by the switching operation of the switching element. A switching power supply control semiconductor device having a control circuit for controlling a switching operation of the switching element to control and supply power to a load,
The control circuit detects a reset state of the transformer generated by a switching operation of the switching element from a drain current detection circuit that detects a current flowing through the switching element and an AC voltage generated in a tertiary winding of the transformer. A transformer reset detection circuit that outputs a transformer reset detection signal indicating the reset state, a delay circuit that gives a predetermined delay time to the output signal of the drain current detection circuit, and a secondary winding of the transformer. The IV converter that converts the current value of the control current indicating the change of the DC voltage based on the AC current to the voltage value, the output signal of the IV converter, and the output signal of the drain current detection circuit are compared. And a drain current detection comparator that outputs the output signal of the IV converter that serves as a reference voltage for the drain current detection comparator. An overcurrent protection reference voltage source that determines an upper limit of the signal, a variable signal generation circuit that receives an input signal from an external connection terminal and supplies an external variable signal to the input of the overcurrent protection reference voltage source and the delay circuit as an output; With
In controlling the switching operation based on a transformer reset detection signal of the transformer reset detection circuit and an output signal of the drain current detection circuit, the overcurrent protection reference voltage source and the delay circuit receive the external variable signal, and The transformer reset detection circuit until the overcurrent protection level that is the upper limit of the reference voltage to be compared with the output signal of the drain current detection circuit and the delay time are varied and the drain current detection signal delayed by a predetermined time is output from the delay circuit A switching power supply control semiconductor device, wherein the control electrode of the switching element is driven so as to stop the switching operation by masking the transformer reset detection signal.   3. The semiconductor device for controlling a switching power supply according to claim 1, wherein when the input signal from the external connection terminal is equal to or lower than a set value, the switching operation of the switching element is stopped.   3. The switching power supply control semiconductor device according to claim 1, wherein when the input signal from the external connection terminal is equal to or greater than a set value, the switching operation of the switching element is stopped.   A switching element input terminal for applying an input voltage to the switching element via a primary winding of a transformer on a semiconductor substrate in which the control circuit and the switching element are integrated on the same substrate, and a switching operation of the switching element A switching element output terminal for outputting the obtained switching current, a power supply input terminal for supplying a DC voltage based on the current generated in the tertiary winding of the transformer by the switching operation of the switching element, and the switching element A control signal input terminal for inputting a control signal for controlling the intermittent switching operation, a transformer reset detection terminal for inputting a transformer reset detection signal to the transformer reset detection circuit, an overcurrent protection reference voltage source and a delay circuit. Variable signal generator for supplying external variable signals Switching power supply control semiconductor device according to claim 1, characterized in that an external signal input terminal for inputting an external signal of the circuit.   Using the switching power supply control semiconductor device according to any one of claims 1 to 5, a DC input voltage is applied to a switching element through a primary winding of a transformer to perform a switching operation of the switching element. In this way, the switching power supply is characterized in that the DC voltage obtained by rectifying and smoothing the AC current generated in the secondary winding of the transformer is controlled to supply power to the load.

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