JP4301852B2 - Video signal processing circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a video signal processing circuit.
[0002]
[Prior art]
In a display device using an A / D converter in a video signal processing circuit, a reproducible range (dynamic range) of a video signal that can be reproduced is determined according to the number of quantization bits of the A / D converter.
[0003]
As a means for equivalently expanding the dynamic range, there is a technique for changing the amplitude of the output video signal by a variable gain amplifier when the input video signal level to the A / D converter is smaller than the dynamic range. An example of this is shown in FIG.
[0004]
In FIG. 1, the luminance signal Y is input to the variable gain amplifier 101. The output of the variable gain amplifier 101 is sent to the A / D converter 103 and converted into an n-bit digital signal. A digital signal output from the A / D converter 103 is subjected to resolution conversion by a resolution conversion circuit (scaler) 104 and then sent to a display panel 105 such as an LCD, PDP, or DLP.
[0005]
The gain of the variable gain amplifier 101 is controlled by a gain control signal output from the maximum value detection circuit 102. The maximum value detection circuit 102 holds the voltage of the largest portion of the video signal and compares it with a predetermined voltage that is the maximum value of the A / D conversion dimic range. Then, a gain control signal is generated based on the difference value.
[0006]
FIG. 2 shows an example of the maximum value detection circuit 2.
[0007]
The maximum value of the luminance signal Y is held in the capacitor 112 by the diode 111. The voltage held in the capacitor 112 is compared by the first differential amplifier 113 with a predetermined voltage corresponding to the maximum value of the dynamic range of A / D conversion given by the battery 114. The output of the first differential amplifier 113 is sent to the second differential amplifier 115. The output of the second differential amplifier 115 becomes a gain control signal.
[0008]
When the voltage held in the capacitor 112 is larger than a predetermined voltage corresponding to the maximum value of the dynamic range of A / D conversion, the gain control signal voltage is lowered, and the voltage held in the capacitor 112 is changed to A / D conversion. When the voltage is smaller than a predetermined voltage corresponding to the maximum value of the dynamic range, the gain control signal voltage is increased. The gain of the variable gain amplifier 101 is controlled to be proportional to the gain control signal voltage.
[0009]
Accordingly, a video signal having an amplitude corresponding to the dynamic range of the A / D converter 103 is supplied to the A / D converter 103.
[0010]
In the video signal processing circuit using the above-described technology, when the input video signal is a video signal of a moving image, when the largest amplitude portion of the signal changes, the other portions are also linked together. Changes, the brightness changes from time to time. For this reason, even if there is a portion in which the amplitude does not change in the input video signal, if the portion having the largest amplitude in the signal changes, the brightness on the display screen also changes in the portion that does not change in the input video signal. . As a result, there is a problem that the input video signal cannot be faithfully reproduced.
[0011]
[Problems to be solved by the invention]
An object of the present invention is to provide a video signal processing circuit capable of enlarging a minute change portion in a video signal and suppressing a large change portion in the video signal from being enlarged too much. .
[0012]
[Means for Solving the Problems]
According to the first aspect of the present invention, in the signal processing circuit including an A / D converter that converts the input video signal into digital data, the left and right average values that are average values of the pixel data of the left and right sides of the target pixel The first means for calculating the left average value that is the average value of the pixel data of the left portion of the target pixel and the right average value that is the average value of the pixel data of the right portion of the target pixel, the pixel data of the target pixel and the left and right sides A second means for calculating difference data with respect to the average value; a third means for reducing the difference data when the difference data between the pixel data of the target pixel and the left and right average values is equal to or greater than a first predetermined value; A fourth means for reducing the difference data obtained by the third means and a difference data obtained by the fourth means when the difference between the value and the right average value is equal to or greater than a second predetermined value; Characterized in that it comprises means for adding the pixel data of the pixel of interest.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment in which the present invention is provided to a video signal processing circuit of a liquid crystal display device will be described with reference to FIGS.
[0015]
FIG. 3 shows a configuration of a video signal processing circuit provided in the liquid crystal display device.
[0016]
The luminance signal Y is input to the amplifier 1. The output of the amplifier 1 is sent to the A / D converter 2 and converted into a digital signal. The digital signal output from the A / D converter 2 is sent to the dynamic range expansion circuit 3. The dynamic range expansion circuit 3 expands the visual dynamic range by enlarging minute changes in the video. The configuration and operation of the dynamic range expansion circuit 3 will be described later.
[0017]
The signal output from the dynamic range expansion circuit 3 is sent to a resolution conversion circuit (scaler) 4 for resolution conversion. A signal output from the resolution conversion circuit 4 is sent to the LCD panel 5.
[0018]
FIG. 4 shows the configuration of the dynamic range expansion circuit 3.
[0019]
The dynamic range expansion circuit 3 includes a shift register 10 composed of 17 1-byte registers, three averager circuits (averager circuits) 21, 22, 23, a distance circuit (distance circuit) 30, and a limiter table circuit (limiter table circuit) 40. , A step control table circuit (step control table circuit) 50 and an adder circuit (adder circuit) 60.
[0020]
The 8-bit digital data output from the A / D converter 2 is input to the dynamic range expansion circuit 4 as Yin (8). This digital data Yin (8) is input to the shift register 10. The shift register 10 holds digital data for 17 pixels. The data held in the central one-byte register of the shift register 10 is used as the data (reference value) Yref for the pixel of interest.
[0021]
Data held in each register other than the central register of the shift register 10 is sent to the first averager circuit 21. The first averager circuit 21 calculates an average value of data other than Yref held in the shift register 10, that is, an average value av16 on both left and right sides, which is an average value of pixel data on the left and right side portions of the target pixel.
[0022]
Each data held in the four rear registers in the shift register 10 is sent to the second averager circuit 22. The second averager circuit 22 is an average value of each data held in the four rear registers in the shift register 10, that is, a left average value av− that is an average value of pixel data of the left portion of the target pixel. Calculate back.
[0023]
Each data held in the front four registers in the shift register 10 is sent to the third averager circuit 23. The third averager circuit 23 is an average value of each data held in the front four registers in the shift register 10, that is, a right average value av-front that is an average value of pixel data of the right portion of the target pixel. Is calculated.
[0024]
The reference value Yref held in the center register of the shift register 10 and the average values av16, av-back and av-front calculated by the averager circuits 21, 22, and 23 are sent to the distance circuit 30.
[0025]
The distance circuit 30 includes a first subtractor 31 for calculating the difference between the average value av16 and the reference value Yref, and a second subtractor for calculating the difference between the average value av-back and the average value av-front. And a subtractor 32. The difference signal dis-av obtained by the first subtracter 31 is a change amount with respect to the left and right average value av16 of the target pixel data. The difference signal dis-f2b-abs obtained by the second subtracter 32 is an amount of change between the left average value av-back and the right average value av-front.
[0026]
The reference value Yref sent to the distance circuit 30 is sent to the limiter table circuit 40 as dis-Yref. The difference signals dis-av and dis-f2b-abs calculated by the distance circuit 30 are sent to the limiter table circuit 40.
[0027]
The limiter table circuit 40 limits the amplitude of the difference signal dis-av so that a large change in the video signal does not appear in the output (Lim-dis). FIG. 5 shows the input / output characteristics of the limiter table circuit 40. By this processing, only a fine change in the video signal can be extracted.
[0028]
The signal Lim-dis whose amplitude is limited with respect to the difference signal dis-av is sent to the step control table circuit 50. The reference value dis-Yref and the difference signal dis-f2b-abs sent to the limiter table circuit 40 are sent to the step control table circuit 50 as Lim-yref and Lim-f2b as they are.
[0029]
The step control table circuit 50 reduces the magnitude of Lim-dis based on the magnitude of the change amount Lim-f2b between the left average value and the right average value. When Lim-f2b is large, it is determined that there are step-shaped contours with large changes in the video signal before and after the target pixel (Yref). The purpose of the dynamic range expansion circuit 3 is to enlarge a minute change in the image, and therefore, Lim-dis needs to be reduced when the change in the image signal is large. Therefore, the step control table circuit 50 decreases Lim-dis when Lim-f2b increases by a predetermined value or more. The characteristics of the step control table circuit 50 are shown in FIG.
[0030]
The Lim-dis controlled by the step control table circuit 50 is sent to the adder circuit 60 as con-dis. The reference value Lim-yref sent to the step control table circuit 50 is sent to the adder circuit 60 as con-yref.
[0031]
The adder circuit 60 adds con-dis to con-yref. As a result, the amount of change in the video is added to the original video signal, and the amplitude of the minute change in the video signal is expanded. However, the amount of enlargement of the amplitude of a large change in the video signal is limited by the action of the limiter table circuit 40 and the step control table circuit 50. The addition result is sent to the resolution conversion circuit 4 as Yout.
[0032]
For example, when the continuous luminance change is small as shown in FIG. 7A, the amplitude of the video signal is expanded and the fine change of the video is expanded as shown in FIG. 7B. The
[0033]
With respect to the amplitude of a large change in the video signal, the fact that the enlargement amount is limited will be described with reference to FIGS.
[0034]
As shown by Yref in FIG. 8, it is assumed that there is a step-like change portion (a large change amplitude portion) in the video signal. The average value of the pixel data of the left and right side portions of the target pixel is as shown by av16 in FIG. 8, and the difference value dis-av between the data of the target pixel and the average value av16 is as shown by dis-av in FIG. Become. If the difference value dis-av is added as it is to the original video signal Yref, it is clear that large false contours are generated at both edge portions.
[0035]
Therefore, as shown in FIG. 8, when the result Lim-dis obtained by limiting the amplitude of the difference value dis-av by the limiter table circuit 40 is added to the original video signal Yref, as shown in add-en in FIG. In addition, the false contour becomes smaller. However, as shown by an arrow in the signal add-en in FIG.
[0036]
Therefore, as shown in FIG. 9, the step control table circuit 50 reduces the con-dis obtained by reducing the Lim-dis after the amplitude limit by the limiter table circuit 40 based on dis-f2b to the original video signal Yref. When added, unnatural borders are removed, as indicated by add-yen in FIG.
[0037]
【The invention's effect】
According to the present invention, it is possible to enlarge a minute change portion in the video signal, and to suppress an excessive enlargement of the large change portion in the video signal.
[Brief description of the drawings]
FIG. 1 shows the configuration of a conventional signal processing circuit using a technique for changing the amplitude of an output video signal by a variable gain amplifier when the input video signal level to an A / D converter is small relative to the dynamic range. It is a block diagram.
2 is an electric circuit diagram showing a configuration example of a maximum value detection circuit in FIG. 1; FIG.
FIG. 3 is a block diagram showing a configuration of a video signal processing circuit provided in the liquid crystal display device.
4 is a block diagram showing a configuration of a dynamic range expansion circuit 3. FIG.
FIG. 5 is a graph showing input / output characteristics of a limiter table circuit 40;
6 is a graph showing characteristics of a step control table circuit 50. FIG.
FIG. 7 is a schematic diagram showing that the amplitude of a video signal is enlarged when a continuous luminance change is minute.
FIG. 8 is a schematic diagram for explaining that an enlargement amount is limited for an amplitude of a large change in a video signal.
FIG. 9 is a schematic diagram for explaining that an enlargement amount is limited with respect to an amplitude of a large change in a video signal.
[Explanation of symbols]
1 amplifier 2 A / D converter 3 dynamic range expansion circuit 4 resolution conversion circuit 5 LCD panel 10 shift register 21, 22, 23 averager circuit 30 distance circuit 40 limiter table circuit 50 step control table circuit 60 adder circuit

Claims (1)

In a signal processing circuit including an A / D converter that converts an input video signal into digital data,
The average value of the left and right sides, which is the average value of the pixel data of the left and right sides of the target pixel, the left side average value of the pixel data of the left side of the target pixel, and the average value of the pixel data of the right side of the target pixel A first means for calculating respective right average values;
A second means for calculating difference data between the pixel data of the target pixel and the left and right average values;
A third means for reducing the difference data when the difference data between the pixel data of the target pixel and the left and right average values is equal to or greater than a first predetermined value;
A fourth means for reducing the difference data obtained by the third means when the difference between the left average value and the right average value is greater than or equal to a second predetermined value; and
Means for adding the difference data obtained by the fourth means to the pixel data of the target pixel;
A video signal processing circuit comprising:

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