JP4281230B2 - Image encoding apparatus and method, recording medium, and image processing system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image encoding apparatus and method, a recording medium, and an image processing system, and in particular, image encoding that encodes an image by, for example, thinning out so that a decoded image almost identical to an original image can be obtained. The present invention relates to an apparatus and method, a recording medium, and an image processing system.
[0002]
[Prior art]
The present applicant has proposed a technique for generating a high-resolution image using a low-resolution image as Japanese Patent Application No. 8-206552. According to this technology, it is possible to restore a high-resolution image that is substantially the same as the original image by using a low-resolution image obtained by reducing the high-resolution original image (for example, an image having one-tenth the number of pixels of the original image). it can.
[0003]
In this proposal, as shown in FIG. 1, a high resolution image (restored image) (hereinafter also referred to as a lower layer image) at a position corresponding to a target pixel I of a low resolution image (hereinafter also referred to as an upper layer image). A pixel value of 3 × 3 pixels a to i centered on the pixel i is set to a plurality of pixels (for example, 3 × 3 pixels A to I) of a low-resolution image located in the vicinity thereof and a predetermined prediction coefficient It is obtained by calculating a linear primary combination and the like.
[0004]
Further, in this proposal, an error between the pixel value of the restored image and the pixel value of the original image is calculated, and the process of updating the pixel value of the low resolution image or the prediction coefficient is repeated corresponding to the result.
[0005]
When the error of the decoded image becomes smaller than a predetermined threshold, the low resolution image is output as encoded data, for example.
[0006]
[Problems to be solved by the invention]
However, the method of repeatedly updating the pixel value of the low-resolution image or the prediction coefficient gradually reduces the error between the pixel value of the restored image and the pixel value of the original image, but the pixel value of the low-resolution image or Even if the number of times of updating the prediction coefficient is increased, there is a problem that an error of an image decoded from a low resolution image does not become smaller than a certain value.
[0007]
The present invention has been made in view of such a situation, and an object of the present invention is to make it possible to obtain encoded data that is a low-resolution image that can restore an image more quickly and with a smaller error.
[0008]
[Means for Solving the Problems]
The image encoding apparatus according to claim 1 generates a correction data by correcting a compression unit that compresses an original image by reducing an amount of information and compression data obtained by compressing the original image. Correction means for changing the compressed data by calculating with a predetermined numerical value, changing means for generating the changed data, selection means for selecting correction or change of the compressed data, and correction data or based on the changed data A prediction unit that predicts an original image and generates a prediction value thereof; a calculation unit that calculates a prediction error of a prediction value for the original image; and the suitability of correction data or change data is determined based on the prediction error Corresponding to the determination result of the determination means, an output means for outputting the correction data or the change data as the encoding result of the original image, and the compressed data is corrected by the correction means. And a measuring means for measuring a number of times as the number of corrections, on the basis of the number of corrections, characterized in that a change in changing process in the changing means.
[0009]
The changing means can change the compressed data by adding a numerical value that is a random number corresponding to a pixel of the compressed data.
[0010]
The changing unit can add a numerical value that is one constant to the compressed data to change the compressed data.
[0011]
The image encoding method according to claim 4, wherein the original image is compressed by reducing the amount of information, and the compressed data obtained by compressing the original image is corrected to generate corrected data. A correction step for changing the compressed data by calculating with a predetermined numerical value, a change step for generating the changed data, a selection step for selecting correction or change of the compressed data, and the correction data or the changed data A prediction step for predicting the original image and generating a prediction value thereof; a calculation step for calculating a prediction error of the prediction value for the original image; and determining the appropriateness of the correction data or the change data based on the prediction error The correction data or the change data is output as the encoding result of the original image corresponding to the determination step by the determination step and the determination result by the determination step process. Includes a step, the step of measuring the number of corrections the number of times the compressed data is corrected in the process of correction step, based on the number of corrections, characterized in that a change in changing process in the changing step.
[0012]
The recording medium program according to claim 5 generates a correction data by correcting a compression step of compressing an original image by reducing an amount of information and compressing data obtained by compressing the original image. A correction step for changing the compressed data by calculating with a predetermined numerical value, a change step for generating the changed data, a selection step for selecting correction or change of the compressed data, and the correction data or the changed data A prediction step for predicting the original image and generating a prediction value thereof; a calculation step for calculating a prediction error of the prediction value for the original image; and determining the appropriateness of the correction data or the change data based on the prediction error The correction data or the change data is output as the encoding result of the original image corresponding to the determination step by the determination step and the determination result by the determination step An output step that, the number of compressed data is corrected in the process of correction step includes a step of measuring as a number of corrections, on the basis of the number of corrections, characterized in that a change in changing process in the changing step.
[0013]
The image processing system according to claim 6, wherein the image encoding apparatus corrects the compression data obtained by compressing the original image by compressing means for compressing the original image by reducing the amount of information. A correction means for generating correction data, a change means for changing the compressed data by calculating a predetermined numerical value, generating change data, a selection means for selecting correction or change of the compressed data, and correction data or A first prediction unit that predicts an original image based on the change data and generates a prediction value thereof, a calculation unit that calculates a prediction error of the prediction value for the original image, and correction data based on the prediction error Alternatively, a determination unit that determines the appropriateness of the change data, an output unit that outputs the correction data or the change data as an encoding result of the original image corresponding to the determination result by the determination unit, Measuring means for measuring the number of times the compressed data has been corrected by the means as a correction count, and the changing process in the changing means changes based on the correction count, and the image decoding apparatus is the result of encoding the original image. And second prediction means for predicting the original image based on the correction data or the change data and outputting the predicted value.
[0014]
In the image encoding device according to claim 1, the image encoding method according to claim 4, and the recording medium according to claim 5, the original image is compressed by reducing the amount of information, and the original image is compressed. The compressed data obtained by compressing the image is corrected to generate corrected data, and the compressed data is changed by calculating with a predetermined numerical value, the changed data is generated, and the compressed data is corrected or changed. Based on the selected correction data or change data, the original image is predicted, its prediction value is generated, the prediction error of the prediction value for the original image is calculated, and the correction data or change data is calculated based on the prediction error. In accordance with the determination result, correction data or change data is output as the encoding result of the original image, and the number of times the compressed data is corrected is the number of corrections. Is measured, based on the number of corrections, changes the processing is changed.
[0015]
In the image processing system according to claim 6, the original image is compressed by reducing the amount of information, the compressed data obtained by compressing the original image is corrected, correction data is generated, and predetermined data is generated. Compressed data is changed by calculating with the numerical value of, the changed data is generated, correction of the compressed data, or change is selected, the original image is predicted based on the corrected data or changed data, and the predicted value Is generated, the prediction error of the predicted value for the original image is calculated, the suitability of the correction data or the change data is determined based on the prediction error, and the correction data or the change data is converted into the original data corresponding to the determination result. The number of times the compressed data is corrected is output as the image encoding result, and the number of corrections is measured as the number of corrections. The change process changes based on the number of corrections. Result is a correction data or based on the changed data, the original image is predicted, the predicted value is outputted.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 2 shows a configuration of an embodiment of an image processing apparatus to which the present invention is applied.
[0017]
The transmission apparatus 1 is supplied with digitized image data. The transmission device 1 compresses and encodes input image data (decreasing the number of pixels) and encodes the resulting encoded data, for example, an optical disc, a magneto-optical disc, a magnetic tape, a phase The information is recorded on the information recording medium 2 such as a change disk or transmitted via a terrestrial wave, a satellite line, a telephone line, a CATV network, the Internet, or another transmission line 3.
[0018]
The receiving device 4 reproduces the encoded data recorded on the information recording medium 2 or receives the encoded data transmitted via the transmission path 3, and decompresses and decodes the encoded data. . The decoded image obtained as a result is supplied to a display (not shown) and displayed.
[0019]
The image processing apparatus as described above is, for example, an optical disk apparatus, a magneto-optical disk apparatus, a magnetic tape apparatus, or other apparatus for recording / reproducing an image, or, for example, a videophone apparatus or a television set. The present invention is applied to a broadcasting system, a CATV system, and other devices that transmit images. In addition, since the amount of encoded data output from the transmission apparatus 1 is small, the image processing apparatus in FIG. 2 can be applied to a mobile terminal having a low transmission rate, such as a mobile phone or the like that is convenient for movement. is there.
[0020]
FIG. 3 shows a configuration example of the transmission apparatus 1 of FIG.
[0021]
An I / F (InterFace) 11 performs reception processing of image data supplied from the outside and transmission processing of encoded data to the transmitter / recording device 16. A ROM (Read Only Memory) 12 stores a program for IPL (Initial Program Loading) and others. A RAM (Random Access Memory) 13 stores system programs (OS (Operating System)) and application programs recorded in the external storage device 15, and data necessary for the operation of a CPU (Central Processing Unit) 14. Remember. In accordance with the IPL program stored in the ROM 12, the CPU 14 expands the system program and the application program from the external storage device 15 to the RAM 13, and executes the application program under the control of the system program. The image data supplied from the image data is encoded as described later.
[0022]
The external storage device 15 is, for example, a hard disk device or the like, and stores system programs and application programs executed by the CPU 14 as well as data necessary for the operation of the CPU 14 as described above. Further, the external storage device 15 reads a system program and application program executed by the CPU 14 from the mounted magnetic disk 17, optical disk 18, magneto-optical disk 19, or semiconductor memory 20 under the control of the CPU 14. The transmitter / recording device 16 records the encoded data supplied from the I / F 11 on the information recording medium 2 or transmits it via the transmission path 3.
[0023]
The I / F 11, the ROM 12, the RAM 13, the CPU 14, and the external storage device 15 are connected to each other via a bus.
[0024]
In the transmission apparatus 1 configured as described above, when image data is supplied to the I / F 11, the image data is supplied to the CPU 14. The CPU 14 encodes the image data and supplies the encoded data obtained as a result to the I / F 11. When the encoded data is received, the I / F 11 supplies the encoded data to the transmitter / recording device 16. In the transmitter / recording device 16, the encoded data from the I / F 11 is recorded on the information recording medium 2 or transmitted via the transmission path 3.
[0025]
FIG. 4 shows a functional configuration example of a portion of the transmission device 1 of FIG. 3 excluding the transmitter / recording device 16.
[0026]
The image data to be encoded is supplied to the preprocessing circuit 51, the delay circuit 55, the upper layer image update circuit 58, and the prediction coefficient update circuit 60. The preprocessing circuit 51 generates an initial upper layer image and an initial prediction coefficient based on the input image data, and converts the initial upper layer image into the mapping circuit 54 and the switch 53 and the upper layer image change circuit 59. This is supplied to the upper layer image update circuit 58 and the initial prediction coefficient is supplied to the mapping circuit 54 and the upper layer image update circuit 58 via the switch 52.
[0027]
For example, the preprocessing circuit 51 divides the supplied image data (original image (high resolution image)) into a plurality of blocks each composed of 3 pixels × 3 pixels, and an average value of pixel values of 9 pixels in each block Is generated as the pixel value of the pixel of the upper layer image (low resolution image) located at the center of the block. In this case, the upper layer image is obtained by reducing the number of vertical and horizontal pixels of the original image to 1/3.
[0028]
The switch 52 is switched by the control signal supplied from the update number counter 57, and is either one of the initial prediction coefficient supplied from the preprocessing circuit 51 or the updated prediction coefficient supplied from the prediction coefficient update circuit 60. Are output to the mapping circuit 54.
[0029]
The switch 53 is switched by the control signal supplied from the update number counter 57, and the initial upper layer image supplied from the preprocessing circuit 51 or the updated upper layer image supplied from the upper layer image update circuit 58 is switched. Any one of them is output to the upper layer image change circuit 59.
[0030]
The update counter 57 includes a counter that is incremented or reset based on a signal supplied from the convergence determination circuit 56, and controls the switch 52 and the switch 53 based on the counter value of the counter.
[0031]
That is, the update counter 57 controls the switch 52 so that the initial prediction coefficient is supplied to the mapping circuit 54 when the initial upper hierarchy image and the initial prediction coefficient are supplied from the preprocessing circuit 51, and the initial upper hierarchy image. Is controlled to be supplied to the upper layer image changing circuit 59. The update counter 57 supplies the updated prediction coefficient to the mapping circuit 54 when the updated upper layer image is supplied from the upper layer image update circuit 58 and the updated prediction coefficient is supplied from the prediction coefficient update circuit 60. In addition to controlling the switch 52, the switch 53 is controlled so that the updated upper layer image is supplied to the upper layer image changing circuit 59.
[0032]
Further, the update counter 57 controls whether or not the upper layer image change circuit 59 changes the upper layer image based on the counter value of the counter.
[0033]
The delay circuit 55 delays the input image data for a time during which the mapping circuit 54 generates a lower layer image, and outputs the delayed image data to the convergence determination circuit 56.
[0034]
When the initial upper layer image and the initial prediction coefficient are supplied, the mapping circuit 54 generates a lower layer image based on the initial upper layer image and the initial prediction coefficient, and supplies the lower layer image to the convergence determination circuit 56. When the mapping circuit 54 is supplied with the upper layer image whose pixel value is updated or changed, and the updated prediction coefficient, the mapping circuit 54 displays the upper layer image whose pixel value is updated or changed, and the updated prediction coefficient. Based on this, a lower layer image is generated and supplied to the convergence determination circuit 56.
[0035]
FIG. 5 is a diagram illustrating the configuration of the mapping circuit 54. The class classification circuit 81 applies a 1-bit ADRC (Adaptive Dynamic Range Coding) process, for example, to the upper layer image supplied to the mapping circuit 54, and shows a result of class classification based on the features of the upper layer image. The class is calculated, and the calculated class is supplied to the decoding circuit 83. The prediction tap extraction circuit 82 extracts a prediction tap from the upper layer image supplied to the mapping circuit 54 and supplies the extracted prediction tap to the decoding circuit 83.
[0036]
The decoding circuit 83 selects the prediction coefficient corresponding to the class from the prediction coefficients (consisting of the prediction coefficient corresponding to each class) supplied to the mapping circuit 54, and based on the selected prediction coefficient and the prediction tap, The operation is executed to generate a restored image that is a lower layer image, and the generated lower layer image is output to the lower layer image memory 84.
[0037]
For example, as shown in Expression (1), the decoding circuit 83 3 is centered on the pixel (pixel i) of the lower layer image at the position corresponding to the center pixel (for example, pixel I in FIG. 1) of the upper layer image. As pixel values Yn (n = 0, 1, 2,..., 8) of pixels × 3 pixels (pixels a to i), pixel values Xj (j = 0, 1, 2,. .., 8) and a linear primary combination of the prediction coefficient k (n, j) are performed, and the calculation result is output to the lower layer image memory 84.
[0038]
Yn = Σk (n, j) Xj (1)
[0039]
The lower layer image memory 84 sequentially stores restored images that are lower layer images supplied from the decoding circuit 83, and when the processing of the mapping circuit 54 is completed for the entire image, the restored images that are stored lower layer images. Will be output in its entirety.
[0040]
The convergence determination circuit 56 uses the image data (original image) supplied from the delay circuit 55 and the lower layer image (restored image) supplied from the mapping circuit 54 to lower layer images (from the mapping circuit 54). It is determined whether or not an error between the restored image) and the image data (the sum of the differences for each pixel in the entire screen) is smaller than a threshold value stored in advance, and the lower layer image (restored image) supplied from the mapping circuit 54 When it is determined that the error between the image and the image data is smaller than the threshold value stored in advance, the upper layer image is output as the optimum upper layer image data and the prediction coefficient is output as the optimum prediction coefficient.
[0041]
The convergence determination circuit 56 outputs the upper layer image as the optimum upper layer image data and optimizes the prediction coefficient when the upper layer image update process and the upper layer image change process are executed a predetermined number of times. You may make it output as a prediction coefficient.
[0042]
Further, the convergence determination circuit 56 is based on the amount of error change (difference between the error in the previous process and the error in the current process), the magnitude of the error, the number of update processes, the number of change processes, and the like. A predetermined determination process may be executed to output the upper layer image as the optimal upper layer image data and output the prediction coefficient as the optimum prediction coefficient in accordance with the determination result.
[0043]
When it is determined that the error between the lower layer image (restored image) supplied from the mapping circuit 54 and the image data is greater than or equal to a threshold value stored in advance, the convergence determination circuit 56 sends a control signal to the update number counter 57. Then, the update value counter 57 increments the counter value.
[0044]
Based on the image data (original image), the supplied prediction coefficient, and the upper layer image, the upper layer image update circuit 58 is arranged to reduce the error between the pixel value of the restored image and the pixel value of the image data. The pixel value of the hierarchical image is updated, and the upper hierarchical image with the updated pixel value is output to the switch 53, the mapping circuit 54, and the prediction coefficient updating circuit 60.
[0045]
FIG. 6 is a diagram for explaining the configuration of the upper layer image update circuit 58. The upper layer image data memory 101 stores the upper layer image supplied to the upper layer image update circuit 58 and supplies the stored upper layer image to the optimum pixel value determination circuit 102 and the switch 103.
[0046]
The optimum pixel value determination circuit 102 is based on the upper layer image supplied from the upper layer image data memory 101 and the prediction coefficient and image data (original image) supplied to the upper layer image update circuit 58. An optimal pixel value of a pixel (hereinafter referred to as a target pixel) corresponding to the pixel value position signal supplied from 104 is calculated, and the upper layer image data memory 101 replaces the pixel value of the target pixel with the optimal pixel value. .
[0047]
7 to 9 are diagrams for explaining the calculation of the optimum pixel value of the target pixel by the optimum pixel value determination circuit 102. FIG. For example, as shown in FIG. 7, the prediction tap (the pixel having a predetermined relationship with the target pixel constituting the upper layer image used for the calculation of Expression (1)) is five pixels centered on the target pixel. In the case of × 5 pixels, the pixel value y ′ of the target pixel shown in FIG. 8 is calculated by Expression (2).
y '= w ₁ ・ X ₁ + w ₂ ・ X ₂ + ... + w _k ・ X _k + ... + w _{twenty five} ・ X _{twenty five} (2)
w ₁ Thru w _{twenty five} Is a prediction coefficient corresponding to the class of the target pixel. x ₁ Thru x _{twenty five} Is the pixel value of the prediction tap. 1 to 25 indicate the numbers of the taps when the prediction tap is 5 pixels × 5 pixels. w _k Is a prediction coefficient corresponding to the target pixel. x _k Is the pixel value of the pixel of interest.
[0048]
The influence of the change in the pixel value of the target pixel is 5 pixels × 5 pixels centering on the target pixel, which is the range of the prediction tap, in the upper layer image. Further, when the relationship between the upper layer image and the lower layer image has the relationship shown in FIG. 1, the influence of the change in the pixel value of the target pixel is 15 pixels × 15 pixels in the lower layer image as shown in FIG. 9. It extends to.
[0049]
When the class classification is nonlinear processing, in order to optimize the result of mapping in a range in which the pixel value of the target pixel is affected, the optimal pixel value determination circuit 102 fixes the pixel values of pixels other than the target pixel, The pixel value of the target pixel is changed to calculate an error between the mapping result of the upper layer image with the changed pixel value and the original image, and the pixel value with the smallest error is set as the pixel value of the target pixel.
[0050]
For example, the optimum pixel value determination circuit 102 varies the pixel value of the target pixel in the range of 0 to 255, evaluates the mapping result of 15 pixels × 15 pixels in the corresponding lower layer image, and has the smallest error. Let the pixel value be the pixel value of the pixel of interest.
[0051]
FIG. 10 is a diagram illustrating a configuration of the optimum pixel value determination circuit 102. The upper layer image supplied from the upper layer image memory 101 is supplied to the target pixel determination circuit 121. In the initial process of determining the optimal pixel value, the target pixel value counter 130 is set, for example, to 0 as the counter value, and the predicted tap extraction circuit 122 and the class classification are set with the counter value set as the pixel value of the target pixel. This is supplied to the circuit 123.
[0052]
The target pixel determination circuit 121 determines a target pixel from the upper layer image supplied from the upper layer image memory 101, and supplies data specifying the target pixel to the prediction tap extraction circuit 122 and the class classification circuit 123.
[0053]
The prediction tap extraction circuit 122 extracts a prediction tap corresponding to the target pixel (the prediction tap corresponding to the target pixel has a value set by the target pixel value counter 130) from the upper layer image, and sends it to the decoding circuit 124. Supply.
[0054]
The class classification circuit 123 executes class classification processing based on the lower layer image (the pixel value corresponding to the target pixel has a value set by the target pixel value counter 130) corresponding to the target pixel. Data indicating the class is supplied to the decoding circuit 124.
[0055]
Based on the prediction coefficient and the prediction tap corresponding to the class, the decoding circuit 124 calculates, for example, a lower layer image by an operation shown in Expression (1), and sequentially calculates the calculated lower layer image. To supply.
[0056]
The lower layer image memory 125 stores the lower layer image supplied from the decoding circuit 124 and stores all of the pixel values of the lower layer image that are affected by changing the pixel value of the pixel of interest. The lower layer image is output to the error calculation circuit 126.
[0057]
The error calculation circuit 126 calculates an error between the image data (original image) and the lower layer image supplied from the lower layer image memory 125, and outputs the calculated error to the switch 128 and the comparator 127.
[0058]
The comparator 127 compares the minimum error supplied from the minimum error storage register 129 (indicating the minimum error up to the present) with the error supplied from the error calculation circuit 126. When it is determined that the error supplied from the error calculation circuit 126 is smaller than the minimum error supplied from the minimum error storage register 129, the comparator 127 outputs a control signal to close the switch 128 and store the minimum error. The error supplied from the difference calculating circuit 126 is stored in the register 129 and the switch 131 is closed, and the counter value of the target pixel value counter 130 is stored in the optimum pixel value storage register 132.
[0059]
The comparator 127 supplies a counter increment signal to the target pixel value counter 130 and causes the target pixel value counter 130 to increment the counter value.
[0060]
When the counter value is incremented, the target pixel value counter 130 supplies the counter value as the pixel value of the target pixel to the prediction tap extraction circuit 122 and the class classification circuit 123.
[0061]
In this way, the optimum pixel value determination circuit 102, for example, until the target pixel value counter 130 is incremented from 0 to 255, the lower layer image based on the upper layer image with each counter value as the pixel value of the target pixel. (Restored image) is generated, a counter value that minimizes the error between the image data and the restored image is obtained, and the counter value that minimizes the error is stored in the optimum pixel value storage register 132.
[0062]
Since the target pixel value counter 130 supplies the control signal to the switch 133 and closes the switch 133 when the count value of the target pixel value counter 130 reaches 255, it is stored in the optimum pixel value storage register 132. The counter value that minimizes the error between the image data and the restored image is output as the optimum pixel value.
[0063]
As described above, the optimum pixel value determination circuit 102 calculates and outputs the pixel value of the target pixel that minimizes the error between the restored image and the original image.
[0064]
The pixel-of-interest determination circuit 104 supplies a pixel position signal for designating a pixel as a pixel of interest to the optimal pixel value determination circuit 102. Based on the pixel position signal, the pixels of the upper layer image are sequentially set as the target pixel. All the pixels of the upper layer image are set as the target pixels, the optimum pixel values of all the pixels of the upper layer image are calculated, and the optimum pixel values of all the pixels of the upper layer image are stored in the upper layer image data memory 101. In this case, the pixel-of-interest determination circuit 104 supplies a control signal to the switch 103 and causes the upper layer image stored in the upper layer image data memory 101 to be output as an updated upper layer image.
[0065]
As described above, the upper layer image update circuit 58 updates the upper layer image and outputs the updated upper layer image so as to reduce the error from the image data that is the original image.
[0066]
Referring back to FIG. 4, the upper layer image change circuit 59 uses the upper layer image supplied via the switch 53 as it is under the control of the update number counter 57 as it is, the upper layer image update circuit 58, the mapping circuit 54, and the prediction coefficient. For example, when the update process of the upper layer image is performed a predetermined number of times, the pixel value of the upper layer image is changed, and the upper layer image whose pixel value is changed is changed to the upper layer image. The data is output to the update circuit 58, the mapping circuit 54, and the prediction coefficient update circuit 60.
[0067]
FIG. 11 is a diagram for explaining the configuration of the upper layer image change circuit 59. The upper layer image data memory 151 stores the upper layer image supplied to the upper layer image change circuit 59 and supplies the stored upper layer image to the pixel value change circuit 152 and the switch 155.
[0068]
The pixel value changing circuit 152 selects the pixel value of the upper layer image supplied from the upper layer image data memory 151 based on the pixel position signal supplied from the target pixel determining circuit 154.
[0069]
The change amount determination circuit 153 inputs the counter value supplied from the update number counter 57 as an upper layer image change parameter, determines the pixel value change amount, and supplies the pixel value change circuit 152 to the pixel value change circuit 152. The pixel value change circuit 152 changes the pixel value of the selected upper layer image based on the pixel value change amount supplied from the change amount determination circuit 153 and stores the changed pixel value in the upper layer image data memory 151. Remember.
[0070]
FIG. 12 is a diagram for explaining an example of pixel value change by the pixel value change circuit 152 and the change amount determination circuit 153. The change amount determination circuit 153 generates, for example, a random number with a Gaussian distribution for each pixel of the upper layer image, and supplies the generated random number to the pixel value change circuit 152. The pixel value changing circuit 152 adds the received random number to the pixel value of the selected upper layer image, and causes the upper layer image data memory 151 to store the pixel value to which the random number has been added.
[0071]
In the example illustrated in FIG. 12, the pixel value changing circuit 152 adds a random number that is 3 received from the change amount determining circuit 153 to the pixel value that is 18 of the selected pixel. The pixel value changing circuit 152 sets a pixel value that is 21 obtained by adding a random number to the selected pixel, and stores it in the upper layer image data memory 151.
[0072]
The pixel value changing circuit 152 adds a random number that is −5 received from the variation determining circuit 153 to the pixel value that is 26 of the other selected pixels. The pixel value changing circuit 152 sets a pixel value that is 21 obtained by adding a random number to the other selected pixels and stores the set pixel value in the upper layer image data memory 151.
[0073]
The pixel value changing circuit 152 adds the random number that is 2 received from the change amount determining circuit 153 to the pixel value that is 85 of the selected pixel. The pixel value changing circuit 152 sets a pixel value of 87 obtained by adding a random number to the selected pixel and stores it in the upper layer image data memory 151.
[0074]
The pixel value change circuit 152 and the change amount determination circuit 153 repeat the same processing, add random numbers having different values to the pixels of the upper layer image, and change all the pixels of the upper layer image.
[0075]
Note that the pixel value change circuit 152 may change the pixels of the upper layer image by processing other than addition.
[0076]
FIG. 13 is a diagram for explaining another example of changing the pixel value by the pixel value changing circuit 152 and the change amount determining circuit 153. The change amount determination circuit 153 generates one offset (for example, an offset having a value of 5) for one upper layer image, and supplies the generated offset to the pixel value change circuit 152. The pixel value changing circuit 152 adds the received offset to each of the pixel values of the upper layer image, and causes the upper layer image data memory 151 to store the pixel value to which the offset has been added.
[0077]
In the example illustrated in FIG. 13, the pixel value changing circuit 152 adds the offset that is 5 received from the variation determining circuit 153 to the pixel value that is 18 of the selected pixel. The pixel value changing circuit 152 sets a pixel value which is 23 obtained by adding the offset to the selected pixel, and stores it in the upper layer image data memory 151.
[0078]
The pixel value changing circuit 152 adds the offset of 5 received from the change amount determining circuit 153 to the pixel value of 26 of the selected pixel. The pixel value changing circuit 152 sets a pixel value of 31 obtained by adding the offset to the selected pixel and stores it in the upper layer image data memory 151.
[0079]
The pixel value changing circuit 152 adds the offset that is 5 received from the change amount determining circuit 153 to the pixel value that is 85 of the selected pixel. The pixel value changing circuit 152 sets a pixel value of 90 obtained by adding the offset to the selected pixel and stores it in the upper layer image data memory 151.
[0080]
The pixel value change circuit 152 and the change amount determination circuit 153 repeat the same processing, add one offset to each of the pixels of the upper layer image, and change all of the pixels of the upper layer image.
[0081]
The pixel-of-interest determination circuit 154 supplies the pixel value change circuit 152 with a pixel position signal that designates a pixel to be the pixel of interest. Based on the pixel position signal, the pixels of the upper layer image are sequentially set as the target pixel. All the pixels of the upper layer image are set as the target pixels, the pixel values of all the pixels of the upper layer image are changed, and the changed pixel values of all the pixels of the upper layer image are stored in the upper layer image data memory 151. When stored, the pixel-of-interest determination circuit 154 supplies a control signal to the switch 155 to output the upper layer image stored in the upper layer image data memory 151 as a changed upper layer image.
[0082]
As described above, the upper layer image changing circuit 59 changes the pixel value of the upper layer image and outputs the upper layer image with the changed pixel value.
[0083]
The prediction coefficient update circuit 60 updates the prediction coefficient based on the image data (original image) and the upper layer image in which the pixel value is updated or the pixel value is changed, and the updated prediction coefficient is updated. The prediction coefficient is output to the mapping circuit 54 via the switch 52.
[0084]
FIG. 14 is a diagram illustrating a configuration of the prediction coefficient update circuit 60. The class classification circuit 171 calculates, for example, a class indicating the result of classifying the upper layer image supplied to the prediction coefficient update circuit 60 based on the characteristics of the upper layer image by applying, for example, 1-bit ADRC processing. Then, the calculated class is supplied to the prediction coefficient calculation circuit 174.
[0085]
The prediction tap extraction circuit 172 extracts a prediction tap from the upper layer image supplied to the prediction coefficient update circuit 60 and supplies the extracted prediction tap to the prediction coefficient calculation circuit 174.
[0086]
The teacher data extraction circuit 173 extracts teacher data (corresponding to the upper layer image) from the image data (original image), and supplies the extracted teacher data to the prediction coefficient calculation circuit 174.
[0087]
The prediction coefficient calculation circuit 174 calculates a prediction coefficient corresponding to the class based on the teacher data supplied to the teacher data extraction circuit 173 and the prediction tap supplied from the prediction tap extraction circuit 172, and calculates the calculated prediction coefficient. Is output.
[0088]
As described above, the prediction coefficient update circuit 60 updates the prediction coefficient corresponding to the updated or changed upper layer image, and outputs the updated prediction coefficient to the mapping circuit 54 via the switch 52.
[0089]
As described above, the transmission device 1 generates an upper layer image with less error when it is quickly restored by updating or changing the upper layer image, and the generated upper layer image is encoded data. Can be output as
[0090]
FIG. 15 shows the correspondence between the number of times of updating or changing the upper layer image calculated by simulation and the S / N (corresponding to the reciprocal of the error) of the image restored from the upper layer image. FIG.
[0091]
The dotted line in FIG. 15 indicates the S / N of the image restored from the upper layer image when the update is repeated (corresponding to the conventional technique) without performing the process of changing the upper layer image. The S / N of an image restored from an upper layer image that has only been updated is a relatively low value and substantially constant even when the number of update processes is increased.
[0092]
The one-dot chain line in FIG. 15 indicates the S / N of the image restored from the upper layer image when the process of changing the upper layer image is executed when the S / N of the restored image becomes substantially constant. When the S / N of the restored image becomes almost constant, the S / N of the image restored from the upper layer image that has been subjected to the process of changing the upper layer image is higher than that when only the update is repeated Value.
[0093]
The solid line in FIG. 15 indicates the S / N of the image restored from the upper layer image when the number of update processes and the number of change processes are executed at a predetermined ratio. The S / N of an image restored from an upper layer image that has been executed at a predetermined ratio between the number of update processes and the number of change processes is almost constant when the update is repeated and when the restored image is repeated. When the upper layer image change process is executed, a higher value is obtained when the number of update processes or the number of change processes is smaller.
[0094]
Next, the encoding process of the transmission apparatus 1 will be described with reference to the flowchart of FIG. In step S11, the preprocessing circuit 51 performs preprocessing for generating an initial upper layer image and an initial prediction coefficient from the input image data, and the initial upper layer image via the switch 53 and the upper layer image change circuit 59. The hierarchical image is supplied to the mapping circuit 54 and the initial prediction coefficient is supplied to the mapping circuit 54 via the switch 54. Details of the pre-processing will be described later with reference to the flowchart of FIG.
[0095]
In step S <b> 12, the mapping circuit 54 executes mapping processing and outputs the generated lower layer image to the convergence determination circuit 56. Details of the mapping process will be described later with reference to the flowchart of FIG.
[0096]
In step S13, the convergence determination circuit 56 calculates an error between the image data (original image) supplied from the delay circuit 55 and the lower layer image supplied from the mapping circuit 54, and based on the calculated error. , It is determined whether the error has converged (the error between the restored lower-layer image and the original image is less than a desired value), and if it is determined that the error has not converged, the process proceeds to step S14. Whether or not to update the upper layer image is determined based on the number of times the layer image is updated or the difference from the error calculated in the previous process.
[0097]
If it is determined in step S14 that the upper layer image is to be updated, the process proceeds to step S15, and the upper layer image update circuit 58 causes the upper layer image to be reduced so that the error between the restored lower layer image and the original image is reduced. The process of updating the pixel value is executed, and the procedure proceeds to step S17. Details of the process of updating the pixel value of the upper layer image will be described later with reference to the flowchart of FIG.
[0098]
If it is determined in step S14 that the upper layer image is not updated, that is, it is determined that the upper layer image is to be changed, the process proceeds to step S16, where the upper layer image change circuit 59 changes the pixel value of the upper layer image. Proceed to step S17. Details of the process of changing the pixel value of the upper layer image will be described later with reference to the flowcharts of FIGS.
[0099]
In step S17, the prediction coefficient update circuit 60 updates the prediction coefficient, and the procedure returns to step S12 and repeats the process of updating the upper layer image or the process of changing the upper layer image. Details of the process of updating the prediction coefficient will be described later with reference to the flowchart of FIG.
[0100]
If it is determined in step S13 that the error has converged, the convergence determination circuit 56 outputs the upper layer image and the prediction coefficient as the optimum upper layer image and the optimal prediction coefficient, respectively, and the process ends.
[0101]
As described above, the transmission apparatus 1 can calculate and output an upper layer image and a prediction coefficient in which the error between the lower layer image and the original image when restored is smaller than a desired value.
[0102]
Next, details of the pre-processing in step S11 in FIG. 16 will be described with reference to the flowchart in FIG. In step S31, the pre-processing circuit 51 generates an initial upper layer image based on the input image data, and the generated initial upper layer image is mapped to the mapping circuit 54 via the switch 53 and the upper layer image change circuit 59. To supply. Details of the process of generating the initial upper layer image will be described later with reference to the flowchart of FIG.
[0103]
In step S32, the preprocessing circuit 51 generates an initial coefficient based on the input image data, supplies the generated initial prediction coefficient to the mapping circuit 54 via the switch 52, and the process ends. Details of the process of generating the initial prediction coefficient will be described later with reference to the flowchart of FIG.
[0104]
In addition, when the initial upper image is not required for the process of generating the initial prediction coefficient, the pre-processing process may generate the initial upper image after generating the initial prediction coefficient.
[0105]
Next, details of the process of generating the initial upper layer image in step S31 of FIG. 17 will be described with reference to the flowchart of FIG. In step S51, the preprocessing circuit 51 determines a target pixel corresponding to the upper layer image. In step S52, the preprocessing circuit 51 determines a corresponding block (for example, a block composed of 3 pixels × 3 pixels) of the lower layer image corresponding to the target pixel determined in the process of step S51.
[0106]
In step S53, the preprocessing circuit 51 acquires the average value of the pixel values of all the pixels in the corresponding block determined in the process of step S52. In step S54, the preprocessing circuit 51 determines the average value acquired in the process of step S53 as the pixel value of the target pixel determined in the process of step S51.
[0107]
In step S55, the preprocessing circuit 51 determines whether or not all the pixels of the upper layer image have been processed as the target pixel, and when it is determined that all the pixels of the upper layer image have not been processed as the target pixel. Returning to step S51, the process is repeated with another pixel as the target pixel.
[0108]
If it is determined in step S55 that all the pixels of the upper layer image have been processed as the target pixel, since the pixel values of all the pixels of the upper layer image have been determined, the process ends.
[0109]
As described above, the preprocessing circuit 51 can generate the initial upper layer image.
[0110]
Note that the preprocessing circuit 51 may generate an initial upper layer image by simple thinning or a Gaussian filter.
[0111]
Next, details of the process of generating the initial prediction coefficient corresponding to step S32 of FIG. 17 will be described with reference to the flowchart of FIG. In step S71, the preprocessing circuit 51 determines a target pixel. In step S72, the preprocessing circuit 51 acquires a class tap corresponding to the target pixel.
[0112]
In step S <b> 73, the preprocessing circuit 51 performs class classification by applying the 1-bit ADRC process to the acquired class tap.
[0113]
In step S74, the preprocessing circuit 51 acquires a prediction tap corresponding to the target pixel. In step S75, the preprocessing circuit 51 acquires teacher data from the image data (original image).
[0114]
In step S76, the preprocessing circuit 51 generates a normal equation based on the teacher data and the prediction tap.
[0115]
In step S77, the preprocessing circuit 51 determines whether or not all the pixels in the upper layer image are the target pixels. If it is determined that all the pixels in the upper layer image are not the target pixels, the process proceeds to step S71. Returning, the process of generating a normal equation is repeated with another pixel as the target pixel.
[0116]
If it is determined in step S77 that all the pixels of the upper layer image are the target pixel, the process proceeds to step S78, and the preprocessing circuit 51 solves the normal equation generated by the least square method or the like to obtain the prediction coefficient. Then, the process ends.
[0117]
As described above, the preprocessing circuit 51 generates an initial prediction coefficient.
[0118]
Next, details of the mapping process corresponding to step S12 in FIG. 16 will be described with reference to the flowchart in FIG. In step S91, the mapping circuit 54 determines a target pixel. In step S <b> 92, the prediction tap extraction circuit 82 acquires a prediction tap corresponding to the target pixel from the pixels of the upper layer image, and supplies the acquired prediction tap to the decoding circuit 83.
[0119]
In step S <b> 93, the class classification circuit 81 executes class classification processing corresponding to the pixel of interest, and supplies the class to the decoding circuit 83.
[0120]
In step S94, the decoding circuit 83 selects a prediction coefficient corresponding to the class from the supplied prediction coefficients, and based on the selected prediction coefficient and the prediction tap supplied from the prediction tap extraction circuit 82, the lower layer image The mapping processing for generating is performed, and the generated lower layer image is stored in the lower layer image memory 84.
[0121]
In step S95, the mapping circuit 54 determines whether or not all the pixels of the upper layer image are the target pixels. If it is determined that all the pixels of the upper layer image are not the target pixels, the process returns to step S91. Repeat the mapping process.
[0122]
If it is determined in step S95 that all the pixels of the upper layer image are the target pixels, the mapping circuit 54 outputs the lower layer image stored in the lower layer image memory 84, and the process ends.
[0123]
In this way, the mapping circuit 54 executes a mapping process for generating a lower layer image from the upper layer image and the prediction coefficient.
[0124]
Next, details of the upper layer image update process corresponding to step S15 of FIG. 16 will be described with reference to the flowchart of FIG. In step S <b> 111, the target pixel determination circuit 104 selects a pixel to be updated, and supplies a pixel position signal corresponding to the selected pixel to the optimum pixel value determination circuit 102.
[0125]
In step S112, the optimum pixel value determination circuit 102 determines the optimum pixel value of the selected pixel. Details of the process of determining the optimum pixel value will be described later with reference to the flowchart of FIG.
[0126]
In step S <b> 113, the optimum pixel value determination circuit 102 sets the determined optimum pixel value in the upper layer image stored in the upper layer image data memory 101.
[0127]
In step S114, the upper layer image update circuit 58 determines whether or not the optimum pixel value is set for all the pixels of the upper layer image, and if the optimum pixel value is not set for all the pixels of the upper layer image. If it is determined, the process returns to step S111, another pixel is selected, and the process of setting the optimum pixel value is repeated.
[0128]
If it is determined in step S114 that the optimal pixel value has been set for all the pixels of the upper layer image, the upper layer image update circuit 58 causes the pixel-of-interest determination circuit 104 to close the switch 103 so that the upper layer image data memory The upper layer image stored in 101 is output, and the process ends.
[0129]
Details of the process of determining the optimum pixel value in step S112 of FIG. 21 will be described with reference to the flowchart of FIG. In step S131, the target pixel determination circuit 121 determines the target pixel from the upper layer image.
[0130]
In step S <b> 132, the prediction tap extraction circuit 122 extracts a prediction tap corresponding to the target pixel from the upper layer image and supplies the prediction tap to the decoding circuit 124. In step S133, the class classification circuit 123 performs class classification processing and determines a class corresponding to the target pixel.
[0131]
In step S134, the mapping circuit 124 executes mapping processing and outputs the generated lower layer image to the lower layer image memory 125. In step S135, the error calculation circuit 126 calculates an error between the decoded image stored in the lower layer image memory 125 and the image data (original image).
[0132]
In step S136, the comparator 127 compares the error supplied from the error calculation circuit 126 with the minimum error stored in the minimum error storage register 129, and the error supplied from the error calculation circuit 126 is minimized. When the error supplied from the error calculation circuit 126 is determined to be the minimum error, the process proceeds to step S137, and the error supplied from the error calculation circuit 126 is stored as the minimum error. The data is stored in the register 129.
[0133]
In step S138, the comparator 127 closes the switch 131 to store the counter value of the target pixel value counter 130 in the optimum pixel value storage register 132, and the procedure proceeds to step S139.
[0134]
If it is determined in step S136 that the error supplied from the error calculation circuit 126 is not the minimum error, there is no need to store the error value or the counter value of the target pixel value counter 130, so steps S137 and S138 are performed. Skipped and the procedure proceeds to step S139.
[0135]
In step S139, the target pixel value counter 130 determines whether or not the counter value is the final value. If it is determined that the counter value is not the final value, the process proceeds to step S140 and increments the counter value.
[0136]
In step S141, the target pixel value counter 130 causes the prediction tap extraction circuit 122 and the class classification circuit 123 to set the counter value as the pixel value of the upper layer image data, returns to step S132, and repeats the processing.
[0137]
If it is determined in step S139 that the counter value is the final value, the process proceeds to step S142, and the target pixel value counter 130 closes the switch 133 and sets the pixel value stored in the optimum pixel value storage register 132. The process ends after outputting the optimum pixel value.
[0138]
In this way, the upper layer image update circuit 58 can output an upper layer image and a prediction coefficient with a smaller error between the restored lower layer image and the original image.
[0139]
Next, details of the process of changing the upper layer image corresponding to step S16 in FIG. 16 will be described with reference to the flowchart in FIG. In step S <b> 161, the change amount determination circuit 153 generates a random number and supplies it to the pixel value change circuit 152.
[0140]
In step S <b> 162, the target pixel determination circuit 154 supplies a pixel position signal for specifying the pixel to be selected to the pixel value change circuit 152. The pixel value changing circuit 152 selects a pixel based on the pixel position signal.
[0141]
In step S163, the pixel value changing circuit 152 adds the random number supplied from the change amount determining circuit 153 to the selected pixel. In step S164, the pixel-of-interest determination circuit 154 determines whether or not random numbers are added to all pixel values. If it is determined that random numbers are not added to all pixel values, the process returns to step S161, Repeat the process of adding a random number to the value.
[0142]
If it is determined in step S164 that random numbers have been added to all pixel values, the process ends.
[0143]
Thus, the upper layer image change circuit 59 adds a random number to each pixel value of the upper layer image to change the pixel value.
[0144]
Next, details of another process for changing the upper layer image corresponding to step S16 in FIG. 16 will be described with reference to the flowchart in FIG. In step S <b> 171, the change amount determination circuit 153 generates an offset and supplies it to the pixel value change circuit 152. In step S <b> 172, the target pixel determination circuit 154 supplies a pixel position signal for specifying a pixel to be selected to the pixel value change circuit 152. The pixel value changing circuit 152 selects a pixel based on the pixel position signal.
[0145]
In step S173, the pixel value changing circuit 152 adds the offset supplied from the change amount determining circuit 153 to the selected pixel. In step S174, the pixel-of-interest determination circuit 154 determines whether or not an offset is added to all pixel values. If it is determined that no offset is added to all pixel values, the process returns to step S172, Repeat the process of adding an offset to the value.
[0146]
If it is determined in step S174 that an offset has been added to all pixel values, the process ends.
[0147]
Thus, the upper layer image change circuit 59 adds the same offset to each pixel value of the upper layer image to change the pixel value.
[0148]
Details of the process of updating the prediction coefficient in step S17 of FIG. 16 will be described with reference to the flowchart of FIG. In step S181, the prediction coefficient update circuit 60 determines a target pixel. In step S182, the class classification circuit 171 applies, for example, a 1-bit ADRC process to the class tap, executes the class classification process, and supplies data indicating the class to the prediction coefficient calculation circuit 174. The prediction tap extraction circuit 172 extracts prediction taps from the upper layer image and supplies them to the prediction coefficient calculation circuit 174.
[0149]
In step S183, the prediction coefficient calculation circuit 174 adds the prediction tap and the teacher data supplied from the teacher data extraction circuit 173 to the calculation equation corresponding to the class.
[0150]
In step S184, the prediction coefficient update circuit 60 determines whether or not all the pixels in the image are the target pixels. If it is determined that all the pixels in the image are not the target pixels, the process returns to step S181. Repeat the process.
[0151]
If it is determined in step S184 that all the pixels in the image are the target pixel, the process proceeds to step S185, where the prediction coefficient calculation circuit 174 solves the generated normal equation to acquire the prediction coefficient, and the process ends. To do.
[0152]
As described above, the prediction coefficient update circuit 60 updates the prediction coefficient.
[0153]
Next, the receiving device 4 will be described.
[0154]
FIG. 26 illustrates a functional configuration example of the receiving device 4. The upper layer image memory 201 stores the supplied upper layer image data. The prediction tap extraction circuit 202 extracts a prediction tap from the upper layer image supplied from the upper layer image memory 201 and supplies the extracted prediction tap to the decoding circuit 204.
[0155]
The class classification circuit 203 calculates, for example, a class indicating the result of classifying the upper layer image supplied from the upper layer image memory 201 based on the characteristics of the upper layer image by applying, for example, 1-bit ADRC processing. Then, the calculated class is supplied to the decoding circuit 204.
[0156]
The decoding circuit 204 selects a prediction coefficient corresponding to a class from prediction coefficients (consisting of prediction coefficients corresponding to each class) supplied to the receiving device 4, and based on the selected prediction coefficient and prediction tap, The calculation is executed to generate a lower layer image, and the generated lower layer image (restored image) is output to the lower layer image memory 205.
[0157]
The lower layer image memory 205 sequentially stores the restored image that is the lower layer image supplied from the decoding circuit 204, and outputs the entire restored image that is the stored lower layer image when the processing is completed for the entire image. To do.
[0158]
Next, the decoding process of the receiving device 4 will be described with reference to the flowchart of FIG. In step S201, the receiving device 4 inputs an upper layer image and a prediction coefficient. In step S202, the receiving device 4 determines a target pixel.
[0159]
In step S <b> 203, the class classification circuit 203 executes class classification processing and supplies data indicating the class to the decoding circuit 204. In step S <b> 204, the prediction tap extraction circuit 202 acquires a prediction tap corresponding to the pixel of interest from the pixels of the upper layer image, and supplies the acquired prediction tap to the decoding circuit 204.
[0160]
In step S205, the decoding circuit 204 selects a prediction coefficient corresponding to the class from the supplied prediction coefficients, and based on the selected prediction coefficient and the prediction tap supplied from the prediction tap extraction circuit 202, the lower layer image The mapping processing for generating is executed, and the generated lower layer image is stored in the lower layer image memory 205.
[0161]
In step S206, the reception device 4 determines whether or not all the pixels of the upper layer image are the target pixels, and when it is determined that all the pixels of the upper layer image are not the target pixels, the process returns to step S202. Repeat the mapping process.
[0162]
If it is determined in step S206 that all the pixels of the upper layer image are the target pixels, the receiving device 4 outputs the lower layer image stored in the lower layer image memory 205, and the process ends.
[0163]
Thus, the receiving device 4 restores the lower layer image from the upper layer image and the prediction coefficient.
[0164]
Next, a second embodiment of the image processing apparatus will be described.
[0165]
FIG. 28 shows a configuration example of the transmission apparatus 1 corresponding to the second embodiment of the image processing apparatus according to the present invention.
[0166]
Image data to be encoded is supplied to a preprocessing circuit 301, encoding circuits 304-1 to 304 -N (N is 15 for example), and an evaluation / selection / convergence determination circuit 307. The pre-processing circuit 301 generates an initial upper layer image and an initial prediction coefficient based on the input image data, supplies the initial upper layer image to the upper layer image memory 302, and stores the initial prediction coefficient in the prediction coefficient table memory. 303.
[0167]
The upper layer image memory 302 supplies the stored upper layer image to the encoding circuits 304-1 to 304-N. The prediction coefficient table memory 303 supplies the stored prediction coefficients to the encoding circuits 304-1 to 304-N.
[0168]
The upper layer image change parameter generation circuit 306 supplies different change parameters to each of the encoding circuits 304-1 to 304-N.
[0169]
The encoding circuit 304-1 changes the upper layer image based on the change parameter supplied from the upper layer image change parameter generation circuit 306, and updates the upper layer image and the prediction coefficient. The encoding circuit 304-1 supplies the changed and updated upper layer image and the updated prediction coefficient to the mapping circuit 305-1 and the switcher 308.
[0170]
The encoding circuit 304-2 changes the upper layer image (performs a change different from the encoding circuit 304-1) based on the change parameter supplied from the upper layer image change parameter generation circuit 306, and performs the upper layer image and prediction. Update the coefficient. The encoding circuit 304-2 supplies the changed and updated upper layer image and the updated prediction coefficient to the mapping circuit 305-2 and the switcher 308.
[0171]
Similarly, the encoding circuits 304-3 to 304-N change the supplied upper layer images to different upper layer images based on the change parameters supplied from the upper layer image change parameter generation circuit 306, and are changed. The upper layer image and the prediction coefficient are updated. The encoding circuits 304-3 to 304-N supply the changed and updated upper layer image and the updated prediction coefficient to any of the mapping circuits 305-3 to 305-N and the switcher 308, respectively.
[0172]
Hereinafter, when it is not necessary to individually distinguish the encoding circuits 304-1 to 304-N, they are simply referred to as the encoding circuit 304.
[0173]
FIG. 29 is a diagram for explaining the configuration of the encoding circuit 304. The prediction coefficient supplied from the prediction coefficient table memory 303 is stored in the prediction coefficient table memory 331. The upper layer image supplied from the upper layer image memory 302 is stored in the upper layer image memory 332.
[0174]
Image data that is an original image is supplied to a convergence determination circuit 334, an upper layer image update circuit 335, and a prediction coefficient update circuit 337.
[0175]
When the upper layer image and the prediction coefficient are supplied, the mapping circuit 333 generates a lower layer image based on the upper layer image and the prediction coefficient and supplies the lower layer image to the convergence determination circuit 334.
[0176]
Based on the supplied image data (original image) and the lower layer image (restored image) supplied from the mapping circuit 333, the convergence determination circuit 334 and the lower layer image (restored image) supplied from the mapping circuit 333 It is determined whether or not an error with image data is smaller than a prestored threshold, and an error between the lower layer image (restored image) supplied from the mapping circuit 333 and the image data is smaller than a prestored threshold. Is determined, the control signal is output, the switch 338 and the switch 339 are closed, the upper layer image stored in the upper layer image memory is output as the optimum upper layer image data, and the prediction count table memory 331 is also output. The stored prediction coefficient is output as the optimum prediction coefficient.
[0177]
When it is determined that the error between the lower layer image (restored image) supplied from the mapping circuit 333 and the image data is greater than or equal to a threshold value stored in advance, the convergence determination circuit 334 outputs a control signal and outputs the switch 338. And the switch 339 is opened, and the process of updating the upper layer image is repeated.
[0178]
Based on the image data (original image), the prediction coefficient supplied from the prediction coefficient table memory 331, and the upper layer image supplied from the upper layer image memory 332, the upper layer image update circuit 335 calculates the pixel value of the restored image. The pixel value of the upper layer image is updated so that the error with the pixel value of the image data is reduced, and the upper layer image with the updated pixel value is output to the upper layer image memory 332. The upper layer image memory 332 stores the upper layer image supplied from the upper layer image update circuit 335.
[0179]
When the upper layer image change parameter is supplied from the upper layer image change parameter generation circuit 306, the upper layer image change circuit 336 receives the upper layer image supplied from the upper layer image memory 332 based on the upper layer image change parameter. The pixel value is changed, and the upper layer image with the changed pixel value is output to the upper layer image memory 332. The upper layer image memory 332 stores the upper layer image supplied from the upper layer image change circuit 336.
[0180]
The prediction coefficient update circuit 337 updates the prediction coefficient based on the image data (original image) and the upper layer image supplied from the upper layer image memory 332, and outputs the updated prediction coefficient to the prediction coefficient table memory 331. To do. The prediction coefficient table memory 331 stores the updated prediction coefficient supplied from the prediction coefficient update circuit 337.
[0181]
When the changed or updated upper layer image and the updated prediction coefficient are supplied, the mapping circuit 333 generates a lower layer image based on the upper layer image and the prediction coefficient, and sends the lower layer image to the convergence determination circuit 334. Supply. The convergence determination circuit 334 executes determination processing based on the lower layer image generated based on the upper layer image and the prediction coefficient.
[0182]
Returning to FIG. 28, the mapping circuit 305-1 generates a lower layer image based on the upper layer image and the prediction coefficient supplied from the encoding circuit 304-1, and evaluates, selects, and converges the generated lower layer image. This is supplied to the determination circuit 307.
[0183]
The mapping circuit 305-2 generates a lower layer image based on the upper layer image and the prediction coefficient supplied from the encoding circuit 304-2, and supplies the generated lower layer image to the evaluation / selection / convergence determination circuit 307. To do.
[0184]
The mapping circuits 305-3 to 305-N generate a lower layer image based on the upper layer image and the prediction coefficient supplied from any of the encoding circuits 304-3 to 304-N, and generate the lower layer image Is supplied to the evaluation / selection / convergence determination circuit 307.
[0185]
Hereinafter, when there is no need to individually distinguish the mapping circuits 305-1 to 305-N, they are simply referred to as the mapping circuit 305.
[0186]
The evaluation / selection / convergence determination circuit 307, when the count count supplied from the counter 309 is smaller than the threshold value stored in advance, the lower layer image and image data supplied from each of the mapping circuits 305-1 to 305-N. And the control signal for selecting the upper layer image and the prediction coefficient supplied from the encoding circuits 304-1 to 304-N is supplied to the switcher 308.
[0187]
The evaluation / selection / convergence determination circuit 307, when the count count supplied from the counter 309 is equal to or greater than a threshold value stored in advance, the lower-layer image and the image supplied from each of the mapping circuits 305-1 to 305-N. An error from the data is calculated, and a control signal for selecting an upper layer image and a prediction coefficient is supplied to the switcher 308, and the upper layer image and the prediction coefficient selected by the switcher 308 are respectively optimized for the upper layer image data and the optimum prediction coefficient. A control signal to be output is supplied.
[0188]
Note that the evaluation / selection / convergence determination circuit 307 repeats the process of changing and updating the upper layer image a predetermined number of times, and sets the upper layer image selected by the switcher 308 and the prediction coefficient to the optimum upper layer image data. A control signal to be output as the optimum prediction coefficient may be supplied.
[0189]
Based on the control signal supplied from the evaluation / selection / convergence determination circuit 307, the switcher 308 selects one upper layer image and prediction coefficient from the upper layer images and prediction coefficients supplied from the encoding circuits 304-1 to 304-N. The selected upper layer image is selected and supplied to the upper layer image memory 302, and the selected prediction coefficient is supplied to the prediction coefficient table memory 303. The switcher 308 selects the upper layer image and the prediction coefficient supplied from the encoding circuits 304-1 to 304-N based on the control signal supplied from the evaluation / selection / convergence determination circuit 307, and selects the selected upper layer image. And the prediction coefficient are output as the optimum upper layer image data and the optimum prediction coefficient, respectively.
[0190]
The upper layer image memory 302 stores the upper layer image supplied from the switcher 308 and supplies the stored upper layer image to the encoding circuits 304-1 to 304-N. The prediction coefficient table memory 303 stores the prediction coefficient supplied from the switcher 308 and supplies the stored prediction coefficient to the encoding circuits 304-1 to 304-N.
[0191]
FIG. 30 is a diagram illustrating an outline of processing in another configuration example of the transmission device 1 corresponding to the second embodiment of the image processing device. When image data that is an original image is input to the transmission apparatus 1, the preprocessing circuit 301 generates an initial upper layer image and an initial prediction coefficient. The initial upper layer image is buffered in the upper layer image memory 302 as, for example, an upper layer image A. The initial prediction coefficient is stored in the prediction coefficient table memory 303.
[0192]
The upper layer image A buffered in the upper layer image memory 302 is supplied to the encoding circuits 304-1 to 304-N, and different changes are made in parallel.
[0193]
For example, the encoding circuit 304-1 applies the process of image change 1 to the upper layer image A, changes the upper layer image A to the upper layer image A1, and further updates the upper layer image A1.
[0194]
The encoding circuit 304-2 applies the image change 2 (different from the image change 1) process to the upper layer image A, changes the upper layer image A to the upper layer image A2, and further updates the upper layer image A2. To do.
[0195]
The encoding circuit 304-3 applies processing of image change 3 (different from image change 1 and image change 2) to the upper layer image A, changes the upper layer image A to the upper layer image A3, and further The image A3 is updated.
[0196]
Similarly, the encoding circuits 304-4 to 304-N apply the processing of image change 4 to image change N (change of images different from each other) to the upper layer image A, respectively, to convert the upper layer image A into the upper layer image. The image is changed to any one of A4 to upper layer image AN, and further, the upper layer image A4 to upper layer image AN is updated.
[0197]
The evaluation / selection / convergence determination circuit 307 evaluates the upper layer image A1 to the upper layer image AN, selects one of the upper layer image A1 to the upper layer image AN, and selects the selected upper layer image as the upper layer. The image B is stored in the upper layer image memory 302 and the corresponding prediction coefficient is stored in the prediction coefficient table memory 303.
[0198]
Similar processing is repeated for the upper layer image B.
[0199]
As described above, different image change processes are performed in parallel on the upper layer image, and each upper layer image is updated and the selected process is repeated. Therefore, the transmission apparatus 1 can more quickly perform the original image. Thus, it is possible to obtain an upper layer image that can obtain a restored image with a small error.
[0200]
With reference to the flowchart of FIG. 31, the encoding process of the transmission apparatus 1 shown in FIG. 28 will be described. In step S301, the preprocessing circuit 301 generates an initial upper layer image and an initial prediction coefficient, supplies the initial upper layer image to the upper layer image memory 302, and supplies the initial prediction coefficient to the prediction coefficient table memory 303. . The upper layer image memory 302 stores the supplied initial upper layer image and supplies the stored initial upper layer image to each of the encoding circuits 304-1 to 304-N (N is, for example, 15). The prediction coefficient table memory 303 stores the supplied initial prediction coefficient and supplies the stored initial prediction coefficient to each of the encoding circuits 304-1 to 304-N.
[0201]
Since the preprocessing in step S301 is the same as step S11 in FIG. 16, the detailed description of the processing is omitted.
[0202]
In step S302, the upper layer image change parameter generation circuit 306 generates a plurality of upper layer image change parameters (for example, 15 corresponding to the number of the encoding circuits 304-1 to 304-N), and the generated upper layer image changes. Each of the change parameters is supplied to each of the encoding circuits 304-1 to 304-N.
[0203]
The following processing in steps S303 to S306 is executed in parallel in each of the encoding circuits 304-1 to 304-N.
[0204]
In step S303, the upper layer image change circuit 336 of the encoding circuit 304 changes the upper layer image supplied from the prediction coefficient table memory 331 according to the upper layer image change parameter.
[0205]
In step S304, the upper layer image update circuit 335 repeats the process of updating the upper layer image a predetermined number of times (for example, 10 times), and the prediction count update circuit 338 performs the process of updating the prediction coefficient a predetermined number of times (for example, Repeat 10 times). The updated upper layer image is stored in the upper layer image memory 332. The updated prediction coefficient is stored in the prediction coefficient table memory 331.
[0206]
In step S305, the encoding circuit 304 determines whether or not the change in the upper layer image has been repeated a predetermined number of times (for example, five times), and it is determined that the change in the upper layer image has not been repeated a predetermined number of times. In this case, the procedure returns to step S303 and repeats the process of changing the upper layer image.
[0207]
If it is determined in step S305 that the change in the upper layer image has been repeated a predetermined number of times, the process proceeds to step S306, and the mapping circuit 305 performs mapping based on the upper layer image and the prediction coefficient supplied from the encoding circuit 304. Execute the process.
[0208]
Since the mapping process in step S306 is the same as the process in step S16 of FIG. 16, detailed description of the process is omitted.
[0209]
In step S307, the evaluation / selection / convergence determination circuit 307 evaluates the lower layer images supplied from the mapping circuits 305-1 to 305-N, that is, a plurality of results, based on the image data (original image), and the best result is obtained. Choose one.
[0210]
In step S308, the evaluation / selection / convergence determination circuit 307 determines whether or not the image has converged based on the image data (original image), the lower layer image selected in the process of step S307, and the threshold value stored in advance. If it is determined that the process has not converged, the procedure proceeds to step S309.
[0211]
The determination of whether or not the process has converged in step S308 is executed based on, for example, the evaluation value of the lower layer image, the amount of change in the evaluation value, or the number of updates.
[0212]
In step S309, the evaluation / selection / convergence determination circuit 307 switches the switcher 308 to select the upper layer image selected in order to process the upper layer image and the prediction coefficient selected in step S307. The image data is input to the upper layer image memory 302 and the selected prediction coefficient is input to the prediction coefficient table memory 303. The upper layer image memory 302 stores the selected upper layer image. The prediction coefficient table memory 303 stores the selected prediction coefficient. The procedure returns to step S302 and repeats the process of changing the upper layer image and the process of updating.
[0213]
If it is determined in step S308 that the image has converged, the switcher 308 outputs the selected upper layer image as the optimum upper layer image data and outputs the selected prediction coefficient as the optimum prediction coefficient, and the process ends. .
[0214]
As described above, the transmission apparatus 1 having the configuration illustrated in FIG. 28 applies different image change processing to the upper layer image in parallel, updates each upper layer image, and selects the best upper layer image. Therefore, it is possible to output an upper layer image that can obtain a restored image with a small error from the original image more quickly.
[0215]
FIG. 32 shows a configuration example of the transmission apparatus 1 corresponding to the third embodiment of the image processing apparatus according to the present invention. The same parts as those shown in FIG. 28 are denoted by the same reference numerals, and the description thereof is omitted.
[0216]
Based on the change parameter supplied from the upper layer image change parameter generation circuit 306, the upper change / coefficient update circuit 351-1 changes the upper layer image and updates the prediction coefficient. The upper change / coefficient update circuit 351-1 supplies the changed upper layer image and the updated prediction coefficient to the mapping circuit 305-1 and the switcher 308.
[0217]
The upper change / coefficient update circuit 351-2 changes the upper layer image based on the change parameter supplied from the upper layer image change parameter generation circuit 306 (changes different from the upper change / coefficient update circuit 351-1). Execute), and update the upper layer image and the prediction coefficient. The upper change / coefficient update circuit 351-2 supplies the changed and updated upper layer image and the updated prediction coefficient to the mapping circuit 305-2 and the switcher 308.
[0218]
Similarly, the upper change / coefficient update circuits 351-3 to 351-N change the supplied upper layer images to different upper layer images based on the change parameters supplied from the upper layer image change parameter generation circuit 306. Then, the changed upper layer image and prediction coefficient are updated. The upper change / coefficient update circuits 351-3 to 351-N transmit the changed and updated upper layer images and the updated prediction coefficients to any of the mapping circuits 305-3 to 305-N and the switcher 308, respectively. Supply.
[0219]
Hereinafter, when it is not necessary to individually distinguish the upper change / coefficient update circuits 351-1 to 351 -N, they are simply referred to as upper change / coefficient update circuits 351.
[0220]
The upper layer image change parameter generation circuit 306 supplies different change parameters to each of the encoding circuits 304-1 to 304-N based on the number of times supplied from the counter 309.
[0221]
The upper update / coefficient update circuit 352 updates the upper layer image and the prediction coefficient supplied from the switcher 308, stores the updated upper layer image in the upper layer image memory 302, and stores the updated prediction coefficient in the prediction coefficient table memory. 303 stores the result.
[0222]
FIG. 33 is a diagram illustrating an outline of other processing in the configuration example of the transmission device 1 corresponding to the third embodiment of the image processing device. In the processing corresponding to FIG. 33, the pre-processing to the upper layer image change processing are the same as those shown in FIG.
[0223]
In the processing corresponding to FIG. 33, the changed upper layer image 1 to upper layer image N are not updated.
[0224]
The evaluation / selection / convergence determination circuit 307 evaluates the changed upper layer image 1 to upper layer image N and selects one of the upper layer image 1 to upper layer image N. The evaluation / selection / convergence determination circuit 307 controls the switcher 308 to supply the selected upper layer image and prediction coefficient to the upper update / coefficient update circuit 352.
[0225]
The upper update / coefficient update circuit 352 updates the selected upper layer image and prediction coefficient.
[0226]
The upper update / coefficient update circuit 352 stores the updated upper layer image as the upper layer image B in the upper layer image memory 302 and stores the corresponding prediction coefficient in the prediction coefficient table memory 303.
[0227]
The process shown in FIG. 33 has an advantage that the circuit scale of the transmission apparatus 1 can be reduced because the process of updating the upper layer image is less than the process shown in FIG.
[0228]
With reference to the flowchart of FIG. 34, the encoding process of the transmission apparatus 1 shown in FIG. 32 will be described. Since the process of step S321 and step S322 is the same as the process of step S301 and step S302 of FIG. 31, the description is abbreviate | omitted.
[0229]
The following processing in step S323 and step S324 is executed in parallel in each of the upper change / count update circuits 351-1 to 351-N.
[0230]
In step S323, the upper change / count update circuit 351 changes the upper layer image supplied from the upper layer image memory 302 according to the upper layer image change parameter supplied from the upper layer image change parameter generation circuit 306. In step S324, the mapping circuit 305 executes mapping processing based on the upper layer image and the prediction coefficient supplied from the upper change / count update circuit 351.
[0231]
Since the mapping process in step S324 is the same as the process in step S16 of FIG. 16, detailed description of the process is omitted.
[0232]
In step S325, the evaluation / selection / convergence determination circuit 307 evaluates the lower layer images supplied from the mapping circuits 305-1 to 305-N, that is, a plurality of results, based on the image data (original image), and the best result is obtained. Choose one.
[0233]
In step S326, the upper update / coefficient update circuit 352 repeats the process of updating the upper layer image selected in the process of step S325 a predetermined number of times, and performs the process of updating the prediction coefficient a predetermined number of times (for example, 10 times). repeat.
[0234]
In step S328, the transmission device 1 executes mapping processing based on the updated upper layer image and the prediction coefficient.
[0235]
Since the mapping process in step S328 is the same as the process in step S16 of FIG. 16, a detailed description thereof will be omitted.
[0236]
The processes in steps S329 and S330 are the same as the processes in steps S308 and S309 in FIG.
[0237]
As described above, the transmission apparatus 1 corresponding to the third embodiment can quickly and easily store the original image with a circuit configuration of a smaller scale as compared with the case where the processing corresponding to the flowchart shown in FIG. 31 is executed. An upper layer image from which a restored image with a small error can be obtained can be output.
[0238]
FIG. 35 shows a configuration example of the transmission apparatus 1 corresponding to the fourth embodiment of the image processing apparatus. The same parts as those shown in FIG. 32 are denoted by the same reference numerals, and the description thereof is omitted.
[0239]
The transmission apparatus 1 corresponding to the fourth embodiment has the same configuration as that of the transmission apparatus 1 of the third embodiment in which the upper update / coefficient update circuit 352 is omitted.
[0240]
FIG. 36 is a diagram illustrating an outline of processing in the configuration example of the transmission device 1 corresponding to the fourth embodiment of the image processing device according to the present invention. In the processing corresponding to FIG. 36, the processing from the preprocessing to the upper layer image change processing is the same as that shown in FIG.
[0241]
The evaluation / selection / convergence determination circuit 307 evaluates the changed upper layer image 1 to upper layer image N and selects one of the upper layer image 1 to upper layer image N. In the processing corresponding to the fourth embodiment according to the present invention, the selected upper layer image is not updated.
[0242]
The evaluation / selection / convergence determination circuit 307 stores the selected upper layer image as the upper layer image B in the upper layer image memory 302 and stores the corresponding prediction coefficient in the prediction coefficient table memory 303.
[0243]
The process shown in FIG. 36 has an advantage that the circuit scale of the transmission apparatus 1 can be further reduced because there is no process for updating the upper layer image as compared with the process shown in FIG.
[0244]
With reference to the flowchart of FIG. 37, the encoding process of the transmission apparatus 1 shown in FIG. 35 will be described. Since the process of step S351 thru | or step S355 is the same as the process of step S321 thru | or step S325 of FIG. 34, the description is abbreviate | omitted.
[0245]
Since the process of step S356 thru | or step S358 is the same as the process of FIG.34 S327 thru | or step S329, the description is abbreviate | omitted.
[0246]
That is, the encoding process of the transmission apparatus 1 illustrated in FIG. 35 is the same as the process in which the process of step S326 is omitted from the process illustrated in the flowchart of FIG.
[0247]
Therefore, the transmission apparatus 1 corresponding to the fourth embodiment of the image processing apparatus according to the present invention can execute the encoding process more quickly.
[0248]
Next, a fifth embodiment of the image processing apparatus according to the present invention will be described.
[0249]
FIG. 38 shows a configuration example of the transmission apparatus 1 corresponding to the fifth embodiment of the image processing apparatus according to the present invention.
[0250]
Image data to be encoded is supplied to a preprocessing circuit 401, an encoding circuit 404, and an evaluation determination / convergence determination circuit 407.
[0251]
The pre-processing circuit 401 generates an initial upper layer image and an initial prediction coefficient based on the input image data, supplies the initial upper layer image to the upper layer image memory 402, and supplies the initial prediction coefficient to the prediction coefficient table memory. 403 is supplied.
[0252]
The upper layer image memory 402 supplies the stored upper layer image to the encoding circuit 404. The prediction coefficient table memory 403 supplies the stored prediction coefficient to the encoding circuit 404.
[0253]
The upper layer image change parameter generation circuit 406 sequentially supplies different change parameters to the encoding circuit 404 based on the number of times supplied from the evaluation determination / convergence determination circuit 407.
[0254]
The encoding circuit 404 changes the upper layer image based on the change parameter supplied from the upper layer image change parameter generation circuit 406, and updates the upper layer image and the prediction coefficient. The encoding circuit 404 supplies the updated upper layer image to the mapping circuit 405 and also supplies it to the optimum upper layer image memory 410 via the switch 409. The encoding circuit 404 supplies the updated prediction coefficient to the mapping circuit 405 and also supplies it to the optimum prediction coefficient table memory 412 via the switch 411.
[0255]
The mapping circuit 405 generates a lower layer image based on the upper layer image and the prediction coefficient supplied from the encoding circuit 404 and supplies the generated lower layer image to the evaluation determination / convergence determination circuit 407.
[0256]
The evaluation determination / convergence determination circuit 407 generates an evaluation value such as an error from the lower layer image supplied from the mapping circuit 405 and the image data (original image). The evaluation determination / convergence determination circuit 407 compares the generated evaluation value with the evaluation value stored in the optimal evaluation value storage register 408, and the generated evaluation value is stored in the optimal evaluation value storage register 408. It is determined whether it is better than the evaluation value.
[0257]
When it is determined that the generated evaluation value is better than the evaluation value stored in the optimal evaluation value storage register 408, the evaluation determination / convergence determination circuit 407 stores the generated evaluation value in the optimal evaluation value storage register 408. Then, the switch 409 and the switch 411 are closed, the upper layer image supplied from the encoding circuit 404 is stored in the optimum upper layer image memory 410, and the prediction coefficient supplied from the encoding circuit 404 is stored in the optimum prediction coefficient table memory 412. .
[0258]
When it is determined that the generated evaluation value is not better than the evaluation value stored in the optimal evaluation value storage register 408, the evaluation determination / convergence determination circuit 407 discards the generated evaluation value and prediction coefficient (generated evaluation Do not remember values and prediction coefficients).
[0259]
The evaluation determination / convergence determination circuit 407 compares the generated evaluation value with a prestored threshold value, and determines whether or not the generated evaluation value is better than the prestored threshold value. When it is determined that the generated evaluation value is better than the threshold value, the evaluation determination / convergence determination circuit 407 closes the switch 416 and the switch 417 and converts the upper layer image stored in the optimal upper layer image memory 410 to the optimum upper layer image. While outputting as an image, the prediction coefficient memorize | stored in the optimal prediction coefficient table memory 412 is output as an optimal prediction coefficient.
[0260]
When it is determined that the generated evaluation value is not better than the threshold value, the evaluation determination / convergence determination circuit 407 stores the upper layer image stored in the optimal upper layer image memory 410 in the upper layer image memory 402 and also performs the optimal operation. The prediction coefficient stored in the prediction coefficient table memory 412 is stored in the prediction coefficient table memory 403, and the process of changing and updating the upper layer image is repeated.
[0261]
The evaluation determination / convergence determination circuit 407 closes the switch 416 and the switch 417 and repeats the process of changing and updating the upper layer image a predetermined number of times, and stores the upper layer image stored in the optimum upper layer image memory 410. The hierarchical image may be output as the optimal upper hierarchical image, and the prediction coefficient stored in the optimal prediction coefficient table memory 412 may be output as the optimal prediction coefficient.
[0262]
When the lower layer image is supplied from the mapping circuit 405, the evaluation determination / convergence determination circuit 407 supplies a count signal to the upper layer image change parameter generation circuit 406 and the counter 415.
[0263]
When the upper layer image change parameter generation circuit 406 receives signals of different counts, it generates different change parameters and supplies them to the encoding circuit 404.
[0264]
When the counter 415 receives the count signal, the counter 415 increments the counter value. The counter 415 outputs a control signal for closing the switch 413 and the switch 414 when the counter value reaches a predetermined value.
[0265]
When the switch 413 is closed, the optimum upper layer image memory 410 supplies the stored upper layer image to the upper layer image memory 402 via the switch 413. The upper layer image memory 402 stores the upper layer image supplied from the optimum upper layer image memory 410.
[0266]
In other words, the upper layer image memory 402 stores the optimum upper layer image among the upper layer images obtained by a plurality of image changes.
[0267]
When the switch 414 is closed, the optimum prediction coefficient table memory 412 supplies the stored prediction coefficient to the prediction coefficient table memory 403 via the switch 414. The prediction coefficient table memory 403 stores the prediction coefficient supplied from the optimum prediction coefficient table memory 412.
[0268]
That is, the prediction coefficient table memory 403 stores prediction coefficients corresponding to the optimum upper layer image among the upper layer images obtained by a plurality of image changes.
[0269]
Since the count value of the counter 415 is reset, the optimum upper layer image and the prediction coefficient are based on the upper layer image stored in the upper layer image memory 402 and the prediction coefficient stored in the prediction coefficient table memory 403. The process of changing the upper layer image and the process of updating are repeated until.
[0270]
As described above, the transmission apparatus 1 having the configuration illustrated in FIG. 38 quickly calculates the optimal upper layer image and the prediction coefficient with a circuit having a smaller scale as compared with the case having the configuration illustrated in FIG.
[0271]
With reference to the flowchart of FIG. 39, the encoding process of the transmission apparatus 1 shown in FIG. 38 will be described. In step S 401, the preprocessing circuit 401 generates an initial upper layer image and an initial prediction coefficient, supplies the initial upper layer image to the upper layer image memory 402, and supplies the initial prediction coefficient to the prediction coefficient table memory 403. . The upper layer image memory 402 stores the supplied initial upper layer image and supplies the stored initial upper layer image to the encoding circuit 404. The prediction coefficient table memory 403 stores the supplied initial prediction coefficient and supplies the stored initial prediction coefficient to the encoding circuit 404.
[0272]
The pre-processing in step S401 is the same as step S11 in FIG. 16, and thus detailed description of the processing is omitted.
[0273]
In step S402, the upper layer image change parameter generation circuit 406 generates an upper layer image change parameter based on the number of times supplied from the evaluation determination / convergence determination circuit 407, and encodes the generated upper layer image change parameter. 404 is supplied.
[0274]
In step S403, the encoding circuit 404 changes the upper layer image stored in the internal buffer based on the upper layer image change parameter. In step S404, the encoding circuit 404 repeats the process of updating the upper layer image and the prediction coefficient a predetermined number of times (for example, 10 times).
[0275]
In step S405, the encoding circuit 404 determines whether or not the process of changing the upper layer image has been repeated a predetermined number of times (for example, 5 times), and has not repeated the process of changing the upper layer image a predetermined number of times. If it is determined, the procedure returns to step S403, and the process of changing the upper layer image is repeated.
[0276]
If it is determined in step S405 that the process of changing the upper layer image has been repeated a predetermined number of times, the process proceeds to step S406, and the mapping circuit 405 based on the upper layer image and the prediction coefficient supplied from the encoding circuit 404. A mapping process for generating a lower layer image is executed.
[0277]
Since the mapping process in step S406 is the same as the process in step S12 in FIG. 16, the detailed description thereof is omitted.
[0278]
In step S407, the evaluation determination / convergence determination circuit 407 generates an evaluation value generated by comparing the lower layer image supplied from the mapping circuit 405 with the image data (original image), and the generated evaluation value is optimal. If it is better than the evaluation value stored in the evaluation value storage register 408, the generated evaluation value is stored in the optimum evaluation value storage register 408, and the upper layer image output from the encoding circuit 404 is stored in the optimal upper layer image memory 410. The prediction coefficient output from the encoding circuit 404 is stored in the optimum prediction coefficient table memory 412.
[0279]
Note that when the process of step S407 is executed for the first time, since the evaluation value is not stored in the optimum evaluation value storage register 408, the generated evaluation value is stored in the optimum evaluation value storage register 408.
[0280]
In step S408, the counter 415 determines whether or not the upper layer image change process has been executed with a predetermined number of change parameters (for example, 15) based on the counter value, and the upper level with the predetermined number of change parameters. If it is determined that the hierarchical image change process has not been executed, the procedure returns to step S402, and the process is repeated from the generation of the upper hierarchical image change parameter.
[0281]
If it is determined in step S408 that the upper layer image change process has been executed with a predetermined number of change parameters, the process advances to step S409, and the evaluation determination / convergence determination circuit 407 is stored in the optimum evaluation value storage register 408. It is determined whether or not it has converged based on the evaluated value and the threshold value stored in advance. If it is determined in step S409 that the image has not converged, the process proceeds to step S410, and the counter 415 stores the upper layer image stored in the optimum upper layer image memory 410 in the upper layer image memory 402, and the optimum prediction coefficient. The prediction count stored in the table memory 412 is stored in the prediction coefficient table memory 403, and the procedure returns to step S402 and repeats the process.
[0282]
If it is determined in step S409 that the image has converged, the evaluation determination / convergence determination circuit 407 determines the upper layer image stored in the optimum upper layer image memory 410 and the prediction count stored in the optimum prediction coefficient table memory 412. Is output and the process ends.
[0283]
As described above, the transmission apparatus 1 shown in FIG. 38 can quickly and originally use a circuit configuration of a smaller scale as compared with the case where the processing corresponding to the flowchart shown in FIG. 31, FIG. 34, or FIG. It is possible to output an upper layer image that can obtain a restored image with a small error from the image.
[0284]
Although the upper layer image has been described as a low-resolution image, it is not limited to a low-resolution image, and may be a low-frequency image.
[0285]
The compressed data corresponding to the upper layer image may be image data having a small number of bits of each pixel.
[0286]
In the present embodiment, the CPU 14 configuring the transmission device 1 of FIG. 3 executes various application processes by executing application programs stored in the external storage device 15 that also configures the transmission device 1. However, these encoding processes can also be performed by hardware. Similarly, the processing in the receiving device 4 can be realized by causing a computer to execute a program for performing such processing, or by hardware.
[0287]
When a series of processing is executed by software, a program constituting the software may execute various functions by installing a computer incorporated in dedicated hardware or various programs. For example, it is installed from a recording medium in a general-purpose personal computer or the like.
[0288]
As shown in FIG. 3, the recording medium is distributed to provide a program to the user separately from the computer, and includes a magnetic disk 17 (including a floppy disk) on which the program is recorded, an optical disk 18 (CD- It is composed only of a package medium composed of a ROM (compact disc-read only memory), a DVD (digital versatile disc), a magneto-optical disc 19 (including MD (mini-disc)), or a semiconductor memory 20. Rather, it is configured by a ROM 12 on which a program is recorded and a hard disk included in the external storage unit 15 provided to the user in a state of being incorporated in the computer in advance.
[0289]
In the present specification, the step of describing the program stored in the recording medium is not limited to the processing performed in chronological order according to the described order, but is not necessarily performed in chronological order. It also includes processes that are executed individually.
[0290]
Further, in this specification, the system represents the entire apparatus constituted by a plurality of apparatuses.
[0291]
【The invention's effect】
According to the image encoding device according to claim 1, the image encoding method according to claim 4, and the recording medium according to claim 5, the original image is compressed by reducing its information amount, The compressed data obtained by compressing the original image is corrected to generate corrected data, and the compressed data is changed by calculating with a predetermined numerical value to generate changed data, and the compressed data is corrected or changed. Is selected, the original image is predicted based on the correction data or the change data, the prediction value is generated, the prediction error of the prediction value for the original image is calculated, and the correction data or the change is calculated based on the prediction error. Appropriateness of data is determined, and correction data or change data is output as the encoding result of the original image corresponding to the determination result, and the number of times the compressed data is corrected is counted as the correction number. It is, based on the number of corrections, since changing process is to vary more rapidly, it is possible to obtain the coded data can be restored image with a smaller error.
[0292]
According to the image processing system of claim 6, the original image is compressed by reducing the amount of information, the compressed data obtained by compressing the original image is corrected, and correction data is generated, The compressed data is changed by calculating with a predetermined numerical value, the changed data is generated, the correction of the compressed data, or the change is selected, the original image is predicted based on the corrected data or the changed data, and the prediction A value is generated, a prediction error of the prediction value for the original image is calculated, and based on the prediction error, the correctness of the correction data or the change data is determined. Corresponding to the determination result, the correction data or the change data is The number of times the compressed data is corrected is output as the result of encoding the original image, and the number of corrections is measured. Based on the number of corrections, the changing process changes. Results in a correction data or based on the changed data, the original image is predicted. Thus the predicted value is output, more quickly, it becomes possible to restore the image in a smaller error.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an upper layer image and a lower layer image.
FIG. 2 is a diagram showing a configuration of an embodiment of an image processing apparatus to which the present invention is applied.
FIG. 3 is a diagram illustrating a configuration example of the transmission device 1 of FIG. 2;
4 is a diagram illustrating a functional configuration example of a portion of the transmission apparatus 1 in FIG. 3 excluding a transmitter / recording apparatus 16. FIG.
FIG. 5 is a diagram showing a configuration of a mapping circuit 54;
6 is a diagram illustrating a configuration of an upper layer image update circuit 58. FIG.
7 is a diagram illustrating calculation of an optimal pixel value of a target pixel by an optimal pixel value determination circuit 102. FIG.
FIG. 8 is a diagram illustrating calculation of an optimum pixel value of a target pixel by an optimum pixel value determination circuit.
FIG. 9 is a diagram illustrating calculation of an optimum pixel value of a target pixel by an optimum pixel value determination circuit.
10 is a diagram showing a configuration of an optimum pixel value determination circuit 102. FIG.
11 is a diagram illustrating a configuration of an upper layer image change circuit 59. FIG.
12 is a diagram illustrating an example of pixel value change by a pixel value change circuit 152 and a change amount determination circuit 153. FIG.
13 is a diagram illustrating an example of pixel value change by a pixel value change circuit 152 and a change amount determination circuit 153. FIG.
14 is a diagram showing a configuration of a prediction coefficient update circuit 60. FIG.
FIG. 15 is a diagram showing a correspondence between the number of times of processing for updating or changing an upper layer image and the S / N of an image restored from the upper layer image.
FIG. 16 is a flowchart illustrating an encoding process.
FIG. 17 is a flowchart illustrating preprocessing.
FIG. 18 is a flowchart illustrating processing for generating an initial upper layer image.
FIG. 19 is a flowchart illustrating processing for generating an initial prediction coefficient.
FIG. 20 is a flowchart illustrating mapping processing.
FIG. 21 is a flowchart illustrating an upper layer image update process.
FIG. 22 is a flowchart illustrating processing for determining an optimal pixel value.
FIG. 23 is a flowchart illustrating processing for changing an upper layer image.
FIG. 24 is a flowchart illustrating another process of changing an upper layer image.
FIG. 25 is a flowchart illustrating processing for updating a prediction coefficient.
FIG. 26 is a diagram illustrating a functional configuration example of a reception device 4;
FIG. 27 is a flowchart illustrating a decoding process.
FIG. 28 is a diagram illustrating a configuration example of a transmission device 1 in a second embodiment.
29 is a diagram illustrating the configuration of an encoding circuit 304. FIG.
FIG. 30 is a diagram for describing an outline of encoding processing according to the second embodiment;
FIG. 31 is a flowchart illustrating an encoding process of the transmission device 1 according to the second embodiment.
FIG. 32 shows a configuration example of a transmission apparatus 1 in the third embodiment.
FIG. 33 is a diagram for describing an outline of an encoding process according to the third embodiment.
FIG. 34 is a flowchart illustrating an encoding process of the transmission device 1 according to the third embodiment.
FIG. 35 illustrates a configuration example of a transmission device 1 in a fourth embodiment.
[Fig. 36] Fig. 36 is a diagram for describing an overview of an encoding process in the fourth embodiment.
FIG. 37 is a flowchart for describing encoding processing of the transmission device 1 in the fourth embodiment.
38 is a diagram illustrating a configuration example of a transmission device 1 according to a fifth embodiment. FIG.
FIG. 39 is a flowchart for describing encoding processing of the transmission device 1 in the fifth embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Transmission apparatus, 2 Information recording medium, 3 Transmission path, 4 Reception apparatus, 14 CPU, 12 ROM, 13 RAM, 15 External storage device, 17 Magnetic disk, 18 Optical disk, 19 Magneto-optical disk, 20 Semiconductor memory, 54 Mapping circuit, 56 Convergence determination circuit, 57 Update number counter, 58 Upper layer image update circuit, 59 Upper layer image change circuit, 60 Prediction coefficient update circuit, 81 Class classification circuit, 82 Prediction tap extraction circuit, 83 Decoding circuit, 84 Lower layer image memory , 101 Upper layer image data memory, 102 Optimal pixel value determination circuit, 104 Target pixel determination circuit, 151 Upper layer image data memory, 152 Pixel value change circuit, 153 Change amount determination circuit, 154 Target pixel determination circuit, 171 Class classification circuit 172 Prediction tap extraction circuit, 17 3 teacher data extraction circuit, 174 prediction coefficient calculation circuit, 301 preprocessing circuit, 302 upper layer image memory, 303 prediction coefficient table memory, 304-1 to 304-N encoding circuit, 305-1 to 305-N mapping circuit, 306 Upper layer image change parameter generation circuit, 307 evaluation / selection / convergence determination circuit, 308 switcher, 309 counter, 331 prediction coefficient table memory, 332 upper layer image memory, 333 mapping circuit, 334 convergence determination circuit, 335 upper layer image update circuit , 336 Upper layer image change circuit, 337 Prediction coefficient update circuit, 351 Upper change / coefficient update circuit, 352 Upper update / coefficient update circuit, 401 Preprocessing circuit, 402 Upper layer image memory, 403 Prediction coefficient table memory, 404 encoding Road, 405 mapping circuit, 406 an upper layer image change parameter generating circuit, 407 evaluation determining-convergence judging circuit, 408 the optimum evaluation value storage register, 410 the optimum upper-layer image memory, 412 optimum prediction coefficient table memory, 415 counter

Claims (6)

An image encoding device for encoding an image, comprising:
Compression means for compressing the original image by reducing the amount of information;
Correction means for correcting the compressed data obtained by compressing the original image and generating correction data;
Changing the compressed data by calculating with a predetermined numerical value, changing means for generating the changed data,
Selecting means for selecting correction or change of the compressed data;
Prediction means for predicting the original image based on the correction data or the change data and generating a predicted value thereof;
Calculating means for calculating a prediction error of the predicted value with respect to the original image;
Determination means for determining appropriateness of the correction data or the change data based on the prediction error;
Output means for outputting the correction data or the change data as an encoding result of the original image corresponding to the determination result by the determination means;
Measuring means for measuring the number of times the compressed data has been corrected by the correction means as a correction number,
The image coding apparatus according to claim 1, wherein the changing process in the changing unit changes based on the number of corrections. The image coding apparatus according to claim 1, wherein the changing unit changes the compressed data by adding the numerical value that is a random number corresponding to a pixel of the compressed data. The image coding apparatus according to claim 1, wherein the changing unit changes the compressed data by adding the numerical value that is one constant to the compressed data. An image encoding method of an image encoding device for encoding an image, comprising:
A compression step of compressing the original image by reducing the amount of information;
A correction step of correcting the compressed data obtained by compressing the original image to generate correction data;
Changing the compressed data by calculating with a predetermined numerical value, a change step for generating changed data;
A selection step for selecting correction or change of the compressed data;
A prediction step of predicting the original image based on the correction data or the change data and generating a predicted value thereof;
A calculation step of calculating a prediction error of the predicted value with respect to the original image;
A determination step of determining appropriateness of the correction data or the change data based on the prediction error;
An output step for outputting the correction data or the change data as an encoding result of the original image in response to a determination result obtained by the determination step.
A measurement step of measuring the number of times the compressed data has been corrected in the correction step as a correction number,
The image encoding method, wherein the change process in the change step changes based on the number of corrections. A program for image encoding processing for encoding an image,
A compression step of compressing the original image by reducing the amount of information;
A correction step of correcting the compressed data obtained by compressing the original image to generate correction data;
Changing the compressed data by calculating with a predetermined numerical value, a change step for generating changed data;
A selection step for selecting correction or change of the compressed data;
A prediction step of predicting the original image based on the correction data or the change data and generating a predicted value thereof;
A calculation step of calculating a prediction error of the predicted value with respect to the original image;
A determination step of determining appropriateness of the correction data or the change data based on the prediction error;
An output step for outputting the correction data or the change data as an encoding result of the original image in response to a determination result obtained by the determination step.
A measurement step of measuring the number of times the compressed data has been corrected in the correction step as a correction number,
A recording medium on which a computer-readable program is recorded, wherein the changing process in the changing step changes based on the number of corrections. In an image processing system including an image encoding device that encodes an image and an image decoding device that decodes the encoded image,
The image encoding device includes:
Compression means for compressing the original image by reducing the amount of information;
Correction means for correcting the compressed data obtained by compressing the original image and generating correction data;
Changing the compressed data by calculating with a predetermined numerical value, changing means for generating the changed data,
Selecting means for selecting correction or change of the compressed data;
First prediction means for predicting the original image based on the correction data or the change data and generating a predicted value thereof;
Calculating means for calculating a prediction error of the predicted value with respect to the original image;
Determination means for determining appropriateness of the correction data or the change data based on the prediction error;
Output means for outputting the correction data or the change data as an encoding result of the original image corresponding to the determination result by the determination means;
Measuring means for measuring the number of times the compressed data has been corrected by the correction means as a correction number,
Based on the number of corrections, the changing process in the changing means changes,
The image decoding device includes:
An image processing system comprising: a second prediction unit that predicts the original image based on the correction data or the change data that is a result of encoding the original image and outputs the predicted value.

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