JP4252092B2 - Driving method of gas discharge device - Google Patents

Description

  The present invention relates to a method for driving a gas discharge device represented by PDP (Plasma Display Panel) and PALC (Plasma Addressed Liquid Crystal).

  PDP is becoming widespread as a large-screen television display device with the practical use of color display. As the screen becomes larger, it becomes more difficult to equalize the cell structure. Therefore, a driving method with a wide voltage margin that can allow variations in discharge characteristics is required.

  An AC type PDP having a three-electrode surface discharge structure has been commercialized as a color display device. This is because a pair of main electrodes (first and second electrodes) for maintaining lighting is arranged for each line (row) of the matrix display, and an address electrode as a third electrode for addressing is arranged for each column. It is arranged. In addressing, one main electrode (second electrode) is used for row selection. In the surface discharge structure, the phosphor layer for color display is disposed on the other substrate opposite to the substrate on which the main electrode pair is disposed, thereby reducing deterioration of the phosphor layer due to ion bombardment during discharge, Long life can be achieved. The “reflection type” in which the phosphor layer is disposed on the back side substrate is superior in light emission efficiency to the “transmission type” in which the phosphor layer is disposed on the front side substrate.

  For display, a memory function of a dielectric layer covering the main electrode is used. That is, addressing for forming a charged state according to display contents is performed in a line scanning format, and a lighting sustaining voltage Vs having an alternating polarity is applied to the main electrode pair of each line. The lighting sustaining voltage Vs satisfies the formula (1).

Vf−Vw <Vs <Vf (1)
Vf: discharge start voltage Vw: wall voltage lighting sustaining voltage Vs is applied, so that the cell voltage Vc (the sum of the applied voltage and the wall voltage, also referred to as effective voltage Veff) becomes the discharge start voltage Vf only in the cells where wall charges exist. A surface discharge is generated along the substrate surface. If the application period of the lighting sustaining voltage Vs is shortened, an apparently continuous lighting state can be obtained.

  The brightness of the display depends on the number of discharges per unit time. Therefore, the halftone is reproduced by setting the number of discharges in one field for each cell in accordance with the gradation level. The color display is a kind of gradation display, and the display color is determined by the combination of the luminances of the three primary colors. Note that “field” in this specification is a unit image for time-series image display. That is, in the case of television, it means each field of an interlace format frame, and in the case of a non-interlace format typified by computer output (which can be regarded as a one-to-one interlace format), it means the frame itself.

For gradation display by PDP, there is a method in which one field is composed of a plurality of subfields weighted with luminance (that is, the number of discharges), and the total number of discharges in one field is set according to the combination of the presence or absence of lighting in subfield units. Used. When the application period (drive frequency) of the lighting sustain voltage Vs is constant, the application time of the lighting sustain voltage Vs differs if the luminance weight is different. Basically, so-called “binary weighting” in which the weight is expressed by 2 ^q (q = 0, 1, 2, 3,...) Is performed on each subfield. For example, if the number of subfields k is 8, 256 (= 2 ⁸ ) gradations with gradation levels “0” to “255” can be displayed. Binary weighting has no redundancy in weight and is suitable for multi-gradation. However, the weight may be intentionally overlapped for the purpose of preventing the suspicious contour in the moving image display.

  In addition to the addressing period and the lighting sustain period, an addressing preparation period for equalizing the charged state for all cells is assigned to each subfield. This is because if the cells with remaining wall charges and the cells without remaining for lighting are mixed, it becomes difficult to control the discharge for addressing.

  Conventionally, an addressing preparation for making the entire screen almost uncharged by applying a voltage exceeding the discharge start voltage to all cells to generate a strong discharge has been performed. Excessive wall charges are formed in all cells by strong discharge. When the voltage application is stopped thereafter, self-erasing discharge due to the wall voltage occurs and the wall charge disappears. In the addressing period following the addressing preparation period, addressing is performed in which address discharge is caused only in the cells to be lit and new wall charges are formed in those cells.

  In the conventional driving method, wall charges are erased as preparation for addressing, and therefore it is necessary to set the addressing applied voltage in consideration of the variation in the discharge start voltage Vf for each cell due to subtle differences in the cell structure. It was. That is, there is a problem that a voltage margin that can be properly addressed is narrowed by the variation width of the discharge start voltage Vf.

  In addition, in the addressing preparation period, a strong discharge is generated not only in the cells that are lit in the subsequent lighting maintenance period but also in the cells that are not lit, so the background portion that occupies most of the screen is displayed especially when displaying a dark image as a whole. There was also a problem of an increase in background brightness that appeared bright and the contrast was reduced.

  Furthermore, since the polarity of the lighting sustain voltage Vs applied at the end of the lighting sustaining period is determined by the polarity of the voltage applied in the addressing preparation period, the number of discharges in the lighting sustaining period (that is, applied) for all subfields. It was necessary to unify the number of sustaining voltage pulses) to either odd or even. For this reason, the number of discharges of each subfield must be selected in units of 2 at a minimum, and fine brightness adjustment cannot be performed. Note that if the polarity of the sustaining voltage Vs is made different from that of the other subfields, the voltage applied to cause the self-erase discharge must be made extremely high, which becomes impractical.

  An object of the present invention is to eliminate a reduction in voltage margin due to variations in discharge start voltage and to improve driving reliability. Another object is to reduce background luminance and increase display contrast when displaying an image. Still another object is to relax the limitation on the polarity of the applied voltage and increase the degree of freedom of the drive sequence.

  In each of the plurality of electrode gaps that can generate discharge independently, regardless of the difference in the discharge start voltage, a predetermined drive voltage is applied to ensure that an appropriate intensity of discharge is generated. As a result, a wall voltage having a value corresponding to the level of the discharge start voltage is generated in each electrode gap. Thus, the effective voltage applied to each electrode gap when a predetermined drive voltage is applied can be set to a voltage higher than the discharge start voltage by a certain value. That is, the difference voltage between the effective voltage that determines the discharge intensity and the discharge start voltage is equalized, and the margin of the predetermined drive voltage is expanded.

  1 and 2 are principle diagrams of the present invention, and FIG. 3 is a waveform diagram showing current-voltage characteristics of a microdischarge according to the present invention.

  Between the pair of electrodes, as shown by a solid line in FIG. 1A, a voltage that rises “slowly” from the first set value (illustration is 0 volts) to the second set value Vr is applied. This voltage is referred to as a “charge adjustment voltage”. The exemplary charge adjustment voltage is a positive-polarity lamp voltage, but can be a negative-polarity voltage, and the waveform is not limited to a lamp.

  The value of the wall voltage between the electrodes at the start of application is Vwpr. As the applied voltage increases, the effective voltage gradually increases from Vwpr as shown in FIG. The first discharge occurs when a slight delay time elapses after the effective voltage reaches the discharge start voltage Vf. At this time, since the effective voltage is slightly higher than the discharge start voltage Vf, the discharge is weak and ends immediately. This is because the effective voltage becomes lower than the discharge start voltage Vf only by the disappearance of a small amount of wall charges. In this pulsed discharge, the wall voltage drop rate instantaneously exceeds the applied voltage rise rate, and the effective voltage temporarily drops. When the effective voltage drops, the value of dV / di (V is the effective voltage and i is the current) becomes negative (see FIG. 3). When the effective voltage, which has started to rise after the discharge is finished, exceeds the discharge start voltage Vf again as the applied voltage rises, a second discharge occurs. This discharge is weak and ends soon. Thereafter, during the period in which the charge adjustment voltage is applied, weak discharge (this is referred to as “micro discharge”) occurs periodically, and the wall voltage slightly decreases every time the micro discharge occurs. However, although the effective voltage periodically changes within a minute voltage range across the discharge start voltage Vf for each minute discharge from the time when the first minute discharge occurs until the application of the voltage is finished, the effective voltage is almost the discharge start voltage Vf. Retained. When the application of the charge adjustment voltage is finished, the effective voltage drops to the wall voltage value Vwr at the end of the final minute discharge. This value Vwr roughly corresponds to the difference between the discharge start voltage Vf and the maximum value Vr of the applied voltage, as represented by the equation (1).

Vwr = Vf−Vr (1)
If the wall voltage value Vwpr at the start of application is a value within a range in which discharge can be caused by applying a charge adjustment voltage in this manner to continuously cause a minute discharge, the structure of the electrode pair The wall charge amount can be adjusted so that a wall voltage having a value Vwr corresponding to the discharge start voltage Vf depending on the voltage Vf is generated.

  Here, “slow” means that the voltage change rate is a value within a range in which minute discharges continuously occur. The specific value of the upper limit of the range in which micro discharge occurs is, for example, about 10 [V / μs] in a commercialized PDP. As apparent from the equation (1), the wall voltage value Vwr at the end of application does not depend on the wall voltage value Vwpr at the start of application, but is determined by the setting of the maximum value Vr of the applied voltage. In addition, since the discharge gas is hardly excited and light emission does not occur or occurs in the minute discharge, the display contrast is not impaired even if the number of the minute discharges is large.

  In addition, as shown by a one-dot chain line in FIG. 1, when a rapidly rising voltage (including a rectangular waveform) is applied, the effective voltage when the discharge first occurs is significantly higher than the discharge start voltage Vf. Therefore, a strong discharge occurs and the polarity of the wall voltage is reversed. Therefore, thereafter, the effective voltage does not exceed the discharge start voltage Vf, and the discharge is performed only once. On the other hand, when a very gentle predetermined voltage whose rate of increase is smaller than the lower limit of the above-mentioned gentle range is applied, the effective voltage is close to the discharge start voltage Vf and does not exceed it. As the current continuously flows, the wall voltage gradually drops. The effective voltage and current are almost constant, and the value of dV / di is always positive. Although this phenomenon can be used to adjust the wall voltage, the time required to sufficiently lower the wall voltage is significantly longer than when a minute discharge is caused as in the present invention. The wall voltage adjustment can be completed in a shorter time in the present invention.

  Next, consider the case of applying a rectangular wave voltage having the same polarity as the charge adjustment voltage as shown in FIG. Assuming that the peak value (amplitude) of the rectangular wave voltage is Vp, the effective voltage Vc at the time of applying the rectangular wave voltage is ΔV (= Vp) than the discharge start voltage Vf of the electrode gap, as expressed by the equation (2). -Vr) is a different value. If ΔV is positive, discharge occurs, and if ΔV is negative, discharge does not occur.

Vc = Vwr + Vp
= Vf−Vr + Vp = Vf + ΔV (2)
ΔV: Vp−Vr
That is, by selecting the values of Vr and Vp, even if there is a difference in the discharge start voltages of the plurality of electrode gaps, the discharge intensities of all the electrode gaps are uniform. If the rectangular wave voltage is, for example, a pulse for addressing in driving the PDP, the voltage margin for addressing is expanded by adjusting the wall voltage by causing a minute discharge before the application of this pulse.

  In order to widen the voltage margin, it is necessary that the rectangular wave voltage and the charge adjustment voltage have the same polarity. When the polarity is reversed, the wall voltage changes so as to widen the difference in the discharge start voltage between the plurality of electrode gaps, and the voltage margin is narrowed.

  As described above, in order to cause a minute discharge to generate a wall voltage having a value corresponding to the level of the discharge start voltage, the wall voltage value Vwpr at the start of application of the charge adjustment voltage is higher than the value Vwr at the end of application. Must be. Therefore, when some or all of the wall voltages of the plurality of electrode gaps do not satisfy this condition, it is necessary to generate a wall voltage that satisfies the conditions in all the electrode gaps in advance. However, if continuous minute discharge occurs, the value Vwr does not depend on the level of the value Vwpr depending on the discharge start voltage Vf, and therefore it is not necessary to strictly control the value Vwpr.

  Here, it is assumed that a minute discharge is generated as preprocessing (addressing preparation) for addressing the PDP. In this case, a voltage having a polarity selected according to the polarity of the charge adjustment voltage is applied prior to the charge adjustment voltage after completion of the lighting maintenance of a certain subfield. This voltage is referred to as a “charge forming voltage”. It is possible to cause a discharge in all the cells, or it is possible to cause a discharge only in a cell having no wall charge (erased by the previous addressing). Thus, in the addressing preparation in which the voltage formation voltage and the charge adjustment voltage are applied twice in total, unlike the conventional case where the wall charge is erased by one voltage application, the lighting maintenance end stage. It is possible to generate a desired wall voltage in all the cells regardless of the polarity of the wall voltage. Therefore, it is not necessary to equalize the number of discharges in the lighting sustain period of all subfields, and the weighting of luminance can be optimized by setting the number of discharges of each subfield in units of one. Further, since it does not cause an excessive wall voltage that causes a self-erasing discharge, the amount of wall charge movement in the discharge due to the application of the charge forming voltage is small and the emission intensity is small. That is, the contrast is improved as compared with the conventional case.

The method of the invention of claim 1 has a first and second main electrode in which each cell forms an electrode pair to generate a surface discharge, and an address electrode facing the first and second main electrodes. A method of driving a gas discharge device having a plurality of cells, wherein a frame having a gray level is displayed by repeating at least two subfields, each subfield including an address preparation period, an address period, and a sustain period, and The frame includes at least one subfield in which the last sustain pulse of the sustain period is applied to the first main electrode, and at least one subfield in which the last sustain pulse of the sustain period is applied to the second main electrode. Each of the plurality of cells in each address preparation period of at least the two subfields. During serial and between the second main electrode of said first main electrode and the second main electrode and between the address electrode, the first main electrode and the address electrode side the second main electrode side becomes positive electrode By applying a first voltage pulse that is a negative electrode and a second voltage pulse that is a negative electrode on the second main electrode side and a positive electrode on the first main electrode and the address electrode side , respectively, A discharge is generated between the second main electrode and between the second main electrode and the address electrode to form charges for the plurality of cells and adjust the formed charges.

According to a second aspect of the present invention, the number of sustain pulses in each sustain period of at least the two subfields is set in units of one.

4. The method according to claim 3, wherein the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode in the address preparation period is: A voltage pulse having a ramp waveform in which the potential difference between the applied electrodes monotonously increases with time.

5. The method according to claim 4, wherein the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode in the address preparation period is: A voltage pulse having a staircase waveform in which the potential difference between the applied electrodes increases stepwise with time.

6. The method according to claim 5, wherein the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode in the address preparation period is: A voltage pulse having an obtuse waveform in which the potential difference between the applied electrodes monotonously increases with time.

  According to the present invention, the restriction on the polarity of the applied voltage is relaxed, and the degree of freedom of the drive sequence is increased.

  FIG. 4 is a configuration diagram of the plasma display device 100 according to the present invention.

  The plasma display device 100 includes an AC type PDP 1 which is a thin color display device in a matrix format, and a driving unit 80 for selectively lighting a large number of cells C arranged vertically and horizontally that constitute an m-column n-line screen ES. And is used as a wall-mounted television receiver, a computer system monitor, and the like.

  In the PDP 1, first and second main electrodes X and Y forming an electrode pair for generating a lighting sustain discharge (also referred to as a display discharge) are arranged in parallel, and in each cell C, the main electrodes X and Y and the third electrode This is a PDP having a three-electrode surface discharge structure in which an address electrode A as an electrode intersects. The main electrodes X and Y extend in the line direction (horizontal direction) of the screen ES, and the second main electrode Y is used as a scan electrode for selecting the cell C for each line at the time of addressing. The address electrode A extends in the column direction (vertical direction), and is used as a data electrode for selecting the cell C for each column. A range where the main electrode group and the address electrode group intersect on the substrate surface is a display area (that is, a screen ES).

  The drive unit 80 includes a controller 81, a data processing circuit 83, a power supply circuit 84, an X driver 85, a scan driver 86, a Y common driver 87, and an address driver 89. The drive unit 80 is disposed on the back side of the PDP 1, and each driver and the electrode of the PDP 1 are electrically connected by a flexible cable (not shown). The drive unit 80 receives field data DF in units of pixels indicating luminance levels (gradation levels) of R, G, and B colors from various external devices such as a TV tuner and a computer together with various synchronization signals.

  The field data DF is temporarily stored in the frame memory 830 in the data processing circuit 83, and then converted into subfield data Dsf for gradation display by dividing the field into a predetermined number of subfields as described later. . The subfield data Dsf is stored in the frame memory 830 and transferred to the address driver 89 at an appropriate time. The value of each bit of the subfield data Dsf is information indicating whether or not the cells need to be turned on in the subfield, strictly speaking, information indicating whether or not address discharge is necessary.

  The X driver 85 applies a driving voltage to all the main electrodes X at once. The electrical sharing of the main electrode X is not limited to the connection on the panel as shown in the figure, but can be performed by the internal wiring of the X driver 85 or the wiring on the connection cable. The scan driver 86 individually applies a drive voltage to each main electrode Y in addressing. The Y common driver 87 applies a driving voltage to all the main electrodes Y at the same time when maintaining lighting. The address driver 89 selectively applies a driving voltage to a total of m address electrodes A in accordance with the subfield data Dsf. These drivers are supplied with predetermined power from a power supply circuit 84 via a wiring conductor (not shown).

  FIG. 5 is a perspective view showing the internal structure of the PDP 1.

  In the PDP 1, a pair of main electrodes X and Y are arranged for each row on the inner surface of the glass substrate 11 which is a base material of the front substrate structure. A row is a horizontal cell column on the screen. The main electrodes X and Y each consist of a transparent conductive film 41 and a metal film (bus conductor) 42 and are covered with a dielectric layer 17 made of low melting point glass and having a thickness of about 30 μm. A protective film 18 made of magnesia (MgO) and having a thickness of several thousand angstroms is provided on the surface of the dielectric layer 17. The address electrodes A are arranged on the inner surface of the glass substrate 21 which is a base material of the back side substrate structure, and are covered with a dielectric layer 24 having a thickness of about 10 μm. On the dielectric layer 24, one partition wall 29 having a height of 150 μm in a straight line in plan view is provided between the address electrodes A. These partition walls 29 divide the discharge space 30 into sub-pixels (unit light-emitting regions) in the row direction, and the gap size of the discharge space 30 is defined. Then, phosphor layers 28R, 28G, and 28B of three colors R, G, and B for color display are provided so as to cover the inner surface on the back side including the upper side of the address electrode A and the side surface of the partition wall 29. ing. The discharge space 30 is filled with a discharge gas in which xenon is mixed with neon as a main component, and the phosphor layers 28R, 28G, and 28B are locally excited by ultraviolet rays emitted by xenon during discharge and emit light. One pixel (pixel) for display is composed of three sub-pixels arranged in the row direction. A structure in each sub-pixel is a cell (display element) C. Since the arrangement pattern of the barrier ribs 29 is a stripe pattern, the portion corresponding to each column in the discharge space 30 extends across all rows L in the column direction.

  Hereinafter, a method for driving the PDP 1 in the plasma display device 100 will be described. First, the outline of the gradation display and the drive sequence will be described, and then the applied voltage unique to the present invention will be described in detail.

  FIG. 6 is a diagram showing a field configuration.

In the display of a television image, in order to perform gradation reproduction by binary lighting control, each time-series field f that is an input image (the subscript of the code represents the display order) is, for example, eight subframes sf1. , Sf2, sf3, sf4, sf5, sf6, sf7, sf8. In other words, each field f constituting the frame is replaced with a set of eight subframes sf1 to sf8. Note that when a non-interlaced image such as a computer output is reproduced, each frame is divided into eight. Then, the number of sustain discharges in each subfield sf1 to sf8 is set by weighting so that the relative ratio of luminance in these subfields sf1 to sf8 is approximately 1: 2: 4: 8: 16: 32: 64: 128. To do. Since 256 levels of luminance can be set for each color of RGB by a combination of lighting / non-lighting in subfield units, the number of colors that can be displayed is 256 ³ . However, it is not necessary to display the subfields sf1 to sf8 in order of luminance weight. For example, optimization can be performed such that the subfield sf8 having a large weight is arranged in the middle of the field period Tf.

Subfield period Tsf _j to be allocated to each subfield sf _{j (j} = 1~8) of the present invention for addressing preparation period TR for performing specific charge adjustment, addressing period TA for forming a charge distribution corresponding to display contents, and It consists of a sustain period TS in which the lighting state is maintained in order to ensure the luminance according to the gradation level. In each subfield period Tsf _j , the length of the addressing preparation period TR and the addressing period TA is constant regardless of the luminance weight, but the length of the sustain period TS is longer as the luminance weight is larger. In other words, the length of the eight subfield periods Tsf _j corresponding to one field f are different from each other.

  FIG. 7 is a voltage waveform diagram showing a first example of the drive sequence. In the figure, characters (1, 2,... N) indicating the corresponding row arrangement order are attached to the codes of the main electrodes X and Y, and characters (1) indicating the arrangement order of the corresponding columns are assigned to the code of the address electrode A. ~ M). The same applies to other drawings described below.

  The outline of the driving sequence repeated for each subfield is as follows. In the addressing preparation period TR, the pulse Pra1 and the pulse Pra2 having the opposite polarity are sequentially applied to all the address electrodes A1 to Am, and the pulse Prx1 and the opposite polarity are applied to all the main electrodes X1 to Xn. The pulse Prx2 is sequentially applied, and the pulse Pry1 and the pulse Pry2 having the opposite polarity are sequentially applied to all the main electrodes Y1 to Yn. The application of a pulse here means that the electrode is temporarily biased to a potential different from a reference potential (for example, ground potential). In this example, the pulses Pra1, Pra2, Prx1, Prx2, Pry1, Pry2 are ramp voltage pulses having a change rate at which a minute discharge occurs. Further, the pulses Pra1 and Prx1 have a negative polarity, and the pulse Pry1 has a positive polarity.

  The application of the pulses Pra2, Prx2, Pry2 corresponds to the application of the charge adjustment voltage described in FIG. The pulses Pra1, Prx1, Pry1 are applied to generate appropriate wall voltages for the “previously lit cells” that are lit in the previous subfield and the “previously unlit cells” that are not lit. The application of the pulses Pra1, Prx1, Pry1 corresponds to the application of a charge forming voltage.

  In the addressing period TA, each row is selected one by one in order, and the scan pulse Py is applied to the corresponding main electrode Y. Simultaneously with the selection of the row, an address pulse Pa having a polarity opposite to that of the scan pulse Py is applied to the address electrode A corresponding to the cell in which the address discharge is to occur. In the case of the write address format, the address pulse Pa is applied to the cell to be lit (currently lit cell), and conversely, in the case of the erase address format, the address pulse Pa is applied to the cell that should not be lit (currently unlit cell). Although the present invention is applicable to either address format, the drive sequence illustrated in FIG. 7 is a write address format.

In the cell to which the scan pulse Py and the address pulse Pa are applied, a discharge occurs between the address electrode A and the main electrode Y, and this also triggers a discharge between the main electrodes X and Y. The address discharge, which is a series of these discharges, includes a discharge start voltage Vf _AY between the address electrode A and the main electrode Y (hereinafter referred to as the electrode gap AY) and the main electrodes X and Y (hereinafter referred to as the electrode gap XY). The discharge start voltage Vf _XY . Therefore, in the addressing preparation period TR described above, the wall voltage is adjusted for both the electrode gap XY and the electrode gap AY.

  In the sustain period TS, first, a sustain pulse Ps having a predetermined polarity (positive polarity in the example) is applied to all the main electrodes Y1 to Yn. Thereafter, a sustain pulse Ps is alternately applied to the main electrodes X1 to Xn and the main electrodes Y1 to Yn. In this example, the final sustain pulse Ps is applied to the main electrodes X1 to Xn. By applying the sustain pulse Ps, a surface discharge is generated in the currently lit cell in which wall charges remain in the addressing period TA. Then, every time surface discharge occurs, the polarity of the wall voltage between the electrodes is reversed. Note that all address electrodes A1 to Am are biased to the same polarity as the sustain pulse Ps in order to prevent unnecessary discharge over the sustain period TS.

  FIG. 8 is a waveform diagram of applied voltage and wall voltage corresponding to FIG. In the figure, the change rate and the maximum value of the lamp voltage are illustrated.

The action of pulse application in the addressing preparation period TR varies depending on the lighting state of the previous subfield.
[Previous unlit cell]
First, in the previous non-lighting cell, the wall voltage Vws _XY of the electrode gap _XY and the wall voltage Vws _AY of the electrode gap AY at the start of the addressing preparation period TR are substantially zero as shown by the chain line in the figure. Therefore, in the application of the pulses Prx1, Pry1, and Pra1, a minute discharge starts when the applied voltage exceeds the discharge start voltages Vf _XY and Vf _AY of the electrode gaps XY and AY. To generate discharge in the last non-lighted cell, the maximum value Vpr _AY maximum value Vpr _XY and the voltage applied to the electrode gap AY of the voltage applied to the electrode gap XY is (3) (4) must a met expression.

Vpr _XY > Vf _XY (3)
Vpr _AY > Vf _AY (4)
Numerical values enclosed in parentheses in the figure are specific values when Vf _XY = 220 ± α volts and Vf _AY = 170 ± β volts. In the example, Vpr _XY is 270 (= 170 + 100) volts, and Vpr _AY is 220 (= 120 + 100).

When the wall voltage of the electrode gap XY at the end of application of the pulses Prx1, Pry1, and Pra1 is Vwpr _XY, and the wall voltage of the electrode gap AY at the same point is Vwpr _AY , equations (5) and (6) are established.

Vwpr _XY = Vpr _XY -Vf _XY (5)
Vwpr _AY = Vpr _AY -Vf _AY (6)
Pulse Prx 1, Pry1, PRA1 followed by pulse Prx2, Pry2, Pra2 condition discharge occurs when applying a is the maximum value of the voltage applied to the electrode gap XY and Vr _XY, the maximum value of the voltage applied to the electrode gap AY Vr _AY is expressed by equations (7) and (8).

Vr _XY + Vwpr _XY > Vf _XY (7)
Vr _AY + Vwpr _AY > Vf _AY (8)
When the wall voltage of the electrode gap XY at the end of application of the pulses Prx2, Pry2 and Pra2 is Vwr _XY, and the wall voltage of the electrode gap AY is Vwr _AY , equations (9) and (10) are established.

Vwr _XY = Vf _XY -Vr _XY (9)
Vwr _AY = Vf _AY -Vr _AY (10)
Note that when the values of Vr _XY and Vr _AY exceed the discharge start voltage, the polarity of the wall voltage changes. In the case of the write address format, the wall voltage Vwr _XY must be a sufficiently small value so that no discharge occurs in the sustain period TS. In addition, since the discharge should not occur in the electrode gap AY except for the cells to which the address pulse Pa and the scan pulse Py are simultaneously applied in the addressing, the value of the wall voltage Vwr _AY must be sufficiently small.

The values of the wall voltages Vwr _XY and Vwr _AY can be set near zero. Since there is a variation in the discharge start voltage of the cell, the value is about the variation, but it is a small value. As is clear from the equations (7) to ( 10 ), the wall voltage has the relationship of equations (11) and (12).

Vwpr _XY > Vwr _XY (11)
Vwpr _AY > Vwr _AY (12)
Therefore, if the values of Vwr _XY and Vwr _AY are small, the values of Vwpr _XY and Vwpr _AY can be set small. If the values of Vwr _XY , Vwr _AY , Vwpr _XY , and Vwpr _AY are small, the amount of wall voltage change in the discharge for charge formation and the discharge for charge adjustment is small, and the light emission amount is also small.
[Last light cell]
On the other hand, for the previously lighted cell, the polarity of the wall voltage is inverted by the pulses Prx1, Pry1, and Pra1. Since the wall charge near the address electrode A is almost zero at the start of the addressing preparation period TR, the wall voltage Vws _AY of the electrode gap AY at this time is half of the wall voltage Vws _XY of the electrode gap XY.

Since the polarities of the wall voltages Vws _XY and Vws _AY at the start of the addressing preparation period TR are the same as the polarities of the voltages applied by the pulses Prx1, Pry1, and Pra1, the expressions (3) and (4) must be satisfied. If this happens, discharge will occur. If a discharge occurs, the wall voltage after the application of the pulses Prx1, Pry1, and Pra1 is the same as the previous non-lighting cell, and the transition of the wall voltage due to the application of the pulses Prx2, Pry2, and Pra2 is the same as the previous non-lighting cell. is there.

  FIG. 9 is a voltage waveform diagram showing a second example of the drive sequence.

  By comparing this example with the example of FIG. 7, it can be seen that there is no restriction on the number of sustain pulses Pa. That is, in the example of FIG. 7 described above, the final sustain pulse Pa in the sustain period TS is applied to the main electrodes X1 to Xn, but in this example is applied to the main electrodes Y1 to Yn. That is, the polarity of the wall voltage at the end of the sustain period TS is opposite to the example of FIG. However, in the addressing preparation period TR, pulses Prx1, Pry1, Pra1, Prx2, Pry2, and Pra2 having the same conditions as in the example of FIG. 7 are applied.

  FIG. 10 is a waveform diagram of applied voltage and wall voltage corresponding to FIG.

  The transition of the wall voltage in the previous non-lighting cell is the same as in FIG. In the previously lit cell, depending on the selection of the maximum values of the pulses Prx1, Pry1, and Pra1, there are cases where discharge occurs and does not occur. In the figure, the transition of the wall voltage when a discharge occurs is indicated by a broken line, and the transition of the wall voltage when no discharge occurs is indicated by a solid line.

  Conditions under which discharge occurs in the electrode gaps XY and AY are expressed by equations (13) and (14).

Vpr _XY -Vws _XY > Vf _XY (13)
Vpr _AY -Vws _AY > Vf _AY (14)
The wall voltages Vwpr _XY and Vwpr _AY at the end of the application of the pulses Prx1, Pry1, and Pra1 are different depending on whether the discharge is caused or not caused by the application of the pulses Prx1, Pry1, and Pra1, (15) (15 ′) ( 16) It is expressed by the equation (16 ′).

Vwpr _XY = Vpr _XY −Vf _XY [When discharge occurs] (15)
Vwpr _XY = Vws _XY [When no discharge occurs] (15 ′)
Vwpr _AY = Vpr _AY -Vf _AY [When discharge occurs] (16)
Vwpr _AY = Vws _AY [When no discharge occurs] (16 ')
However, Expressions (17) and (18) hold regardless of whether or not there is discharge due to application of the pulses Prx1, Pry1, and Pra1.

Vwpr _XY ≧ Vpr _XY −Vf _XY (17)
Vwpr _AY ≧ Vpr _AY −Vf _AY (18)
Therefore, considering the equations (5) to (8), it can be seen that discharge is always caused by application of the pulses Prx2, Pry2, and Pra2.

  FIG. 11 is a voltage waveform diagram showing a third example of the drive sequence. The first example and the second example described above are driving examples of an address address format that causes an address discharge in a currently lit cell, but the present invention is also applied to an erase address format that causes an address discharge in a non-lighted cell this time. can do.

  The difference from the drive sequences of FIGS. 7 and 9 is the application target of the first sustain pulse Ps in the sustain period TS. In the erase address format, since the negative charges are accumulated in the main electrodes Y1 to Yn and the positive wall charges are accumulated in the main electrodes X1 to Xn at the end of the addressing period TA, the sustain pulse Ps is first applied to the main electrode. 1 to Xn. Conversely, when the sustain pulse Ps has a negative polarity, it is applied to the main electrodes Y1 to Yn. In the illustrated example, the final sustain pulse Ps is applied to the main electrodes 1 to Xn, but may be applied to the main electrodes Y1 to Yn. Even in the erase address format, the number of sustain pulses Pa can be set in units of one for each subfield.

The change in the wall voltage during the addressing preparation period TR is the same as in the first and second examples. However, the electrode gap XY wall voltage Vwr _XY at the end of the address preparation period TR is, must be of sufficient value to the lighting maintained. The polarity of the wall charge is negative on the main electrode Y. The wall voltage Vwpr _XY is also increased in accordance with the wall voltage Vwr _XY .

  FIG. 12 is a voltage waveform diagram showing a fourth example of the drive sequence.

In the addressing preparation period TR, a rectangular wall-shaped pulse Pry1 ′ is applied to all the main electrodes Y1 to Yn prior to charge adjustment by the pulses Prx2, Pry2, and Pra2, thereby generating a predetermined wall voltage in all the cells. . The peak value of the pulse Pry1 ′ is set so as to exceed the discharge start voltages Vf _XY and Vf _AY .

  FIG. 13 is a waveform diagram of applied voltage and wall voltage corresponding to FIG.

In the previous non-lighting cell, one discharge occurs by the application of the pulse Pry1 ′. This discharge generates wall voltages Vwpr _XY and Vwpr _AY . Changes in the wall voltage after application of the pulses Prx2, Pry2, and Pra2 are the same as in the first example. However, in the case of erasing address format, pulse Prx2, Pry2, the wall voltage Vwr _XY applied at the end of Pra2 must set the peak value of sufficiently large so as to pulse Pry1 '.

In the previously lit cell, no discharge occurs due to the application of the pulse Pry1 ′. This is because the polarity of the wall voltage Vws _XY at the time of application is opposite to that of the pulse Pry1 ′. Therefore, this is the same as the case where no discharge occurs in the pulses Prx1, Pry1, and Pra1 in the second example, and the equations (19) and (20) are established.

Vwpr _XY = Vws _XY (19)
Vwpr _AY = Vws _AY (20)
FIG. 14 is a waveform diagram of the applied voltage and wall voltage of the modification of FIG.

Since Vws _XY is large enough to maintain lighting, there is no problem even if the erase address format is adopted. That is, as shown in FIG. 14, even when the polarity of the wall voltage at the end of the sustain period TS is opposite to the example of FIG. 13, appropriate addressing preparation is possible. However, discharge occurs in the previously lighted cell by applying the pulse Pry1 ′. The change in the wall voltage of the previously unlit cell does not depend on the polarity of the wall voltage at the end of the sustain period TS.

  FIG. 15 is a diagram showing a first modification of the drive waveform.

  It is not always necessary to increase the voltage applied to cause a minute discharge from zero at a constant rate of change. Since the discharge does not occur until the applied voltage reaches the discharge start voltage Vf, the cell voltage rapidly rises to the set value Vq within a range not exceeding the discharge start voltage in consideration of the wall voltage, and then gradually decreases to the set value Vr. A rising voltage may be applied. As illustrated, for example, when a voltage having a rectangular waveform is applied to the main electrode X and a voltage having a ramp waveform is applied to the other main electrode Y, the combined applied voltage of the electrode gap XY becomes a trapezoidal waveform.

  FIG. 16 is a diagram showing a second modification of the drive waveform.

  A minute discharge can be caused by applying a voltage having an obtuse waveform instead of the lamp voltage. However, the cell voltage must not reach the discharge start voltage before the voltage rise becomes slow.

  FIG. 17 is a diagram showing a third modification of the drive waveform.

  Instead of the lamp voltage, a voltage having a staircase waveform having a minute step can be applied to cause a minute discharge. The magnitude of the minute discharge can be controlled by setting the step.

  In the above embodiment, the PDP 1 having a structure in which the main electrodes X and Y and the address electrode A are covered with a dielectric is used as a driving target. However, the present invention can also be applied to a structure in which only one of the paired electrodes is covered with a dielectric. For example, an appropriate wall voltage can be generated in the electrode gaps XY and AY even if there is no dielectric covering the address electrode A or a structure in which one of the main electrodes X and Y is exposed to the discharge space 30. The polarity, the value, the application time, and the rate of change of the applied voltage are not limited to the examples. The present invention is applicable not only to display devices including PDP and PALC, but also to other gas discharge devices having a structure in which wall charges are related to discharge. There is no need to cause a gas discharge for display.

  According to the above embodiment, the reduction of the voltage margin due to the variation in the discharge start voltage can be eliminated, and the driving reliability can be improved. In the case of displaying an image, the background luminance can be reduced and the display contrast can be increased. Furthermore, the restriction on the polarity of the applied voltage can be relaxed and the degree of freedom of the drive sequence can be increased.

It is a principle diagram of the present invention. It is a principle diagram of the present invention. It is a wave form diagram which shows the electric current-voltage characteristic of the micro discharge based on this invention. It is a block diagram of the plasma display apparatus which concerns on this invention. It is a perspective view which shows the internal structure of PDP. It is a figure which shows a field structure. It is a voltage waveform diagram which shows the 1st example of a drive sequence. FIG. 8 is a waveform diagram of an applied voltage and a wall voltage corresponding to FIG. 7. It is a voltage waveform diagram which shows the 2nd example of a drive sequence. FIG. 10 is a waveform diagram of applied voltage and wall voltage corresponding to FIG. 9. It is a voltage waveform diagram which shows the 3rd example of a drive sequence. It is a voltage waveform diagram which shows the 4th example of a drive sequence. FIG. 13 is a waveform diagram of applied voltage and wall voltage corresponding to FIG. 12. It is a wave form diagram of the applied voltage and wall voltage of the modification of FIG. It is a figure which shows the 1st modification of a drive waveform. It is a figure which shows the 2nd modification of a drive waveform. It is a figure which shows the 3rd modification of a drive waveform.

Explanation of symbols

1 PDP (gas discharge device)
X Main electrode (electrode)
Y Main electrode (scan electrode)
A Address electrode (data electrode)
Vq Voltage value (first set value)
Vr voltage value (second set value)
C cell Vw wall voltage ES display screen Pra2, Prx2, Pry2 pulse (voltage applied in charge adjustment)
Pra1, Prx1, Pry1 pulse (ramp waveform voltage pulse)
Play1 'pulse (rectangular waveform voltage pulse)
f field sf1-8 subfield

Claims (5)

A gas discharge device having a plurality of cells each having a first and second main electrode in which each cell forms an electrode pair to generate a surface discharge and an address electrode facing the first and second main electrodes A driving method comprising:
A frame having a gray level is displayed by repeating at least two subfields, and each subfield includes an address preparation period, an address period, and a sustain period, and the frame includes a first sustain pulse in a sustain period. Comprising at least one subfield applied to the main electrode of the second and at least one subfield in which the last sustain pulse of the sustain period is applied to the second main electrode;
At least in each address preparation period of the two subfields, between the first main electrode and the second main electrode of the plurality of cells and between the second main electrode and the address electrode. The first voltage pulse in which the second main electrode side is a positive electrode and the first main electrode and address electrode side is a negative electrode, and the second main electrode side is a negative electrode and the first main electrode and address electrode side are a positive electrode . 2 voltage pulses, respectively, to generate a discharge between the first main electrode and the second main electrode and between the second main electrode and the address electrode, respectively. A method for driving a gas discharge device, comprising: forming charges for a plurality of cells and adjusting the formed charges. The method of driving a gas discharge device according to claim 1, wherein the number of sustain pulses in each sustain period of at least the two subfields is set in units of one. In the address preparation period, the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode is between the applied electrodes. The method for driving a gas discharge device according to claim 1, wherein the potential difference is a voltage pulse having a ramp waveform that monotonously increases with time. In the address preparation period, the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode is between the applied electrodes. The method of driving a gas discharge device according to claim 1, wherein the potential difference is a stepped waveform voltage pulse that gradually increases with time. In the address preparation period, the second voltage pulse applied between the first main electrode and the second main electrode and between the second main electrode and the address electrode is between the applied electrodes. The method for driving a gas discharge device according to claim 1, wherein the potential difference is a voltage pulse having an obtuse waveform that monotonously increases with time.

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