JP4235516B2 - X-ray image reading apparatus and method, and X-ray imaging apparatus - Google Patents

Description

  The present invention relates to drive control of an imaging apparatus that performs imaging of a subject using radiation.

  In recent years, so-called flat panel sensors have emerged as X-ray digital imaging devices. These sensors have the potential to replace conventional imaging systems that use film, and are expected to expand over a wide range in the future because they directly output X-digitized data. Many of such flat panel sensors mainly use amorphous silicon, and there is a demand for higher sensitivity and higher SN as well as an increase in shooting area and higher definition.

On the other hand, in recent years, there has been a demand for further downsizing of the photographing unit, for example, a cassette-type photographing unit has been proposed (see Patent Document 1). The photographing unit contains the above-described flat panel sensor, its driving system circuit, signal detection system circuit, digital system circuit, power supply system circuit, and the like. Among these configurations, the power supply system circuit is particularly a bottleneck for downsizing the photographing unit. Since the power supply system circuit normally obtains electric power from a commercial AC power supply and includes a transformer for converting from AC to DC, the entire circuit becomes large. Therefore, it is impossible to reduce the size by mounting such a power supply system circuit in the photographing unit. Therefore, a method has been proposed in which a power supply circuit portion for converting AC to DC is disconnected from the photographing unit, a predetermined DC voltage is generated as a separate power supply unit, and supplied to the photographing unit via a power cable of several meters.
JP 2003-248060 A

  In the photographing unit, it is necessary to supply different DC voltages to several circuits as described above. Generating these voltages in the above-mentioned separate power supply unit and supplying them to the imaging unit is problematic for practical applications such as cable drop voltage and noise superimposition when the power cable length is several meters or more. There are many points. For this reason, the power supply unit unifies with a relatively high DC voltage and supplies power, and a switching power supply (hereinafter referred to as SW power supply) such as a DC / DC power supply is provided in the photographing unit to generate various voltages. The method of supplying to each circuit is taken. The DC / DC power supply has been reduced in size due to recent technological advances, but on the other hand, since it is a SW power supply, conductive and radioactive noise is generated. In particular, leakage magnetic field noise, which is radioactive noise, is magnetically coupled to a detection system including peripheral circuits, particularly flat panel sensors and amplifier ICs, to generate an inductive noise voltage, which seriously affects image quality. I am involved.

  In addition, in order to reduce the size of the photographing unit, the DC / DC power supply itself must be reduced in size, but the flat panel sensor and other peripheral circuits described above must be arranged closer to the DC / DC power supply. Become. In other words, with the recent miniaturization of the imaging unit, the spatial distance between the built-in power supply and the sensor and its peripheral circuits has become shorter, and electromagnetic coupling, especially leakage magnetic field noise from DC / DC power supplies. The sensor is easily affected by the above. For this reason, for example, there is a problem that noise is superimposed on the readout signal from the sensor and line noise is generated on the image. Therefore, noise countermeasures for DC / DC power supplies are an indispensable issue.

  In general, as countermeasures for suppressing electromagnetic wave noise such as a leakage magnetic field from the SW power supply, countermeasures such as laying wiring, countermeasures at the component level such as a transformer, and countermeasures such as shielding the entire power supply to prevent magnetic field leakage are implemented. However, the effect is not sufficient only by measures against the laying line. Further, it is difficult to contain the leakage magnetic field by the magnetic field shield, and it is difficult to reduce the size and weight. Further, as countermeasures at the component level, for example, noise can be reduced by blunting the switching waveform. However, the conversion efficiency is lowered, and the loss of efficiency also causes heat generation. Therefore, due to problems such as size, shape, weight, cost, and heat, it has been difficult to prevent the influence of the leakage magnetic field while downsizing the entire apparatus.

  The present invention has been made in view of the above problems, and even when a switching power supply such as a DC / DC power supply is mounted in a photographing unit, the influence of noise is reduced and a stable image is provided. The purpose is to make it possible.

In order to achieve the above object, an image reading apparatus according to the present invention comprises the following arrangement. That is,
A switching power supply for supplying power,
A detector array in which detectors are arranged in two dimensions;
Reading out signals from each detector via column signal lines connected to the detector in units of rows in the detector array, and holding the read signals in the holding units corresponding to the column signal lines Means,
In synchronization with the reference clock of the switching power supply, the row to be read in the reading means is switched at a cycle that is an integral multiple of the reference clock, and the holding timing of the signal by the holding unit is determined in advance from switching of the row to be read. A control means for setting the holding timing to a predetermined phase in the row switching cycle by setting the time at which a predetermined time has elapsed ,
Under the control of the control means, an X-ray image and a correction dark image are read by the reading means, and offset correction means for performing offset correction on the X-ray image using the correction dark image is provided .

  In addition, according to the present invention, an X-ray imaging apparatus provided with an X-ray generator and the image reading apparatus is provided.

  According to the present invention as described above, even when a switching power source such as a DC / DC power source is mounted in the photographing unit, it is possible to reduce the influence of noise and provide a stable image.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[1] Configuration of X-ray Imaging System FIG. 1 is a block diagram showing the configuration of the X-ray imaging system according to the present embodiment. In FIG. 1, 10 is an X-ray room, 12 is an X-ray control room, and 14 is a diagnostic room.

  In the X-ray room 10, an X-ray generator 40 for generating X-rays and an X-ray detector 52 as an imaging unit are placed. The X-ray generator 40 narrows the X-ray beam generated by the X-ray tube 42 that generates X-rays, the high-voltage power supply 44 that drives the X-ray tube 42, and the X-ray tube 42 to a desired imaging region. A line stop 46 is provided.

  The X-ray detector 52 detects an X-ray beam generated from the X-ray generator 40 and transmitted through the subject 50, and includes a grid 54, a scintillator 56, a photodetector array 58, and an X-ray exposure monitor 60. A driver 62 and a DC / DC power source 902. The grid 54 includes an X-ray low-absorption member and an X-ray high-absorption member (for example, has a stripe structure of Al and Pb), and reduces the influence of scattered X-rays generated by passing through the subject 50. Note that X-ray irradiation may be performed while moving the grid 54 so that moire does not occur due to the relationship of the lattice ratio between the photodetector array 58 and the grid 54.

The scintillator 56 converts the X-rays into visible light by exciting (absorbing) the host substance of the phosphor with high-energy X-rays and generating fluorescence in the visible region by the recombination energy. The fluorescence of the scintillator 56, due to maternal itself such as CaWO ₄ or CdWO ₄ or, CsI: T1 or ZnS: is by luminescence center substance added to the inside base such as Ag. The photodetector array 58 is a two-dimensional arrangement of photodetectors, and converts visible light output from the scintillator 56 into an electrical signal. A so-called flat panel sensor is formed by the scintillator 56 and the photodetector array 58. The X-ray exposure monitor 60 is arranged for the purpose of monitoring the X-ray transmission amount. The X-ray exposure monitor 60 may detect X-rays directly using a crystalline silicon light receiving element or the like, or may detect fluorescence by the scintillator 56. In this embodiment, the X-ray exposure monitor 60 is composed of an amorphous silicon light receiving element formed on the back surface of the substrate of the photodetector array 58.

  The driver 62 drives the photodetector array 58 under the control of the imaging controller 24 and reads a signal from each photodetector. Details of operations of the photodetector array 58 and the driver 62 will be described later. The DC / DC power source 902 converts the DC voltage from the AC / DC power source 903 into one or a plurality of types of voltages, and supplies a predetermined voltage to each circuit in the X-ray detector 52. The AC / DC power source 903 is a power source that converts a predetermined DC voltage from a commercial AC power source line.

  A system controller 20 is disposed in the X-ray control room 12. The central processing unit 22 executes various controls in the system. For example, the central processing unit 22 includes display control of the monitor 30, analysis of operation input via the operation panel 32, imaging controller 24, image processor 26, and external storage device 28. to manage.

  The imaging controller 24 controls the high-voltage power supply 44 based on information from the X-ray light amount monitor 60, controls the X-ray diaphragm 16 to form an X-ray beam corresponding to the imaging region, and detects X-rays. A drive instruction is given to the driver 62 in the device 52. The image processor 26 applies, for example, image data correction, spatial filtering, recursive processing, gradation processing, scattered ray correction, and dynamic range (DR) compression processing to the X-ray image data obtained from the driver 62. And other image processing.

  The external storage device 28 is a large-capacity high-speed storage device that stores basic image data processed by the image processor 26. The external storage device 28 stores image information reconfigured so as to satisfy a predetermined standard (for example, Image Save & Carry (IS & C)). The central processing unit 22 is connected to an external device such as a terminal 70, an image printer 74, and a file server 76 in the diagnostic room 14 via a LAN, and images according to a predetermined protocol (for example, Digital Imaging and Communications in Medicine (DICOM)). Transmit data.

  The terminal 70 performs image processing or the like for diagnosis support on an image (moving image / still image) transmitted through the LAN, or displays the image on a display. The image printer 74 prints out an image (still image) transmitted via the LAN, for example, on a film. The file server 76 stores images (moving images / still images) transmitted via the LAN and provides a search function for X-ray captured images. Needless to say, captured images may be exchanged between hospitals by WAN connection. Of course, a plurality of X-ray imaging systems can be connected to the LAN.

[2] Configuration of Photodetector Array 58 Next, the configuration and operation of the photodetector array 58 will be described in detail. FIG. 2 is a diagram showing an equivalent circuit of the photodetector array 58 having a two-dimensional array of photoelectric conversion elements.

One photodetection element is provided corresponding to one pixel, and each photodetection element is a photodetection unit (photoelectric conversion element PD _{(m, n)} ) and a switching thin film transistor (TFT) for controlling charge accumulation and reading. Switch SW _{(m, n)} ). These light detection elements are generally formed on a glass substrate by amorphous silicon (a-Si). In the present embodiment (FIG. 2), the photodetector array 58 is configured by two-dimensionally arranging 4096 × 4096 photodetectors, and the array area is 430 mm × 430 mm. Accordingly, the size of one pixel is about 105 μm × 105 μm.

The photoelectric conversion element PD _{(m, n)} gate electrode (G electrode) of, TFT switches SW _{(m, n)} are connected to a common column signal line Lc _n to the column through a. For example, the photoelectric conversion elements PD _{(1,1) to} PD _(4096,1) in the first column are connected to the column signal line Lc ₁ in the first column. In addition, the D electrode of each photoelectric conversion element PD _{(m, n)} is connected to the bias power supply 85 via the bias wiring Lb. The control terminals of the same row TFT switches SW _{(m, n)} are connected to a common row selection line Lr _m. For example, the control terminals of the TFT switches SW _{(1,1) to} SW _{( 1,4096)} in the first row are connected to the row selection line Lr ₁ in the first row.

Row selection lines Lr _{1 to} Lr ₄₀₉₆ are connected to line selector 92. The line selector 92 determines which line's photoelectric conversion element signal charge should be read based on the control signal from the driver 62, and outputs to the control terminal of each TFT switch SW according to the output of the address decoder 94. 4096 switching elements (96 _{1 to} 96 ₄₀₉₆ ) for switching the supply voltage (Vgl or Vgh) are provided. Note that the line selector 92 may be configured by a shift register used in a liquid crystal display or the like as the simplest configuration.

With the above configuration, by switching only the switch element 96 _x connected to an arbitrary x-th row selection line Lr _x to the Vgh side, the TFT switches SW _{(x, 1) to} SW _{(x, 4096)} in the x-th row The ON state is established, and the accumulated charge signals from the photoelectric conversion elements PD _{(x, 1) to} PD _{(x, 4096) in the} row are extracted onto the column signal lines Lc _{1 to} Lc ₄₀₉₆ .

The column signal lines Lc _{1 to} Lc ₄₀₉₆ are connected to the signal readout circuit 100. In the signal readout circuit 100, reference numerals 102 _{1 to} 102 ₄₀₉₆ denote reset switches that turn on / off the connection between the column signal lines Lc _{1 to} Lc ₄₀₉₆ and the power source 101 that supplies the reset reference potential (Vbt). Preamplifier 106 _{1-106 4096,} respectively amplifies a signal potential from the column signal line Lc ₁ Lc _4096. Sample hold (S / H) circuit 108 ₁ to 108 ₄₀₉₆ samples and holds the output of the preamplifier 106 _{1-106 4096} respectively. An analog multiplexer 110 multiplexes the outputs of the S / H circuits 108 _{1 to} 108 ₄₀₉₆ on the time axis. An A / D converter 112 digitizes analog outputs sequentially supplied from the multiplexer 110. The output of the A / D converter 112 is supplied to the image processor 26.

  The signal charge accumulation time and the A / D conversion time are closely related. When A / D conversion is performed at high speed, the band of the analog circuit becomes wide and it becomes difficult to achieve a desired S / N. Therefore, it is required to shorten the reading time of the image signal without unnecessarily increasing the analog signal band and the A / D conversion rate. One technique for realizing this is to divide the photodetector array of 4096 × 4096 pixels shown in FIG. 2 into, for example, two vertically or four horizontally, and the multiplexer 110 and the A / A for each divided region. It is possible to provide a set of D converters 112 and drive them simultaneously. However, as the number of A / D converters and multiplexers increases, the cost increases accordingly. Therefore, it is preferable not to use many A / D converters indiscriminately but to apply an appropriate number of A / D converters (number of divisions) in consideration of balance with cost.

  FIG. 3 shows an example of an equivalent circuit of one photodetecting element shown in FIG. The light detection unit PD includes a parallel circuit of a photodiode 80a and a capacitor 80b, and a capacitor 80c connected in series with the capacitor 80b. A charge due to the photoelectric effect is described as a constant current source 81. Capacitor 80b may be a parasitic capacitance of photodiode 80a or an additional capacitor that improves the dynamic range of photodiode 80a. A common bias electrode (hereinafter referred to as “D electrode”) of the light detection unit PD is connected to a bias power source 85 via a bias wiring Lb. An electrode (hereinafter referred to as G electrode) on the TFT switch SW side of the photodetection part PD is connected to the capacitor 86 and the charge readout preamplifier 106 via the TFT switch SW. The input of the preamplifier 106 is also connected to the ground via the reset switch 102 and the signal line bias power supply 101.

[3] Operation of Photodetector Array 58 Next, the operation of the X-ray detector 52 of the present embodiment including the photodetector array 58 will be described. First, the driving form of the photodetector array 58 of this embodiment will be described. The driving mode of the photodetector array 58 includes a refresh mode and a photoelectric conversion mode classified according to the voltage application method of the D electrode and the G electrode of the photoelectric conversion element. In the photoelectric conversion mode, empty reading, main reading, and correction reading are performed. Executed.

<Photoelectric conversion mode>
In the photoelectric conversion mode, three types of reading operations, blank reading, main reading, and correction reading are performed. First, prior to these “reading” operations, the driver 62 sets the voltage of the power supply 85 to the bias value Vs (> Vbt), all switch elements 102 _{1 to} 102 ₄₀₉₆ are turned off (all column signal wirings Lc _{1 to} Lc ₄₀₉₆ are released from the power supply 101), and all switch elements 96 _{1 to} 96 ₄₀₉₆ are connected to the Vgl side (all TFTs). Set the switches SW _{(1,1) to} SW _{( 4096,4096)} to OFF). Hereinafter, this state is referred to as a basic state of the photoelectric conversion mode.

[About blank reading]
The idle reading was accumulated in the holes accumulated in the capacitors 86 and 89, and thus in the capacitors 80b and 80c by applying Vs to the D electrode and Vbt to the G electrode of the photoelectric conversion element PD in FIG. It is a drive for emitting holes.

In the idle reading of the present embodiment, from the basic state of the photoelectric conversion mode (Vs is applied to the D electrodes of all the photoelectric conversion elements PD in this state),
(1) All the switch elements 102 _{1 to} 102 ₄₀₉₆ are turned on to supply the reset reference potential Vbt to all the column signal wirings Lc _{1 to} Lc ₄₀₉₆ ,
(2) Applying Vbt to the G electrodes of the photoelectric conversion elements PD _{(x, 1) to} PD _{(x, 4096)} corresponding to the row with only the switch element 96 _x on the Vgh side,
(3) The above (2) is sequentially executed from x = 1 to 4096.

  It is possible to set all the row selection lines Lr to Vgh at the same time by the above-described idle reading operation. In this case, however, the signal wiring potential greatly deviates from the reset voltage Vbt when the read preparation is completed, resulting in high S / N. It is difficult to get a signal. In the above procedure, the row selection line Lr is sequentially selected from 1 to 4096 and reset. However, the reset can be performed in any order by the control of the driver 62 based on the setting of the imaging controller 24. .

[About main reading and correction reading]
The main reading is a drive for reading the signal charge of the photoelectric conversion element PC after the X-ray exposure. The correction reading is a drive for acquiring a correction dark image after the main reading. In the main reading and the correction reading, the operation itself in the photodetector array 58 is the same. That is, by applying Vs to the electrode D and turning on the TFT switch SW with the switch element 102 turned off, a potential corresponding to the amount of received light is supplied from the photoelectric conversion element PD onto the column signal wiring Lc.

A general procedure of the main reading and the correction reading according to the present embodiment is as follows. That is, from the basic state of the photoelectric conversion mode,
(1) The charge accumulated in the capacitors 86 and 89 is released by turning ON / OFF the switch elements 102 _{1 to} 102 ₄₀₉₆ (reset of the amplifier input unit),
(2) The photoelectric conversion element PD of only the to Vgh side switching element 96 _x on the row select line Lr _{x (x, 1)} ~PD column signal lines accumulated charge signals from _{(x, 4096) Lc 1 ~Lc} 4096 Take it out and
(3) The accumulated charge signal is amplified by the preamplifiers 106 ₁ to 106 ₄₀₆₉ and held in the S / H circuits 108 _{1 to} 108 ₄₀₉₆ .
(4) The signals held by the S / H circuits 108 _{1 to} 108 ₄₀₉₆ are serialized by the multiplexer 110, converted into digital data by the A / D converter 112, and output.
(5) The above operation is sequentially repeated from x = 1 to 4096 to acquire all pixel data.
Note that during the execution of (4) above, (1) to (2) are executed for the next row selection line Lr _{x + 1} , and (3) for the selected row (x + 1) after completion of (4). ) Is executed.

<Refresh mode>
The refresh mode is for eliminating the saturation state of the holes generated in the photoelectric conversion element PD, and is performed especially for releasing holes accumulated in the capacitors 80b, 80c and the like that cannot be completely eliminated by the idle reading. . In the refresh mode, the bias power supply 85 is set to Vr, the switch element 102 and the TFT switch SW are turned on, and the D electrode potential <G electrode potential (Vr <Vbt) is established, so that holes accumulated in the capacitors 80b, 80c, etc. Let it go.

In the refresh mode, the driver 62 operates the photodetector array 58 of FIG. 2 according to the following procedure. That is,
(1) Vr is applied to the D electrodes of all photoelectric conversion elements PD by setting the power supply 85 to the bias voltage Vr,
(2) The switch elements 102 _{1 to} 102 ₄₀₉₆ are turned on to apply the reset reference potential Vbt to all the column signal wirings Lc _{1 to} Lc ₄₀₉₆ ,
(3) The reset reference potential Vbt is applied to the G electrodes of all the photoelectric conversion elements PD by switching all the switch elements 96 _{1 to} 96 ₄₀₉₆ to the Vgh side.

<Drive control of photodetector array in imaging system>
Next, with reference to the timing chart of FIG. 4, the execution timing of each of the drive modes will be described in detail. In FIG. 4, 400 is an imaging request signal generated by a user operation on the operation panel 32, 401 is an X-ray generator ready signal, 402 is an actual X-ray exposure state, and 403 is imaging control based on an instruction from the operator 21. An imaging request signal from the detector 24 to the driver 62, 404 is an imaging ready signal of the X-ray detector 52, and 405 is a driving state of the X-ray detector 52 (especially, a charge reading operation from the photodetector array 58). ing. Reference numeral 406 conceptually represents a transfer state of image data and a state of image processing or display.

  When an imaging preparation request is instructed from the operation panel 32 (400, 1st SW), the imaging controller 24 instructs the X-ray generator 40 and the X-ray detector 52 to shift to an imaging preparation state (imaging preparation request instruction). put out. Receiving the imaging preparation request instruction, the driver 62 starts idling driving that repeats one refresh mode operation (R) and n idle readings (F1 to Fn) as one set (405). Note that when a sensor that does not require the refresh mode operation is used, the refresh mode operation is not necessary. The X-ray generator 40 that has received the imaging preparation request instruction starts, for example, a tube rotor up, and outputs an X-ray generator ready signal 401 to the imaging controller 24 when imaging preparation is completed.

  Note that the above-described shooting preparation request instruction may not be intentionally issued by the operator 21. That is, when patient information, radiographing information, or the like is input to the operation panel 32, the imaging controller 24 interprets it as a request for preparation for radiography preparation, and detects the X-ray generator 40 and the X-ray detector 52. You may make it transfer to a vessel ready state.

  Next, when an imaging request instruction (400: 2ndSW) is input by operating the operation panel 32, the imaging controller 24 controls the imaging operation while synchronizing the X-ray generator 40 and the X-ray detector 52. . First, an X-ray imaging request signal 403 is asserted to the X-ray detector 52 in accordance with an imaging request instruction (400: 2ndSW). In response to the X-ray imaging request signal, the driver 62 immediately switches the operation from idling driving to imaging driving (405).

  In the imaging driving, as shown in the imaging device driving state 405, X-ray image acquisition driving and correction dark image acquisition driving are performed. The X-ray image acquisition drive further includes a detection preparation drive (T3), an exposure period (T4), and a main reading (Frx). In the detection preparation drive, refresh operation (R) and idle reading (Fp: Fp1, Fp2, Fpf in FIG. 4) are executed in a predetermined sequence. When these operations are finished, the driver 62 returns an X-ray detector ready signal 404 to the imaging controller 24 on the assumption that the X-ray detector 52 is ready for imaging. The imaging controller 24 detects the transition of the X-ray detector ready signal 404 and asserts the X-ray generation request signal 402 to the X-ray generator 40.

  The X-ray generator 40 generates X-rays while the X-ray generation request signal 402 is given. When a predetermined X-ray dose is generated (that is, when a predetermined time has elapsed), the imaging controller 24 negates the X-ray imaging request signal 403 and the X-ray generation request signal 402 and ends the X-ray exposure. The X-ray imaging request signal 403 is negated to notify the X-ray detector 52 of the image acquisition timing. Based on this timing, after a predetermined wait time for stabilization of the signal readout circuit 100, the driver 62 negates the X-ray detector ready signal 404 and reads out the image data from the photodetector array 58 (main reading). (Frx)). The read image data (raw image) is supplied to the image processor 26. When this process is completed, the driver 62 shifts the readout circuit 100 to the standby state again. Note that a period from the end of the detection preparation drive to the start of reading of image data is defined as an X-ray exposure period (T4).

  When the main reading is finished as described above, the X-ray image acquisition drive is finished. In the main reading described above, the charge accumulation time of each sensor is from when the reset operation is completed, that is, from when the TFT switch SW is turned off in the idle reading (Fpf) immediately before the main reading until the TFT is turned on in the main reading. Become. Therefore, the charge accumulation time and time differ for each selected row. Therefore, the correction dark image obtained by performing the correction reading is used to correct the image obtained by the main reading to absorb the difference in the above conditions.

  For this reason, the X-ray detector 52 starts the correction dark image acquisition drive following the X-ray image acquisition drive, acquires the correction dark image, and transfers it to the image processor 26. The dark image acquisition drive for correction includes detection preparation drive (T3), a delay period (T5) without X-ray exposure, and correction reading (Frn), but the operation of the X-ray detector 52 itself is X-ray image acquisition drive. This is exactly the same as the detection preparation drive (T3), X-ray exposure period (T4), and main reading (Frx). In other words, the X-ray image acquisition drive sequence and the correction dark image acquisition drive sequence are the same except that X-ray exposure is not executed.

  Note that the X-ray image acquisition drive may have slightly different X-ray exposure times each time an image is taken, but the correction dark image acquisition drive reproduces the same sequence including that and acquires a dark image. . By correcting the X-ray image using the dark image thus obtained, a high-quality X-ray image can be obtained. However, when the grid is moved during the X-ray exposure period, the grid may not be moved during dark image acquisition.

  Further, the number of idle readings (Fp) and the time interval T2 in the X-ray image acquisition driving are set in advance prior to the imaging request from the imaging controller 24. However, the number of idle readings (Fp) and the time interval T2 are automatically selected to be optimal values based on whether the operability is important or the image quality is important, or on the imaging part or the like according to the request of the operator 21. In addition, since it is required for practical use that the period (T3) from the exposure request to the completion of imaging preparation is required in practice, it is preferable to shorten the time interval T2 of idle reading (Fp) as much as possible. Furthermore, when an exposure request is generated, the imaging sequence driving is immediately started in any idling driving state. By doing so, the period (T3) from the exposure request to the completion of the preparation for photographing can be shortened, and the operability is improved.

  Furthermore, in this embodiment, the operation mode is changed between idle reading (Fi) during idling driving and idle reading (Fp) during detection preparation driving during X-ray image acquisition driving. In the idling driving period, the idle reading (Fi) execution interval T1 is set to be longer than that in the detection preparation driving (T2) in order to minimize the reading operation that puts a load on the photodetector array 58 (particularly the TFT switch SW). The on time of the TFT switch SW is also set shorter than that at the time of actual reading. Further, in this embodiment, even in the detection preparation drive, idle reading with a short TFT on-time is executed a predetermined number of times, and idle reading (Fpf) having the same TFT on-time as the actual reading is executed immediately before the actual reading is started.

[4] Operation of Image Processor 26 FIG. 5 is a diagram showing the flow of image data of the image processor 26. 501 is a multiplexer for selecting a data path, 502 and 503 are X-ray image and dark image frame memories, 504 is an offset correction circuit, 505 is a gain correction data frame memory, 506 is a gain correction circuit, and 507 is a defect. Each of the correction circuits is represented. Reference numeral 508 represents another image processing circuit.

  The X-ray image acquired in the main reading (Frx) of the X-ray image acquisition drive in FIG. 4 is stored in the X-ray image frame memory 502 via the multiplexer 501. Subsequently, the correction dark image acquired by the correction reading (Frn) of the dark image acquisition drive is stored in the dark image frame memory 503 via the multiplexer 501.

  The offset correction circuit 504 performs offset correction by subtracting the image in the frame memory 503 from the image in the frame memory 502, for example. For example, the gain correction circuit 506 performs gain correction by dividing an image that has been offset-corrected by gain correction data that is acquired in advance and stored in the gain correction frame memory. The gain-corrected data is subsequently transferred to the defect correction circuit 507, and the image is continuously interpolated so as not to cause a sense of incongruity in the insensitive pixel portion or the joint portion of the X-ray detector 52 composed of a plurality of panels. The sensor-dependent correction process derived from the line detector 52 is completed. Further, after other general image processing such as gradation processing, frequency processing, and enhancement processing is performed by other image processing circuit 508, the image is stored in the external storage device 28 or the captured image is displayed on the monitor 30. Is displayed.

[5] Countermeasures against Noise Caused by DC / DC Power Supply The operation of the X-ray imaging system of this embodiment, particularly the image reading operation from the photodetector array 58 has been described above. In the present embodiment, in order to further improve the image quality, the operations in the main reading and the correction reading described above are synchronized with a reference clock that defines the switching operation of the DC / DC power source 902 included in the X-ray detector 52, and noise is reduced. Acquires high-quality captured images with less image quality. Hereinafter, this point will be described in detail.

FIG. 6 is a block diagram showing a detailed configuration relating to signal reading from the photodetector array 58. The photodetector array 58, the driver 62, the line selector 92, the multiplexer 110, the A / D converter 112, and the DC / DC power source 902 are as described with reference to FIGS. The switch element 102, the preamplifier 106, and the S / H circuit 108 collectively represent the switch elements 102 _{1 to} 102 ₄₀₉₆ , the preamplifiers 106 _{1 to} 106 ₄₀₉₆ , and the S / H circuits 108 _{1 to} 108 ₄₀₉₆ in FIG. .

  The timing signal generator 901 outputs CLK, CPV, SH, RC, OE, and CS signals based on instructions from the driver 62. The timing signal generator 901 generates the various timing signals described above by dividing the high-frequency master clock. The DC / DC power supply 902 converts the input voltage from the AC / DC power supply 903 into various voltages such as output voltages VA1, VA2, and VD and outputs them.

  FIG. 7 shows an operation explanatory diagram of the DC / DC power source 902. Here, a pulse width control method (hereinafter referred to as PWM) DC / DC power supply is shown. This is to control the output voltage by changing the pulse width while keeping the frequency of the oscillation signal constant, and is the mainstream among various control methods. Hereinafter, the operation of the DC / DC power supply 902 will be described.

  When the DC voltage is applied to the switching unit 701, it is converted into a high frequency AC voltage and applied to the primary side of the high frequency transformer 702. The high-frequency AC voltage is transmitted to the rectifier / smoothing circuit 703 connected to the secondary side via the high-frequency transformer 702. The rectifier / smoothing circuit 703 rectifies the high-frequency AC voltage with a rectifier diode, and supplies it to the load as a DC voltage with less ripple through a smoothing filter.

  The output voltage is sensed by the error amplifier 704 so as to stabilize the output at all times. The error amplifier 704 compares the output voltage with the reference voltage (705) and detects and amplifies the error. The amplified error signal is sent to a pulse width converter 706, which is a control circuit in the next stage, and becomes a control signal for controlling PWM. The pulse width converter 706 obtains an oscillation signal using the reference clock signal CLK, and converts the pulse width corresponding to the error signal. The control signal output from the pulse width converter 706 is fed back to the switching unit 701 and controlled so that the output is stabilized.

  The above is the basic operation of the DC / DC power supply 902 by the PWM method of this embodiment. In a normal DC / DC power supply, an oscillation signal is generated using an output of a built-in CR oscillator, but in the DC / DC power supply 902 of this embodiment, an oscillation signal is generated by fixed oscillation with a reference clock CLK. In addition, the switching unit 701 includes various methods such as forward, flyback, push-pull, and bridge, and further includes those that insulate the primary side and the secondary side, and those that are not insulated. Detailed description is omitted here.

  Regarding the input voltage and the output voltage, in this embodiment, the output voltage is centered around DC5V, and the input voltage is about DC50V. Since the current can be suppressed if the input voltage is made relatively high, such as DC 50V, it is effective because the power cable supplied from the outside can be made relatively small. The output voltage required by the X-ray imaging unit will be described below. The magnitude relationship between the input and output voltages is not limited to this embodiment, and the present invention is useful even when the input voltage is smaller than the output voltage.

  FIG. 8 shows an example of a power supply block for generating the various voltages described above in the DC / DC power supply 902 of the present embodiment. This is a combination of three basic circuits of the DC / DC power source described in FIG. The analog power supply 801 supplies the voltage VA1 to an amplifier IC that amplifies the output from the sensor panel. The analog power supply 802 supplies the voltage VA2 as a reference potential to the sensor panel, the amplifier IC, and the driver IC. These analog power supplies output as much as possible conductive noise such as ripple noise and spike noise. This is because the signal level output from the sensor panel is very weak, and it is essential to reduce the noise of the power source, which is the source, in terms of image quality. The digital power supply 803 supplies the voltage VD to the driver 62, the timing signal generator 901, and other digital circuits not shown.

  In addition, when there are several systems and CHs (channels) in the DC / DC power supply, there is a significant problem in reducing the size, that is, in increasing the density, but crosstalk between the CHs. Noise is generated. The leakage magnetic field from the adjacent CH on the mounting is superimposed on the other CH, and if each frequency is different, the crosstalk noise may cause a beat. Usually, when there are a plurality of outputs, each oscillation frequency is not strictly managed.

  In the present embodiment, by using a single clock (CLK) supplied from the timing signal generator 901 to all the CHs, all of the plurality of CHs are synchronized, and the influence of crosstalk noise between the CHs is reduced. It has become. However, depending on the configuration, it may not be necessary to synchronize all of them, and the present invention is not limited to this. Further, for a CH with a small generated noise, a clock giving priority to efficiency (for example, an internal clock obtained from a CR oscillator included in the power supply) is used, and a reference clock CLK is used for a CH with a large generated noise. It is also possible to achieve both noise countermeasures. Further, an analog regulator may be used in a place where lower noise is required. However, since the efficiency as a power source is lowered, the power source is limited to a place where no heat generation problem or cost problem occurs.

  Noise sources in a DC / DC power source mainly include a switching unit 701, a rectifying unit of a rectifying unit / smoothing circuit 703, a high-frequency transformer 702, and the like, and electromagnetic induction caused by conductive noise on a conductor and a leakage magnetic field into a space. Noise is generated. In particular, it is difficult to take measures against a leakage magnetic field from a DC / DC power source. Although noise can be reduced to some extent by conventional measures such as shielding, in the case of the apparatus of the present embodiment in which the signal level to be handled is very small, the sensor panel and the amplifier IC even with a reduced leakage magnetic field. This is because electromagnetic induction is caused in the signal detection system circuit including the noise and affects the image as noise on the image.

  FIG. 9 is an image diagram of image noise generated when the leakage magnetic field causes electromagnetic induction in the light detection unit, that is, line noise generated for each gate line (row selection line Lr). A gate line is laid out in the horizontal direction, and a signal line (column signal line Lc) is laid out in the vertical direction. As an example, a case where strong line noise is generated every five gate lines is shown. In this way, line noise is superimposed on the captured image, so that the image quality is remarkably deteriorated. In the case of a medical image, it causes a misdiagnosis in particular, which is a problem.

  This line noise is because the phase relationship between the position (timing) for sampling and holding the signal on the signal line and the noise superimposed on the signal line in synchronization with CLK from the DC / DC power supply is sequentially shifted for each line. This occurs when a beat having a predetermined frequency appears as line noise on the image. Here, if the drive frequency of one line is Fl (sampling frequency) and the noise frequency from the DC / DC power supply is Fn, the line noise frequency Fln of the image is assumed to be noise if it is assumed that noise is superimposed during sampling. Since it is a sampling beat, it can be shown as follows.

Fln = ABS (Fn-i * Fl) ≤Fl (where i is a positive integer greater than or equal to zero)
Fln / Fl = ABS (Fn / Fl-i) ≦ 1
Here, assuming that Fn / Fl = i + d (where d is a decimal part), this is substituted into the above equation,
Fln / Fl = d ≦ 1
It becomes. Therefore, the line noise frequency Fln is
Fln = d × Fl
become that way.

  For example, when d = 0.2, line noise occurs every 5 lines. Therefore, it can be seen that the effect of line noise can be reduced if d is set to 0, that is, if the relationship between the noise frequency Fn from the DC / DC power source 902 and the sampling frequency Fl is an integral multiple.

  Hereinafter, the realization of such an operation will be described with reference to the timing chart of FIG. 10 and FIG.

  When reading out image information from the photodetector array 58, the timing signal generator 901 generates a reference clock of the DC / DC power supply 902 CLK and a line drive signal CPV having a cycle that is an integral multiple of the CLK. Since the sample hold signal SH is synchronized with the line drive signal CPV, it has the same frequency as the line drive signal CPV. In general, the oscillation frequency of the DC / DC power supply is 10 k to several hundred Khz, and the line driving frequency (row selection line switching frequency) for driving the photodetector array 58 is about several Khz. Therefore, for example, if the CLK frequency is 100 Khz and the line drive frequency is 2 Khz, the relationship between the CLK and CPV (and SH) frequencies is an integral multiple. Details of the reason for the integer multiple are as described above. In FIG. 10, the line drive signal CPV and the sample hold timing signal SH in one line are synchronized with the reference clock CLK of the DC / DC power supply 902, and CLK is an integral multiple of the CPV line frequency. It simply shows that there is a relationship and that CLK is continuous between lines.

  As described above, in main reading (Frx), pixel signals are read in units of rows. FIG. 10 shows the reading operation in the Nth row. The timing signal generator 901 first generates a reset signal RC in synchronization with the clock signal CLK. The switch element 102 is turned on and off by the reset signal RC to reset the column signal line Lc. In response to the line drive signal CPV, the line selector 92 turns on the TFT switch SW of the selected row selection line and turns on the OE signal to enable the output of the multiplexer 110. The charges accumulated in each photoelectric conversion element PD on the selected row selection line Lr are transferred to the readout circuit 100 via the column signal line Lc and integrated by the preamplifier 106. The timing signal generator 901 sends a sample hold signal SH to cause the S / H circuit 108 to hold the output voltage value of the preamplifier 106.

  Thereafter, the timing signal generator 901 similarly sends a line drive signal and sends a signal line reset signal RC to read the next line. The voltage value held in the previous line is sent to the AD converter 112 and converted into a digital signal until the next sample and hold signal is sent.

In terms of mounting, the switch element 102, the preamplifier 103, and the sample hold circuit 108 have a switch element, preamplifier, and S / H circuit corresponding to one signal line as one system, for example, 256 systems are integrated into one IC. To be implemented. In the case of the photodetector array 58 having 4096 rows as in this embodiment, 16 ICs are required. As described above, since there are a plurality of ICs, the ICs are sequentially selected one by one according to the selection signal .

  The above operation is repeated to read all lines. In each signal transmitted from the timing signal generator 901, the timing (phase) within one line is not changed and is kept constant. For example, the reset signal RC and the line drive signal CPV have a cycle that is an integral multiple of the clock signal CLK, and the sample hold signal SH is turned on after a predetermined time has elapsed since turning on the RC or CPV. Here, for example, the sample hold signal SH may be turned on by counting a predetermined number of master clocks after turning on RC or CPV. For this reason, the phase of the oscillation signal (CLK signal) of the DC / DC power supply 902 at the timing of sample-holding is kept the same for all lines. Therefore, even if the sampled and held timing is a point where the power supply noise is large, all lines are read out at the same point, that is, because the noise of the same phase is superimposed, the noise on the line on the image is difficult to see. Become.

  FIG. 11 is an enlarged view of a part of the timing chart of FIG. The above description will be supplemented using FIG. The phase relationship among the sample hold signal SH, clock signal CLK, amplitude modulation signal PWM, and signal SIG output from the preamplifier 106 is fixed in one line. Here, PWM is a pulse width modulation signal that changes according to the load in the DC / DC power source 902 that oscillates at CLK, that is, a signal that the DC / DC power source 902 actually oscillates.

  The output signal SIG of the preamplifier 106 is superposed with a noise signal (simply a triangular wave) that is synchronized with PWM because the noise is electromagnetically coupled to the signal detection system due to the leakage magnetic field accompanying the oscillation of the DC / DC power supply 902. . According to the present embodiment, when the point of SIG held from the sample state by the S / H circuit 108 is A, the point held also for the next line remains A. Thus, even when noise is superimposed on the SIG signal, the line noise when imaged can be reduced by sampling each line at the same phase within the CLK cycle. On the other hand, in the normal case, each phase relationship is sequentially shifted for each line, so that the held points are sequentially changed as A, B, and C, and line noise as shown in FIG. 9 is generated. .

  As a matter of course, it is more effective to adjust the integer multiple value so that the sample hold point is adjusted to a timing with less noise. As an example, the case where CLK is 100 Khz and the line drive frequency is 2 Khz is shown. However, the present invention is not limited to this, and there is no problem with other integer multiple values. It may be. The point is that the sample / hold timing in each line and the phase relationship between CLK of the DC / DC power supply are unchanged, and the frequency of CLK is continuous between the lines. The condition that satisfies these conditions is that the line drive frequency and the CLK frequency of the DC / DC power supply have an integer multiple relationship and are synchronized. If the CLK is not continuous, the DC / DC power supply is controlled on the assumption that the CLK is continuous and stable, and a stable output cannot be obtained.

  Note that it is preferable to design a configuration including constants and components of each circuit of the DC / DC power supply so that the conversion efficiency of the DC / DC power supply is optimized with respect to the CLK frequency. Needless to say, it is preferable to select constants, configurations, and components that further reduce ripple noise and spike noise.

  The DC / DC power supply 902 is configured to operate (free run) using a clock generated by a CR oscillator (not shown) or the like in the power supply when the reference clock CLK from the timing signal generator 901 is not input. it can. If such a DC / DC power supply is used, it is possible to operate with the reference clock CLK only during the main reading and the correction reading, and to operate the DC / DC power supply in a free run at other timings. Therefore, if the free-run frequency is set to an efficient point of the DC / DC power supply 902, the total efficiency of the system can be improved.

  Further, since the pulse width slightly changes depending on the load due to PWM, the output ripple spectrum slightly changes. However, since the main spectrum which is the most problematic is hardly changed, it is not a substantial problem. If the smoothing circuit constants and the PWM response characteristics are optimized, the influence can be further reduced.

  In the present embodiment, the case of PWM type DC / DC is shown, but even in the case of frequency modulation type, the line drive frequency is set to an integer multiple of the modulation frequency in accordance with the modulation frequency generated from the DC / DC power supply. If controlled, the same effect can be obtained. The SH signal in this case may be determined as follows, for example. In the PWM type, the oscillation frequency of the DC / DC power supply is fixed by CLK. However, in the frequency modulation type DC / DC power supply, the output voltage is stabilized by changing the oscillation frequency of the clock with respect to the load fluctuation. Therefore, in the frequency modulation type, a spontaneous oscillation clock (CLKS) is used for driving the power supply, and the timing signal generation unit 901 receives CLKS from the DC / DC power supply 902 and controls the generation timing of the SH signal. More specifically, the timing signal generation unit 901 starts from the variation point (rising or falling) of CLKS within a period from when the OE signal is turned OFF in response to completion of the output of the multiplexer 110 to the next line selection. The SH signal is generated after a predetermined count of the master clock. The SH signal is generated only once in one line. Thus, by fixing the count number of the master clock from the CLKS mutation point, the sample position with respect to the noise phase can be fixed.

  As described above, according to the present embodiment, the relationship between the line drive frequency and the oscillation frequency of the DC / DC power supply can be obtained even if there is a leakage magnetic field from the DC / DC power supply 902 disposed in the X-ray detector 52. By making it an integer multiple, it is possible to reduce the appearance of induced noise superimposed on the sensor as noise on the image. In addition, since the plurality of channels (CH) in the DC / DC power source 902 are driven in synchronization with the same CLK, beats between the plurality of outputs are eliminated, and noise can be further reduced.

  In order to further enhance the effect, it is useful not only to adjust to an integral multiple, but also to select the sample / hold timing in the line as a point where the noise of the DC / DC power supply is low.

  Of course, line noise on the image can be further reduced if a shield case covering the DC / DC power supply itself can be attached. Further, the application of the present invention is not limited to a DC / DC power supply, and the same effect can be obtained when applied to an AC / DC power supply. Furthermore, the present invention can be applied not only to a PWM type power supply but also to a frequency modulation type DC / DC power supply, and the present invention can be applied to a wide range of switching power supplies.

  In the embodiment, the timing signal generator 901 is configured to generate the reference clock CLK for the switching power supply, the line drive signal CPV, and the sample hold signal SH. That is, since a signal to be synchronized is generated by one timing signal generator 901, timing management is facilitated.

It is a schematic diagram which shows the outline | summary of the X-ray imaging system by embodiment. It is a schematic diagram which shows the structural example of the photodetector array by embodiment. It is a schematic diagram explaining the photon detection element in the photodetector array shown in FIG. It is a timing chart of the X-ray imaging system of an embodiment. It is a flow block diagram which shows the process of the acquired image by embodiment. It is the figure which showed the main circuit structures of the X-ray imaging system of embodiment. It is operation | movement explanatory drawing of the DC / DC power supply by embodiment. It is a block diagram of DC / DC power supply used for the X-ray imaging system of an embodiment. It is a figure which shows the example of a line noise generation | occurrence | production image. It is a timing chart explaining the synchronization of the X-ray imaging system of an embodiment. It is a timing chart enlarged view explaining the synchronization of the X-ray imaging system of an embodiment.

Claims (6)

A switching power supply for supplying power,
A detector array in which detectors are arranged in two dimensions;
Reading out signals from each detector via column signal lines connected to the detector in units of rows in the detector array, and holding the read signals in the holding units corresponding to the column signal lines Means,
In synchronization with the reference clock of the switching power supply, the row to be read in the reading means is switched at a cycle that is an integral multiple of the reference clock, and the holding timing of the signal by the holding unit is determined in advance from switching of the row to be read. A control means for setting the holding timing to a predetermined phase in the row switching cycle by setting the time at which a predetermined time has elapsed ,
Under the control of the control means, an X-ray image and a correction dark image are read by the reading means, and offset correction means for performing offset correction on the X-ray image using the correction dark image is provided. X-ray image reading apparatus. And a generation unit configured to generate a reference clock, a switching signal for switching a row to be read by the reading unit, and a timing signal for specifying the holding timing by dividing a predetermined clock. The X-ray image reading apparatus according to claim 1. The X-ray image reading apparatus according to claim 1, wherein the switching power supply has a plurality of independent voltage output units, and at least one of the voltage output units operates according to the reference clock. The switching power supply operates based on the reference clock during a signal readout period from the detector array, and operates based on a free run based on a clock generated by an oscillator included in the switching power supply during a period other than the signal readout period. The X-ray image reading apparatus according to claim 1. An X-ray image reading method for reading an image signal from a detector array having a switching power supply and two-dimensionally arranged detectors,
Reading out a signal from each detector via a column signal line connected to the detector in units of rows in the detector array, and holding the read signal in a holding unit corresponding to each column signal line Process,
In synchronization with the reference clock of the switching power supply, the row to be read in the reading step is switched at an integer multiple of the reference clock, and the holding timing of the signal by the holding unit is determined in advance from the switching of the row to be read. A control step in which the holding timing is set to a predetermined phase in the cycle of switching the rows by setting the time when the given time has passed ;
Under the control of the control step, an X-ray image and a correction dark image are read out by executing the read-out step, and an offset correction step of performing offset correction on the X-ray image using the correction dark image; An X-ray image reading method comprising: The X-ray image reading device according to any one of claims 1 to 4,
An X-ray generator,
The X-ray imaging apparatus, wherein the detector array holds a signal based on X-rays emitted from the X-ray generation apparatus.

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