JP4234976B2 - Intermediate code execution system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention provides intermediate code execution for executing intermediate code.To the systemIt is related.
[0002]
[Prior art]
  For the purpose of providing a program independent of a computer platform such as hardware and OS, a virtual machine (VM) is constructed on each platform by a software method or a hardware method. There has been proposed a method of executing intermediate code (hereinafter referred to as intermediate code) between source code and object code on a machine. One programming language that employs such a method is Java (R) that employs an intermediate code format called a class file. Hereinafter, hardware and a virtual machine built on the hardware may be referred to as an intermediate code execution system.
[0003]
  According to the above method, since a single program code can be supplied to various platforms and executed, it is not necessary to prepare an object code that can be executed only on each platform. This not only simplifies program distribution, but also makes software development more efficient. For this reason, virtual machines have been built on various computer platforms. Furthermore, recently, it has begun to construct virtual computers on processors in various electronic devices (hereinafter referred to as embedded devices) equipped with processors.
[0004]
  Here, as a virtual machine, an interpreter type that is constructed in software on a platform and sequentially interprets and executes bytecode instructions included in a class file is known.
[0005]
  However, an interpreter-type virtual machine requires a process of extracting byte code instructions one by one from a class file and interpreting the contents, and this process may become a system overhead. In order to reduce such overhead and improve performance, a JIT compiler (Just In Time Compiler) method in which a class file is compiled into native code specific to each hardware and then executed, or an AOT compiler (Ahead Of Time) Compiler) method has been proposed. Furthermore, an attempt has been made to construct a virtual computer in hardware like a Java (R) chip specially designed to directly execute bytecode instructions.
[0006]
  The compiler system such as JIT or AOT executes the native code of the processor, and is superior to the interpreter system if only the instruction execution speed is considered. However, since the compiler method requires a work memory necessary for the compilation work itself and an area for storing native code that is 4 to 10 times larger than the class file, a larger amount of memory than the interpreter method is required. There is a problem that is necessary.
[0007]
  Such a problem becomes prominent particularly in an embedded device in which hardware resources are more restrictive than a normal computer. In addition, when the compilation is started after instructing the execution of the class file, there is a possibility that the compilation work becomes an overhead and sufficient performance cannot be obtained.
[0008]
  In addition, according to the above-mentioned Java (R) chip, it is possible to execute a class file with high performance without compiling, but the development of such a dedicated chip requires a high development cost, The cost of the chip itself cannot be avoided. Moreover, in view of the fact that language specifications are upgraded and modified appropriately according to technological progress and market needs, it is not always preferable to configure a virtual machine in hardware. In particular, for a virtual machine in an embedded device, it is not practical to adopt a Java (R) chip due to a strong demand for cost reduction and a specification upgrade in a short cycle.
[0009]
  As described above, techniques such as the compiler method and Java (R) chip have problems in terms of cost, required hardware resources, and the like, and it is particularly difficult to apply them to embedded devices with severe restrictions. For this reason, it is desired to improve the performance of a virtual machine or an intermediate code execution system by another method with a view to being applied to an embedded device.
[0010]
[Problems to be solved by the invention]
  The present invention has been made in view of the above circumstances, and it is possible to improve the performance at the time of executing the intermediate code by performing the preprocessing, and the intermediate code execution in which such preprocessing is incorporated.SystemThe purpose is to provide.
[0011]
[Means for Solving the Problems]
  In order to solve the above problems, in the first aspect of the present invention, intermediate code obtained by compiling source code created in a predetermined programming languageIntermediate code execution systemInA plurality of intermediate code execution means for executing the intermediate code and the intermediate code are stored, and a correspondence relationship between an instruction included in the intermediate code and the intermediate code execution means appropriate for efficient execution of the instruction is stored. Storage means and intermediate code analysis means, wherein the intermediate code analysis means a) a process for specifying an instruction included in the intermediate code stored in the storage means, b) the specified instruction and the Based on the correspondence relationship, a process for specifying an intermediate code execution unit suitable for efficient execution of the intermediate code, and c) a process for recording the relationship between the intermediate code and the specified intermediate code execution unit Intermediate code characterized by Execution systemProvided byIs done.
[0012]
  The present inventionThe first1According to the above aspect, the intermediate code execution system is provided with a plurality of intermediate code execution means, and the correspondence between the instructions included in the intermediate code and the intermediate code execution means appropriate for efficient execution thereof is stored in the storage means. In addition, the intermediate code is analyzed by the intermediate code analysis means, and based on the correspondence stored in the storage means, the intermediate code execution means suitable for efficient execution of the intermediate code is specified and recorded. The execution system can identify the optimum intermediate code execution means for each intermediate code.
[0013]
  Therefore,According to a first aspect of the invention,It is possible to execute intermediate code using intermediate code execution means suitable for the intermediate code to be executed, thereby improving the performance at the time of executing the intermediate code by utilizing each of the plurality of intermediate code execution means. be able to.
[0014]
  First of the present invention2In this aspect, the correspondence between the instruction in the storage means and the intermediate code execution means suitable for efficient execution of the instruction is the score of the processing efficiency when each instruction is executed by each of the intermediate code execution means. B2) including a table, and b1) a process of obtaining a score of processing efficiency when each of the intermediate code execution means executes the specified instruction based on the score table; and b2) A process of summing the acquired scores for each intermediate code execution means; and b3) a process of specifying the intermediate code execution means used for execution of the intermediate code based on the scores totaled for each intermediate code execution means. It can be set as the structure containing.
[0015]
  Further, the correspondence between the instruction in the storage means and the intermediate code execution means suitable for efficient execution of the instruction includes the value of the point assigned to each instruction and the point corresponding to each of the intermediate code execution means And b2) a process for obtaining the point of the specified instruction based on the correspondence, and b2) a process for obtaining the total value of the acquired point. And b3) a process for specifying the intermediate code execution means used for executing the intermediate code based on the correspondence and the obtained total value.
[0016]
  First of the present invention3In the intermediate code execution system for executing intermediate code obtained by compiling source code created in a predetermined programming language, general intermediate code execution means capable of executing all instructions and some instructions A special intermediate code execution means capable of executing only the intermediate code, a storage means storing the intermediate code, and an intermediate code analysis means, wherein the intermediate code analysis means a) stores the intermediate code stored in the storage means Analyzing and determining whether the instruction included in the intermediate code does not include an instruction that cannot be executed by the special intermediate code execution unit; and b) when determining that the instruction that cannot be executed is not included, The fact that the intermediate code is to be executed by the special intermediate code execution means is recorded, and when it is determined that the inexecutable instruction is included, the intermediate code is stored in the one intermediate code. The intermediate code execution system and executes a process of recording should be performed in the intermediate code execution means.
[0017]
  First of the present invention3In the intermediate code execution system having general intermediate code execution means that can execute all instructions and special intermediate code execution means that can execute only a part of the instructions, the intermediate code to be executed is special. Depending on whether or not an instruction that can be executed by the intermediate code execution means is included, it is recorded which of the general intermediate code execution means and the special intermediate code execution means should be executed.
[0018]
  Therefore,According to a third aspect of the present invention,In an intermediate code execution system to which special intermediate code execution means specialized for only some instructions are added, it is possible to use general intermediate code execution means and special intermediate code execution means separately. Performance can be improved.
[0019]
  First of the present invention4In an intermediate code execution system for executing an intermediate code obtained by compiling a source code created in a predetermined programming language by an interpreter method, a storage unit storing the intermediate code and a storage unit storing the intermediate code Preprocessing means for performing processing for replacing the specific instruction pattern included in the intermediate code with the alternative instruction previously associated with the specific instruction pattern, and interpreting and executing the alternative instruction A first interpreter that cannot perform the analysis, a second interpreter that can interpret and execute the substitute instruction in the same content as the instruction pattern before replacement, and the intermediate code processed by the preprocessing means The intermediate code determines whether or not the alternative instruction is included, and if the intermediate instruction includes the alternative instruction, Intermediate code analysis means for recording that the intermediate code should be executed by the first interpreter, and for recording the intermediate code that should be executed by the second interpreter when the substitute instruction is not included; An intermediate code execution system is provided.
[0020]
  First of the present invention4According to this aspect, preprocessing means for performing preprocessing for replacing a specific instruction pattern with an alternative instruction, a first interpreter corresponding to the alternative instruction, a second interpreter not corresponding to the alternative instruction, and an intermediate In the configuration including the code analyzing means, the intermediate code after the preprocessing is analyzed by the intermediate code analyzing means, and the intermediate code in which the specific instruction pattern is replaced with the alternative instruction in the preprocessing is executed by the first interpreter. What is to be recorded is recorded, and what is to be executed by the second interpreter is recorded for intermediate code that has not been replaced even after preprocessing.
[0021]
  Therefore,According to a fourth aspect of the invention,The intermediate code can be executed with high performance by effectively utilizing the configuration including the preprocessing means, the first interpreter, and the second interpreter.
[0022]
  First of the present invention5In terms of the above, in an intermediate code execution system that executes an intermediate code obtained by compiling a source code created in a predetermined programming language by an interpreter system, it interprets and executes all instructions generated by the compilation A first subsystem having a first interpreter capable of performing the processing, a preprocessing unit for performing a preprocessing for replacing an instruction pattern made up of a plurality of instructions included in the intermediate code with an alternative instruction, and an instruction before the replacement of the alternative instruction A second interpreter having a second interpreter that can be interpreted and executed with substantially the same content as the code, and the first subsystem in the first subsystem depending on the intermediate code to be executed. The intermediate code is executed by the interpreter of the second subsystem and the intermediate processing is executed by the preprocessing unit in the second subsystem Intermediate code execution system is provided which is characterized by comprising a selector for selecting either the process to be executed by the second interpreter from pretreated to over de.
[0023]
  First of the present invention5In particular, the first subsystem having a normal interpreter, preprocessing means for replacing a specific instruction pattern with an alternative instruction, and execution of intermediate code preprocessed by the preprocessing means The second subsystem having the second interpreter is used according to the intermediate code to be executed..
[0024]
  Thereby, according to the fifth aspect of the present invention,Performance when executing intermediate code can be improved.
[0025]
  First of the present invention5In the above aspect, the second subsystem assigns an alternative instruction to the operation code to which the specific instruction is assigned in the first subsystem, and the selection unit assigns the specific instruction to the intermediate code to be executed. Configuration in which processing by the first subsystem is selected when an instruction is included, and processing by the second subsystem is selected when the specific instruction is not included in an intermediate code to be executed It can be.
[0026]
  First of the present invention6In an aspect of the present invention, there is provided an intermediate code execution system that executes an intermediate code obtained by compiling a source code created in a predetermined programming language, and includes a first instruction pattern including a plurality of instructions included in the intermediate code. A pre-processing unit that performs pre-processing for replacing with a first substitute instruction, and a first interpreter that can interpret and execute the first substitute instruction with substantially the same content as the instruction code before replacement A pre-processing unit that performs pre-processing to replace the second instruction pattern included in the intermediate code with a second alternative instruction, and an instruction code before replacing the second alternative instruction Depending on the intermediate code to be executed, a second subsystem having a second interpreter that can be interpreted and executed in substantially equivalent content, and in the first subsystem Select one of processing to execute intermediate code by the first interpreter and processing to be executed by the second interpreter after preprocessing the intermediate code by the preprocessing unit in the second subsystem An intermediate code execution system is provided.
[0027]
  First of the present invention6According to the above aspect, a sub-process having a pre-processing unit that replaces a specific instruction pattern with an alternative instruction and an interpreter specialized for execution of intermediate code that has been pre-processed by the pre-processing unit is configured with different instruction patterns. In the intermediate code execution system having two systems for alternative instructions, the performance during execution of the intermediate code can be improved by properly using the intermediate code for executing the two systems of subsystems..
[0028]
  First of the present invention6In this aspect, the first subsystem assigns the first substitute instruction to the first operation code, and the second subsystem assigns the second substitute instruction to the second operation code. The selecting unit selects processing by the second subsystem when the intermediate code to be executed includes an instruction related to the first opcode, and the intermediate code to be executed includes an instruction related to the second opcode. In such a case, the processing by the first subsystem can be selected.
[0029]
  In each of the above viewpoints, an “instruction pattern” is a set of predetermined instructions. The “alternative instruction” refers to an instruction that is replaced with the instruction pattern, and is an original instruction that is expressed by a code shorter than the instruction pattern and executed in an execution environment corresponding to the alternative instruction.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
  First, with reference to FIGS. 1 to 4, the intermediate code preprocessing apparatus according to the first embodiment of the present invention will be described in detail.
  FIG. 1 shows a hardware configuration of an intermediate code preprocessing apparatus 1 according to the first embodiment that preprocesses a Java (R) class file as an intermediate code.
[0031]
  The intermediate code preprocessing apparatus 1 includes a storage unit 101, a processing unit 102, and an input unit 103. The processing unit 102 is an arithmetic device such as an MPU or a microcontroller. The number of the processing units 102 is not limited to one, and may be configured such that distributed processing can be performed by a plurality of MPUs or a plurality of types of arithmetic devices.
[0032]
  The input unit 103 inputs a class file or the like to the intermediate code preprocessing apparatus 1. The class file input from the input unit 103 is stored in the storage unit 101. The storage unit 101 includes a memory such as a RAM or a ROM. Here, for convenience of explanation, only one storage unit 101 is illustrated, but a configuration in which a plurality of storage units are arranged in a distributed manner may be used.
[0033]
  The predetermined area of the storage unit 101 stores a table in which an instruction pattern 101a composed of a plurality of instructions and an alternative instruction 101b are associated with each other, and further stores a class file 101c. Here, the instruction pattern 101a is a pattern composed of a plurality of bytecode instructions.
[0034]
  Hereinafter, for example, a case where addition of integers is performed will be described as an example. In this case, methods included in the Java (R) class file include, for example, FIG. As shown in FIG. 3, the command patterns “iload”, “iload”, and “iadd” may occur frequently. Therefore, in the intermediate code preprocessing device 1 according to the first embodiment, the storage unit 101 stores a table in which an instruction pattern that frequently appears in this manner is associated with an alternative instruction that performs processing similar to the instruction pattern, for example, “v_v_iadd”. Store. Here, “iload” is a mnemonic representation of an intermediate code consisting of 2 bytes that pushes the value of a local variable onto the operand stack. “Iadd” is a mnemonic description of a 1-byte intermediate code that pops and adds two values from the operand stack and pushes the result onto the operand stack.
[0035]
  The alternative instruction 101b is an instruction that is interpreted in the same process as the instruction pattern 101a in an environment where the alternative instruction 101b can be executed. In other words, the present embodiment is premised on the existence of an intermediate code execution system capable of interpreting and executing the substitute instruction 101b substantially equivalent to the instruction pattern before replacement. For example, in such a case, such an intermediate code execution system interprets the alternative instruction “v_v_iadd” into a process similar to the instruction pattern “iload”, “iload”, and “iadd” and executes it. When executing such an alternative instruction, it is desirable to minimize the overhead factor in executing the instruction by preventing frequent memory access, omitting redundant processing, utilizing a register, and the like.
[0036]
  The alternative instruction 101b has a shorter code length than the instruction pattern 101a. For example, the substitute instruction “v_v_iadd” has a code length of 3 bytes and is shorter than 5 bytes which is the code length before replacement.
[0037]
  Therefore, according to such preprocessing, the size of the class file 101c can be reduced.
[0038]
  The present embodiment mainly corresponds to the invention described in claim 1 or 15, wherein the storage unit 101 corresponds to a storage unit in the invention, and the processing unit 102 corresponds to a processing unit. .
[0039]
  In the configuration as described above, by executing a series of software programs by the processing unit 102, each function of the intermediate code preprocessing device 1 is realized, and the preprocessing as described below is performed on the class file 101c.
[0040]
  FIG. 2 is a flowchart for explaining the pre-processing procedure in the present embodiment. Here, it is assumed that the class file 101 c is input from the input unit 103 to the intermediate code preprocessing apparatus 1 and stored in the storage unit 101 in advance. Under this premise, processing is performed in the following procedure.
[0041]
  That is, when the intermediate code preprocessing is started (S101), the processing unit 102 reads the table of the instruction pattern 101a and the alternative instruction 101b associated with each other from the storage unit 101 (S102). Next, the processing unit 102 searches the class file 101c and specifies the instruction pattern 101a (S103). That is, for example, as shown in FIGS. 3 and 4, a series of instruction patterns 101a of “iload”, “iload”, and “iadd” are specified in the class file 101c. When the command pattern is specified in this way, the processing unit 102 replaces the command pattern 101a in the specified class file 101c with a substitute command 101b associated with the command pattern 101a (S104).
[0042]
  FIG. 4 is a diagram for specifically explaining an example of the processing in S104. In this example, “iload 8”, “iload 9”, and “iadd” included in the specified instruction pattern are first converted to “nop”, “nop”, and “v_v_iadd8, 9” (first stage). Here, “nop” is an instruction that does nothing. As described above, inserting a plurality of “nops” before “v_v_iadd 8, 9” does not change the size of the class file to be converted, and does not change the jump destination of the conditional branch included in the class file. Because. After performing the first stage process, the process of deleting “nop” is performed while changing the jump destination of the conditional branch (second stage). Thereby, the process of S104 is completed.
[0043]
  As described above, the intermediate code preprocessing ends (S105).
[0044]
  According to the intermediate code pre-processing device according to the first embodiment, the length of the code to be executed by the series of processes described above is determined from the total 5-byte code of “iload”, “iload”, and “iadd”. v_v_iadd ”is shortened to one instruction of 3 bytes. Therefore, it is possible to reduce the number of instructions to be executed, omit redundant processing between instructions, and reduce the size of the class file.
[0045]
  The intermediate code obtained in this way is equivalent to the instruction pattern 101a before the replacement of the alternative instruction 101b in the execution environment corresponding to the alternative instruction 101b such as “v_v_iadd”, and minimizes overhead factors such as memory access. By interpreting and executing the processing, it can be executed at high speed. In addition, the preprocessing of intermediate code as described above is a simple code replacement, so it can be executed with low overhead, and does not increase the size of the class file as when compiling to native code. Therefore, the performance of intermediate code execution can be improved significantly.
[0046]
  For example, when the first embodiment is applied to an embedded device such as a mobile phone, an execution environment capable of executing the above-described alternative instruction 101b is mounted on the embedded device, and the intermediate code preprocessing device 1 performs the preprocessing. The class file may be preinstalled or distributed to the embedded device. By doing in this way, the performance of the Java (R) application executed on the embedded device can be improved.
[0047]
  In addition, an execution environment capable of executing the above-described preprocessing device 1 and the alternative instruction 101b is installed in the embedded device, and both the preprocessing of the class file and the execution of the preprocessed class file are performed on the mobile phone. You may do it.
[0048]
  In the first embodiment, a table in which the instruction pattern 101a and the alternative instruction 101b are associated with each other is stored in the storage unit 101. Such a table is embedded in a software program for performing preprocessing. It is also possible to use a configuration that is independent of a software program for performing preprocessing.
[0049]
  In the pre-processing procedure described above, the processing in S104 is not limited to that shown in FIG. For example, after the first stage process shown in FIG. 4, the second stage process is not performed, and “nop” may not be deleted. In such a case, the intermediate code including “nop” may be executed in the execution environment as it is, or the class file is deleted while deleting “nop” and changing the jump destination of the conditional branch in the execution environment. May be executed. In particular, in the latter case, it is preferable to perform the above-described preprocessing by using an idle time for the execution environment.
[0050]
[Second Embodiment]
  Next, an intermediate code execution system according to the second embodiment of the present invention will be described in detail with reference to FIGS.
  FIG. 5 shows a hardware configuration of the intermediate code execution system 2 according to the second embodiment of the present invention that executes a Java (R) class file as intermediate code. The intermediate code execution system 2 includes a storage unit 201, a processing unit 202, and an input unit 203. The storage unit 201, the processing unit 202, and the input unit 203 are substantially the same as the storage unit 101, the processing unit 102, and the input unit 103 of the intermediate code preprocessing device 1 according to the first embodiment. The instruction pattern 201a, the alternative instruction 201b, and the class file 201c stored in the storage unit 201 are stored in the storage unit 101 of the intermediate code preprocessing apparatus 1 according to the first embodiment. 101b and substantially the same as the class file 101c. Therefore, the duplicate description about these is omitted here.
[0051]
  Note that this embodiment mainly corresponds to the invention described in claim 3 or 17, wherein the storage unit 201 corresponds to the storage unit in the invention, and the processing unit 202 corresponds to the processing unit. .
[0052]
  In the configuration as described above, each function of the intermediate code execution system 2 is realized by executing a series of software programs by the processing unit 202, and pre-processing is performed on the class file 201c as described below. The processed class file 201c is executed.
[0053]
  FIG. 6 is a flowchart for explaining the preprocessing and execution procedure of the class file 201c in the present embodiment. This procedure is based on the premise that the class file 201c input in advance from the input unit 203 is stored in the storage unit 201, as in the first embodiment.
[0054]
  First, preprocessing of the intermediate code is started (S201), and the processing unit 202 reads a table of instruction patterns 201a and alternative instructions 201b associated with each other from the storage unit 201 (S202). Next, the processing unit 202 searches the class file 201c to identify the instruction pattern 201a (S203). Then, the processing unit 202 replaces the specified instruction pattern 201a with the substitute instruction 201b (S204), and the intermediate code pre-processing ends (S205). Since the above processing is the same procedure as the preprocessing in the first embodiment, detailed description thereof is omitted.
[0055]
  Next, the pre-processed class file 201c is executed as described above. Here, a software program that constitutes an interpreter capable of interpreting and executing the substitute instruction 201b with the same content as the instruction pattern 201a is executed, whereby the processing unit 202 receives instructions from the class file 201c stored in the storage unit 201. Is extracted (S206), and processing corresponding to the extracted instruction is executed by the processing unit 202 (S207).
[0056]
  According to the intermediate code execution system 2 according to the second embodiment, the preprocessing for replacing the instruction pattern 201a with the alternative instruction 201b is performed on the class file 201c by the procedure as described above, and the intermediate code subjected to this preprocessing is performed. Can be executed. Therefore, it is possible to execute intermediate code in which the code length of the class file 201c is shortened and redundant processing between instructions is omitted, thereby improving the performance during execution of the intermediate code. Furthermore, when executing pre-processed intermediate code, it is possible to further improve the performance during execution of the intermediate code by interpreting and executing the alternative instruction as processing that minimizes overhead factors such as memory access. is there.
[0057]
  The procedure shown in FIG. 6 shows the case where the preprocessing and the execution of the class file are performed continuously. However, the preprocessing and the execution of the class file do not necessarily have to be performed continuously. Alternatively, pre-processing may be performed, and the class file subjected to the pre-processing may be executed after a certain time.
[0058]
  Further, the instruction pattern 201a associated with the alternative instruction 201b is not limited to one type, and may be two or more types. In such a case, when the preprocessing and the class file execution are successively performed according to the procedure shown in FIG. 6, in order to start the class file execution with as little preprocessing overhead as possible. Alternatively, only a part of the instruction patterns 201a associated with the alternative instruction 201b may be subjected to preprocessing for replacement with the alternative instruction.
[0059]
  Furthermore, the performance of the MPU and microcontroller constituting the processing unit 202 varies depending on the device on which the intermediate code execution system 2 is mounted, and the time margin required for preprocessing and the processing capacity of the device system depending on the situation. There are also changes. Therefore, when there are a plurality of instruction patterns associated with alternative instructions, how many instruction patterns are to be replaced may be statically adjusted according to the characteristics and situation of the device. By doing in this way, the pre-processing according to the characteristic and condition of the apparatus in which the intermediate code execution system 2 is mounted can be realized. For example, when the intermediate code execution system 2 of the present invention is installed in a mobile phone, only a part of the command pattern is replaced when the class file downloaded to the mobile phone is immediately executed, and when the class file is not immediately executed. You may make it adjust so that all the command patterns may be replaced. By doing so, it is possible to execute the class file on the mobile phone while performing preprocessing according to the situation.
[0060]
[Third Embodiment]
  Next, an intermediate code execution system according to the third embodiment of the present invention will be described in detail with reference to FIGS.
  FIG. 7 is a diagram schematically showing an intermediate code execution system 100 according to the third embodiment of the present invention that executes a Java (R) class file as intermediate code. The intermediate code execution system 100 includes a calculation unit 5 including an MPU or a microcontroller and a storage unit 10 connected to the calculation unit 5.
[0061]
  The calculation unit 5 constitutes an intermediate code analysis unit 20 and intermediate code execution units 30A, 30B, and 30C by executing a predetermined software program. Such a software program may be stored in the storage unit 10 or may be stored in another storage unit.
[0062]
  The intermediate code execution units 30A, 30B, and 30C each function as an interpreter that sequentially interprets and executes the intermediate code. These intermediate code execution units 30A, 30B, and 30C are of different types from each other. For example, the intermediate code execution unit 30A is fast in processing the bytecode instruction F but is slow in processing the bytecode instruction G, and the intermediate code execution unit B is fast in processing the bytecode instruction G but slow in processing the bytecode instruction F. The intermediate code execution unit C seems to have an average processing speed for any bytecode instruction.
[0063]
  Further, the intermediate code analysis unit 20 analyzes the property of the method included in the class file 12 stored in the storage unit 10, selects the intermediate code execution unit 30 according to the property, and selects the method and the selected intermediate code. Processing to record the combination with the code execution unit 30 is performed. The processing performed by the intermediate code analysis unit 20 will be described in detail later.
[0064]
  The storage unit 10 includes a RAM, a ROM, and the like, and stores a class file 12 and a correspondence relationship database 13. The storage unit 10 may have a physically single configuration or a plurality of configurations.
[0065]
  The class file 12 is generated by compiling a source code file created in the Java (R) language, and includes one or more methods. This method is a collection of a plurality of bytecode instructions for realizing a specific process. The correspondence database 13 is a database that manages the processing efficiency score of each bytecode instruction in each of the intermediate code execution units 30A, 30B, and 30C.
[0066]
  The present embodiment mainly corresponds to the invention described in claim 4. The intermediate code execution units 30A, 30B, and 30C correspond to the intermediate code execution means in the invention, and the storage unit 10 stores the storage means. The intermediate code analysis unit 20 corresponds to intermediate code analysis means.
[0067]
  FIG. 8 is a data structure diagram showing an example of specific contents of the correspondence relationship database 13. As shown in FIG. 8, the correspondence database 13 stores the processing efficiency score of each bytecode instruction in each of the intermediate code execution units 30A, 30B, and 30C. Here, the score of the processing efficiency is a value obtained by quantifying how efficiently the bytecode instruction can be executed, and such a score is 40A, 30B, 30C of each intermediate code execution unit. It is preferable to define in advance according to the specifications. The data structure shown in FIG. 8 mainly corresponds to the invention described in claim 5.
[0068]
  For example, at the top of FIG. 8, the processing efficiency score is defined in each of the intermediate code execution units 30A, 30B, and 30C of the bytecode instruction a. Specifically, the score of the processing efficiency in the intermediate code execution unit 30A of the bytecode instruction a is 90, the score of the processing efficiency in the intermediate code execution unit 30B is 10, and the score of the processing efficiency in the intermediate code execution unit 30C is 10 (Here, the higher the value, the better the efficiency). Therefore, according to such a correspondence database 13, it can be seen that it is most efficient that the byte code instruction a is executed by the intermediate code execution unit 30A. Similarly, the processing efficiency score in each of the intermediate code execution units 30A, 30B, and 30C is defined in the correspondence database 13 for the bytecode instructions b and c and all the other bytecode instructions. . Note that the processing efficiency score table according to claim 5 is stored in the correspondence database 13.
[0069]
  Hereinafter, with reference to a flowchart of FIG. 9, a procedure of processing executed by the intermediate code analysis unit 20 of the intermediate code execution system 100 according to the third embodiment will be described. First, the intermediate code analysis unit 20 reads a method from the class file 12 in the storage unit 10 (S301). Next, the intermediate code analysis unit 20 analyzes the read method and specifies a bytecode instruction included in the method (S302). Since one method includes a plurality of byte code instructions, the intermediate code analysis unit 20 repeats a procedure for individually specifying the plurality of byte code instructions included in the method.
[0070]
  Next, the intermediate code analysis unit 20 inquires the correspondence database 13 in the storage unit 10, acquires the processing efficiency score corresponding to each byte code instruction specified in S102, and sums them (S303).
[0071]
  Thereafter, the intermediate code analysis unit 20 can execute the class file 12 most efficiently based on the total score of the processing efficiencies in each of the intermediate code execution units 30A, 30B, and 30C obtained in S303. A code execution unit is specified (S304). More specifically, the intermediate code analysis unit 20 may compare the total score for each intermediate code execution unit, and identify the one with the highest total score as the intermediate code execution unit used for executing the method. .
[0072]
  Finally, the intermediate code analysis unit 20 records that the method should be executed by the intermediate code execution unit 30 specified in S304 (S305). Specifically, for example, the type of the intermediate code execution unit 30 to be executed may be recorded in the management information held for each method, or the intermediate code execution unit 30 to be executed for the method. The type may be marked. The above operation is executed for all methods included in the class file 12, and the intermediate code analysis unit 20 ends the processing.
[0073]
  Hereinafter, the contents of the processing in S303 and S304 will be described more specifically, taking the correspondence database 13 shown in FIG. 8 as an example. Assuming that the method includes byte code instructions a and d, the intermediate code analysis unit 20 has a processing efficiency score of 90 in the intermediate code execution unit 30A of the byte code instruction a, and the intermediate code execution unit 30B. 10 is obtained as the score of the processing efficiency in, and 10 as the score of the processing efficiency in the intermediate code execution unit 30C. Next, the intermediate code analysis unit 20 performs processing efficiency score 50 of the byte code instruction d in the intermediate code execution unit 30A, 40 processing efficiency score in the intermediate code execution unit 30B, and processing efficiency in the intermediate code execution unit 30C. The degree score of 90 is acquired and added to the score of the bytecode instruction a.
[0074]
  In this case, the total score of processing efficiency in the intermediate code execution unit 30A is 140, the total score in the intermediate code execution unit 30B is 50, and the total score in the intermediate code execution unit 30C is 100. Therefore, the intermediate code analysis unit 20 specifies that the intermediate code execution unit 30A is used to execute the method. By performing the processing as described above, the intermediate code execution system 100 executes the method included in the class file 12 based on the content recorded by the intermediate code analysis unit 20 when executing the method included in the class file 12. It becomes possible to use the most efficient intermediate code execution unit 30A, 30B or 30C determined according to the instruction. Therefore, according to the third embodiment, it is possible to efficiently execute the methods included in the class file 12 by utilizing the intermediate code execution units 30A, 30B, and 30C having different characteristics. An execution system 100 is provided.
[0075]
[Fourth Embodiment]
  Next, the intermediate code execution system according to the fourth embodiment of the present invention will be described in detail with reference to FIGS.
  The intermediate code execution system according to the fourth embodiment has the same basic configuration as that of the third embodiment. However, in the intermediate code execution system according to the fourth embodiment, the intermediate code analysis unit 20 obtains a total value of scores uniquely determined for each byte code instruction included in the method, and sets the rank of the total value. Accordingly, it is different from the third embodiment in that any one of the intermediate code execution units 30A, 30b, and 30C is specified. The present embodiment mainly corresponds to the invention described in claim 6.
[0076]
  Hereinafter, this point will be described in detail. In the intermediate code analysis unit 20, in order to realize the above-described specifying method, the correspondence database 13 in the fourth embodiment includes each bytecode instruction as shown in FIG. 10 and the score of each bytecode instruction. A table for defining the correspondence relationship and a table for defining the correspondence relationship between the total score range and the intermediate code execution units 30A, 30B, and 30C as shown in FIG. 11 are included.
[0077]
  Among these, the former will be described based on the example of FIG. 10. The left side of FIG. 10 shows each byte code instruction, and the right side of FIG. 10 shows the score value set corresponding thereto. Here, the score of the bytecode instruction a is uniquely set to 40, the score of the bytecode instruction b is 90, and the score of the bytecode instruction c is 55. The latter will be described based on the example of FIG. 11. The left side of FIG. 11 shows the range of the total score, and the right side of FIG. 11 shows the intermediate code execution unit specified corresponding to the range of the total score. One of 30A, 30B, and 30C is shown. Here, the intermediate code execution unit 30A is specified when the total score corresponding to the bytecode instructions included in a certain method belongs to a range less than 201. Similarly, the intermediate code execution unit 30B is set to be specified when the total score is 201 or more and less than 401, and the intermediate code execution unit 30C is set to be specified when the total score is 401 or more.
[0078]
  The basic procedure of processing executed by the intermediate code analysis unit 20 in the fourth embodiment is almost the same as that in the third embodiment. That is, as shown in FIG. 7, the intermediate code analysis unit 20 reads a method from the class file 12 of the storage unit 10 (S101), specifies a bytecode instruction included in the method (S102), and stores it in the correspondence database 13 The score corresponding to each bytecode instruction specified by inquiry is acquired and summed (S103). After that, the correspondence relation database 13 is again inquired to identify the intermediate code execution unit corresponding to the total score (S104), and the fact that the method should be executed by the identified intermediate code execution unit is recorded (S105), and the process is terminated. To do.
[0079]
  Hereinafter, the contents of the processing in S103 and S104 will be described in detail using the correspondence database 13 shown in FIGS. 10 and 11 as an example. Assuming that the method includes byte code instructions a and c, the intermediate code analysis unit 20 acquires 40 as the score of the byte code instruction a and 55 as the score of the byte code instruction c. The total value is 95 (ST103). The intermediate code analysis unit 20 calculates the total value and FIG. 11, the intermediate code execution unit 30A is identified as being used for executing the method.
[0080]
  In the fourth embodiment that performs the processing as described above, as in the third embodiment, the most efficient intermediate code execution unit 30A, 30B, or 30C determined according to the bytecode instruction included in the method is used. Therefore, the intermediate code execution system 100 with extremely high performance is provided.
[0081]
[Fifth Embodiment]
  Next, an intermediate code execution system according to the fifth embodiment of the present invention will be described in detail with reference to FIGS.
  FIG. 12 is a diagram schematically illustrating an intermediate code execution system 200 according to the fifth embodiment of the present invention. The intermediate code execution system 200 has the same basic configuration as the third and fourth embodiments, but the third and fourth embodiments have a general intermediate code execution unit 31 and a special intermediate code execution unit 32. Is different.
[0082]
  In this intermediate code execution system, the general intermediate code execution unit 31 and the special intermediate code execution unit 32 execute the class file 12. The general intermediate code execution unit 31 is an interpreter that sequentially interprets and executes a class file, and has a normal function of executing all bytecode instructions. On the other hand, the special intermediate code execution unit 32 can execute a specific byte code instruction at a higher speed than the general intermediate code execution unit 31, but some instructions (for example, byte code instructions related to floating point arithmetic) ) Is a special interpreter that cannot execute.
[0083]
  The correspondence database 13 in the fifth embodiment has a data structure for identifying whether or not each bytecode instruction can be executed by the special intermediate code execution unit 32 for each bytecode instruction. .
[0084]
  The present embodiment mainly corresponds to the invention described in claim 7, wherein the special intermediate code execution unit 32 corresponds to the special intermediate code execution means in the invention, and the general intermediate code execution unit 31 is a general The storage unit 10 corresponds to intermediate code execution means, the storage unit 10 corresponds to storage means, and the intermediate code analysis unit 20 corresponds to intermediate code analysis means.
[0085]
  Hereinafter, with reference to a flowchart of FIG. 13, a procedure of processing executed by the intermediate code analysis unit 20 of the intermediate code execution system 200 according to the fifth embodiment will be described. First, the intermediate code analysis unit 20 reads a method from the class file 12 in the storage unit 10 (S201). Next, the intermediate code analysis unit 20 analyzes the read method, specifies a bytecode instruction included in the method (S202), and the specified bytecode instruction cannot be executed by the special intermediate code execution unit 32. Whether it is a code command or not is determined based on the contents of the correspondence database 13 (S203). If it is determined in S203 that the special intermediate code execution unit 32 does not include an inexecutable bytecode instruction, the intermediate code analysis unit 20 determines that the special intermediate code execution unit 32 should execute the method. Record (S204). On the other hand, when it is determined in S203 that the special intermediate code execution unit 32 includes a bytecode instruction that cannot be executed, the intermediate code analysis unit 20 records that the method should be executed by the general intermediate code execution unit 31 ( S205). The recording method may be the same as in the third and fourth embodiments. The above operation is executed for all methods included in the class file 12, and the intermediate code analysis unit 20 ends the processing.
[0086]
  According to the fifth embodiment as described above, a specific bytecode instruction can be executed at a high speed, but a part of the bytecode instructions cannot be executed, and all instructions are executed. The intermediate code execution system that can execute a specific bytecode instruction at a high speed and can execute all the bytecode instructions by using the general intermediate code execution unit 31 that can be used for each method. 200 is provided.
[0087]
[Sixth Embodiment]
  Next, an intermediate code execution system according to the sixth embodiment of the present invention will be described in detail with reference to FIG.
  The intermediate code execution system 300 according to the sixth embodiment executes a Java (R) class file as intermediate code. As shown in FIG. 14, the intermediate code execution system 300 is a method that is virtually configured by executing a predetermined program by a storage unit 301 that mainly stores a class file 302 and a processing unit (not shown). It comprises an analysis unit 307, a first subsystem 308, and a second subsystem 310.
[0088]
  The class file 302 stored in the storage unit 301 is obtained by compiling a source code created in the Java (R) language. This class file 302 includes methods 303 to 305.
[0089]
  The class file 302 is distributed in the form of a compressed jar file and may be decompressed by the intermediate code execution system 300. The jar file is an archive file in which class files necessary for operating the Java (R) program are combined. However, in FIG. 14, the class file is already stored in the storage unit 301.
[0090]
  The first subsystem 308 has a first interpreter 309. The first interpreter 309 can sequentially interpret and execute the bytecode instructions included in the Java (R) class file. The first interpreter 309 is a normal instruction code set corresponding to all of the bytecode instructions generated by compiling the instruction code set generated at the time of compilation, that is, the source code created in the Java (R) language here. It is an interpreter.
[0091]
  On the other hand, the second subsystem 310 includes a preprocessing unit 311 having a configuration and functions substantially the same as those of the intermediate code preprocessing device described above, and a second interpreter 312. As described above, the pre-processing unit 311 replaces a specific byte code instruction pattern with a corresponding alternative instruction so as to replace the instruction pattern “iload”, “iload”, “iadd” with “v_v_iadd”, for example. Processing is applied to each method of the class file 302. Further, the second interpreter 312 is configured to be able to interpret and execute an alternative instruction added to the method after replacement in order to correspond to the method subjected to the processing in this way.
[0092]
  More specifically, replacing a specific instruction pattern with an alternative instruction in the pre-processing unit 311 converts the combination of an operation code and an operand forming the specific instruction pattern into a newly defined set of an operation code and an operand of the alternative instruction. It means to replace. The operation code represents the operation of the instruction, and the operand represents the stack, register, or the like that is the target of the instruction.
[0093]
  However, in the case of Java (R), the length of the operation code is limited to 1 byte, so the number of operation codes cannot be increased freely. Therefore, in the sixth embodiment, an alternative instruction is assigned to an operation code to which another instruction is normally assigned, and the execution code is interpreted as an alternative instruction at the time of execution, which is substantially the same as that formed by the instruction pattern before replacement. Make sure you follow the steps.
[0094]
  That is, in the sixth embodiment, for example, an alternative instruction is assigned to an operation code to which a floating point arithmetic instruction is assigned in a normal byte code instruction. Then, in the second interpreter 312, the operation code is interpreted and executed in the same procedure as that of the instruction pattern before replacing the operation code with the substitute instruction.
[0095]
  As described above, in the second subsystem 310, the method can be executed by the second interpreter 312 after being preprocessed by the preprocessing unit 311. However, in the above-described example, the second subsystem 310 cannot execute a method including a floating point arithmetic instruction.
[0096]
  The method analysis unit 307 analyzes an instruction included in the method to be executed, and selects whether to execute the method in the first subsystem 308 or the second subsystem 310 according to the instruction. The result is then marked on the method. That is, the function of the method analysis unit 307 in the sixth embodiment corresponds to the function of the intermediate code analysis unit 20 in the fifth embodiment.
[0097]
  The present embodiment mainly corresponds to the invention described in claims 9 to 14, wherein the storage unit 301 corresponds to a storage unit in the invention, the preprocessing unit 311 corresponds to a preprocessing unit, and The first and second interpreters 309 and 310 correspond to first and second interpreters, and the method analysis unit 307 corresponds to intermediate code analysis means or a selection unit.
[0098]
  Next, a procedure for executing the method 303 included in the class file 312 by the intermediate code execution system 300 having the above configuration will be described. First, the method analysis unit 307 analyzes an instruction included in the method 303. For example, as described above, in the second subsystem 310, when the operation code of the alternative instruction is assigned to the operation code of the floating-point operation instruction, it is determined whether or not the method 303 includes a floating-point operation instruction. Then, from the result, a subsystem to be used for executing the method 303 is marked at a predetermined position 306 of the method 303.IeIf it is determined that the method 303 includes a floating point arithmetic instruction, it is selected to be executed by the first subsystem 309. If it is determined that the method 303 does not include a floating point arithmetic instruction, the method 303 is selected to be executed by the second subsystem 310.
[0099]
  When it is selected to be executed by the first subsystem 309, the method 303 is sequentially interpreted and executed by the first interpreter 309 as it is.
[0100]
  On the other hand, when it is selected to be executed by the second subsystem 310, the preprocessing unit 311 performs preprocessing on the method 303, and replaces a certain pattern formed by a plurality of instructions included in the method 303 with an alternative instruction. . Thereafter, the second interpreter 312 corresponding to the substitute instruction is sequentially interpreted and executed.
[0101]
  Then, when the execution of the method 303 is completed as described above, one of the methods 303 to 305 is sequentially executed according to the contents of the class file 302 until the program ends.
[0102]
  According to the configuration of the intermediate code execution system 300 and the method execution procedure according to the sixth embodiment, although some instructions cannot be executed, a specific instruction pattern included in the method is replaced with an alternative instruction and executed. By doing so, the second subsystem 310 that can execute the method at high speed without redundant processing between instructions can be executed, but all the instructions can be executed although the method execution speed is not increased. The class file can be executed with excellent performance by effectively operating the first subsystem 308.
[0103]
  The first to sixth embodiments can be variously modified. For example, in the first and second embodiments, preprocessing is performed in units of class files. However, in these embodiments, preprocessing may be performed in units of methods as in the sixth embodiment. Absent. Further, the data structure in the correspondence database 13 and the score setting there in the third and fourth embodiments are not limited to the above.
[0104]
  Further, instead of the combination of the first subsystem 309 and the second subsystem in the sixth embodiment, each has a pre-processing unit for replacing a specific instruction pattern with an alternative instruction and an interpreter capable of executing the alternative instruction. Two subsystems may be used. When such a combination of subsystems is used, both subsystems can be used properly by assigning alternative instructions to different operation codes in both subsystems. The number of subsystems may be three or more.
[0105]
  Furthermore, in the sixth embodiment, a case is shown in which preprocessing is performed when a method is executed in the second subsystem 310. However, for a method that has been executed once, by storing the preprocessed method in the storage unit 301. The preprocessing may be omitted. Alternatively, all methods may be analyzed by the method analysis unit 307 during class loading, and pre-processing may be performed in advance for methods that are to be executed by the second subsystem 310. Furthermore, preprocessing may be performed at the time of compilation.
[0106]
  In a situation where it is difficult to allow memory consumption or overhead in the analysis by the method analysis unit 307 or the preprocessing by the preprocessing unit 311, the first subsystem 308 executes the method by omitting these. Also good. Furthermore, in the sixth embodiment, as an example, a case where an alternative instruction is assigned to an operation code to which a floating-point operation instruction is assigned has been described, but the present invention is not limited to this. An alternative instruction may be assigned to an opcode to which another instruction is assigned.
[0107]
  The first to sixth embodiments can be applied to intermediate code obtained by modifying a Java (R) class file, and even if it is a language other than Java (R), Anything can be applied as long as it is assumed that the code is executed in an intermediate code with the native code.
[0108]
  The first to sixth embodiments of the present invention have been described above. That is, according to the first and second embodiments, a predetermined instruction pattern is specified, and the specified instruction pattern is replaced with a substitute instruction that is a shortened code. Accordingly, it is possible to reduce the types of instructions and obtain a new intermediate code in which redundant processing between instructions is omitted. Moreover, the size of the intermediate code does not increase by this preprocessing. In addition, the preprocessing itself can be executed at high speed because only simple replacement is performed. Furthermore, the intermediate code can be executed at high speed by executing the obtained new intermediate code in the execution system corresponding to the alternative instruction.
[0109]
  According to the third embodiment, a plurality of intermediate code execution units are provided in the apparatus, and the intermediate code analysis unit analyzes the intermediate code to be executed so that it is suitable for efficient execution of the intermediate code. Select and record the intermediate code execution unit. Accordingly, by selecting the recorded intermediate code execution unit, the intermediate code can be executed at high speed. In addition, the correspondence relationship between each bytecode instruction included in the intermediate code and the score of the processing efficiency in each intermediate code execution means is stored, and based on this, an intermediate code execution unit used for execution of the intermediate code is specified. Therefore, it is possible to determine an appropriate intermediate code execution unit for efficient execution of bytecode instructions based on detailed settings in consideration of the properties of each intermediate code execution unit.
[0110]
  Further, according to the fourth embodiment, the correspondence relationship between each bytecode instruction included in the intermediate code and the processing efficiency score in the intermediate code execution unit, the range of the score, and the intermediate code execution unit specified in accordance with the score range, The intermediate code execution unit to be used for the execution of the intermediate code is specified based on these. Therefore, even when a large number of intermediate code execution units are prepared, it is possible to enjoy the advantage that it is not necessary to set and accumulate the processing efficiency score for each intermediate code execution unit.
[0111]
  According to the fifth embodiment, two types of intermediate code execution units, a special intermediate code execution unit and a general intermediate code execution unit, are provided, and the intermediate code including byte code instructions that cannot be executed by the special intermediate code execution unit. Only the general intermediate code execution unit is executed, while the other intermediate code is executed by the special intermediate code execution unit. Therefore, in the case where the intermediate code output unit is selected alternatively between the intermediate code execution unit specialized for specific processing and the intermediate code execution unit that can be used for general purposes, the intermediate code is executed. A system that can be realized at extremely high speeds can be provided.
[0112]
  According to the sixth embodiment, although a part of the instructions cannot be executed, a specific instruction pattern included in the method is replaced with an alternative instruction and executed, thereby performing redundant processing of the instruction question. The second subsystem that can execute the method at a high speed without the above and the first subsystem that can execute all the instructions, although the method execution is not accelerated, is effectively operated. Can execute class files with good performance.
[0113]
  The present invention is not limited to the first to sixth embodiments, and various improvements and changes can be made within the scope of the object. For example, in the third to fifth embodiments described above, a correspondence relationship between a bytecode instruction included in the intermediate code and the intermediate code execution unit appropriate for efficient execution of the bytecode instruction is stored in advance. did. However, the present invention is not limited to this, and the correspondence relationship may be changed according to the situation. Also, it is possible to increase the execution speed by realizing at least a part of the interpreter function with a hardware accelerator. Employing this hardware accelerator has various advantages such as an increase in memory requirement and a method suitable for an embedded device.
[0114]
【The invention's effect】
  According to the present invention, the intermediate code executed by the virtual machine is preprocessed to improve the execution speed, and can be suitably applied to an embedded device. The intermediate code can process the intermediate code at high speed. Code executionSystemCan be provided.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an intermediate code preprocessing apparatus according to a first embodiment of the present invention.
FIG. 2 is a flowchart for explaining a process of preprocessing intermediate code by the intermediate code preprocessing apparatus according to the first embodiment of the present invention;
FIG. 3 is a correspondence diagram for explaining the association between an intermediate code and an alternative instruction by the intermediate code preprocessing apparatus according to the first embodiment of the present invention;
FIG. 4 is a diagram for explaining each stage of a process of preprocessing an intermediate code by the intermediate code preprocessing apparatus according to the first embodiment of the present invention.
FIG. 5 is a block diagram showing a configuration of an intermediate code execution system according to a second embodiment of the present invention.
FIG. 6 is a flowchart for explaining processing by the intermediate code execution system according to the second embodiment of the present invention;
FIG. 7 is a block diagram showing a configuration of an intermediate code execution system according to a third embodiment of the present invention.
FIG. 8 is a data structure diagram of a correspondence database 13 employed by an intermediate code execution system according to a third embodiment of the present invention.
FIG. 9 is a flowchart showing an operation by the intermediate code analysis unit 20 in the intermediate code execution system according to the third embodiment of the present invention.
FIG. 10 is a data structure diagram of a correspondence database 13 employed by an intermediate code execution system according to a fourth embodiment of the present invention.
FIG. 11 is a data structure diagram of a correspondence database 13 employed by an intermediate code execution system according to a fourth embodiment of the present invention.
FIG. 12 is a block diagram showing a configuration of an intermediate code execution system according to a fifth embodiment of the present invention.
FIG. 13 is a flowchart showing an operation by the intermediate code analysis unit 20 employed by the intermediate code execution system according to the fifth embodiment of the present invention.
FIG. 14 is a block diagram showing a configuration of an intermediate code execution system according to a sixth embodiment of the present invention.
[Explanation of symbols]
  1 Intermediate code pre-processing device
  2 Intermediate code execution system
  5 Calculation unit
10 storage unit
12 class files
13 Correspondence D / B
20 Intermediate code analysis section
30 Intermediate code execution part
31 General intermediate code execution part
32 Special intermediate code execution section
101 storage unit
102 processing unit
103 Input section
201 Storage unit
202 processing unit
203 Input section

Claims (2)

In an intermediate code execution system that executes intermediate code obtained by compiling source code created in a predetermined programming language,
A plurality of intermediate code execution means for executing the intermediate code;
Storage means for storing the intermediate code, and storing a correspondence relationship between an instruction included in the intermediate code and the intermediate code execution means suitable for efficient execution of the instruction;
Intermediate code analysis means,
The intermediate code analyzing means is
a) processing for specifying an instruction included in the intermediate code stored in the storage means;
b) a process of identifying an intermediate code execution unit suitable for efficient execution of the intermediate code based on the identified instruction and the correspondence relationship;
c) An intermediate code execution system for executing a process of recording a relationship between the intermediate code and the specified intermediate code execution means. The correspondence relationship between the instruction in the storage means and the intermediate code execution means suitable for efficient execution of the instruction includes a score table of processing efficiency when each instruction is executed by each of the intermediate code execution means,
The process of b)
b1) Based on the score table, a process for obtaining a score of the processing efficiency when the identified instruction is executed by each of the intermediate code execution means;
b2) a process of summing up the obtained scores for each intermediate code execution means;
2. The intermediate code execution system according to claim 1, further comprising: b3) a process of identifying the intermediate code execution unit used for executing the intermediate code based on the score totaled for each intermediate code execution unit. .

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