JP4223194B2 - Nonlinear distortion compensation transmitter with failure determination function - Google Patents

Nonlinear distortion compensation transmitter with failure determination function Download PDF

Info

Publication number
JP4223194B2
JP4223194B2 JP2001022688A JP2001022688A JP4223194B2 JP 4223194 B2 JP4223194 B2 JP 4223194B2 JP 2001022688 A JP2001022688 A JP 2001022688A JP 2001022688 A JP2001022688 A JP 2001022688A JP 4223194 B2 JP4223194 B2 JP 4223194B2
Authority
JP
Japan
Prior art keywords
distortion compensation
compensation coefficient
signal
distortion
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001022688A
Other languages
Japanese (ja)
Other versions
JP2002232305A (en
Inventor
徳郎 久保
高義 大出
和男 長谷
一 浜田
広吉 石川
泰之 大石
伸和 札場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2001022688A priority Critical patent/JP4223194B2/en
Publication of JP2002232305A publication Critical patent/JP2002232305A/en
Application granted granted Critical
Publication of JP4223194B2 publication Critical patent/JP4223194B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Description

【0001】
【発明の属する技術分野】
本発明は、故障判定機能を備えた非線形歪補償送信装置に関し、送信装置内における増幅器やミキサー等の非線形歪を補償する非線形歪補償装置(リニアライザ)を備え、アナログ系回路部等のゲイン変動や故障の発生を早期に判定し検出する非線形歪補償送信装置に関する。
【0002】
隣接帯域への漏洩電力比が厳しく規定されている無線通信システムにおいては、隣接帯域への漏洩電力比の劣化をもたらす増幅器等の非線形歪を精度良く補償する非線形歪補償装置(リニアライザ)が要求されている。特に、近年、周波数利用効率の良い線形変調方式(QPSK等)の無線通信装置は携帯用通信端末等として多く使用されているが、それらの送信装置においても隣接帯域への漏洩電力が小さくなるよう高い線形性が要求される。
【0003】
一般に、送信装置の最終段の高出力増幅器に高い線形性を求めると、相反的に電力効率が低下し、増幅器の電力効率を上げるには回路規模、電源容量、放熱手段等の制約条件がより厳しくなる。そこで、電力効率の良い非線形領域で増幅器を使用し、リニアライザにより出力信号が線形となるように非線形歪を補償することによって、高い電力効率と線形性とを同時に満たすことが可能となる。
【0004】
リニアライザには幾つかの方式があるが、本発明は、ディジタル信号処理によって非線形歪補償を行う所謂「ディジタルプリディストーション方式」のリニアライザを備えた送信装置を対象とし、その送信装置内の故障判定を早期に且つ精度良く行うようにしたものである。
【0005】
【従来の技術】
図8はリニアライザの原理説明図である。リニアライザは、乗算器8−1と歪補償テーブル8−2と歪補償係数更新部8−3と減算器8−4とを備え、入力信号x(t)に対して非線形歪f(p)を与える増幅器やミキサ等の非線形部8−5からの非線形出力信号y(t)=x(t)・f(p)と、入力信号x(t)との誤差(エラー信号)を減算器8−4により検出する。
【0006】
該エラー信号は歪補償係数更新部8−3に入力され、歪補償係数更新部8−3はエラー信号が最小に成るように歪補償テーブル8−2の歪補償係数h(p)を更新する。そして、更新された歪補償係数h(p)を歪補償テーブル8−2から読み出し、乗算器8−1によって入力信号x(t)に乗じてプレディストーションを与え、非線形部8−5による非線形出力信号y(t)が線形となるように歪補償を行う。
【0007】
図9にリニアライザを用いた送信装置の構成を示す。乗算器8−1、歪補償テーブル8−2、歪補償係数更新部8−3及び減算器8−4から構成されるリニアライザ9−1に、ベースバンド信号を入力し、リニアライザ9−1の出力信号を順次、変調器(MOD)9−2、ディジタルアナログ変換器(DAC)9−3、バンドパスフィルタ9−4、無線周波数へのアップコンバータ9−5、ドライバアンプ9−6、パワーアンプ9−7に接続し、アンテナ9−8から無線送信信号として送出する。
【0008】
そして、最終段パワーアンプ9−7の出力信号の一部を取り出し、ダウンコンバータ9−9、可変減衰器(V_ATT)9−10、バンドパスフィルタ9−11、アナログディジタル変換器(ADC)9−12、復調器(DEM)9−13へ順次入力することにより、上記出力信号を元のベースバンド信号に戻してフィードバック信号を生成し、該フィードバック信号をリニアライザ9−1のエラー信号検出用の減算器8−4に入力し、リニアライザ9−1によりプリディストーションを与えて歪補償を行う。
【0009】
【発明が解決しようとする課題】
このようなリニアライザ9−1により歪補償を行う送信装置において、ディジタルアナログ器(DAC)9−3以降のアナログ系回路部が故障し、ゲインが大幅に変動したりすると、本来の線形特性が得られなくなるばかりでなく、却って線形性を劣化させてしまう場合がある。
【0010】
一般に、アナログ系回路部のパワーアンプ等の故障に対処する手段は幾つかあるが、その一例として図10の(a)に示すように、二つのパワーアンプ(PA)10−1,10−2を設け、該二つのパワーアンプ(PA)10−1,10−2をハイブリッド回路10−3,10−4によりパラレルに接続し、常時二つのパワーアンプ(PA)10−1,10−2を並行動作させる。
【0011】
上記の構成により、一方のパワーアンプ(PA)(例えば10−1)が故障して信号を全く出力しなくなったとしても、他方の正常なパワーアンプ(PA)(例えば10−2)から信号が出力されるため、送信装置全体の出力レベルは低下しても、送信装置自体が全く使用不可能となることはない。
【0012】
しかしながら、上記のような二つのパワーアンプ(PA)が並列動作する送信装置に、前述のリニアライザを適用した場合、リニアライザは、一方のパワーアンプ(PA)の故障による出力レベル低下に対して、元の出力レベルに上げるようにプレディストーションを与えようとするが、プレディストーションによっては補償し得ないレベル低下に対してもプレディストーションを与えようとするため、歪補償係数の更新も誤ったものになり、正しい歪補償が行われなくなり、リニアライザを使用しない送信装置よりも出力信号は線形性が劣化してしまう。
【0013】
また、アナログ系回路部の故障に対処する手段として、図10の(b)に示すように、ベースバンド信号を送信ダイバーシティ処理部10−5により二つに分離し、リニアライザを含む二つの送信部(TX)10−6,10−7からパワーアンプ(PA)10−8,10−9及びアンテナを介して同時に送信信号を送出する送信ダイバーシチを採用することができる。
【0014】
この場合、一方の送信部(TX)又はパワーアンプ(PA)が故障した場合、他方の送信部(TX)及びパワーアンプ(PA)から送信信号が送出されるので、送信装置としては動作可能であるが、送信ダイバーシチの機能は果たせなくなるので、故障を早期に判定して使用者に報知し、また、大きなゲイン変動による非線形歪の発生を抑止するための措置が必要となる。
【0015】
図10の(c)は送信部を冗長構成とした例を示す。この構成例は、リニアライザを含む二つの送信部(TX)10−10,10−11を設け、通常状態では、各送信部(TX)10−10,10−11は、それぞれのパワーアンプ10−12,10−13及びアンテナを介して、それぞれ異なるセクターへ送信信号を送出する。
【0016】
一方の送信部(TX)(例えば10−10)が故障した場合、切り替えスイッチ10−14,10−15,10−16,10−17を、図示の接点位置から反対側の接点位置に切り替えることにより、もう一方の送信部(TX)(例えば10−11)は、これまでのパワーアンプ10−13への送信と共に、パワーアンプ10−12への送信も行う。
【0017】
この場合、送信部(TX)10−11内の一つのリニアライザが二つのパワーアンプ10−12,10−13に対して歪補償を行う構成に自動的に切り替わる構成にしないと、却って線形特性を劣化させてしまう。また、一つのリニアライザで二つのパワーアンプの歪補償を行うように切り替える際に、構成の変更に伴って生じるアナログ系回路のゲイン変動を、アナログ系回路で補正するか又はディジタル系処理部で補正する必要がある。
【0018】
本発明は、リニアライザにより非線形歪補償を行う送信装置において、アナログ系回路部の故障やゲイン変動、或いは歪補償係数の更新処理の障害等によって引き起こされる出力信号の線形性劣化を防ぐために、これらの故障やゲイン変動を早期に判定し検出する故障判定機能を備えた非線形歪補償送信装置を提供することを目的とする。
【0019】
【課題を解決するための手段】
本発明の非線形歪補償送信装置は、(1)非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、出現頻度の高い入力信号レベルに対する歪補償係数を抽出し記憶する歪補償係数記憶手段と、該抽出した歪補償係数の値を、所定回数前に抽出し記憶した歪補償係数の値と比較し、その変化値に基づいて送信装置の故障を判定する故障判定手段とを備えたものである。
【0020】
また、(2)前記歪補償係数記憶手段は、更に初期段階に抽出した歪補償係数を記憶し、前記故障判定手段は、抽出した歪補償係数の値を該初期段階の歪補償係数と比較し、その変化値に基づいてアナログ系回路部のゲイン変動を検出する構成を備えたものである。
【0021】
また、(3)前記歪補償係数の更新動作を間欠的に行わせ、更新動作の停止期間中に、前記フィードバック信号と入力信号との誤差を測定する手段と、該フィードバック信号と入力信号との誤差に基づいて送信装置の故障を判定する故障判定手段とを備えたものである。
【0022】
【発明の実施の形態】
図1は本発明の故障判定部による非線形歪補償送信装置の観測点を示す。図1において、乗算器8−1と歪補償テーブル8−2と歪補償係数更新部8−3と減算器8−4とにより、非線形歪補償送信装置におけるリニアライザを構成する。
【0023】
本発明は、非線形歪補償送信装置の故障を診断する観測点として、リニアライザの歪補償テーブル8−2から読み出される歪補償係数S1、又は減算器8−4から出力される歪補償対象の入力信号(ベースバンド信号)と非線形回路部を経た最終段出力信号のフィードバック信号との差分信号であり、歪補償係数更新部8−3に入力されるエラー信号S2を観測する。そしてその観測点の変化値を故障判定部1−1で監視することにより、非線形歪補償送信装置が故障しているかどうかを判定する。
【0024】
上記歪補償係数S1は、アナログ系回路部が正常に動作している場合、或る一定値に収束した値となるが、アンプが故障し又はゲイン変動した場合、その値が変化する。そこで、歪補償係数S1の変化を観測することにより、アンプの故障又はゲイン変動の発生を判定することができる。
【0025】
アナログ系回路部の故障又は急なゲイン変動が発生すると、フィードバック動作によりその変動を吸収する方向に歪補償係数S1が変化し始める。即ち、歪補償係数S1の変動がアナログ系回路部の変動を表わすので、この歪補償係数S1を観測することにより、アナログ系回路部の故障又はゲイン変動の発生を判定することが可能となる。更に、ゲインの変動量を歪補償係数S1の変化値から推定することができ、アナログ系回路部の経年変化や熱変動によるゲインの変動量を、歪補償係数S1の追従動作の観測によって監視することができる。
【0026】
上記エラー信号S2は、参照信号(入力信号)とフィードバック信号との差分信号なので、正常動作時には非常に小さい値(ほぼ零)に収束しているが、アナログ系回路部にゲイン変動が起こると、エラー信号のレベル値が増大するので、その変動を観測することにより、故障又はゲイン変動の発生を判定することができる。
【0027】
図2は歪補償係数観測により故障判定を行う本発明の第1の実施形態を示す。歪補償係数の観測は、歪補償テーブル8−2の歪補償係数を更新するための書込みアドレス(write )から特定の固有アドレスを検出する固有アドレス検出器2−1と、該固有アドレスの歪補償係数の更新値を記憶する歪補償係数メモリ2−2と、最新の歪補償係数と過去の歪補償係数とを比較判定する故障判定部2−3とを備える。
【0028】
歪補償テーブル8−2は、入力ベースバンド信号のレベル値に対応したアドレス(read)を入力し、該アドレス(read)位置の歪補償係数を読出して乗算器8−1に出力する。一方、該入力ベースバンド信号を遅延部(delay )2−4に入力し、入力ベースバンド信号がアナログ系回路部を経てフィードバックされ、そのエラー信号を基に更新値が算出されるまでの時間分入力ベースバンド信号を遅延させ、該遅延させた入力ベースバンド信号のレベル値に対応した歪補償テーブル8−2の書込みアドレス(write )に、算出した歪補償係数の更新値を書込んで更新する。
【0029】
固有アドレス検出器2−1は、上記歪補償テーブル8−2の更新用の書込みアドレス(write )を入力し、入力された書込みアドレス(write )を予め設定された或る特定のアドレス値と比較し、一致した場合にトリガ信号を歪補償係数メモリ2−2に出力する。
【0030】
固有アドレス検出器2−1に予め設定されるアドレスは、通常動作時において高い頻度で出現する入力信号レベル値に対応したアドレスを設定する。一般に、入力信号レベル値の頻度分布はフラットではなく、最も多く出現する信号レベル値が存在する。そこで、入力信号レベル値の頻度分布を測定し、最も出現頻度の高い入力信号レベル値について故障判定を行うことにより、故障検出時間の遅れをより少なくすることができる。
【0031】
歪補償係数メモリ2−2は、このトリガ信号が入力されたとき、歪補償テーブル8−2へ出力される歪補償係数の更新値を取り込んで記憶する。歪補償係数メモリ2−2は、過去に取り込んだ幾つかの歪補償係数を記憶し、今取り込んだ最新の歪補償係数とそのN回前に取り込んだ過去の歪補償係数とを故障判定部2−3に出力する。ここでNは適宜設定した1以上の整数である。
【0032】
故障判定部2−3は、最新の歪補償係数とN回前の歪補償係数とを基に、歪補償係数の変動を観測して故障を判定する。例えば、最新の歪補償係数とN回前の歪補償係数との差又は比を所定の閾値と比較し、該閾値を越えた場合に故障と判定して故障フラグを出力する。
【0033】
この場合、比較する歪補償係数同士の更新回数の差(ここではN)を適宜設定すると共に、該更新回数の差(N)に応じて故障判定の基準とする変動量の閾値を決定する。更新回数の差(N)を小さくした場合、故障していても僅かの変動量しか観測されないため、判定誤差を生じやすい。
【0034】
逆に、更新回数の差(N)を大きくした場合、故障していれば大きな変動量が観測されるので故障判定の精度を向上させることができるが、あまり大きくすると故障判定にタイムラグを生じ好ましくない。従って、最適な更新回数の差(N)を設定して故障判定を行う必要があるが、これはリニアライザにおける歪補償係数の更新の時定数に依存する。
【0035】
更に、上述の実施形態において、最新の歪補償係数とN回前の歪補償係数と比較する際に、最も出現頻度の高い信号レベル値と、その近辺の複数の信号レベルに対して、同様に最新の歪補償係数とN回前の歪補償係数とを比較して故障判定を行うことにより、故障判定の精度を向上させることができる。
【0036】
図3は歪補償係数観測により故障判定を行う本発明の第2の実施形態を示す。この第2の実施形態は、歪補償係数メモリ3−1に、第1の実施形態におけるN回前の歪補償係数と共に、更に初期の段階(アナログ系回路部のゲインを調整した起動時)の歪補償係数を記憶させておき、故障判定及びゲイン変動検出部3−2は、最新の歪補償係数を、N回前の歪補償係数と比較すると共に、該初期段階の歪補償係数とも比較することにより、第1の実施形態と同様の故障判定のみならず、初期段階からのゲインの変動量を歪補償係数の変動量から推定することができる。
【0037】
歪補償係数は、通常状態では各入力信号レベル値に対して収束した一定の或る値となり、緩やかな経年変化や熱変動に追従して変化するのみである。アナログ系回路部の故障等により急なゲイン変動が発生すると、ネガティブフィードバック動作により、その変動を吸収する方向に歪補償係数が変化し始める。
【0038】
従って、この歪補償係数の変動がゲインの変動を表わすことになる。ゲイン変動は、或る範囲以下の小さい変動である場合は問題にならないが、或る範囲以上に大きくなると、リニアライザの歪補償係数による変動吸収が不可能となり、歪補償動作そのものが劣化してくる。
【0039】
そこで、歪補償係数の変動量から推定したゲイン変動量を、アナログ系回路部のゲイン可変部に通知し、ゲイン可変部は、通知されたゲイン変動量を基に該ゲイン変動量が相殺されるようにゲインを変化させることにより、前述のリニアライザの歪補償係数による変動吸収が不可能となるのを防ぐことができる。
【0040】
なお、アナログ系回路部のゲイン可変部に対してゲインを変化させる構成に代えて、ディジタル系処理部における乗算器(ゲイン可変部)の係数を変化させる構成とすることによっても同様に、リニアライザの歪補償係数による変動吸収が不可能となるのを防ぐことができる。
【0041】
図4はエラー信号観測により故障判定を行う本発明の実施形態を示す。同図の(a)はエラー信号の振幅の絶対値を観測する実施形態を示し、同図の(b)はエラー信号のパワーを観測する実施形態を示す。
【0042】
エラー信号の振幅の絶対値を観測する場合、図4(a)に示すように、参照信号とフィードバック信号の差分を算出する減算器8−4の出力信号のI成分及びQ成分について、その振幅絶対値を加算し、該加算値を或る所定の期間平均化し、故障判定部4−1は該平均化した振幅絶対値の加算値を所定の判定閾値と比較して故障判定を行う。なお、この実施形態では参照信号及びフィードバック信号として複素信号を想定しているため、I成分及びQ成分という直交信号成分を示す表現を用いている。
【0043】
エラー信号のパワーを観測する場合、図4(b)に示すように、参照信号とフィードバック信号の差分を算出する減算器8−4の出力信号のI成分及びQ成分に対して、その2乗値の和を算出し、該2乗値の和を或る所定の期間平均化し、故障判定部4−1は、該平均化した2乗値の和を所定の判定閾値と比較して故障判定を行う。この実施形態も、参照信号及びフィードバック信号として複素信号を想定しているため、I成分及びQ成分の表現を用いている
【0044】
図5は本発明のゲイン変動検出部の構成を示し、前述の図3に示した故障判定及びゲイン変動検出部3−2におけるゲイン変動検出部の具体例を示す。図5の(a)は、最新の歪補償係数をデシベル値(dB)に変換し、また、初期の段階(初期起動時)の歪補償係数もデシベル値(dB)に変換し、該デシベル値(dB)に変換したこれらの歪補償係数の差分を減算器5−1により算出し、該差分値を変動ゲイン値(dB)として出力するとともに、該変動ゲイン値(dB)と所定の許容ゲイン変動値(dB)とをコンパレータ5−2により比較し、所定の許容ゲイン変動値(dB)を越えている場合に、ゲインを変化させるためのゲイン可変フラグ信号を出力する。
【0045】
また、図5の(b)は、最新の歪補償係数と初期の段階(初期起動時)の歪補償係数との差分を減算器5−3により算出し、該差分値をデシベル値(dB)に変換し、該差分値のデシベル値(dB)を変動ゲイン値(dB)として出力するとともに、該変動ゲイン値(dB)と所定の許容ゲイン変動値(dB)とをコンパレータ5−4により比較し、所定の許容ゲイン変動値(dB)を越えている場合に、ゲインを変化させるためのゲイン可変フラグ信号を出力する。
【0046】
図6は本発明による故障判定のタイミングの説明図である。本発明による故障判定を行う際、図6の(a)に示すようにリニアライザを間欠的に動作させ、故障判定は、リニアライザによる歪補償係数の更新が行われていないときに行うようにする。このようにリニアライザを間欠動作させて故障判定を行う手法は、エラー信号を基に故障判定を行うときに特に有効となる。
【0047】
アナログ系回路部が故障すると、その故障によるゲイン変動分だけフィードバック信号が変動し、エラー信号が増大するが、図6の(b)に示すように、リニアライザを常時動作させて歪補償係数を更新させた場合、ネガティブフィードバック制御によって直ちにエラー信号を減少させる方向に歪補償係数を変化させてしまうため、故障発生の初期段階のゲイン変動量が検出されにくくなる。
【0048】
従って、リニアライザを間欠動作させることにより、歪補償係数の更新を周期的に短期間停止させ、その停止期間中にエラー信号を観測することによって、故障発生による大きなゲイン変動を早期に検出することが可能になる。更に、図6(c)に示すように、更新動作の停止期間中において、適切な時間間隔で複数回に亙ってエラー信号レベルを比較判定し、故障判定を行うことにより、故障判定のタイムラグが減少し、故障の早期検出が可能となる。
【0049】
図7は上記更新動作の停止期間中に複数回に亙ってエラー信号レベルを比較判定し、故障判定を行う本発明の実施形態のフローを示す。先ず、歪補償係数の更新部の動作が休止中であるか否かを判別し(ステップ7−1)、否であれば故障判定を行うことなく、再び歪補償係数の更新部の動作が休止中であるか否かを判定する(ステップ7−1)。
【0050】
上記ステップ7−1において、休止中であると判別された場合、或る変数mを0に設定し(ステップ7−2)、所定の期間T(m)におけるエラー信号レベルの測定を行い(ステップ7−3)、該エラー信号レベルが判定閾値以上であるか否かを判別する(ステップ7−4)。
【0051】
判定閾値以上であれば故障フラグを立てた“故障有り”を示す信号を出力し(ステップ7−5)、判定閾値以上でなければ前記変数mが所定の回数Nに等しいか否かを判別し(ステップ7−6)、等しくなければ変数mに1を加えて(ステップ7−7)前述のステップ7−3に戻って同様の処理を繰返す。変数mが所定の回数Nに等しい場合は、この歪係数更新休止期間における故障判定処理を終了する(ステップ7−8)。
【0052】
(付記1) 非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、出現頻度の高い入力信号レベルに対する歪補償係数を抽出し記憶する歪補償係数記憶手段と、該抽出した歪補償係数の値を、所定回数前に抽出し記憶した歪補償係数の値と比較し、その変化値に基づいて送信装置の故障を判定する故障判定手段とを備えたことを特徴とする非線形歪補償送信装置。
(付記2) 前記歪補償係数記憶手段は、更に初期段階に抽出した歪補償係数を記憶し、前記故障判定手段は、抽出した歪補償係数の値を該初期段階の歪補償係数と比較し、その変化値に基づいてアナログ系回路部のゲイン変動を検出する構成を備えたことを特徴とする付記1に記載の非線形歪補償送信装置。
(付記3) 非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、前記歪補償係数の更新動作を間欠的に行わせ、更新動作の停止期間中に、前記フィードバック信号と入力信号との誤差を測定する手段と、該フィードバック信号と入力信号との誤差に基づいて送信装置の故障を判定する故障判定手段とを備えたことを特徴とする非線形歪補償送信装置。
(付記4) 前記フィードバック信号と入力信号との誤差を測定する手段は、該誤差信号の振幅の絶対値を観測し、前記故障判定手段は、該誤差信号の振幅の絶対値を基に故障判定を行うことを特徴とする付記3記載の非線形歪補償送信装置。
(付記5) 前記フィードバック信号と入力信号との誤差を測定する手段は、該誤差信号のパワー値を観測し、前記故障判定手段は、該誤差信号のパワー値を基に故障判定を行うことを特徴とする付記3記載の非線形歪補償送信装置。
(付記6) 前記歪補償係数記憶手段は、出現頻度の高い複数の入力信号レベルに対する複数の歪補償係数を抽出して記憶し、前記故障判定手段は、複数の入力信号レベル毎に抽出した複数の歪補償係数の値を、それぞれ所定回数前に抽出し記憶した歪補償係数の値と比較し、その変化値に基づいて故障判定を行うことを特徴とする付記1又は2に記載の非線形歪補償送信装置。
(付記7) 更新動作の停止期間中に、前記フィードバック信号と入力信号との誤差を複数回に亙って測定する手段と、該フィードバック信号と入力信号との複数の誤差に基づいて送信装置の故障を判定する故障判定手段とを備えたことを特徴とする付記3記載の非線形歪補償送信装置。
【0053】
【発明の効果】
以上説明したように、本発明によれば、リニアライザにより非線形歪補償を行う送信装置において、或る入力信号に対する歪補償係数の変動、又はエラー信号の変動を観測し、それらの変動量によって、アナログ系回路部の故障やゲイン変化、或いは歪補償係数の更新処理の障害等によるゲイン変動の発生を判定することにより、早期に送信装置の故障やゲイン変動を検出するとともに、検出したゲイン変動量に対処する手段を講じることにより、出力信号の線形性劣化を最少限に防ぐことができる。
【図面の簡単な説明】
【図1】本発明の故障判定部による非線形歪補償送信装置の観測点を示す図である。
【図2】歪補償係数観測により故障判定を行う本発明の第1の実施形態を示す図である。
【図3】歪補償係数観測により故障判定を行う本発明の第2の実施形態を示す図である。
【図4】エラー信号観測により故障判定を行う本発明の実施形態を示す図である。
【図5】本発明のゲイン変動検出部の構成を示す図である。
【図6】本発明による故障判定のタイミングの説明図である。
【図7】更新動作の停止期間中に故障判定を行う本発明の実施形態のフロー図である。
【図8】リニアライザの原理説明図である。
【図9】リニアライザを用いた送信装置の構成を示す図である。
【図10】アナログ系回路部のパワーアンプ等の故障に対処する手段を示す図である。
【符号の説明】
1−1 故障判定部
8−1 乗算器
8−2 歪補償テーブル
8−3 歪補償係数更新部
8−4 減算器
S1 歪補償係数
S2 エラー信号
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a nonlinear distortion compensation transmission apparatus having a failure determination function, and includes a nonlinear distortion compensation apparatus (linearizer) that compensates for nonlinear distortion such as an amplifier or a mixer in the transmission apparatus, The present invention relates to a non-linear distortion compensation transmitter that determines and detects the occurrence of a failure at an early stage.
[0002]
In a wireless communication system in which the leakage power ratio to the adjacent band is strictly defined, a nonlinear distortion compensator (linearizer) that accurately compensates for nonlinear distortion such as an amplifier that causes deterioration of the leakage power ratio to the adjacent band is required. ing. In particular, in recent years, radio communication apparatuses using linear modulation schemes (QPSK, etc.) with good frequency utilization efficiency are often used as portable communication terminals and the like, but the leakage power to adjacent bands is also reduced in these transmission apparatuses. High linearity is required.
[0003]
In general, when high linearity is required for the high-power amplifier in the final stage of the transmitter, the power efficiency decreases reciprocally. To increase the power efficiency of the amplifier, there are more constraints such as circuit scale, power supply capacity, heat dissipation means, etc. It becomes severe. Therefore, by using an amplifier in a non-linear region with high power efficiency and compensating the non-linear distortion so that the output signal becomes linear by a linearizer, it is possible to simultaneously satisfy high power efficiency and linearity.
[0004]
Although there are several types of linearizers, the present invention is directed to a transmission apparatus equipped with a so-called “digital predistortion type” linearizer that performs nonlinear distortion compensation by digital signal processing, and performs failure determination in the transmission apparatus. This is done early and with high accuracy.
[0005]
[Prior art]
FIG. 8 is a diagram illustrating the principle of the linearizer. The linearizer includes a multiplier 8-1, a distortion compensation table 8-2, a distortion compensation coefficient update unit 8-3, and a subtractor 8-4, and applies a nonlinear distortion f (p) to the input signal x (t). An error (error signal) between the non-linear output signal y (t) = x (t) · f (p) from the non-linear unit 8-5 such as an amplifier or a mixer to be applied and the input signal x (t) is subtracted 8- 4 to detect.
[0006]
The error signal is input to the distortion compensation coefficient updating unit 8-3, and the distortion compensation coefficient updating unit 8-3 updates the distortion compensation coefficient h (p) of the distortion compensation table 8-2 so that the error signal is minimized. . The updated distortion compensation coefficient h (p) is read from the distortion compensation table 8-2, multiplied by the input signal x (t) by the multiplier 8-1, and given with predistortion, and the nonlinear output by the nonlinear unit 8-5. Distortion compensation is performed so that the signal y (t) is linear.
[0007]
FIG. 9 shows a configuration of a transmission apparatus using a linearizer. A baseband signal is input to a linearizer 9-1 including a multiplier 8-1, a distortion compensation table 8-2, a distortion compensation coefficient updating unit 8-3, and a subtractor 8-4, and an output of the linearizer 9-1. The signal is sequentially converted into a modulator (MOD) 9-2, a digital-analog converter (DAC) 9-3, a band-pass filter 9-4, an up-converter 9-5 to a radio frequency, a driver amplifier 9-6, and a power amplifier 9 Connected to -7, and transmitted as a radio transmission signal from the antenna 9-8.
[0008]
Then, a part of the output signal of the final stage power amplifier 9-7 is taken out, down converter 9-9, variable attenuator (V_ATT) 9-10, band pass filter 9-11, analog-digital converter (ADC) 9- 12. By sequentially inputting to the demodulator (DEM) 9-13, the output signal is returned to the original baseband signal to generate a feedback signal, and the feedback signal is subtracted for error signal detection of the linearizer 9-1. The distortion is compensated by applying predistortion by the linearizer 9-1.
[0009]
[Problems to be solved by the invention]
In such a transmitter that performs distortion compensation using the linearizer 9-1, if the analog system circuit section after the digital analog device (DAC) 9-3 breaks down and the gain fluctuates significantly, the original linear characteristics are obtained. Not only will it become impossible, it may also deteriorate linearity.
[0010]
In general, there are several means for coping with a failure of a power amplifier or the like of an analog system circuit unit. As an example, as shown in FIG. 10A, two power amplifiers (PA) 10-1 and 10-2 are provided. The two power amplifiers (PA) 10-1 and 10-2 are connected in parallel by the hybrid circuits 10-3 and 10-4, and the two power amplifiers (PA) 10-1 and 10-2 are always connected. Operate in parallel.
[0011]
With the above configuration, even if one power amplifier (PA) (for example, 10-1) breaks down and no signal is output at all, a signal is not received from the other normal power amplifier (PA) (for example, 10-2). Therefore, even if the output level of the entire transmission apparatus is lowered, the transmission apparatus itself is never disabled.
[0012]
However, when the above-described linearizer is applied to a transmission apparatus in which the two power amplifiers (PA) operate in parallel as described above, the linearizer can reduce the output level due to a failure of one power amplifier (PA). The predistortion is tried to increase to the output level, but the predistortion is also given to the level drop that cannot be compensated by the predistortion, so the distortion compensation coefficient is also updated incorrectly. Therefore, correct distortion compensation is not performed, and the linearity of the output signal is deteriorated as compared with a transmission apparatus that does not use a linearizer.
[0013]
Further, as a means for coping with a failure in the analog system circuit unit, as shown in FIG. 10B, the baseband signal is separated into two by the transmission diversity processing unit 10-5, and the two transmission units including the linearizer Transmission diversity in which transmission signals are simultaneously transmitted from (TX) 10-6 and 10-7 via power amplifiers (PA) 10-8 and 10-9 and an antenna can be employed.
[0014]
In this case, when one transmitter (TX) or power amplifier (PA) fails, a transmission signal is transmitted from the other transmitter (TX) and power amplifier (PA), so that the transmitter can operate. However, since the function of transmission diversity cannot be performed, it is necessary to take measures to determine the failure at an early stage and notify the user, and to prevent the occurrence of nonlinear distortion due to large gain fluctuations.
[0015]
FIG. 10C shows an example in which the transmission unit has a redundant configuration. In this configuration example, two transmission units (TX) 10-10 and 10-11 including linearizers are provided, and in a normal state, each transmission unit (TX) 10-10 and 10-11 has its own power amplifier 10-. 12, 10-13 and a transmission signal are transmitted to different sectors via antennas.
[0016]
When one transmitter (TX) (for example, 10-10) fails, the changeover switches 10-14, 10-15, 10-16, and 10-17 are switched from the contact positions shown in the figure to the contact positions on the opposite side. Thus, the other transmission unit (TX) (for example, 10-11) performs transmission to the power amplifier 10-12 as well as transmission to the power amplifier 10-13 so far.
[0017]
In this case, unless one linearizer in the transmission unit (TX) 10-11 is automatically switched to a configuration in which distortion compensation is performed for the two power amplifiers 10-12 and 10-13, the linear characteristic is shown instead. It will deteriorate. In addition, when switching to perform distortion compensation for two power amplifiers with one linearizer, the gain fluctuation of the analog circuit that occurs due to the configuration change is corrected by the analog system circuit or corrected by the digital processing unit There is a need to.
[0018]
The present invention provides a transmitter that performs nonlinear distortion compensation using a linearizer, in order to prevent linearity deterioration of an output signal caused by an analog circuit unit failure or gain fluctuation, or a distortion compensation coefficient updating process failure. An object of the present invention is to provide a non-linear distortion compensation transmitter having a failure determination function for determining and detecting failure and gain fluctuation at an early stage.
[0019]
[Means for Solving the Problems]
The nonlinear distortion compensation transmission apparatus of the present invention is (1) a transmission apparatus that outputs a transmission signal through an analog system circuit unit with nonlinear distortion, and multiplies the input signal by a distortion compensation coefficient for compensating for the nonlinear distortion, In addition, in the nonlinear distortion compensation transmission apparatus, the transmission signal that has passed through the analog system circuit unit is fed back and fed back, and the distortion compensation coefficient is updated so that the error between the feedback signal and the input signal is minimized. Distortion compensation coefficient storage means for extracting and storing a distortion compensation coefficient for a high input signal level, and comparing the value of the extracted distortion compensation coefficient with the value of the distortion compensation coefficient extracted and stored a predetermined number of times before Failure determination means for determining failure of the transmission device based on the value.
[0020]
(2) The distortion compensation coefficient storage means further stores the distortion compensation coefficient extracted in the initial stage, and the failure determination means compares the extracted distortion compensation coefficient value with the distortion compensation coefficient in the initial stage. In this configuration, the gain variation of the analog circuit unit is detected based on the change value.
[0021]
Further, (3) means for intermittently updating the distortion compensation coefficient and measuring an error between the feedback signal and the input signal during a stop period of the updating operation; Failure determination means for determining failure of the transmission device based on the error.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows observation points of a non-linear distortion compensation transmitter by the failure determination unit of the present invention. In FIG. 1, a multiplier 8-1, a distortion compensation table 8-2, a distortion compensation coefficient update unit 8-3, and a subtractor 8-4 constitute a linearizer in the nonlinear distortion compensation transmission apparatus.
[0023]
The present invention provides a distortion compensation coefficient S1 read from the distortion compensation table 8-2 of the linearizer or an input signal to be compensated for distortion output from the subtracter 8-4 as an observation point for diagnosing a failure of the nonlinear distortion compensation transmitter. An error signal S2 that is a difference signal between the (baseband signal) and the feedback signal of the final stage output signal that has passed through the non-linear circuit unit and input to the distortion compensation coefficient update unit 8-3 is observed. Then, by monitoring the change value of the observation point by the failure determination unit 1-1, it is determined whether or not the nonlinear distortion compensation transmission device has failed.
[0024]
The distortion compensation coefficient S1 is a value that converges to a certain value when the analog circuit unit is operating normally, but the value changes when the amplifier fails or the gain fluctuates. Therefore, by observing a change in the distortion compensation coefficient S1, it is possible to determine whether an amplifier failure or a gain fluctuation has occurred.
[0025]
When a failure of the analog system circuit unit or a sudden gain fluctuation occurs, the distortion compensation coefficient S1 starts to change in a direction in which the fluctuation is absorbed by the feedback operation. That is, since the variation of the distortion compensation coefficient S1 represents the variation of the analog system circuit unit, by observing the distortion compensation coefficient S1, it is possible to determine the failure of the analog system circuit unit or the occurrence of gain variation. Furthermore, the amount of gain fluctuation can be estimated from the change value of the distortion compensation coefficient S1, and the amount of gain fluctuation due to aging or thermal fluctuation of the analog circuit unit is monitored by observing the follow-up operation of the distortion compensation coefficient S1. be able to.
[0026]
Since the error signal S2 is a difference signal between the reference signal (input signal) and the feedback signal, it converges to a very small value (nearly zero) during normal operation. However, when gain fluctuation occurs in the analog system circuit unit, Since the level value of the error signal increases, the occurrence of a failure or gain fluctuation can be determined by observing the fluctuation.
[0027]
FIG. 2 shows a first embodiment of the present invention in which failure determination is performed by observing distortion compensation coefficients. The distortion compensation coefficient is observed by a unique address detector 2-1 that detects a specific unique address from a write address (write) for updating the distortion compensation coefficient in the distortion compensation table 8-2, and distortion compensation of the unique address. A distortion compensation coefficient memory 2-2 that stores an updated value of a coefficient, and a failure determination unit 2-3 that compares and determines the latest distortion compensation coefficient and a past distortion compensation coefficient.
[0028]
The distortion compensation table 8-2 receives an address (read) corresponding to the level value of the input baseband signal, reads the distortion compensation coefficient at the address (read) position, and outputs the distortion compensation coefficient to the multiplier 8-1. On the other hand, the input baseband signal is input to the delay unit (delay) 2-4, the input baseband signal is fed back through the analog system circuit unit, and the update time is calculated based on the error signal. The input baseband signal is delayed, and the updated value of the calculated distortion compensation coefficient is written and updated at the write address (write) of the distortion compensation table 8-2 corresponding to the level value of the delayed input baseband signal. .
[0029]
The unique address detector 2-1 inputs a write address (write) for updating the distortion compensation table 8-2, and compares the input write address (write) with a predetermined specific address value. If they match, the trigger signal is output to the distortion compensation coefficient memory 2-2.
[0030]
As an address preset in the unique address detector 2-1, an address corresponding to an input signal level value that appears at a high frequency during normal operation is set. In general, the frequency distribution of input signal level values is not flat, and there are signal level values that appear most frequently. Therefore, by measuring the frequency distribution of the input signal level value and performing the failure determination for the input signal level value having the highest appearance frequency, the delay of the failure detection time can be further reduced.
[0031]
When the trigger signal is input, the distortion compensation coefficient memory 2-2 captures and stores an updated value of the distortion compensation coefficient output to the distortion compensation table 8-2. The distortion compensation coefficient memory 2-2 stores several distortion compensation coefficients acquired in the past, and the failure determination unit 2 determines the latest distortion compensation coefficient acquired now and the past distortion compensation coefficient acquired N times before. To -3. Here, N is an integer of 1 or more set as appropriate.
[0032]
The failure determination unit 2-3 determines a failure by observing the variation of the distortion compensation coefficient based on the latest distortion compensation coefficient and the distortion compensation coefficient N times before. For example, the difference or ratio between the latest distortion compensation coefficient and the distortion compensation coefficient N times before is compared with a predetermined threshold, and when the threshold is exceeded, a failure is determined and a failure flag is output.
[0033]
In this case, the difference (N in this case) between the number of updates of the distortion compensation coefficients to be compared is set as appropriate, and the variation threshold value used as a criterion for failure determination is determined according to the difference (N) in the number of updates. When the difference (N) in the number of updates is reduced, only a small amount of fluctuation is observed even if there is a failure. For This is likely to cause a determination error.
[0034]
Conversely, when the difference (N) in the number of updates is increased, a large amount of variation is observed if there is a failure, so the accuracy of failure determination can be improved, but if too large, a time lag occurs in failure determination. Absent. Therefore, it is necessary to determine the failure by setting the optimum difference (N) in the number of updates, which depends on the time constant for updating the distortion compensation coefficient in the linearizer.
[0035]
Furthermore, in the above-described embodiment, when comparing the latest distortion compensation coefficient with the Nth previous distortion compensation coefficient, the signal level value having the highest appearance frequency and a plurality of signal levels in the vicinity thereof are similarly applied. By comparing the latest distortion compensation coefficient with the distortion compensation coefficient before N times and performing the failure determination, it is possible to improve the accuracy of the failure determination.
[0036]
FIG. 3 shows a second embodiment of the present invention in which failure determination is performed by distortion compensation coefficient observation. In the second embodiment, in the distortion compensation coefficient memory 3-1, the distortion compensation coefficient before N times in the first embodiment is added to the distortion compensation coefficient memory 3-1 at the initial stage (when the gain of the analog circuit unit is adjusted). The distortion compensation coefficient is stored in advance, and the failure determination and gain fluctuation detection unit 3-2 compares the latest distortion compensation coefficient with the previous N distortion compensation coefficient and also with the initial distortion compensation coefficient. Thus, not only the failure determination similar to that of the first embodiment, but also the amount of gain variation from the initial stage can be estimated from the amount of variation of the distortion compensation coefficient.
[0037]
In a normal state, the distortion compensation coefficient becomes a certain fixed value converged with respect to each input signal level value, and only changes following a gradual aging and thermal fluctuation. When a sudden gain fluctuation occurs due to a failure of the analog system circuit unit or the like, the distortion compensation coefficient starts to change in a direction to absorb the fluctuation by the negative feedback operation.
[0038]
Therefore, the fluctuation of the distortion compensation coefficient represents the fluctuation of the gain. Gain fluctuation is not a problem when it is a small fluctuation below a certain range, but if it becomes larger than a certain range, fluctuation absorption by the distortion compensation coefficient of the linearizer becomes impossible and the distortion compensation operation itself deteriorates. .
[0039]
Therefore, the gain variation amount estimated from the variation amount of the distortion compensation coefficient is notified to the gain variable portion of the analog circuit unit, and the gain variation portion cancels the gain variation amount based on the notified gain variation amount. By changing the gain as described above, it is possible to prevent the fluctuation absorption by the distortion compensation coefficient of the linearizer described above from becoming impossible.
[0040]
In addition, instead of a configuration in which the gain is changed with respect to the gain variable unit of the analog system circuit unit, a configuration in which the coefficient of the multiplier (gain variable unit) in the digital processing unit is changed can be similarly used. It is possible to prevent the fluctuation absorption by the distortion compensation coefficient from becoming impossible.
[0041]
FIG. 4 shows an embodiment of the present invention in which failure determination is performed by error signal observation. (A) of the figure shows an embodiment for observing the absolute value of the amplitude of the error signal, and (b) of the figure shows an embodiment for observing the power of the error signal.
[0042]
When observing the absolute value of the amplitude of the error signal, as shown in FIG. 4A, the amplitude of the I and Q components of the output signal of the subtractor 8-4 that calculates the difference between the reference signal and the feedback signal is calculated. The absolute values are added, the added values are averaged for a predetermined period, and the failure determination unit 4-1 compares the added value of the averaged amplitude absolute values with a predetermined determination threshold value to determine a failure. In this embodiment, since complex signals are assumed as the reference signal and the feedback signal, expressions indicating orthogonal signal components such as an I component and a Q component are used.
[0043]
When observing the power of the error signal, as shown in FIG. 4B, the square of the I component and Q component of the output signal of the subtractor 8-4 that calculates the difference between the reference signal and the feedback signal is obtained. The sum of the values is calculated, the sum of the square values is averaged for a predetermined period, and the failure determination unit 4-1 compares the average sum of the square values with a predetermined determination threshold value to determine the failure. I do. Since this embodiment also assumes a complex signal as the reference signal and the feedback signal, expressions of the I component and the Q component are used.
[0044]
FIG. 5 shows the configuration of the gain variation detection unit of the present invention, and shows a specific example of the gain variation detection unit in the failure determination and gain variation detection unit 3-2 shown in FIG. (A) of FIG. 5 converts the latest distortion compensation coefficient into a decibel value (dB), and also converts the distortion compensation coefficient at the initial stage (at the time of initial startup) into a decibel value (dB). The difference between these distortion compensation coefficients converted to (dB) is calculated by the subtractor 5-1, and the difference value is output as a fluctuation gain value (dB). At the same time, the fluctuation gain value (dB) and a predetermined allowable gain are output. The fluctuation value (dB) is compared by the comparator 5-2, and when the predetermined allowable gain fluctuation value (dB) is exceeded, a gain variable flag signal for changing the gain is output.
[0045]
In FIG. 5B, the difference between the latest distortion compensation coefficient and the distortion compensation coefficient at the initial stage (at the time of initial activation) is calculated by the subtractor 5-3, and the difference value is expressed in decibel value (dB). And the decibel value (dB) of the difference value is output as a fluctuation gain value (dB), and the fluctuation gain value (dB) is compared with a predetermined allowable gain fluctuation value (dB) by a comparator 5-4. When the predetermined allowable gain fluctuation value (dB) is exceeded, a gain variable flag signal for changing the gain is output.
[0046]
FIG. 6 is an explanatory diagram of failure determination timing according to the present invention. When performing the failure determination according to the present invention, the linearizer is intermittently operated as shown in FIG. 6A, and the failure determination is performed when the distortion compensation coefficient is not updated by the linearizer. The method of performing failure determination by intermittently operating the linearizer in this way is particularly effective when performing failure determination based on an error signal.
[0047]
When the analog system circuit unit fails, the feedback signal fluctuates by the amount of gain variation due to the failure and the error signal increases. However, as shown in FIG. 6B, the linearizer is always operated to update the distortion compensation coefficient. In such a case, since the distortion compensation coefficient is immediately changed in the direction of decreasing the error signal by negative feedback control, it is difficult to detect the gain fluctuation amount at the initial stage of occurrence of the failure.
[0048]
Therefore, by intermittently operating the linearizer, the distortion compensation coefficient update is periodically stopped for a short period, and by observing an error signal during the stop period, a large gain fluctuation due to the occurrence of a failure can be detected at an early stage. It becomes possible. Further, as shown in FIG. 6C, the error determination time lag is determined by comparing and determining the error signal level over a plurality of times at an appropriate time interval and performing the failure determination during the stop period of the update operation. , And early detection of failures becomes possible.
[0049]
FIG. 7 shows a flow of an embodiment of the present invention in which the error signal level is compared and determined for a plurality of times during the stop period of the update operation, and the failure is determined. First, it is determined whether or not the operation of the distortion compensation coefficient update unit is paused (step 7-1). If not, the operation of the distortion compensation coefficient update unit is paused again without performing failure determination. It is determined whether it is in the middle (step 7-1).
[0050]
If it is determined in step 7-1 that the system is in a pause state, a certain variable m is set to 0 (step 7-2), and the error signal level is measured for a predetermined period T (m) (step 7). 7-3) It is determined whether or not the error signal level is equal to or higher than a determination threshold value (step 7-4).
[0051]
If it is equal to or greater than the determination threshold value, a signal indicating “failure present” with a failure flag set is output (step 7-5). (Step 7-6) If 1 is not equal, 1 is added to the variable m (Step 7-7), and the same processing is repeated by returning to Step 7-3 described above. If the variable m is equal to the predetermined number N, the failure determination process in the distortion coefficient update suspension period is terminated (step 7-8).
[0052]
(Supplementary Note 1) A transmission apparatus that outputs a transmission signal through an analog circuit unit with nonlinear distortion, wherein the input signal is multiplied by a distortion compensation coefficient for compensating for the nonlinear distortion, and passes through the analog circuit unit In a non-linear distortion compensation transmission apparatus that feeds back a transmission signal and feeds it back, and updates the distortion compensation coefficient so that an error between the feedback signal and the input signal is minimized, a distortion compensation coefficient for an input signal level having a high appearance frequency Distortion compensation coefficient storage means for extracting and storing the value, and comparing the value of the extracted distortion compensation coefficient with the value of the distortion compensation coefficient extracted and stored before a predetermined number of times, and based on the change value, A non-linear distortion compensation transmitter comprising: failure determination means for determining.
(Supplementary Note 2) The distortion compensation coefficient storage means further stores the distortion compensation coefficient extracted in the initial stage, and the failure determination means compares the value of the extracted distortion compensation coefficient with the distortion compensation coefficient in the initial stage, The nonlinear distortion compensation transmitting apparatus according to appendix 1, further comprising a configuration for detecting a gain variation of the analog circuit unit based on the change value.
(Supplementary Note 3) A transmission apparatus that outputs a transmission signal through an analog circuit unit with nonlinear distortion, wherein the input signal is multiplied by a distortion compensation coefficient for compensating for the nonlinear distortion, and the analog circuit unit passes through the analog circuit unit. In a non-linear distortion compensation transmitter that updates the distortion compensation coefficient so that an error between the feedback signal and the input signal is minimized, the distortion compensation coefficient update operation is intermittently performed. Means for measuring an error between the feedback signal and the input signal, and a failure determination unit for determining a failure of the transmission device based on the error between the feedback signal and the input signal during the stop period of the update operation. A nonlinear distortion-compensated transmission device comprising:
(Supplementary Note 4) The means for measuring the error between the feedback signal and the input signal observes the absolute value of the amplitude of the error signal, and the failure determination means determines the failure based on the absolute value of the amplitude of the error signal. The nonlinear distortion compensation transmission apparatus according to supplementary note 3, wherein:
(Supplementary Note 5) The means for measuring the error between the feedback signal and the input signal observes the power value of the error signal, and the failure determination means performs the failure determination based on the power value of the error signal. The nonlinear distortion-compensated transmission apparatus according to Supplementary Note 3, wherein
(Supplementary Note 6) The distortion compensation coefficient storage means extracts and stores a plurality of distortion compensation coefficients for a plurality of input signal levels having a high appearance frequency, and the failure determination means extracts a plurality of distortion compensation coefficients extracted for each of the plurality of input signal levels. The non-linear distortion according to appendix 1 or 2, wherein the value of the distortion compensation coefficient is compared with the value of the distortion compensation coefficient extracted and stored a predetermined number of times before, and failure determination is performed based on the change value. Compensation transmitter.
(Supplementary Note 7) Means for measuring the error between the feedback signal and the input signal over a plurality of times during the suspension period of the update operation, and the transmission device based on the plurality of errors between the feedback signal and the input signal The nonlinear distortion compensation transmitting apparatus according to appendix 3, further comprising failure determination means for determining a failure.
[0053]
【The invention's effect】
As described above, according to the present invention, in a transmission apparatus that performs nonlinear distortion compensation using a linearizer, a distortion compensation coefficient variation or an error signal variation with respect to a certain input signal is observed, and an analog signal is obtained based on the variation amount. By determining the occurrence of gain fluctuations due to faults in the system circuit section, gain changes, or distortion compensation coefficient update processing, etc., it is possible to detect faults and gain fluctuations in the transmitter at an early stage, and to detect the gain fluctuation amount. By taking measures to cope with this, it is possible to minimize the deterioration of the linearity of the output signal.
[Brief description of the drawings]
FIG. 1 is a diagram showing observation points of a nonlinear distortion compensation transmission apparatus by a failure determination unit of the present invention.
FIG. 2 is a diagram illustrating a first embodiment of the present invention in which failure determination is performed by distortion compensation coefficient observation.
FIG. 3 is a diagram illustrating a second embodiment of the present invention in which failure determination is performed by distortion compensation coefficient observation.
FIG. 4 is a diagram showing an embodiment of the present invention in which failure determination is performed by error signal observation.
FIG. 5 is a diagram showing a configuration of a gain fluctuation detection unit of the present invention.
FIG. 6 is an explanatory diagram of failure determination timing according to the present invention.
FIG. 7 is a flow diagram of an embodiment of the present invention that performs failure determination during a suspension period of an update operation.
FIG. 8 is a diagram illustrating the principle of a linearizer.
FIG. 9 is a diagram illustrating a configuration of a transmission device using a linearizer.
FIG. 10 is a diagram showing means for coping with a failure of a power amplifier or the like in an analog system circuit unit.
[Explanation of symbols]
1-1 Failure determination unit
8-1 Multiplier
8-2 Distortion compensation table
8-3 Distortion compensation coefficient update unit
8-4 Subtractor
S1 Distortion compensation coefficient
S2 error signal

Claims (4)

非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、
出現頻度の高い入力信号レベルに対する歪補償係数を抽出し記憶する歪補償係数記憶手段と、
該抽出した歪補償係数の値と、所定回数前に抽出し記憶した歪補償係数の値と、の差又は比である変化値の大きさに基づいて送信装置の故障の有無を判定する故障判定手段とを備えたことを特徴とする非線形歪補償送信装置。
A transmission device that outputs a transmission signal through an analog circuit unit with nonlinear distortion, wherein the input signal is multiplied by a distortion compensation coefficient for compensating for the nonlinear distortion, and the transmission signal that has passed through the analog circuit unit is In the non-linear distortion compensation transmitter that updates the distortion compensation coefficient so that the error between the feedback signal and the input signal is minimized,
Distortion compensation coefficient storage means for extracting and storing a distortion compensation coefficient for an input signal level having a high appearance frequency;
Failure determination that determines whether or not there is a failure in the transmission device based on the magnitude of a change value that is the difference or ratio between the extracted distortion compensation coefficient value and the distortion compensation coefficient value extracted and stored a predetermined number of times ago And a non-linear distortion compensation transmission apparatus.
前記歪補償係数記憶手段は、更に初期段階に抽出した歪補償係数を記憶し、
前記故障判定手段は、抽出した歪補償係数の値と、該初期段階の歪補償係数と、の差又は比である変化値に基づいてアナログ系回路部のゲイン変動を検出する構成を備えたことを特徴とする請求項1に記載の非線形歪補償送信装置。
The distortion compensation coefficient storage means further stores the distortion compensation coefficient extracted in the initial stage,
The failure determination means includes a configuration for detecting a gain variation of the analog system circuit unit based on a change value that is a difference or ratio between the value of the extracted distortion compensation coefficient and the distortion compensation coefficient at the initial stage. The nonlinear distortion-compensated transmission apparatus according to claim 1.
非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、
前記歪補償係数の更新動作を間欠的に行わせ、更新動作の停止期間中に、前記フィードバック信号と入力信号との誤差を測定する手段と、
該フィードバック信号と入力信号との誤差の大きさに基づいて送信装置の故障の有無を判定する故障判定手段とを備えたことを特徴とする非線形歪補償送信装置。
A transmission device that outputs a transmission signal through an analog circuit unit with nonlinear distortion, wherein the input signal is multiplied by a distortion compensation coefficient for compensating for the nonlinear distortion, and the transmission signal that has passed through the analog circuit unit is In the non-linear distortion compensation transmitter that updates the distortion compensation coefficient so that the error between the feedback signal and the input signal is minimized,
Means for intermittently performing the update operation of the distortion compensation coefficient, and measuring an error between the feedback signal and the input signal during a stop period of the update operation;
A nonlinear distortion-compensated transmission apparatus comprising failure determination means for determining whether or not there is a failure in the transmission apparatus based on the magnitude of an error between the feedback signal and the input signal.
非線形歪を伴うアナログ系回路部を通して送信信号を出力する送信装置であって、該非線形歪を補償するための歪補償係数を入力信号に乗じ、且つ、前記アナログ系回路部を経た送信信号を元に戻してフィードバックし、該フィードバック信号と入力信号との誤差が最小となるように前記歪補償係数を更新する非線形歪補償送信装置において、A transmission device that outputs a transmission signal through an analog circuit unit with nonlinear distortion, wherein the input signal is multiplied by a distortion compensation coefficient for compensating for the nonlinear distortion, and the transmission signal that has passed through the analog circuit unit is In the nonlinear distortion compensation transmitter that updates the distortion compensation coefficient so that the error between the feedback signal and the input signal is minimized,
前記歪補償係数の更新動作を間欠的に行わせ、更新動作の停止期間中に、前記フィードバック信号と入力信号との誤差信号のパワー値を観測する手段と、  Means for intermittently performing an update operation of the distortion compensation coefficient, and observing a power value of an error signal between the feedback signal and the input signal during a stop period of the update operation;
該フィードバック信号と入力信号との誤差信号のパワー値の大きさに基づいて送信装置の故障の有無を判定する故障判定手段と  Failure determination means for determining whether or not there is a failure in the transmission device based on the magnitude of the power value of the error signal between the feedback signal and the input signal;
を備えたことを特徴とする非線形歪補償送信装置。  A non-linear distortion compensation transmitter characterized by comprising:
JP2001022688A 2001-01-31 2001-01-31 Nonlinear distortion compensation transmitter with failure determination function Expired - Fee Related JP4223194B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001022688A JP4223194B2 (en) 2001-01-31 2001-01-31 Nonlinear distortion compensation transmitter with failure determination function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001022688A JP4223194B2 (en) 2001-01-31 2001-01-31 Nonlinear distortion compensation transmitter with failure determination function

Publications (2)

Publication Number Publication Date
JP2002232305A JP2002232305A (en) 2002-08-16
JP4223194B2 true JP4223194B2 (en) 2009-02-12

Family

ID=18888067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001022688A Expired - Fee Related JP4223194B2 (en) 2001-01-31 2001-01-31 Nonlinear distortion compensation transmitter with failure determination function

Country Status (1)

Country Link
JP (1) JP4223194B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4641715B2 (en) * 2003-11-14 2011-03-02 富士通株式会社 Distortion compensation apparatus and radio base station
GB2421648B (en) * 2004-12-23 2009-01-07 Zetex Plc Amplifier fault detection circuit
JP5040924B2 (en) * 2007-01-25 2012-10-03 富士通株式会社 Distortion compensation device
JP2010258597A (en) * 2009-04-22 2010-11-11 Fujitsu Ltd Apparatus for distortion compensation of power amplifier, and method of detecting failure in the same
JP5556643B2 (en) * 2010-12-17 2014-07-23 富士通株式会社 Amplifying device and distortion compensation method
JP2013046077A (en) * 2011-08-22 2013-03-04 Kyocera Corp Radio communication system
JP2016082402A (en) * 2014-10-16 2016-05-16 富士通株式会社 Baseband processing device, radio device and radio communication system
JP6551115B2 (en) 2015-09-30 2019-07-31 富士通株式会社 Wireless device

Also Published As

Publication number Publication date
JP2002232305A (en) 2002-08-16

Similar Documents

Publication Publication Date Title
US8022763B2 (en) Amplifier failure detection apparatus
JP5193027B2 (en) Dynamic gain and phase compensation for power amplifier load switching
US7317353B2 (en) Amplification device
US6925106B2 (en) Predistortion type distortion compensation apparatus
US7529524B1 (en) Adaptive power amplifier linearization in time division duplex communication systems
JP2000031841A (en) Transmitter and method for controlling the same
US6501805B1 (en) Broadcast transmission system with single correction filter for correcting linear and non-linear distortion
US8514019B2 (en) Distortion compensation amplifier
US8081029B2 (en) Distortion compensation apparatus and method for detecting failure in the same
US7133466B2 (en) Amplifying apparatus
JP4223194B2 (en) Nonlinear distortion compensation transmitter with failure determination function
US6791410B2 (en) Feedforward amplifier and method of improving the performance thereof
JP3567148B2 (en) Distortion compensator
US7030693B2 (en) Enhanced predistortion method and apparatus
US6552608B2 (en) Linear amplifier
JP3952359B2 (en) Transmission power control apparatus and transmission power control method
JP5040924B2 (en) Distortion compensation device
JP2001284976A (en) Method and device for compensating adaptive predistortion
JP2006279775A (en) Distortion compensation apparatus and distortion correction method
WO2007049474A1 (en) Predistortion type distortion compensation amplification device
JP5234768B2 (en) Digital distortion compensation amplifier and control method of input wave inputted from output terminal of digital distortion compensation amplifier
JP4230649B2 (en) Working / Preliminary Nonlinear Compensator and Working / Preliminary Nonlinear Compensation Method for Digital Broadcasting Modulated Signal Transmission System
JPH10233629A (en) Distortion compensation amplifier with input limiting function
JP2017204711A (en) Radio device and abnormality detection method
JP2007274021A (en) Radio transmission device and control method thereof

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060328

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080722

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080729

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080926

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20081021

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20081119

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111128

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111128

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121128

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121128

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131128

Year of fee payment: 5

LAPS Cancellation because of no payment of annual fees