JP4198124B2 - 1-chip type semiconductor memory device - Google Patents

Description

  The present invention relates to a one-chip semiconductor memory device used in a host system having a NAND memory interface.

  In recent years, non-volatile memories called flash memories have become widespread. In particular, NAND type flash memory has a high writing speed and has recently been increasing in capacity. In order to directly drive the NAND flash memory by the CPU, it is necessary to provide a NAND memory interface on the host (referred to as a host device in this application) side including the CPU. In this case, when the NAND flash memory is directly attached and driven by the host device, it is necessary to provide a special configuration for driving the NAND flash memory such as ECC (error correction circuit) on the host device side. There is a problem that the design burden of the system becomes large.

Conventionally, a mask ROM is known as a read-only semiconductor memory device. This mask ROM has already been written with data (including computer program, its data, image data, audio data, etc., referred to as content in this application), and the content is write protected, and then this memory. New data cannot be written to the.

Also OTP (One
There is a semiconductor memory device called “Time Programmable ROM”. The OTP allows the user to store data additionally until the storage capacity is full. Although OTP is inexpensive, content written in the same way as the mask ROM is write-protected, but the written data cannot be erased and the data cannot be rewritten.

As described above, both mask ROM and OTP can effectively protect the content data in that the data once written cannot be accidentally erased or cannot be tampered with intentionally. The purpose of use is limited in that it cannot be erased to write new data. Another problem is that it is difficult to configure a large-capacity memory of several gigabytes. For example, in recent years, the capacity of memory has been increased, but in the case of mask ROM and OTP, it is about 100 megabytes at most, and there is no storage capacity of several gigabytes (GB).

In the case of CDs and DVDs, those having different characteristics such as a read-only type, a write-once type, and a rewritable type are provided. In the read-only type (CD-ROM, DVD-ROM), predetermined contents are already written at the time of sale. To protect the contents, the user erases such data or writes new data. I can't make it. The write-once type (CD-R, DVD-R, R is an abbreviation of Recordable) allows data to be additionally recorded until the memory capacity is full without rewriting the data of the physical block. Once data is written to the memory, write protection is applied to protect the content, and data that has already been written cannot be erased and new data cannot be written. Therefore, it is used as an archive memory for recording and storing data. On the other hand, the rewritable type (CD-RW, DVD-RW, and RW are abbreviations for Re-Writable) allows the user to rewrite data recorded any number of times up to a predetermined number of times. In the case of flash memory, no system has been proposed that can handle these various types of devices in a simple manner.
JP-A-2004-005699 JP 2004-062913 A

Therefore, the present invention has been made in view of the problems of such a conventional semiconductor memory device. The object of the present invention is to provide a host system having a NAND memory interface and an ECC (error correction circuit) or the like peculiar to NAND flash memory. The host system centrally manages different types of devices such as read-only type, write-protect type (write-once type), reusable type with write-protect function, and rewritable type in a relatively simple way without requiring a load. It is an object of the present invention to provide a one-chip semiconductor memory device using a NAND flash memory.

  Further, based on individual characteristic information set in the device, a one-chip semiconductor using a NAND flash memory in which the control unit of the device can execute appropriate processing in response to various commands from the host system To provide a storage device.

Other objects of the present invention will become apparent from the specification, drawings, and claims.

In order to solve the problem, in the present invention,
A one-chip semiconductor memory device usable in a host system having a predetermined operating system, FAT file system, memory interface control unit, and NAND memory interface,
The one-chip semiconductor memory device is
A one-chip LSI including a storage unit composed of a NAND flash memory and a control unit that reads and writes data to and from the storage unit based on a command from the host system. It is used connected to the NAND memory interface of the host system,
a) The original type of the one-chip semiconductor device, which is “ a rewritable type capable of overwriting data” (hereinafter simply referred to as “rewritable type” in the present specification), “reproducing type”, and “data can be additionally written” "Now write protect type" (hereinafter simply referred to as "write protect type" in the present specification) or "Reuse type with write protect function capable of appending data" (hereinafter simply referred to as "With write protect function") and another said host system systematically and uniquely capable grasp device type information) that re-using ", b) the possibility of changing of the device information type information, c) the device type information write protect The remaining number of possible formats in the case of the reusable type, and d) whether the write protection of the device is valid or invalid. It is stored in the management area of the control unit or storage unit,
Any of the above types of devices is managed by the FAT file system of the host system.
Further, the control unit
An address that is connected to the storage unit via a NAND memory interface and that determines a physical block address corresponding to the logical block address as a logical block address of a NAND flash memory that is a storage unit, using an address specified by the host system. A management table and an error correction circuit for correcting an error in data read from the storage unit;
According to the request from the host system, the device type information is supplied to the host system, the type of the device is recognized, and only an instruction scheduled for the device type is issued to the host system.
In response to various commands from the host system, only scheduled processing for the device is executed based on the individual characteristic information of a), b), c) and d) stored in the device. Ri name is configured,
further,
In the device storing the write-protect type device type information that can be additionally written to the data, the control unit writes the data in a write-once type until the storage capacity is full based on the device type information, and the remaining storage capacity After that, it is configured not to execute any instructions that modify the data,
A device that stores reusable device type information with a write protect function capable of appending the data, the control unit stores the device type information and the remaining format stored in the management area of the control unit or the storage unit. Based on the number of times, the initialization instruction from the host system is allowed for the stored number of times, and after each initialization, the same as the device storing the write-protect type device type information that can additionally write the data Provided is a one-chip semiconductor device configured to perform data writing in an aspect .

When controlling all of the NAND flash memory on the host system side having a conventional NAND memory interface, that is, when directly attaching the NAND flash memory (single unit), it is necessary to provide a NAND-specific circuit such as an error correction circuit on the host device side. there were. In this regard, according to the above solution, the control unit including the error correction circuit and the NAND flash memory are integrated into one IC, so that it is not necessary to provide an error correction circuit on the host system side, and the load (configuration)・ Processing can be reduced.

In addition, since the host system stores the type information of the one-chip semiconductor memory device that can be systematically and uniquely grasped, the one-chip semiconductor memory device requires a special configuration and processing. In addition, it is possible to provide a one-chip type semiconductor memory device having four different characteristics, ie, a read-only type, a write protect type (write-once type), a reuse type with a write protect function, and a rewrite type.

Here, in the write protect type one-chip semiconductor memory device, the control unit writes the data in a write-once type until the storage capacity is full based on the device type information, and when the storage capacity runs out It can be configured not to execute any command for altering written data such as writing and erasing.

That is , the control unit interprets its own device type information of the write protect type, and executes a data write command from the host system in a write-once manner until the storage capacity of the device is full. Since the host system once recognizes the device type information because it is a write protect type, it does not issue a data erasure command. However, even if there is an erasure command from the host system for some reason, the control unit does not execute it. Furthermore, protection is automatically applied when data is written to the full capacity, so that even though it is a semiconductor device, it effectively protects user-written content such as OTP, CD-R, and DVD-R. It is possible to provide a one-chip semiconductor memory device as an archive memory.

In the reusable device with the write protect function, in addition to the device type information, the number of times that initialization can be performed is stored in the control unit or the management area of the storage unit, and the control unit uses this In addition, an initialization command from the host system may be allowed for a set number of times and executed .

Since the write protect type is an archive memory for recording / storing, it does not originally accept an initialization command for erasing all stored data. Therefore, in the case of a write protect type device, when the data becomes unnecessary, it can only be thrown away. In this respect, the reusable type with the write protect function can be reused by initialization, and resources can be effectively utilized. Even after re-use with the write protect function , write protection is automatically applied when the storage capacity is full. Therefore, there is no possibility that the user will accidentally erase or tamper with the stored data.

First, a structural example of the one-chip type semiconductor memory device of the present invention will be described.
The one-chip type semiconductor memory device includes a memory (corresponding to a storage unit in claims) and a controller that comprehensively controls the memory in response to a command from a host device (corresponding to a host system in claims). (Corresponding to a control unit in claims) is a basic configuration.

  FIG. 1 shows an example of the structure of a one-chip type semiconductor memory device. As shown in FIG. 1A, integrated circuits (wafers) of a memory 11 and a controller 12 are connected in parallel on a wiring board 15. As shown in FIG. 5B, the device is built in an LSI package having a plurality of terminals around it, and is configured as a one-chip semiconductor device 10 (plan view). The memory 11 is composed of a NAND flash memory. Flash memory is a kind of EEPROM. The wafers may be configured on the same wafer instead of being arranged and connected in parallel. Further, they may be laminated and connected in the vertical direction. In that case, the memory capacity ratio can be increased.

The configuration of the one-chip semiconductor memory device 10 will be briefly described with reference to FIG.
In addition to the CPU (not shown), the controller 12 is transferred between the ECC (error correction circuit) 121 and the host device 2 for dealing with the BAD BLOCK unique to the NAND flash memory 11 ′ and the NAND flash memory 11 ′. A buffer memory 122 for buffering data is provided as a basic configuration. Further, a NAND memory interface 123 (the side connected to the host device 2) that communicates with the host device 2 receives a command (corresponding to the command in the claims) from the host device 2 and communicates with the NAND flash memory 11 ′. A NAND memory interface 124 (side to be connected to the NAND flash memory 11 ') is provided. The CPU comprehensively controls the NAND memory interfaces 123 and 124, the ECC 121, and the NAND flash memory 11 ′, interprets commands from the host device 2, and executes them.

Next, the host device 2 for driving the one-chip semiconductor memory device 10 will be briefly described with reference to FIG. This one-chip type semiconductor device 10 is used in a host device 2 having a NAND memory interface 24. The host device 2 includes a predetermined operating system (OS) 21, a predetermined file system 22, and a memory interface control unit 23. Detailed functions will be described later.

Next, features of the one-chip type semiconductor memory device 10 of the present invention will be described in detail.
(Characteristics of the one-chip type semiconductor memory device of the present invention)
The one-chip type semiconductor memory device 10 of the present invention is characterized in that it can be set as various devices such as a read-only type, a write protect type (write-once type), and a reusable type with a write protect function.

  Conventional semiconductor memory devices using flash memory exist only in a rewritable type, and there are no read-only type such as a mask ROM, a write protect type such as OTP, and a reusable type with a write protect function. Hereinafter, device types of the one-chip type semiconductor memory device 10 of the present invention will be described.

(Reproduction-only type)
The reproduction-only type is a device in which content has already been recorded at the time of sale, the stored data can only be read, and modification of the content such as data writing and initialization (format) is completely prohibited. When receiving a data write command to the device from the host device 2, the controller 12 interprets the device type information representing the “reproduction-only type” stored in the management area of the NAND flash memory 11 ′, which will be described later. An error is returned as the status, and the higher-level device 2 is notified that the command cannot be executed by the read-only device. When a data read command is received from the host device 2, the data of the logical block address designated by the command is read as much as indicated by the transfer length and transferred to the host device (here, "designated logical block address As will be described later, the “data” means that the designated address corresponds to the logical block address of the NAND flash memory 11, and the physical block address corresponding to the logical block address is “logical block address and physical block”. The data read from the “address management table” (see paragraph 0050).

(Write protect type)
In the present application, the write protect type can be set so that the content written by the user is write protected. This function is used for a command that causes the controller 12 to interpret the device type information “write protect type” written in the management area of the controller 12 or the NAND flash memory 11 ′ and modify the written content. Is executed by returning an error. The written data can be read at any time. It is suitable for archiving, disposable use, and applications that cannot tolerate content modification.

  Since it is not necessary to rewrite data to the physical block of the NAND flash memory 11 ', it is possible to deal with an inexpensive memory in which the number of writing is extremely limited, and there is an advantage that the device itself can be provided at low cost. Providing a plurality of memories with different storage capacities (such as the number of images that can be taken by a digital camera) and writing speed further increases the user's selectivity.

(Reuse type with write protect function)
In the present invention, the reusable type with the write protect function is an advanced type of the write protect type and can be initialized a predetermined number of times. That is, as long as the remaining number of formats is not 0, the device can be written to a blank (empty block) again by initializing the user data area. The number of times that initialization can be performed is preferably set smaller than the scheduled number of rewrites of the physical block of the NAND flash memory 11 ′. By setting the number of writable times smaller than the scheduled number of rewrites of the device, it is possible to write data and maintain the written data.

In the case of the reusable type with the write protect function, the write protect can be automatically set to the contents once written, as in the write protect type. Even if the memory capacity becomes full due to the writing of content, if the stored content is no longer necessary, the initialization can erase all recorded data and then record new data again. Such processing can be executed as many times as possible for initialization set in the device. As a result, a more convenient one-chip semiconductor memory device can be provided.

(Rewrite type)
A rewritable device is a device that can write and delete data in the user data area without restriction. When the rewritable device receives a data write command from the host device 2, it receives data for the transfer length specified by the command from the host device 2 and writes the data to the logical block address specified by the command (here The “data writing to the designated logical block address” corresponds to the logical block address, assuming that the designated address corresponds to the logical block address of the NAND flash memory 11 as will be described later. The physical block address is determined from the “logical block address and physical block address management table” and data is written (see paragraph 0050). Further, the device can read data randomly from the NAND flash memory 11 ′. When the NAND flash memory is used, data can be rewritten within a predetermined range (for example, 10,000 times) in the physical block of the user data area.

(Characteristic information)
Another feature of the one-chip type semiconductor memory device 10 of the present invention is that each device has its unique property as device characteristic information. Along with the above device type information, the characteristic information shown in Table 1 below can be used. This characteristic information is written to the device controller 12 or the management area of the NAND flash memory 11 ′. This information can be read when connected to the host device 2 or when the power is turned on.

  Hereinafter, each characteristic information of the said Table 1 is demonstrated.

  “Device type” includes four types of devices: read-only type, write protect type, reusable type with write protect function, and rewritable type. Can be written at the time of shipment.

  “Device type changeability” is flag information that determines whether the device type can be changed by a command. For example, when a device is to be provided as being fixed as a write protect type, “device type” is set as a write protect type and “device type changeable” is set to “not”. Also, for example, if the user wants to change the write protect type to a reusable type with write protect function during use, enter the appropriate password, change “device type changeable” to “enabled”, The “device type” can be changed to a reusable type with a write protect function by using the above command.

  “Write protect” is information for determining whether or not writing to the device is prohibited. When “write protect” is “valid”, when a write command is issued from the host device 2, the stored content is protected by returning an error. When the device type is a reproduction-only type, it is constantly set to “valid”. In the case of the write protect type and the reusable type with the write protect function, it is set to “valid” when the content is written and the write protect is desired. If the content is scheduled to be written once, the fuse function may be set at the end of the write operation, that is, the write protection “valid” may be automatically set.

  The “format state” is flag information indicating whether the device has been physically formatted, that is, whether the device can be read and written.

  “Number of remaining formats” indicates the number of times (N) that the device can be initialized by the format command. When N = 0, it indicates that formatting is impossible. For example, when the device type is a read-only type or a write protect type, the remaining device format count is initially set (automatically set) to “0”. When the device type is a reusable type with a write protect function, the “remaining format count” is initialized to an appropriate value, for example, “2”. In this case, data can be written until the storage capacity is full, and when the capacity is full, write protection is automatically applied, but data is written until the storage capacity becomes full again after device initialization. It can be executed up to two times. Each time formatting is performed, N automatically decreases by “1”, and when it becomes “0”, the subsequent formatting cannot be executed. In the case of the rewritable type, since the number of formatting is not limited, the remaining number of formatting is not used.

(Usage example with host device)
Hereinafter, an example in which the one-chip type semiconductor memory device 10 of the present invention is used in the host device 2 will be described with reference to FIG.

  The host device 2 includes a predetermined operating system (OS) 21, a file system 22, a memory interface control unit 23, and a NAND memory interface 24. In the case of this example, the FAT file system included in the host device 2 issues a command to the memory interface control unit 23, and in response to this, the memory interface control unit 23 issues a command to the device controller 12 to send the device file. Is to manage. An electrical and mechanical connection is made by the NAND memory interface 24 between the host device 2 and the one-chip semiconductor memory device 10.

  As the host device 2, for example, various industrial machines and other various devices can be considered. As the host device 2, there may be a device that reads and uses content exclusively and a device that exclusively writes content.

  When the host device 2 is turned on, the memory interface control unit 23 issues a device information acquisition command, and the installed device type (reproduction-only type, write protect type, reusable type with write protect function, rewrite type) To obtain the total logical block number and logical block size of the device.

  Thereafter, the OS 21 activates the file system 22 and mounts a volume on the device. If a file system other than the one scheduled is written on the device, an error is notified. In the case of an unformatted device, the user is notified that logical formatting processing of the device is necessary.

  If it is confirmed that the volume is mounted, the OS 21 or application then sends a request for file creation, deletion, file read, write, directory entry read, etc. to the file system 22 in accordance with a user instruction. Request as a command. Further, the file system 22 receives a command from the OS 21 and executes conversion from logical data to physical device data or conversion from physical device data to logical data in units of commands. The physical device data corresponds to data to be read or written from the file system 22 to the memory interface control unit 23.

  This physical device data corresponds to the logical block address of the device and the data to be written or corresponding to the logical block address of the device to be read. The controller 12 of the device converts this logical block address into a physical block address by referring to the “logical block address and physical block address management table” (corresponding to the address management table in the claims) of the controller 12. The data is written to the appropriate storage area, or the data is read from the appropriate storage area.

  The memory interface control unit 23 converts a write / read request from the file system 22 into a memory command, and issues a read command or a write command to the one-chip type semiconductor memory device 10.

(Controller processing)
Hereinafter, the read-only, write-protected, reusable and rewritable semiconductor storage devices with the write-protect function are executed by the device controller 12 when a read command, write command, and format command are issued from the host device 2. Each process to be performed will be described with reference to the drawings.

1. When the Read Command is Received The processing of the controller 12 when the device receives the read command will be described with reference to FIG.

  First, it is confirmed whether or not the device has been formatted. If it has not been formatted (NO in ST101), an error is returned. If YES in ST101, reading is executed (ST102).

  Here, when a read command is received for each device type, data of the specified number of logical blocks from the specified logical block is transferred from the NAND flash memory 11 ′ to the host device 2 via the NAND memory interface 123. (As described in paragraph 0050, the address specified by the host device 2 (the address included in the physical device data) corresponds to the logical block address of the NAND flash memory 11 and corresponds to the logical block address. The physical block address to be determined is determined from the “logical block address and physical block address management table” and transferred. If the reading is not completed normally (NO in ST103), the process ends in error, and if not, the process ends normally (ST104).

2. Processing performed by the controller 12 when the device receives a write command when a write command is received will be described with reference to FIG.

  First, it is confirmed whether or not the device has been formatted (ST201). If the device has not been formatted (NO), the process ends with an error. If YES in ST201, it is determined whether the write protection is set to “valid” (ST202). If YES, the process ends in an error. If the write protect is set to “invalid” (NO in ST202), it is determined whether or not the device has an empty capacity (ST203). If there is not enough capacity to write, an error is notified. If there is enough free space for writing, writing is executed (ST204). Then, it is determined whether or not the writing has been normally performed (ST205). If YES, the processing is normally terminated (ST206).

3. When the format command is received The processing of the controller 12 when the device receives the format command will be described with reference to FIG.

  It is determined whether or not write protection is set to “valid” for the device (ST301). If YES, the process ends in an error. If NO, it is then determined whether the device type is a read-only type or a write protect type (ST302). If YES, the process ends in an error. If NO (in the case of a reusable type with a write protect function or a rewritable type), it is determined whether or not the number of remaining formats is N = 0 (ST303). If NO, the format status flag is set to “unformatted” (ST304: if it has already been set). When this is finished, the formatting is executed (ST305). At this time, the remaining number of formatting is reduced by 1 from the set value and reset (ST306). Next, it is determined whether or not the format has been normally performed (ST307). If NO, the process ends with an error. If YES, the format status flag is set to “formatted” (ST308), and the format command is completed after this.

  The reason why the format status flag is set to “unformatted” (ST304) in the previous stage of executing the formatting in ST305 is that the formatting operation did not end normally for some reason during the formatting in ST305 and ended in error. In this case (in the case of NO in ST307), this is to enable the format again.

  As described above, both the reusable type with the write protect function and the rewrite type have received the format command, and if the format is set to be possible, the device is initialized (all stored data is erased). When the format command is executed, it becomes possible to write to all logical block addresses (actually, physical block addresses corresponding to the logical block) as blank devices again. When the remaining number of formatting times becomes “0”, formatting becomes impossible, and subsequent writing becomes impossible when data is written to all the storage areas and finalized.

(A) It is a figure which shows one structural example of a 1-chip type semiconductor memory device. (B) It is a general-view figure of a 1-chip type semiconductor memory device. It is a block diagram of a 1-chip type semiconductor memory device. It is a block diagram of the high-order apparatus of a 1-chip type semiconductor memory device. This is a flow of processing executed by the device controller when a read command is issued from the host device. This is a flow of processing executed by the device controller when a write command is issued from the host device. This is a flow of processing executed by the control unit of the device when a format command is issued from the host device.

Explanation of symbols

10: 1 chip type semiconductor memory device, 11: memory, 12: controller, 15: substrate, 121: ECC, 122: buffer memory, 123: NAND memory interface (side connected to host device), 124: NAND memory interface (Side connected to NAND flash memory)

Claims (1)

A one-chip semiconductor memory device usable in a host system having a predetermined operating system, FAT file system, memory interface control unit, and NAND memory interface,
The one-chip semiconductor memory device is
A one-chip LSI including a storage unit composed of a NAND flash memory and a control unit that reads and writes data to and from the storage unit based on a command from the host system. It is used connected to the NAND memory interface of the host system,
a) The original type of the one-chip semiconductor device, which is a rewritable type capable of overwriting data, a reproducing type, a write protect type capable of additionally writing data, or a reusable type having a write protect function capable of additionally writing data. Device type information that can be systematically and uniquely grasped by the host system, b) whether or not the device information type information can be changed, and c) a write protect function in which the device type information can additionally write data. The remaining number of possible formats in the case of the reusable type, and d) whether the write protection of the device is valid or invalid is stored in the management area of the control unit or storage unit
Any of the above types of devices is managed by the FAT file system of the host system.
Further, the control unit
An address that is connected to the storage unit via a NAND memory interface and that determines a physical block address corresponding to the logical block address as a logical block address of a NAND flash memory that is a storage unit, using an address specified by the host system. A management table and an error correction circuit for correcting an error in data read from the storage unit;
According to the request from the host system, the device type information is supplied to the host system, the type of the device is recognized, and only an instruction scheduled for the device type is issued to the host system.
In response to various commands from the host system, only scheduled processing for the device is executed based on the individual characteristic information of a), b), c) and d) stored in the device. Ri name is configured,
further,
In the device storing the write-protect type device type information that can be additionally written to the data, the control unit writes the data in a write-once type until the storage capacity is full based on the device type information, and the remaining storage capacity After that, it is configured not to execute any instructions that modify the data,
A device that stores reusable device type information with a write protect function capable of appending the data, the control unit stores the device type information and the remaining format stored in the management area of the control unit or the storage unit. Based on the number of times, the initialization instruction from the host system is allowed for the stored number of times, and after each initialization, the same as the device storing the write-protect type device type information that can additionally write the data A one-chip type semiconductor memory device configured to be able to execute data writing in an aspect.