JP4144907B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
[Industrial application fields]
The invention disclosed in this specification relates to a method for manufacturing a semiconductor device using a thin film semiconductor having crystallinity. In particular, the present invention relates to a method for manufacturing a thin film transistor.
[0002]
[Prior art]
In recent years, a transistor (referred to as a thin film transistor or a TFT) using a thin film semiconductor formed over a glass or quartz substrate has attracted attention. This is a technique in which a thin film semiconductor having a thickness of several hundreds to several thousands Å is formed on the surface of a glass substrate or a quartz substrate, and a transistor (insulated gate type field effect transistor) is formed using the thin film semiconductor.
[0003]
As an application range of the thin film transistor, an active matrix type liquid crystal display device is known. In this method, a thin film transistor is arranged as a switching element in each of hundreds of thousands or more of pixels arranged in a matrix, and fine and high-speed display is performed.
[0004]
As a thin film transistor used for such an active matrix liquid crystal display device, a thin film transistor using an amorphous silicon thin film has been put into practical use.
[0005]
However, a thin film transistor using an amorphous silicon thin film has a problem that its characteristics are low. For example, when a higher function is required as a display function of an active matrix liquid crystal display device, the characteristics of a thin film transistor using an amorphous silicon film are too low.
[0006]
In addition to pixel switching, it has been proposed to form an integrated liquid crystal display system integrated on a single substrate by forming peripheral drive circuits with thin film transistors. A thin film transistor using a silicon thin film cannot constitute a peripheral drive circuit because of its low operating speed. In particular, a thin film transistor using an amorphous silicon thin film has a basic problem that a CMOS circuit cannot be formed because it is difficult to put the P-channel type into practical use (the characteristics are too low to be practical).
[0007]
Further, a technique for integrating an integrated circuit for processing or storing image data on the same substrate as the pixel region and the peripheral drive circuit has been proposed, but in a thin film transistor using an amorphous silicon thin film, Therefore, an integrated circuit that can process image data cannot be constructed because of its low characteristics.
[0008]
On the other hand, as a thin film transistor having characteristics far exceeding those of a thin film transistor using an amorphous silicon thin film, a technique for forming a thin film transistor using a crystalline silicon film is known. This technique utilizes a technique of transforming an amorphous silicon film into a crystalline silicon film by performing heat treatment or laser light irradiation after the formation of the amorphous silicon film. A crystalline silicon film obtained by crystallizing an amorphous silicon film generally has a polycrystalline structure or a microcrystalline structure.
[0009]
When a thin film transistor is formed using a crystalline silicon film, much higher characteristics can be obtained than when an amorphous silicon film is used. For example, in terms of mobility, which is one index for evaluating the characteristics of a thin film transistor, the mobility of an amorphous silicon film is 1 to ² cm ² / Vs or less (in the case of an N channel type). In a thin film transistor using a crystalline silicon film, an N channel type of about 100 cm ² / Vs or more and a P channel type of about 50 cm ² / Vs or more can be obtained.
[0010]
However, the crystalline silicon film obtained by crystallizing the amorphous silicon film has a polycrystalline structure, and has a number of problems due to crystal grain boundaries. For example, there is a problem that the breakdown voltage of the thin film transistor is greatly limited because there are carriers that move via the crystal grain boundaries. In addition, there is a problem that characteristics are easily changed or deteriorated when high-speed operation is performed. There is also a problem that off current (leakage current) increases when the thin film transistor is OFF because there are carriers that move through the crystal grain boundary.
[0011]
In addition, when an active matrix liquid crystal display device is to be configured in a more integrated form, it is desired that not only the pixel region but also a peripheral circuit be formed on a single glass substrate. In such a case, in order to drive hundreds of thousands of pixel transistors arranged in a matrix, the thin film transistors arranged in the peripheral circuit are required to handle a large current.
[0012]
In order to obtain a thin film transistor capable of handling a large current, it is necessary to adopt a structure with a large channel width. However, a thin film transistor using a crystalline silicon film has a problem that even if its channel width is widened, it cannot be put into practical use due to the problem of breakdown voltage. There is also a problem that the fluctuation of the threshold value is large and is not practical.
[0013]
Even if an integrated circuit for processing image data is configured by a thin film transistor using a crystalline silicon film, a practical integrated circuit (instead of a conventional IC) is caused by problems of variation in threshold values and changes in characteristics over time. Could not be obtained).
[0014]
[Problems to be solved by the invention]
An object of the invention disclosed in this specification is to provide a thin film transistor which is not affected by grain boundaries.
Another object of the invention disclosed in this specification is to provide a thin film transistor which has a high withstand voltage and can handle a large current.
Another object of the invention disclosed in this specification is to provide a thin film transistor which has no deterioration or fluctuation in characteristics.
Another object of the invention disclosed in this specification is to provide a thin film transistor having characteristics similar to those obtained when a single crystal semiconductor is used.
[0015]
[Means for Solving the Problems]
The main invention disclosed in this specification is:
Forming a first amorphous silicon film over a substrate having an insulating surface;
Contacting and holding a metal element that is in contact with the first amorphous silicon film and promotes crystallization of silicon;
Applying heat treatment to crystallize the first amorphous silicon film;
Patterning the silicon film crystallized in the step to form a layer serving as a crystal growth nucleus;
Forming a second amorphous silicon film covering the layer serving as the crystal growth nucleus;
Performing crystal growth from the layer serving as the crystal growth nucleus to form a region substantially free of crystal grain boundaries in the second amorphous silicon film;
Forming an active layer using a region where the crystal growth is substantially not included, and
It is characterized by having.
[0016]
In the above structure, as a substrate having an insulating surface, a glass substrate, a quartz substrate, a glass substrate with an insulating film formed thereon, a quartz substrate with an insulating film formed thereon, a semiconductor substrate with an insulating film formed thereon, or an insulating film is formed. And a conductive substrate.
[0017]
As a specific example of the “step of holding a metal element that is in contact with the first amorphous silicon film and promoting crystallization of silicon” in the above structure, the step shown in FIG. Can do. In FIG. 1A, nickel, which is a metal element that promotes crystallization of silicon, is formed on the surface of an amorphous silicon film 103 formed over a glass substrate 101 on which an insulating film (silicon oxide film) 102 is formed. A state in which the contained solution (nickel acetate solution) 104 is applied is shown.
[0018]
FIG. 1A shows an example in which nickel, which is a metal element that promotes crystallization of silicon, is held in contact with the surface of an amorphous silicon film using a solution. A method of forming a nickel layer or a nickel-containing layer on the surface of the film by sputtering, CVD, or vapor deposition may be employed.
[0019]
In the above structure, the “step of patterning a crystallized silicon film to form a layer serving as a crystal growth nucleus” includes the step shown in FIG.
[0020]
In the above structure, as the “step of forming the second amorphous silicon film so as to cover the layer serving as the crystal growth nucleus”, a step shown in FIG.
[0021]
In the above structure, “a step of performing crystal growth from a layer serving as a crystal growth nucleus to form a region substantially free of crystal grain boundaries in the second amorphous silicon film” is shown in FIG. ) And the step shown in FIG.
[0022]
In the invention disclosed in this specification, one or more kinds selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au are used as metal elements for crystallizing silicon. These elements are used.
[0023]
A region substantially free of grain boundaries obtained as a result of crystal growth can be referred to as a monodomain region. The mono-domain region, Fe, Co, Ni, Ru , Rh, Pd, Os, Ir, Pt, Cu, one or plural kinds selected from Au element is a metal element for promoting crystallization of silicon Is contained at a concentration of 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .
[0024]
The monodomain region does not have a point defect or a plane defect that becomes a crystal grain boundary, but has a point defect to be neutralized. Therefore, hydrogen or halogen hydrogen for neutralizing point defects is contained at a concentration of 0.001 atomic% to 5 atomic%.
[0025]
Also in this mono domain region, a metal element for promoting crystallization of silicon is contained in a concentration of 1 × 10 ¹⁴ ~1 × 10 ¹⁹ atoms cm ^-3. These concentrations are defined as minimum values based on data obtained by SIMS (secondary ion analysis method).
[0026]
Note that it is difficult at present to measure the concentration of a metal element at a concentration of 1 × 10 ¹⁶ atoms cm ⁻³ or less by SIMS. However, it is possible to estimate from the concentration of the metal element in the solution used when introducing the metal element. That is, the concentration not measured by SIMS can be estimated from the relationship between the concentration of the metal element in the solution and the concentration of metal element finally remaining in the silicon film measured by SIMS.
[0027]
In performing solid-phase crystallization using a metal element for promoting crystallization, there are roughly two methods for introducing a metal element.
[0028]
One is that the surface of the amorphous silicon film (or the surface of the base film of the amorphous silicon film) is formed as a very thin film by using a “physical formation” such as sputtering or electron beam evaporation. (Ii). In these methods, the metal element is introduced into the amorphous silicon film by forming a film of the metal element in contact with the amorphous silicon film.
[0029]
When this method is used, there is a problem that it is difficult to precisely control the concentration of the metal element introduced into the film.
[0030]
In addition, in order to limit the introduction amount, when the film thickness is formed as an extremely thin film having a thickness of about several tens of millimeters or less, there is a problem that it is difficult to form a complete film.
[0031]
In such a case, the metal element film is formed in an island shape on the surface to be formed. That is, a discontinuous layer is formed. In order to solve this problem, it can be solved by using, for example, a molecular epitaxy method (MBE method) or the like. However, this is only realized in a limited area.
[0032]
When crystallization is performed after forming the heterogeneous layer as described above, each of the island-like regions forming the heterogeneous layer becomes a nucleation nucleus and the crystallization proceeds.
[0033]
When a crystalline silicon film that has been crystallized from such a situation is carefully observed, an extremely large amount of amorphous component remains. This can be confirmed by observation with an optical microscope or an electron micrograph, and further measurement by Raman spectroscopy. It has also been confirmed that the metal components are partially agglomerated. This is considered to be because the metal component that became the nucleus of the crystal remains in the nucleus region as it is.
[0034]
The region where the metal components are partially aggregated and present serves as a recombination center of electrons and holes in the crystallized semiconductor region. Such a recombination center causes a very bad characteristic such as an increase in leakage current of the thin film transistor.
[0035]
On the other hand, there is a method using a solution containing a metal element that promotes crystallization of silicon. In this method, the metal element is contained in a solution, and the solution is applied to the surface of the amorphous silicon film or the surface of the base film on which the amorphous silicon film is formed by spin coating or the like.
[0036]
As such a solution, several kinds of solutions can be used depending on the metal element to be used. Typically, a metal compound having a solution form can be used. Below, the example of the metal compound which can be utilized for the method of using this solution is shown.
[0037]
(1) When Ni is used as a metal element As a nickel compound, nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate, nickel sulfate, nickel formate, nickel oxide, nickel hydroxide , Nickel acetylacetonate, nickel 4-cyclohexylbutyrate and nickel 2-ethylhexanoate can be used.
Further, Ni may be mixed with at least one selected from benzene, toluene xylene, carbon tetrachloride, chloroform, ether, trichloroethylene, and chlorofluorocarbon, which are nonpolar solvents.
[0038]
(2) When Fe (iron) is used as a catalyst element Materials known as iron salts such as ferrous bromide (FeBr ₂ 6H ₂ O), ferric bromide (FeBr ₃ 6H ₂ O), acetic acid Ferric iron (Fe (C ₂ H ₃ O ₂ ) ₃ xH ₂ O), ferrous chloride (FeCl ₂ 4H ₂ O), ferric chloride (FeCl ₃ 6H ₂ O), ferric fluoride (FeF) ₃ 3H ₂ O), ferric nitrate (Fe (NO ₃ ) ₃ 9H ₂ O), ferrous phosphate (Fe ₃ (PO ₄ ) ₂ 8H ₂ O), ferric phosphate (FePO ₄ 2H ₂₎ Those selected from O) can be used.
[0039]
(3) In the case of using Co (cobalt) as a catalyst element, a material known as a cobalt salt as the compound, for example, cobalt bromide (CoBr6H ₂ O), cobalt acetate (Co (C ₂ H ₃ O ₂ ) ₂ 4H ₂ O), cobalt chloride (CoCl ₂ 6H ₂ O), cobalt fluoride (CoF ₂ xH ₂ O), and cobalt nitrate (Co (No ₃ ) ₂ 6H ₂ O) can be used.
[0040]
(4) When Ru (ruthenium) is used as a catalyst element, a material known as a ruthenium salt, for example, ruthenium chloride (RuCl ₃ H ₂ O) can be used as the compound.
[0041]
(5) When Rh (rhodium) is used as a catalytic element, a material known as a rhodium salt, for example, rhodium chloride (RhCl ₃ 3H ₂ O) can be used as the compound.
[0042]
(6) When Pd (palladium) is used as the catalyst element, a material known as a palladium salt, for example, palladium chloride (PdCl ₂ 2H ₂ O) can be used as the compound.
[0043]
(7) When Os (osnium) is used as a catalyst element, a material known as an osnium salt, for example, osmium chloride (OsCl ₃ ) can be used as the compound.
[0044]
(8) When using Ir (iridium) as a catalyst element, a material known as an iridium salt as the compound, for example, a material selected from iridium trichloride (IrCl ₃ 3H ₂ O) and iridium tetrachloride (IrCl ₄ ) Can be used.
[0045]
(9) When Pt (platinum) is used as a catalyst element, a material known as a platinum salt, for example, platinum chloride (PtCl ₄ 5H ₂ O) can be used as the compound.
[0046]
(10) When Cu (copper) is used as a catalyst element, cupric acetate (Cu (CH ₃ COO) ₂ ), cupric chloride (CuCl ₂ 2H ₂ O), cupric nitrate (Cu (NO) ₃ ) Materials selected from ₂ 3H ₂ O) can be used.
[0047]
(11) When gold is used as a catalytic element, the compound was selected from gold trichloride (AuCl ₃ xH ₂ O), gold chloride (AuHCl ₄ 4H ₂ O), and sodium tetrachloroaurate (AuNaCl ₄ 2H ₂ O). Materials can be used.
[0048]
Each of these can be sufficiently dispersed in a single molecule in a solution. This solution can be spread over the entire surface to be formed by dropping the solution onto the surface to which the catalyst is added and spin-coating it at a rotational speed of 50 to 500 revolutions per minute (RPM).
[0049]
At this time, in order to promote uniform wettability with the surface on which the silicon semiconductor is formed, if a silicon oxide film having a thickness of 5 to 100 mm is formed on the surface of the silicon semiconductor, the solution is covered by the surface tension of the liquid. It is possible to sufficiently prevent spotted spots on the forming surface.
[0050]
Further, when a surfactant is added to the liquid, a uniform wet state can be obtained even on a silicon semiconductor without a silicon oxide film.
[0051]
The solution method using the can as a method of forming a film of an organic metal compound containing the metal element onto the forming surface.
[0052]
A metal element for promoting crystallization of silicon can be diffused atomically into the semiconductor through the oxide film. Then, the crystal nuclei (granularity) can be diffused without being actively formed, and the whole can be crystallized uniformly. As a result, it is possible to prevent the metal element from being partially concentrated or a large amount of the amorphous component remaining.
[0053]
Alternatively, an organometallic compound may be uniformly coated and treated with ozone (by irradiation with ultraviolet rays (UV) in oxygen). In this case, a metal oxide film is formed, and crystallization proceeds from the metal oxide film. In this way, the organic matter is oxidized and can be vaporized and removed as carbon dioxide gas, so that more uniform solid phase growth can be achieved.
[0054]
In addition, when spin-coating a solution, if spin-coating is performed only by low-speed rotation, the metal component in the solution existing on the surface tends to be supplied onto the semiconductor film more than necessary for solid-phase growth. For this reason, after this low speed rotation, the substrate is rotated at 1000 to 10,000 rotations / minute, typically 2000 to 5000 rotations / minute. Then, all excess organic metal is blown out of the substrate surface, and an appropriate amount of metal component can be supplied.
[0055]
In order to control the amount of the metal component introduced, the concentration of the metal element in the solution may be controlled. This method is very useful because the concentration of the metal element finally introduced into the silicon film can be accurately controlled.
[0056]
The method of introducing the metal element using such a solution does not form an island-shaped region of metal particles for crystallization on the semiconductor surface (or the surface of the base film), but a uniform layer (continuous layer). layer) can be formed.
[0057]
In the crystallization process by heating or laser light irradiation, uniform and dense crystal growth can be performed.
[0058]
Here, an example in which a solution is used has been shown. However, as a method for obtaining the same effect as that in the case of using a solution, a method of forming a gas of a metal compound, particularly an organometallic compound on a surface to be formed by a CVD method is also available. is there.
[0059]
It can be said that the method using such a solution is a chemical forming method. Moreover, it can be said that the formation method by the above-mentioned sputtering method etc. is a physical formation method. The physical formation method can be called a non-uniform “anisotropic crystal growth method” using metal nuclei, but the chemical formation method can be called “isotropic growth” using a uniform metal catalyst. It can be said that the crystal growth is uniform.
[0060]
【Example】
[Example 1]
In this embodiment, a crystal nucleus made of a silicon film crystallized by the action of a metal element that promotes crystal growth of silicon is selectively formed on a substrate having an insulating surface, and then an amorphous silicon film is formed. Further, the present invention relates to a technique for selectively forming a monodomain region by performing crystal growth by laser irradiation.
[0061]
FIG. 1 shows a manufacturing process of this embodiment. First, a silicon oxide film is formed as a base film 102 on the glass substrate 101 to a thickness of 3000 mm by sputtering. This base film 102 functions as a barrier layer for preventing alkali ions and impurities from diffusing from the glass substrate 101 side. As the base film, any material that is an insulating film and has a barrier effect can be used. For example, a silicon nitride film can be used.
[0062]
After the base film 102 is formed, an amorphous silicon film 103 is formed to a thickness of 200 mm by plasma CVD or low pressure thermal CVD. This amorphous silicon film is used later to form crystal nuclei. The amorphous silicon film 103 may be formed to a thickness of 50 to 500 mm.
[0063]
Next, a solution 104 containing nickel which is a metal element that promotes crystallization of silicon is applied (spin coated) using a spinner 100. The introduction amount (addition amount) of nickel element can be adjusted by controlling the nickel concentration in the solution 104. Here, a nickel acetate solution is used as the solution 103 containing nickel. In this manner, a state in which nickel is introduced into the entire surface of the amorphous silicon film 103, in other words, a state in which nickel exists in contact with the entire surface of the amorphous silicon film 103 is realized. (Fig. 1 (A))
[0064]
Here, a method using a solution is shown as a method for introducing nickel, but a nickel layer or a layer containing nickel is formed on the surface of the amorphous silicon film 103 by a sputtering method, a CVD method, or an evaporation method. But you can.
[0065]
Next, a heat treatment is performed at a temperature of 450 ° C. to 600 ° C., here, 550 ° C. for 4 hours, whereby the amorphous silicon film 103 is crystallized to obtain a crystalline silicon film 105. This crystalline silicon film 105 has a polycrystalline or microcrystalline state. (Fig. 1 (B))
[0066]
Next, the crystalline silicon film 105 is patterned to form layers 106 and 107 that will become crystal nuclei in a later step. (Figure 1 (C))
[0067]
Next, an amorphous silicon film 108 is formed to a thickness of 500 mm by plasma CVD or low pressure thermal CVD. This amorphous silicon film will later constitute an active layer of a semiconductor device (for example, a thin film transistor). (Fig. 1 (D))
[0068]
Next, laser irradiation is performed while the sample is heated to a temperature of 450 ° C. to 600 ° C. (the upper limit of this temperature is determined by the heat-resistant temperature of the substrate). In this step, crystal growth is performed as indicated by 109 and 110 from the portions 106 and 107 serving as the nucleus of crystal growth. (Figure 1 (E))
[0069]
Thus, monodomain regions 111 and 113 that can be regarded as single crystals as shown in FIG. 1F are obtained. In FIG. 1F , reference numeral 112 denotes a region remaining as an amorphous region.
[0070]
[Example 2]
This embodiment relates to an example of forming a pair of N-channel and P-channel thin film transistors by applying the method for forming a monodomain region shown in Embodiment 1. In this embodiment, an example in which a pair of thin film transistors is formed over a glass substrate is described; however, a plurality of thin film transistors can be formed by a similar manufacturing method.
[0071]
First, a state having monodomain regions 303 and 305 is obtained by the method described in Embodiment 1 on a glass substrate 301 on which a silicon oxide film having a thickness of 3000 mm is formed as the base film 302. (Fig. 2 (A))
[0072]
Next, patterning is performed to form active layers 306 and 307 of two thin film transistors. In the figure, an active layer indicated by 306 is an active layer of a thin film transistor having an N channel type, and an active layer indicated by 307 is an active layer of a thin film transistor having a P channel type. (Fig. 2 (B))
[0073]
Here, the entire active layer is formed in the monodomain region, but at least the channel formation region needs to be formed in the monodomain region.
[0074]
Next, a gate electrode 309 and 310 is formed by forming a layer mainly composed of scandium-containing aluminum to a thickness of 6000 mm and patterning. Furthermore, oxide layers 311 and 312 are formed by performing anodic oxidation in the electrolytic solution using the gate electrodes 309 and 310 as anodes. The thicknesses of the oxide layers 311 and 312 are about 2000 mm. An offset region can be formed in the later impurity ion implantation step with the thickness of the oxide layers 311 and 3112.
[0075]
Further, impurity ions are implanted. In this step, first, the right thin film transistor region is masked with a resist and phosphorus ions are implanted , and further the left thin film transistor region is masked and boron ions are implanted. Thus, the source region 313, the channel formation region 315, and the drain region 316 of the N-channel thin film transistor are formed in a self-aligned manner. 314 is also formed as an offset region in a self-aligning manner. In addition, a source region 317, a channel formation region 319, and a drain region 325 of a P-channel thin film transistor are formed in a self-aligned manner. 318 is also formed as an offset region in a self-aligning manner. (Fig. 2 (C))
[0076]
Further, by irradiating with laser light or strong light, annealing of the active layer at the time of implantation of impurity ions and activation of the implanted impurity ions are performed. This step is effective when the sample is heated at a temperature of 450 ° C. to 600 ° C.
[0077]
Next, a silicon oxide film 320 is formed as an interlayer insulating film to a thickness of 6000 mm by a plasma CVD method, and after forming contact holes, aluminum is used to form a source electrode 321 and a drain electrode 322 of an N-channel thin film transistor, and a P-channel thin film transistor. Source electrode 323 and drain electrode 324 are formed. Further, heat treatment is performed in a hydrogen atmosphere at 350 ° C., whereby an N-channel thin film transistor and a P-channel thin film transistor are completed. (Fig. 2 (D))
[0078]
Since the thin film transistor shown in this embodiment is configured using a region where the active layer of each thin film transistor can be regarded as a single crystal, that is, a monodomain region, there is no problem of variation in threshold value or change in characteristics over time. can do. Further, since the thin film transistor described in this embodiment can operate at high speed, various thin film integrated circuits can be formed.
[0079]
Example 3
This embodiment relates to a structure of a thin film transistor disposed in each pixel of an active matrix liquid crystal display device. FIG. 3 shows a manufacturing process of the thin film transistor described in this embodiment. First, a silicon film having a monodomain region 303 is formed on the glass substrate 301 on which the base film 302 is formed by the method described in Embodiment 1. (Fig. 3 (A))
[0080]
Then, an active layer 306 of an N channel type thin film transistor is formed by patterning using the monodomain region 303. (Fig. 3 (B))
[0081]
Next, a silicon oxide film 308 to be a gate insulating film is formed to a thickness of 1000 mm by plasma CVD. Further, a gate electrode 309 is formed by depositing a film containing aluminum containing scandium as a main component to a thickness of 6000 mm by an electron beam vapor deposition method and performing patterning. Further, an oxide layer 311 is formed around the gate electrode 309 by performing anodization in the electrolytic solution using the gate electrode 309 as an anode. This oxide layer 311 serves as a mask in a subsequent impurity ion implantation step and is used to form an offset region. Note that the thickness of the oxide layer 311 is about 2000 mm.
[0082]
Next, impurity ions are implanted. Here, phosphorus ions are implanted into regions 313 and 316 by implanting phosphorus ions by an ion doping method. In this step, the source region 313 and the drain region 316 are formed in a self-aligned manner. Further, the channel formation region 315 and the offset region 314 are simultaneously formed in a self-aligning manner. (Figure 3 (C))
[0083]
Furthermore, annealing is performed by irradiation with laser light or strong light. A silicon oxide film 320 is formed to a thickness of 6000 mm as an interlayer insulating film. Further, an ITO electrode 400 to be a pixel electrode is formed. Next, contact holes are formed, and a source electrode 321 and a drain electrode 322 made of aluminum are formed. The drain electrode 322 is connected to the ITO electrode 400 which is a pixel electrode. (Fig. 3 (D))
[0084]
In the thin film transistor shown in this example, the active layer is configured using a monodomain region that does not substantially have a crystal grain boundary, so that the presence of an OFF current due to the presence of the crystal grain boundary is greatly reduced. Can be. Therefore, this is one of the most suitable configurations applied to the pixel electrode of the active matrix liquid crystal display device.
[0085]
Example 4
FIG. 4 shows an example of constructing a more advanced active matrix type liquid crystal display system using the invention disclosed in this specification. Currently, miniaturization is achieved by fixing a semiconductor chip (IC) attached to a main board of a normal computer on at least one substrate of a liquid crystal display having a configuration in which liquid crystal is sandwiched between a pair of substrates. , Lighter and thinner. This is because a thin film transistor formed over a substrate having an insulating surface such as glass cannot form an integrated circuit having characteristics that can replace a known IC chip.
[0086]
However, in the case of using a thin film transistor using a monodomain region in which the influence of crystal grain boundaries that can be virtually ignored as disclosed in the present specification is used, it is comparable to conventional IC chips because of its high characteristics and stability. An integrated circuit can be configured.
[0087]
Hereinafter, FIG. 4 will be described. The substrate 15 is also a liquid crystal display substrate, on which an active matrix circuit in which a number of pixels each including a thin film transistor 11, a pixel electrode 12, and an auxiliary capacitor 13 are formed, and an X decoder / driver for driving the active matrix circuit, Y A decoder / driver and an XY branch circuit are formed by thin film transistors.
[0088]
In order to drive the active matrix circuit, it is necessary to arrange a buffer circuit having a low output impedance in the peripheral circuit. In the configuration shown in FIG. 4, this buffer circuit is formed of a thin film transistor in which an active layer is formed in a monodomain region formed by using the invention disclosed in this specification. By doing so, a large current can be passed and a structure with a high breakdown voltage can be obtained.
[0089]
On the substrate 15, a thin film integrated circuit using a thin film transistor configured using the invention disclosed in this specification is formed. Further, a conventionally known integrated circuit chip is attached to a portion that cannot be constituted by a thin film integrated circuit. Of course, all the integrated circuits may be constituted by thin film integrated circuits (herein, the thin film integrated circuit is formed by using a thin film semiconductor formed on the surface of the substrate 15).
[0090]
Each integrated circuit or semiconductor chip is connected to a circuit on the substrate 15 by means such as a wiring pattern, a wire bonding method, or a COG (chip on glass) method.
[0091]
In FIG. 4, an input port is a circuit that reads an externally input signal and converts it into an image signal. The correction memory is a memory unique to the panel for correcting an input signal or the like in accordance with the characteristics of the active matrix panel. In particular, this correction memory has information specific to each pixel as a non-volatile memory, and is used for individual correction. That is, if a pixel of the electro-optical device has a point defect, a signal corrected accordingly is sent to the pixels around the point to cover the point defect and make the defect inconspicuous. Alternatively, when the pixel is darker than the surrounding pixels, a larger signal is sent to the pixel so that the brightness is the same as that of the surrounding pixels. Since the pixel defect information varies from panel to panel, the information stored in the correction memory varies from panel to panel.
[0092]
The CPU and the memory have the same functions as those of a normal computer. In particular, the memory has an image memory corresponding to each pixel as a RAM. These chips are all of the CMOS type.
[0093]
As described above, even a CPU and a memory are formed on a liquid crystal display substrate, and configuring a simple electronic device such as a personal computer with a single substrate reduces the size of the liquid crystal display system and widens its application range. Is very useful for. It is very useful to further reduce the size of the liquid crystal display device and increase its applicability, by forming a part or all of these integrated circuits on a substrate and using a thin film semiconductor. .
[0094]
A thin film transistor formed using a monodomain region can form an integrated circuit comparable to an IC integrated on a single crystal silicon wafer. Therefore, as shown in this embodiment, a thin film transistor manufactured using the invention disclosed in this specification can be used for a circuit required for a systemized liquid crystal display. In particular, it is extremely useful to use a thin film transistor manufactured using a region that can be regarded as a single crystal (monodomain region) for an analog buffer circuit or other necessary circuit.
[0095]
Example 5
The present embodiment relates to an example of providing a thin film transistor that is not easily affected by nickel elements by forming an active layer of the thin film transistor while avoiding a nickel silicide region serving as a crystal nucleus when forming a monodomain region.
[0096]
5 and 6 illustrate a manufacturing process of the thin film transistor described in this embodiment. First, an amorphous silicon film is formed to a thickness of 200 mm on the glass substrate 101 on which the base film 102 is formed by using a plasma CVD method or a low pressure thermal CVD method. Then, the nickel acetate solution 104 is applied by the method shown in the first embodiment. (Fig. 5 (A))
[0097]
Next, a nickel silicide layer 105 is formed by applying heat treatment at 400 ° C. for 1 hour. (Fig. 5 (B))
[0098]
Then, patterning is performed to selectively leave the nickel silicide layer 107a serving as a crystal nucleus. (Fig. 5 (C))
[0099]
Next, an amorphous silicon film 108 is formed to a thickness of 500 mm by plasma CVD or low pressure thermal CVD. (Fig. 5 (D))
[0100]
Next, in the state heated to a temperature of 550 ° C., a laser beam is irradiated to perform crystal growth as indicated by 110. (Fig. 5 (E))
[0101]
Thus, the monodomain region indicated by 113 is formed. (Fig. 5 (F))
[0102]
Then, the active layer 601 is formed by patterning, avoiding the region where the nickel silicide layer 107a was formed. (Fig. 6 (A))
[0103]
In this state, since the region on the high nickel silicide linear density of the nickel is removed, it is possible to lower the nickel concentration in the active layer.
[0104]
Next, a silicon oxide film 603 serving as a gate insulating film is formed to a thickness of 1000 mm by plasma CVD. Further, a gate electrode 604 is formed by depositing a film containing aluminum containing scandium as a main component to a thickness of 6000 mm by an electron beam evaporation method and performing patterning. Further, an oxide layer 605 is formed around the gate electrode 604 by performing anodic oxidation in the electrolytic solution using the gate electrode 604 as an anode. This oxide layer 605 functions as a mask in a subsequent impurity ion implantation step and is used to form an offset region. Note that the thickness of the oxide layer 605 is approximately 2000 mm. (Fig. 6 (B))
[0105]
Next, impurity ions are implanted. Here, phosphorus ions are implanted into regions 606 and 609 by implanting phosphorus ions by an ion doping method. In this step, the source region 606 and the drain region 609 are formed in a self-aligning manner. Further, the channel formation region 608 and the offset region 607 are simultaneously formed in a self-aligning manner. (Fig. 6 (C))
[0106]
Furthermore, annealing is performed by irradiation with laser light or strong light. Then, a silicon oxide film 610 is formed as an interlayer insulating film to a thickness of 6000 mm . Next, contact holes are formed, and a source electrode 611 and a drain electrode 612 made of aluminum are formed.
[0107]
The thin film transistor described in this embodiment has a structure in which the operation of the thin film transistor is not easily affected by the metal element in order to form the active layer while avoiding the region where the metal element that promotes crystallization of silicon is introduced. it can. In other words, there is a region where the metal element concentration is high in the active layer by forming the active layer while avoiding the region where the metal silicide layer that promotes crystallization, which becomes a crystal nucleus during crystal growth, is formed. It can be set as the structure which does not.
[0108]
Example 6
In this embodiment, plasma treatment is performed on an amorphous silicon film to promote dehydrogenation (desorption of hydrogen) from the amorphous silicon film. The crystallization of the silicon film is promoted.
[0109]
Here, in the step shown in FIG. 1D, plasma processing using hydrogen plasma is performed on the amorphous silicon film 108. This plasma is performed by converting hydrogen gas in a reduced pressure state into plasma by using ECR conditions and exposing the amorphous silicon film to this hydrogen plasma.
[0110]
Also, during the hydrogen plasma treatment, it is important to heat the amorphous silicon film at a temperature lower than its crystallization temperature. The crystallization temperature of the amorphous silicon film differs depending on the film forming method and film forming conditions of the amorphous silicon film. In general, it is reasonable to consider the temperature range from 600 ° C to 650 ° C. The lower limit is about 400 ° C. Therefore, it is preferable that the temperature range of this heating shall be 400-600 degreeC.
[0111]
It is also useful to use the strain point of the glass substrate to be used as a guideline for determining the upper limit of the heating temperature. That is, heating is performed at the highest possible temperature, with the upper limit of the strain point of the glass substrate used. By adopting this method, it is possible to obtain a predetermined effect while suppressing the influence of deformation and shrinkage of the glass substrate.
[0112]
When the treatment with hydrogen plasma is performed, hydrogen in the amorphous silicon film is combined with hydrogen ions in the plasma to become hydrogen gas, and as a result, the detachment of hydrogen from the film is promoted. And the coupling | bonding of silicon atoms is accelerated | stimulated and it can be set as the state where the order of the arrangement | sequence of an atom becomes high. This state can be said to be a quasicrystalline state, and is very easy to crystallize.
[0113]
In the state where the plasma treatment is performed, the amorphous silicon film can be crystallized by applying energy by heating or laser light irradiation. This crystallization can be performed with very high reproducibility because the amorphous silicon film is very easily crystallized by the effect of the plasma treatment, and the crystallinity can be extremely high. it can.
[0114]
【The invention's effect】
An amorphous silicon film formed on a substrate having an insulating surface is crystallized by the action of a metal element that promotes the crystallization of silicon, and the crystallized silicon film is patterned to allow subsequent crystal growth. A mononuclear region is formed by forming crystal nuclei, further forming an amorphous silicon film covering the crystal nuclei, and performing crystal growth using the previous crystal nuclei as nuclei. A thin film transistor having high characteristics can be obtained by forming a thin film transistor using this monodomain region.
[0115]
Specifically, it is possible to obtain a thin film transistor that can stably operate at a high speed, has no threshold fluctuation or characteristic change with time, has a small OFF current, and can handle a larger ON current. it can.
[Brief description of the drawings]
FIG. 1 shows a manufacturing process of a thin film silicon semiconductor film having a monodomain region.
FIG. 2 illustrates a manufacturing process of a thin film transistor.
FIG. 3 illustrates a manufacturing process of a thin film transistor.
FIG. 4 shows a schematic configuration of a liquid crystal display.
FIG. 5 illustrates a manufacturing process of a thin film transistor.
FIG. 6 illustrates a manufacturing process of a thin film transistor.
[Explanation of symbols]
100 Spinner 101, 301 Glass substrate 102, 302 Base film (silicon oxide film)
103 amorphous silicon film 104 solution containing nickel 105 crystalline silicon film 106, 107, 107a, 300 selectively formed nickel layer or layer containing nickel 108 amorphous silicon film 111, 113 monodomain Region 303, 305 Mono domain region 306, 307, 601 Active layer 308, 603 Gate insulating film 111, 304 Amorphous region 309, 310, 604 Gate electrode 311, 312, 605 Oxide layer 313, mainly composed of aluminum 317,611 source electrode 315,319,608 channel forming region 316, 325, 606 drain region 314,318,607 offset region 320,610 interlayer insulating film 321,323,611 source electrode 322,324,612 drain electrode 400 pixel electric (ITO) electrode

Claims (8)

Forming a first amorphous silicon film on the insulating surface;
Forming a layer containing a metal element that is in contact with the entire surface of the first amorphous silicon film and promotes crystallization of silicon;
The layer containing the metal element and the first amorphous silicon film are subjected to heat treatment and patterned to form a layer serving as a crystal growth nucleus,
Forming a second amorphous silicon film covering the layer serving as the crystal growth nucleus;
Growing the second amorphous silicon film from the layer serving as the crystal growth nucleus to form a crystalline silicon film;
An active layer made of the crystalline silicon film is formed by removing the layer serving as the crystal growth nucleus and the crystalline silicon film located around the layer serving as the crystal growth nucleus. Manufacturing method. Forming a first amorphous silicon film on the insulating surface;
A layer containing a metal element for promoting crystallization of silicon in contact with the entire surface of the first amorphous silicon film,
The layer containing the metal element and the first amorphous silicon film are subjected to heat treatment and patterned to form a layer serving as a crystal growth nucleus,
Forming a second amorphous silicon film covering the layer serving as the crystal growth nucleus;
Irradiating a laser beam or strong light to cause the second amorphous silicon film to grow from the layer serving as the crystal growth nucleus, thereby forming a crystalline silicon film,
An active layer made of the crystalline silicon film is formed by removing the layer serving as the crystal growth nucleus and the crystalline silicon film located around the layer serving as the crystal growth nucleus. Manufacturing method. Forming a first amorphous silicon film on the insulating surface;
Forming a layer containing a metal element that is in contact with the entire surface of the first amorphous silicon film and promotes crystallization of silicon;
The layer containing the metal element and the first amorphous silicon film are subjected to heat treatment and patterned to form a layer serving as a crystal growth nucleus,
Forming a second amorphous silicon film covering the layer serving as the crystal growth nucleus;
A laser beam or intense light is irradiated while heating at a temperature of 450 ° C. to 600 ° C. to grow the second amorphous silicon film from the layer serving as the crystal growth nucleus, thereby forming a crystalline silicon film. ,
An active layer made of the crystalline silicon film is formed by removing the layer serving as the crystal growth nucleus and the crystalline silicon film located around the layer serving as the crystal growth nucleus. Manufacturing method. By a coating method, a method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that forming a layer containing a metal element for promoting crystallization of the silicon. Sputtering method, a CVD method or an evaporation method, a method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that forming a layer containing a metal element for promoting crystallization of the silicon. The metal element, Fe, Co, Ni, Ru , Rh, Pd, Os, Ir, Pt, Cu, of claims 1 to 5, characterized in that one or more kinds of elements selected from Au used A method for manufacturing a semiconductor device according to any one of the above. In the crystalline silicon film, the concentration of the metal element is 1 × 10 ¹⁴ atoms cm ⁻³ to 1 × 10 ¹⁹ atoms cm ⁻³ in the region where the crystal growth is performed from the layer serving as the crystal growth nucleus. the method for manufacturing a semiconductor device according to any one of claims 1 to 6. 2. The crystalline silicon film according to claim 1, wherein a region grown from the layer serving as a crystal growth nucleus contains hydrogen or a halogen element at a concentration of 0.001 atomic% to 5 atomic%. 8. A method for manufacturing a semiconductor device according to any one of 1 to 7 .

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