JP4143947B2 - Electrophotographic equipment - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electrophotographic apparatus that receives and prints a binary image signal from a host apparatus, and relates to an electrophotographic apparatus provided with error detection means.
[0002]
[Prior art]
As a representative technique for improving the image quality of an electrophotographic apparatus, there is an edge smoothing technique. This technology is a method for detecting pixels at the edge and multi-value the print size of the pixels. For example, the number of dots per inch (dpi) is printed by an electrophotographic apparatus having a low resolution (for example, 300 dpi). The object is to make the jagged lines and characters, particularly jagged edges, appear at the edges without increasing the resolution of the input image, as in the case of increasing the resolution (for example, 600 dpi). Usually, to double the resolution from 300 dpi to 600 dpi, an electrophotographic apparatus capable of printing 4 times of memory, processing capability, and 600 dpi is required. Therefore, although the cost increases, the edge smoothing technique can achieve high image quality at low cost without increasing the resolution of the input image and the electrophotographic apparatus.
[0003]
[Problems to be solved by the invention]
A typical method in the edge smoothing technique is a template matching method. The template matching method can be applied to high resolution, and is a technology with a wide application range among image recognition methods. In general, an input image is temporarily stored in a memory buffer, an edge portion is detected by arithmetic processing, and a pixel size correction process is performed based on the detection result using, for example, a look-up table (LUT). In order to realize this template matching method, the image pattern detection means is composed of electronic components such as a memory buffer that stores an input image, an arithmetic processing circuit that performs arithmetic processing, and a pixel correction circuit that corrects the pixel size. It is conceivable that a detection error such as, for example, an edge portion is not detected or a portion other than the edge portion is erroneously detected as an edge portion due to variations or failures in the image.
[0004]
When a detection error occurs, problems such as deterioration of the quality of the output image printed by the electrophotographic apparatus arise. For example, the influence of the detection error of the image pattern detection unit on the printed image is various, such as an error that can hardly be visually confirmed, such as a dot-by-dot unit or a dot shift for each line, and an error that can be confirmed. 2. Description of the Related Art In recent years, an electrophotographic apparatus is required to have high image quality, and a technique for obtaining high image quality, such as controlling the image quality by changing the amount of light according to an image such as a fine line, a halftone image, or a solid image, has been considered. As the image quality is improved, the above-mentioned errors that are difficult to check with the eyes become a problem, and high reliability of the image pattern detecting means has been required.
[0005]
[Means for Solving the Problems]
Therefore, according to the present invention, an error detection means for judging a circuit operation is provided in an image pattern detection means for detecting, for example, an edge portion or a fine line portion from a binary image signal (input image) sequentially inputted from a host device. Thus, the quality of the output image is guaranteed.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to FIGS.
[0007]
FIG. 1 shows an apparatus configuration of the present embodiment. The image pattern detection unit 109 receives the binary image signal 108 transmitted from the host device 107, and inputs the print signal 110 and the light amount signal 111 to the light amount variable unit 112. The light quantity variable means 112 sets the ON time of the semiconductor laser 103 a by the print signal 110 and sets the light quantity of the semiconductor laser 103 a by the light quantity signal 111. Light from the semiconductor laser 103a passes through the laser optical system 103 and is irradiated onto the rotating photosensitive drum 101 while being scanned in the axial direction by a rotating mirror or the like. Then, a pattern based on the print signal 110 is printed with a pixel size based on the light quantity signal 111 by the charger 102, the developing device 104, the transfer device 105, the fixing device 106, etc. that constitute a known electrophotographic process, and the host device 107. A high-quality printed matter is obtained from the binary image signal 108.
[0008]
FIG. 2 shows the configuration of the image pattern detection means 109. The image pattern detection unit 109 includes a line memory 201, a latch circuit 202, a template matching unit 203, a synchronization circuit 204, an error detection unit 205, and switching elements (hereinafter referred to as SW elements) 206 and 207.
[0009]
The binary image signal 108 sequentially transmitted from the host device 107 is first stored in the line memory 201 for (2N + 1) scans. FIG. 3 shows details of the line memory 201. The line memory 201 is composed of line memories for three lines from line A to line C. This is a configuration in which binary image signals 108 for three scans are stored, and an example corresponding to N = 1 is indicated by (2N + 1). The pixel synchronization signal 301 is transmitted from the host device 107 as a synchronization signal of the binary image signal 108. The horizontal synchronization signal 302 is a well-known signal for setting the printing start position of the electrophotographic apparatus. The electrophotographic apparatus itself transmits an ON signal at the timing of one scan of the binary image signal 108. The binary image signal 108 for one scan is sequentially stored in the line memory by the pixel synchronization signal 301 and the horizontal synchronization signal 302, and the stored binary image signal 108 for three scans is stored in the pixel synchronization signal 301 and the horizontal synchronization signal. In synchronization with 302, the data is output from the line memory to the latch circuit 202.
[0010]
The output signals for three scans are configured into (2N + 1) × (2N + 1) matching data 202a by the latch circuit 202 of FIG. FIG. 3 shows details of the latch circuit 202. The latch circuit 202 includes 3 × 3 = 9 latch elements 303. In this case, N = 1. The latch element 303 moves the input binary image signal 108 from “D” to “Q” in synchronization with the pixel synchronization signal 301, arranges the binary image signal 108 in a matrix from A1 to C3, This is held until the next synchronization timing of the pixel synchronization signal 301. A1 to C3 are set as matching data 202a. Further, a signal of output “B2” from the central latch element 304 located at the center of the matrix is set as a central image signal 305. The position of the center latch element 304 is the second from the top, and in the case of the (2N + 1) × (2N + 1) matrix, it is the (N + 1) th from the top and the (N + 1) th from the left. The latch circuit 202 outputs 3 × 3 = 9 matching data 202 a and the center image signal 305 in synchronization with the pixel synchronization signal 301.
[0011]
The above operation is shown as an image in FIG. An input image 401 is a collection of binary image signals 108 transmitted from the host device 107 and is an image printed by the electrophotographic apparatus. The binary image signal 108 is sequentially input (arrow 1) from the upper left of the input image 401, and A1 to C3, which are outputs at a certain time of the latch circuit 202 of FIG. 3, become the matching data 202a. With the above operation, the matching data 202a is output from the upper left of the input image 401 while moving in the direction of the arrow 2 in synchronization with the pixel synchronization signal 301. At the same time, a binary image signal “B2” that is the matrix center position is output as the center image signal 305.
[0012]
The template matching unit 203 in FIG. 2 compares the above-mentioned (2N + 1) × (2N + 1) matching data 202a with a plurality of reference patterns, and outputs a matching or non-matching detection signal 203a. FIG. 5 shows details of the template matching unit. The template matching unit 203 includes a logic circuit 501 and an encoder 502, and simultaneously compares the matching data 202a with the template (a) 601 to template (h) 608 shown in FIG. FIG. 6 shows an example of a reference pattern, and these templates are stored in a ROM (Read Only Memory: not shown) or the like. Template (a) 601 to template (h) 608 have a 3 × 3 matrix configuration, and the constituent elements of each template are binary values of 1 or 0, where 1 means black and 0 means white. The template (a) 601 is composed of all 1s, and when the matching data 202a in FIG. 5 is all 1, when a black and white image is printed in black, a coincidence detection signal is output. Similarly, when described in a black and white image, template (b) 602 is a black vertical line, (c) 603 is a black horizontal line, (d) 604 is a black isolated point, (e) 605, (f) 606 is black 45 degree diagonal lines, (g) 607 and (h) 608 are black cross lines.
[0013]
After the comparison, the logic circuit 501 sends a coincidence (at this time 1) or non-coincidence (at this time 0) signal to the encoder 502 as the detection signal 203a. In the embodiment, eight detection signals 203a are encoded into a 4-bit signal by the encoder 502. By this encoding, it is possible to cope with the case where a template is added and the detection signal 203a becomes 16 signals. The detection signal 203a output from the encoder 502 is synchronized with the center image signal 305 by the next synchronization circuit 204, the center image signal 305 is the print signal 110, the detection signal 203a is the 4-bit light amount signal 111, and the light amount It is output to the variable means 112.
[0014]
1 drives the semiconductor laser 103a based on the print signal 110 and the light amount signal 111. FIG. 7 shows details of the light quantity varying means 112. The 4-bit light amount signal 111 passes through the decoder 701, the D / A converter 702, and the operational amplifier 703, and is input as an analog analog light amount signal 703a to the voltage setting unit Lv of the LD driver 704 that drives the semiconductor laser 103a. On the other hand, the print signal 110 is input to the SW for setting the ON time of the LD driver 704. The LD driver 704 supplies the voltage indicated by Lv to the semiconductor laser 103a while SW is “1”. The supplied semiconductor laser 103a outputs light (arrow).
[0015]
Through the above operation, the pixel size is corrected by using the optimum light amount for each image pattern to be printed, and the image quality is improved.
[0016]
On the other hand, the error detection unit 205 in FIG. 2 as shown in FIG. 8, the test data storage device 801 for storing test data 801a, the counter 802 for counting the number of data, is composed of a judgment unit 803 that determines an operation error, and the Check the circuit operation for errors.
[0017]
First , the operation during initialization (when the power is turned on) will be described. During initialization, the terminal 2 and the terminal C of the SW element 206 are connected to the terminals 3 and 5 and the terminal C of the SW element 207 by the mode switching signal 804 of the determination device 803, respectively. At this time, the print signal 110 and the light amount signal 111 are not transmitted to the light amount variable means 112. The line memory 201 stores test data 801a having a predetermined pattern output from the test data storage device 801. After the operations shown in FIGS. 3 and 5, the check print signal 204a and the check data are output from the synchronization circuit 204. A detection signal 204b is output. These check signals are taken into the counter 802 of the error detection means 205, and the counter 802 synchronizes with the pixel synchronization signal 301 and the horizontal synchronization signal 302 to calculate the number of data of the check print signal 204a and the check detection signal 204b. , Each count. The determination device 803 reads the count value obtained by the counter 802 and confirms whether it is a predetermined value. FIG. 9 shows a timing chart , and FIG. 10 shows a flowchart. Check items are
(1) Count the number of data in a pattern that is expected not to be printed → count value = 0
(2) Count the number of data in a pattern that is expected to be printed → Count value = predetermined value (3) Confirm that no pattern is expected to be detected → Count value = 0
(4) Confirm the detection with a pattern expected to be detected → Count value = predetermined value If the count value is normal, the determination device 803 determines that there is no error in operation, and a mode switching signal 804 is output, and the terminal 1 and the terminal C of the SW element 206 are connected to the terminals 1 and 4 and the terminal C of the SW element 207, respectively, and the pixel size is corrected. If the count value is other than the predetermined value, it is determined as an error.
[0018]
When both the check print signal 204a and the check signal 204b or only the check print signal 204a are in error, the quality of the print image cannot be guaranteed, so the determination device 803 transmits an error signal 805 to the host device 107. In this embodiment, the host device 107 displays “Error” in response to the error signal 805, and then displays “Change Circuit” and “Normal Mode” to allow the user to select one. When “Change Circuit” is selected, the image pattern detection means 109 itself is replaced. When “Normal Mode” is selected, the host device 107 outputs a selection signal 806. Upon receiving this, the determination device 803 outputs a mode switching signal 804, switches the SW element 207 from the terminal 1 to the terminal 2, and passes the binary image signal 108 without passing through the line memory 201 or the like. At this time, the SW element 207 is switched from the terminal 4 to the terminal 5 to fix the light quantity, and the correction of the pixel size is stopped.
[0019]
When only the check print signal 204a is in error, the pixel size cannot be corrected correctly. Similarly at this time, the determination device 803 transmits an error signal 805 to the host device 107. In this embodiment, the host device 107 displays “Error” in response to the error signal 805, and then displays “Change Circuit” and “Normal Mode” to allow the user to select one. When “Change Circuit” is selected, the image pattern detection means 109 itself is replaced. When “Normal Mode” is selected, the host device 107 outputs a selection signal 806. Upon receiving this, the determination device 803 outputs a mode switching signal 804, switches the SW element 207 from the terminal 1 to the terminal 2, and passes the binary image signal 108 without passing through the line memory 201 or the like. At this time, the SW element 207 is switched from the terminal 4 to the terminal 5 to fix the light quantity, and the correction of the pixel size is stopped.
[0020]
Next, the operation during printing will be described. During printing, the terminal 1 and the terminal 2 of the SW element 206, the terminals 1 and 3 of the SW element 207, and the terminals 4 and 5 are switched by the mode switching signal 804 of the determination device 803, respectively. At this time, the test data 801 a is output after the binary image signal 108 that is actually printed in the non-printing area, but only the actual print signal 110 and the light amount signal 111 are transmitted to the light amount variable means 112. In the line memory 201, the binary image signal 108 and the test data 801a are stored, and the check print signal 204a and the check detection signal 204b are sent from the synchronization circuit 204 through the operations of FIGS. 3 and 5 as in the initial state. Is output. These check signals are taken into the counter 802 of the error detection means 205, and the counter 802 synchronizes with the pixel synchronization signal 301 and the horizontal synchronization signal 302 to calculate the number of data of the check print signal 204a and the check detection signal 204b. , Each count. The determination device 803 reads the count value obtained by the counter 802 and confirms whether it is a predetermined value. The timing chart in FIG 11 shows a flowchart in FIG. 12. Check items are
(5) Count the number of data with a pattern expected to be printed → Count value = predetermined value (6) Confirm that it is detected with a pattern expected to be detected → Count value = predetermined value If the count value is normal, the determination device 803 determines that there is no error in operation. If the count value is other than the predetermined value, it is determined as an error.
[0021]
When both the check print signal 204a and the check signal 204b or only the check print signal 204a are in error, the quality of the print image cannot be guaranteed, so the determination device 803 transmits an error signal 805 to the host device 107. In this embodiment, the host device 107 displays “Error” in response to the error signal 805 and then displays “Check Output” to prompt the user to check the print image. Further, “Change Circuit” display and “Normal Mode” display are made to allow the user to select one. When “Change Circuit” is selected, the image pattern detection means 109 itself is replaced. When “Normal Mode” is selected, the host device 107 outputs a selection signal 806. Upon receiving this, the determination device 803 outputs a mode switching signal 804, fixes the SW element 207 to the terminal 2, and passes through the binary image signal 108 without passing through the line memory 201 or the like. At this time, the SW element 207 is set to the terminal 5 to fix the light quantity, and the correction of the pixel size is stopped.
[0022]
Also , when only the check print signal 204a is in error, the pixel size cannot be corrected correctly. Similarly at this time, the determination device 803 transmits an error signal 805 to the host device 107. In this embodiment, the host device 107 displays “Error” in response to the error signal 805 and then displays “Check Output” to prompt the user to check the print image. Further, “Change Circuit” display and “Normal Mode” display are made to allow the user to select one. When “Change Circuit” is selected, the image pattern detection means 109 itself is replaced. When “Normal Mode” is selected, the host device 107 outputs a selection signal 806. Receiving this, the determination device 803 outputs a mode switching signal 804, the SW element 207 is set to the terminal 5, the light quantity is fixed, and the correction of the pixel size is stopped.
[0023]
As described above, the state of the circuit operation is confirmed by such error detection means.
[0024]
The present invention can be applied not only to monochrome electrophotographic apparatuses but also to color electrophotographic apparatuses.
[0025]
【The invention's effect】
As described above, according to the present invention, it is possible to detect the missing data or detection error of the print signal due to the variation or failure of the electronic parts constituting the image pattern detection means using the template matching method, and to guarantee the quality of the print image.
[Brief description of the drawings]
FIG. 1 is a schematic diagram showing the configuration of an electrophotographic apparatus that is an embodiment of the present invention.
FIG. 2 is a configuration diagram of image pattern detection means according to an embodiment of the present invention.
FIG. 3 is a configuration diagram of a line memory and a latch circuit.
FIG. 4 is a schematic diagram of an image.
FIG. 5 is an explanatory diagram of a template matching unit.
FIG. 6 is an explanatory diagram of a reference pattern template.
FIG. 7 is a schematic diagram of a light amount varying unit.
FIG. 8 is a block diagram of error detection means.
FIG. 9 is a timing chart during initialization.
FIG. 10 is a flowchart during initialization.
FIG. 11 is a timing chart during printing.
FIG. 12 is a flowchart during printing.
[Explanation of symbols]
201: line memory, 202: latch circuit, 203: template matching unit, 204: synchronization circuit, 205: error detection means, 207SW element.

Claims (2)

Image pattern detection means for outputting a light amount signal by comparing a binary image signal sequentially input from the host device with a preset reference pattern, and a plurality of levels of light amount of the image writing light source of the electrophotographic apparatus based on the light amount signal In an electrophotographic apparatus provided with a variable light amount variable means,
The image pattern detecting means includes
A line memory for storing a binary image signal transmitted from the host device;
A latch circuit configured to form binary image signals output from the line memory as matching data arranged in a matrix, and to output the matching data and a central image signal that is a binary image signal at the center of the matrix of the matching data; ,
A template matching unit that compares the matching data output from the latch circuit with a plurality of pre-stored reference patterns and outputs the result as a coincidence / non-coincidence detection signal;
A synchronization circuit that synchronously outputs the center image signal from the latch circuit and the detection signal from the template matching unit;
A first switching element that outputs the central image signal from the synchronization circuit as a print signal and outputs the detection signal as a light amount signal to the light amount variable means;
Test data storage device for storing test data with predetermined patterns for error detection, counting the number of data using the central image signal from the synchronization circuit as a check print signal and the detection signal as a check detection signal An error detection means having a judgment means for judging the presence or absence of an operation error based on the count value of the counter and outputting a mode switching signal;
Based on the mode switching signal from the error detection means, a second switching element for switching the binary image signal from the host device and the test data output from the error detection means to output to the line memory. electrophotographic apparatus, characterized in that it comprises. The determination means of the error detection means is
When the power is turned on, the count value of the check print signal and the check detection signal from the counter is 0 when the test pattern is a non-print pattern and a predetermined value when the test pattern is a print pattern Is determined to have no error and outputs a switching signal to a mode for correcting the pixel size to the first switching element and the second switching element. If not, it is determined that there is an error and to the upper host device. Send an error signal,
During printing, if the count value of the check print signal and the check detection signal from the counter is a predetermined value when the test pattern is a print pattern, it is determined that there is no error and does not apply 2. The electrophotographic apparatus according to claim 1, wherein it is determined that there is an error and an error signal is transmitted to the host apparatus.

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