JP4136527B2 - Superconducting circuit device with ground plane having magnetic flux trapping function - Google Patents
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Description
【０００１】
【発明の属する技術分野】
本発明は、超電導回路装置に関するものであり、特に、外部磁場をトラップする機能を有する超電導体からなるグランドプレーン膜を用いた超電導回路装置に関するものである。
【０００２】
【従来技術】
従来から、Ｎｂ等の金属系超電導体や酸化物高温超電導体を用いた各種の超電導素子が開発されており、中でも、ジョセフソン接合を含む超電導素子（以下、「ジョセフソン素子」という。）は、高感度の磁場測定用の超電導量子干渉素子（ＳＱＵＩＤ：Superconducting Quantum Interference Device）として実用化されているほか、高速、低消費電力の特徴を持つ単一磁束量子回路（ＳＦＱ：Single Flux Quantum）への応用が研究されている。
【０００３】
ジョセフソン素子は、絶縁性基板の上に、超電導体（上部電極）／常電導体あるいは絶縁体（バリア層）／超電導体（下部電極）の３層構造を形成した基本構造を有している。そして、この素子を集積化した超電導回路装置においては、素子間を磁気的に分離する必要があるため、絶縁性基板の上に超電導薄膜からなるグランドプレーン膜を形成し、この上に絶縁層を介して前記の３層構造を形成することが行われている。
【０００４】
ところで、超電導素子を前記の超電導量子干渉素子や単一磁束量子回路のような用途において用いるに際しては外部磁場の影響を排除する必要がある。すなわち、超電導体自体は外部磁場を排除する性質を有してはいるが、ピンホール等のために超電導性が弱くなっている箇所があると、超電導体の臨界温度以下の低温に冷却する際にこの箇所に外部磁界が磁束量子を単位としてトラップされることがある。この現象は磁束トラップと呼ばれ、このトラップされた磁束量子が形成する磁場の影響で、回路の特性が変化して回路の誤動作につながるおそれがある。
【０００５】
そこで、上記のような磁束トラップを防ぐ方法が検討されているが、その一つは、磁場の影響を受けやすい超電導素子の周辺部の超電導グランドプレーン膜（以下、「グランドプレーン膜」ともいう。）にモート（moat：濠）を設け、このモートに磁束を集中的にトラップさせることによって、中心部に配置された超電導素子の直下のグランドプレーン膜に磁束がトラップされにくくするというものである。
【０００６】
上記の磁束トラップの様子を、ジョセフソン素子を用いた超電導集積回路を例にとって説明する。
図１（ａ）に示すように、基板上１に設けたグランドプレーン膜２上に、絶縁膜３を介して下部電極４、バリア層５及び上部電極６からなるジョセフソン素子７が設けられ、グランドプレーン膜２には図１（ｂ）に示すように、ジョセフソン素子７を囲むようにしてモート８が形成されており、このモート８は、モート８の内と外でのグランドプレーン膜２の導通を確保するために複数個に分割して形成されている。
そして、このモート部分によって磁束Ｍを集中的にトラップすることにより、ジョセフソン素子を配置した領域に磁束がトラップされるのを防いでいる。
【０００７】
しかしながら、上記した従来の方法は、グランドプレーン膜にモートを形成しているため、表面の平坦性が損なわれており、このグランドプレーン膜の上に他の膜を形成したときにこの上部膜の平滑性が確保できなくなる。従って、回路設計を行うに際しては、平滑性のないことから来る不利を避けるために、このモート部分が形成された部分を避けて回路配線等を設ける必要があり、この点が欠点となっていた。また、導通確保のためのモート分割が必要であり、このことがモート配列に制約を与えるのも欠点であった。
【０００８】
【発明が解決しようとする課題】
本発明は、グランドプレーン膜に貫通孔を設けることなく、超電導素子への磁束トラップを防ぐことを可能にした超電導回路装置を提供することを目的としている。
【０００９】
【課題を解決するための手段】
従来から、モートはグランドプレーン膜を膜厚方向に貫通して設けることが必要であると考えられてきたが、本発明者らは、上記の課題を解決するために鋭意研究を重ねた結果、グランドプレーン膜における磁束を集中的にトラップする機能を有する超電導性を示さない領域（以下、「非超電導領域」ともいう。））が、超電導グランドプレーン膜の膜厚方向の全長に亘って形成されていなくても、膜厚方向の一部に形成されていれば所望の磁束トラップ効果を奏することができるとの知見を得た。
【００１０】
本発明者らは上記の知見に基づいて次の構成を有する本発明を完成させた。
（１）超電導グランドプレーン膜を有する超電導回路装置において、超電導グランドプレーン膜の一部の領域の厚み方向に、下層膜の凸状部が食い込んで形成された、該超電導グランドプレーン膜の膜厚よりも短い厚みを有する超電導性を示さない領域を形成したことを特徴とする超電導回路装置。
【００１２】
（２）前記超電導性を示さない領域の厚みが超電導グランドプレーン膜の膜厚の６〜９０％であることを特徴とする上記（１）記載の超電導回路装置。
（３）前記超電導性を示さない領域の厚みが超電導グランドプレーン膜の膜厚の２０〜９０％であることを特徴とする上記（１）記載の超電導回路装置。
【００１３】
【発明の実施の形態】
本発明の実施の形態について、以下説明する。
本発明の超電導回路装置において、磁束を集中的にトラップする機能を有する領域（以下、「磁束トラップ領域」という。）を設ける具体的な態様としては図３に示すものが挙げられる。
なお、図２、図４〜６に示すものは参考例である。
【００１４】
（１）グランドプレーン膜の膜厚を一部薄くする。
グランドプレーン膜の膜厚を一部薄くする方法としては、例えば次のような方法を挙げることができる。
▲１▼ 図２（ａ）に示すように、グランドプレーン膜２に、例えば、集束イオンビーム（ＦＩＢ：Focused Ion Beam）エッチング装置を用いて、Ｇａイオンを照射し、イオンミリングにより、膜の一部を除去して、その部分の膜厚を減少させ、図２（ｂ）に示すような凹部９が設けられた構造とする。このような凹部の深さはグランドプレーン膜２の膜厚の６〜９０％であればよいが、２０〜９０％であることがより好ましい。（以下ではＦＩＢエッチングによる加工を「ＦＩＢ加工」という。）
【００１５】
▲２▼ 図３（ａ）の基板１を、図３（ｂ）に示すように、レジスト膜を用いてイオンミリング等により下層膜の一部に凸状部１０を形成し、次いでこの上にグランドプレーン膜を堆積して図３（ｃ）に示される中間製品を得る。次いで、この中間製品の表面層を研磨除去することによって、図３（ｄ）に示すように、グランドプレーン膜の下層膜（基板）の凸状部１０がグランドプレーン膜に一部食い込んだ構造とする。なお、図３では、基板が下層膜となっている場合を示したが、基板とグランドプレーン膜との間に絶縁膜が存在する場合には、この絶縁膜が下層膜となる。
この凸状部の厚みはグランドプレーン膜２の膜厚の６〜９０％であればよいが、２０〜９０％であることがより好ましい。
【００１６】
（２）グランドプレーン膜の膜厚方向の一部に非超電導材料から成る領域を形成する。
グランドプレーン膜の膜厚方向の一部に非超電導材料から成る領域を形成する方法としては、例えば次のような方法を挙げることができる。
▲１▼ 図４（ａ）に示すように、グランドプレーン膜２の所定の領域にＧａイオンを照射して、一定の深さにまでＧａを侵入させ、図４（ｂ）に示すようなＧａイオン注入領域（非超電導領域）１１を設けたグランドプレーン膜を形成する。
【００１７】
▲２▼ 図５（ａ）に示すように、グランドプレーン膜２に、例えばＦＩＢ加工（Ｇａイオン照射）を施して、図５（ｂ）に示すようなグランドプレーン膜を貫通しない深さの凹部を形成し、次いで、この凹部に非超電導材料を気相から堆積させて前記凹部を充填して図５（ｃ）に示すような中間製品を得る。次いで、この中間製品の、表面層を研磨除去して図５（ｄ）に示すような非超電導領域１２を設けたグランドプレーン膜を形成する。
【００１８】
▲３▼ 図６（ａ）に示すように、グランドプレーン膜上にドープ剤を載置し、これを加熱することによりグランドプレーン膜の一定の深さにまでドープ剤を拡散させて、図６（ｂ）に示すように示すような非超電導領域１３を設けたグランドプレーン膜を形成する。
上記▲１▼〜▲３▼の方法において、非超電導材料の膜厚方向の厚みは、グランドプレーン膜の膜厚の６〜９０％であればよいが、２０〜９０％であることがより好ましい。
【００２０】
［試験例］
以下の試験例は図４に示す参考例についてのものであるが、図３に示す本発明例でも同様の効果が奏される。
ＳｒＴｉＯ3（１００）基板上に、ｒｆマグネトロンスパッタリング法を用いて１５０〜２００ｎｍ厚のＮｄＢａ2Ｃｕ3Ｏy薄膜（以下「ＮＢＣＯ薄膜」という。）を形成した。このＮＢＣＯ薄膜は約８３Ｋの超電導臨界温度（Ｔｃ）を有していた。
スパッタリングは、５０ｍＴｏｒｒのＡｒ：Ｏ2＝５：１の混合ガス中で、基板温度７３０℃、スパッタリング時間７５分で行った。
次いで、ＦＩＢ加工により、ＮＢＣＯ薄膜に垂直方向からガリウムイオンビームを照射し、深さが膜厚の６〜１００％（６％、１３％、１９％、３１％、３７％、６０％、７０％、８０％、９０％、１００％）で、幅４μｍ、長さ１３６μｍの凹部又は溝を１６０×１６０μｍ2の正方形領域を囲むようにして形成した。
【００２１】
次に得られた試料を種々の環境磁場中で１０Ｋ以下まで冷却した後に、走査型ＳＱＵＩＤ顕微鏡を用いて磁束密度濃淡像を観測した。その結果の一部を図７〜９の磁束密度濃淡図で示す。磁束密度濃淡図においては、濃淡の濃い部分ほど磁場の値が大きいことを表し、図中の濃いスポットはトラップした磁束量子に対応している。
【００２２】
図７は、凹部の深さが６％の試料の磁束密度濃淡像である。図７（ａ）は０．３μＴの磁場中で冷却した時のものであり、図７（ｂ）は０．４μＴの磁場中で冷却したときのものである。なお、図７（ｃ）は前記正方形領域を取り囲む凹部の全体形状を示しており、実施例における実験はこの凹部形状を採用して行ったた。
図７（ａ）によれば、凹部を形成した部分に磁束量子がトラップされている。これは、非超電導領域が超電導グランドプレーンの膜厚方向の全長に亘って形成されなくても磁束トラップ機能を有することを示している。そして、この凹部に取り囲まれた領域からは磁束が完全に排除されていることがわかる。また、図７（ｂ）では、凹部に取り囲まれた領域にも磁束が侵入していることから、この試料においては、磁束トラップが完全に排除される磁場の値（しきい磁場値）は０．３〜０．４μＴであることが分かる。
【００２３】
図８は、凹部の深さが２０％である試料の磁束密度濃淡像である。図８（ａ）は０．５μＴの磁場中で冷却した時のものであり、図８（ｂ）は０．６μＴの磁場中で冷却したときのものである。
図８（ａ）、（ｂ）から、凹部深さが２０％の試料では、しきい磁場値は０．５〜０．６μＴであることがわかる。
【００２４】
図９は、凹部の深さが１００％である試料の磁束密度濃淡像である。図９（ａ）は０．５〜０．５５μＴの磁場中で冷却した時のものであり、図９（ｂ）は０．６〜０．６５μＴの磁場中で冷却したときのものである。１００％深さの凹部の場合、磁束量子の整数倍の大きさをもつ磁束が１３６×４μｍ2の面積の凹部全体に広がる様にトラップすることが分かる。
図９（ａ）、（ｂ）から、凹部深さが１００％の試料では、しきい磁場値は０．５〜０．６５μＴであることがわかる。
【００２５】
同様にして、他の試料についても凹部の深さに対するしきい磁場値の依存性をを調査した結果、図１０に示すような結果を得た。
図１０によると、凹部の深さがグランドプレーン膜の厚さの２０％以上になると、貫通孔を設けた場合（１００％）と同程度のしきい磁場値となることから、グランドプレーン膜に貫通孔を設けることなく、従来のモートを設ける場合と同程度の磁束排除効果を得るには、グランドプレーン膜の膜厚の２０％以上の深さの凹部を設ければよいことが分かる。
【００２６】
【発明の効果】
本発明によれば、磁束排除効果を得るためにグランドプレーン膜に貫通孔を設けなくとも良いので、グランドプレーン膜に上部膜を成膜する際の回路配線に対する制約が緩和され、超電導回路装置の応用製品への実用化に有用な超電導回路装置を提供することができる。
【図面の簡単な説明】
【図１】グランドプレーン膜にモートを設けた超電導回路装置の断面概略図（ａ）と平面概略図（ｂ）である。
【図２】本発明の超電導回路装置を作製するための方法の一例を示す模式図である。
【図３】本発明の超電導回路装置を作製するための方法の一例を示す模式図である。
【図４】本発明の超電導回路装置を作製するための方法の一例を示す模式図である。
【図５】本発明の超電導回路装置を作製するための方法の一例を示す模式図である。
【図６】本発明の超電導回路装置を作製するための方法の一例を示す模式図である。
【図７】本発明の実施例において作製した試料（６％深さ）を走査型ＳＱＵＩＤ顕微鏡によって観察した磁束密度濃淡像である。
【図８】本発明の実施例において作製した試料（２０％深さ）を走査型ＳＱＵＩＤ顕微鏡によって観察した磁束密度濃淡像である。
【図９】本発明の実施例において作製した試料（１００％深さ）を走査型ＳＱＵＩＤ顕微鏡によって観察した磁束密度濃淡像である。
【図１０】凹部の深さに対するしきい磁場の依存性を示す図である。
【符号の説明】
１ 基板
２ グランドプレーン膜
３ 絶縁膜
４ 下部電極
５ バリア層
６ 上部電極
７ ジョセフソン素子
８ モート
９ 凹部
１０ 凸状部
１１ Gaイオン注入領域
１２ 非超電導領域
１３ 非超電導領域[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a superconducting circuit device, and more particularly to a superconducting circuit device using a ground plane film made of a superconductor having a function of trapping an external magnetic field.
[0002]
[Prior art]
Conventionally, various superconducting elements using metallic superconductors such as Nb and high-temperature oxide superconductors have been developed. Among them, superconducting elements including Josephson junctions (hereinafter referred to as “Josephson elements”) are developed. In addition to being put into practical use as a superconducting quantum interference device (SQUID) for high-sensitivity magnetic field measurement, to a single flux quantum circuit (SFQ: Single Flux Quantum) with features of high speed and low power consumption The application of is being studied.
[0003]
The Josephson element has a basic structure in which a three-layer structure of superconductor (upper electrode) / normal conductor or insulator (barrier layer) / superconductor (lower electrode) is formed on an insulating substrate. . In the superconducting circuit device in which these elements are integrated, since it is necessary to magnetically separate the elements, a ground plane film made of a superconducting thin film is formed on an insulating substrate, and an insulating layer is formed thereon. The above-described three-layer structure is formed through the above.
[0004]
By the way, when the superconducting element is used in applications such as the superconducting quantum interference element and the single magnetic flux quantum circuit, it is necessary to eliminate the influence of the external magnetic field. In other words, the superconductor itself has the property of eliminating the external magnetic field, but if there is a place where the superconductivity is weak due to pinholes or the like, the superconductor is cooled to a low temperature below the critical temperature of the superconductor. In addition, an external magnetic field may be trapped in this place in units of magnetic flux quanta. This phenomenon is called magnetic flux trapping, and the characteristics of the circuit may change due to the influence of the magnetic field formed by the trapped magnetic flux quanta, leading to malfunction of the circuit.
[0005]
Therefore, a method for preventing the magnetic flux trap as described above has been studied. One of them is also referred to as a superconducting ground plane film (hereinafter referred to as a “ground plane film”) around the superconducting element that is easily affected by a magnetic field. ) Is provided with a moat, and the magnetic flux is trapped in the moat intensively, thereby making it difficult for the magnetic flux to be trapped in the ground plane film directly below the superconducting element arranged at the center.
[0006]
The state of the magnetic flux trap will be described by taking a superconducting integrated circuit using a Josephson element as an example.
As shown in FIG. 1A, a Josephson element 7 including a lower electrode 4, a barrier layer 5, and an upper electrode 6 is provided on a ground plane film 2 provided on a substrate 1 with an insulating film 3 interposed therebetween. As shown in FIG. 1B, a moat 8 is formed on the ground plane film 2 so as to surround the Josephson element 7, and the moat 8 is connected to the ground plane film 2 inside and outside the moat 8. In order to ensure, it is divided into a plurality of parts.
The moat portion traps the magnetic flux M in a concentrated manner, thereby preventing the magnetic flux from being trapped in the region where the Josephson element is disposed.
[0007]
However, in the conventional method described above, since the moat is formed in the ground plane film, the flatness of the surface is impaired. When another film is formed on the ground plane film, the upper film is not formed. Smoothness cannot be secured. Therefore, when designing the circuit, in order to avoid the disadvantages caused by the lack of smoothness, it is necessary to provide circuit wiring etc. avoiding the portion where the moat portion is formed, which is a drawback. . In addition, moat division is necessary to ensure conduction, and this imposes a limitation on the moat arrangement.
[0008]
[Problems to be solved by the invention]
An object of the present invention is to provide a superconducting circuit device capable of preventing magnetic flux trapping in a superconducting element without providing a through hole in a ground plane film.
[0009]
[Means for Solving the Problems]
Conventionally, it has been thought that motes need to provide a ground plane film penetrating in the film thickness direction, but the present inventors have conducted extensive research to solve the above problems, A region not exhibiting superconductivity (hereinafter also referred to as “non-superconducting region”) having a function of intensively trapping magnetic flux in the ground plane film is formed over the entire length of the superconducting ground plane film in the film thickness direction. Even if not, it has been found that if it is formed in a part of the film thickness direction, a desired magnetic flux trapping effect can be achieved.
[0010]
Based on the above findings, the present inventors have completed the present invention having the following configuration.
(1) In a superconducting circuit device having a superconducting ground plane film, the thickness of the superconducting ground plane film formed by the convex portion of the lower layer film biting in the thickness direction of a part of the superconducting ground plane film. A superconducting circuit device characterized in that a region having a short thickness and not exhibiting superconductivity is formed.
[0012]
( 2 ) The superconducting circuit device according to (1), wherein the thickness of the region not exhibiting superconductivity is 6 to 90% of the thickness of the superconducting ground plane film.
( 3 ) The superconducting circuit device according to (1) above, wherein the thickness of the region not exhibiting superconductivity is 20 to 90% of the thickness of the superconducting ground plane film.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
In the superconducting circuit device of the present invention, a specific mode for providing a region having a function of trapping magnetic flux in a concentrated manner (hereinafter referred to as “magnetic flux trapping region”) is shown in FIG .
2 and 4 to 6 are reference examples.
[0014]
(1) The film thickness of the ground plane film is partially reduced.
As a method for partially reducing the thickness of the ground plane film, for example, the following method can be cited.
(1) As shown in FIG. 2 (a), the ground plane film 2 is irradiated with Ga ions using, for example, a focused ion beam (FIB) etching apparatus, and ion milling is performed. By removing the portion, the thickness of the portion is reduced, and a recess 9 as shown in FIG. 2B is provided. The depth of such a recess may be 6 to 90% of the film thickness of the ground plane film 2, but is more preferably 20 to 90%. (Hereinafter, processing by FIB etching is referred to as “FIB processing”.)
[0015]
{Circle over (2)} As shown in FIG. 3 (b), a convex portion 10 is formed on a part of the lower layer film by ion milling or the like on the substrate 1 of FIG. A ground plane film is deposited to obtain the intermediate product shown in FIG. Next, by polishing and removing the surface layer of this intermediate product, as shown in FIG. 3 (d), a structure in which the convex portion 10 of the lower layer film (substrate) of the ground plane film bites into the ground plane film and To do. FIG. 3 shows the case where the substrate is a lower layer film. However, when an insulating film exists between the substrate and the ground plane film, this insulating film becomes the lower layer film.
The thickness of the convex portion may be 6 to 90% of the thickness of the ground plane film 2, but is more preferably 20 to 90%.
[0016]
(2) A region made of a non-superconducting material is formed in part of the thickness direction of the ground plane film.
Examples of a method for forming a region made of a non-superconducting material in a part of the thickness direction of the ground plane film include the following methods.
{Circle around (1)} As shown in FIG. 4A, a predetermined region of the ground plane film 2 is irradiated with Ga ions so that Ga is penetrated to a certain depth, and Ga as shown in FIG. A ground plane film provided with an ion implantation region (non-superconducting region) 11 is formed.
[0017]
(2) As shown in FIG. 5 (a), the ground plane film 2 is subjected to, for example, FIB processing (Ga ion irradiation), and a recess having a depth not penetrating the ground plane film as shown in FIG. 5 (b). Then, a non-superconducting material is deposited in the recess from the gas phase to fill the recess to obtain an intermediate product as shown in FIG. Next, the surface layer of this intermediate product is polished and removed to form a ground plane film provided with a non-superconducting region 12 as shown in FIG.
[0018]
(3) As shown in FIG. 6 (a), a dopant is placed on the ground plane film and heated to diffuse the dopant to a certain depth of the ground plane film. A ground plane film provided with a non-superconducting region 13 as shown in FIG.
In the above methods (1) to (3), the thickness of the non-superconducting material in the film thickness direction may be 6 to 90% of the film thickness of the ground plane film, but is more preferably 20 to 90%. .
[0020]
[Test example]
The following test examples are for the reference example shown in FIG. 4, but the same effect can be achieved with the example of the present invention shown in FIG. 3.
An NdBa 2 Cu 3 O y thin film (hereinafter referred to as “NBCO thin film”) having a thickness of 150 to 200 nm was formed on an SrTiO 3 (100) substrate by rf magnetron sputtering. This NBCO thin film had a superconducting critical temperature (Tc) of about 83K.
Sputtering was performed in a mixed gas of 50 mTorr Ar: O 2 = 5: 1 with a substrate temperature of 730 ° C. and a sputtering time of 75 minutes.
Next, the NBCO thin film is irradiated with a gallium ion beam from the vertical direction by FIB processing, and the depth is 6 to 100% (6%, 13%, 19%, 31%, 37%, 60%, 70%) of the film thickness. , 80%, 90%, 100%) and a recess or groove having a width of 4 μm and a length of 136 μm was formed so as to surround a square region of 160 × 160 μm 2 .
[0021]
Next, after cooling the obtained sample to 10K or less in various environmental magnetic fields, a magnetic flux density grayscale image was observed using a scanning SQUID microscope. A part of the result is shown in the magnetic flux density density diagrams of FIGS. In the magnetic flux density density diagram, the darker portion indicates that the value of the magnetic field is larger, and the dark spot in the diagram corresponds to the trapped magnetic flux quantum.
[0022]
FIG. 7 is a magnetic flux density grayscale image of a sample with a recess depth of 6%. FIG. 7 (a) is when cooled in a magnetic field of 0.3 μT, and FIG. 7 (b) is when cooled in a magnetic field of 0.4 μT. FIG. 7C shows the overall shape of the recess surrounding the square area, and experiments in the examples were conducted using this recess shape.
According to Fig.7 (a), the magnetic flux quantum is trapped in the part in which the recessed part was formed. This indicates that the non-superconducting region has a magnetic flux trapping function even if it is not formed over the entire length of the superconducting ground plane in the film thickness direction. It can be seen that the magnetic flux is completely eliminated from the region surrounded by the recess. In FIG. 7B, since the magnetic flux also penetrates into the region surrounded by the recess, the magnetic field value (threshold magnetic field value) at which the magnetic flux trap is completely eliminated is 0 in this sample. It can be seen that it is 3 to 0.4 μT.
[0023]
FIG. 8 is a magnetic flux density grayscale image of a sample with a recess depth of 20%. FIG. 8 (a) shows the case when cooled in a magnetic field of 0.5 μT, and FIG. 8 (b) shows the case when cooled in a magnetic field of 0.6 μT.
8 (a) and 8 (b), it can be seen that the threshold magnetic field value is 0.5 to 0.6 μT in the sample having a recess depth of 20%.
[0024]
FIG. 9 is a magnetic flux density grayscale image of a sample having a recess having a depth of 100%. FIG. 9 (a) is when cooled in a magnetic field of 0.5 to 0.55 μT, and FIG. 9 (b) is when cooled in a magnetic field of 0.6 to 0.65 μT. In the case of a recess having a depth of 100%, it can be seen that a magnetic flux having an integral multiple of the flux quantum is trapped so as to spread over the entire recess having an area of 136 × 4 μm 2 .
9 (a) and 9 (b), it can be seen that the threshold magnetic field value is 0.5 to 0.65 μT in the sample with the recess depth of 100%.
[0025]
Similarly, as a result of investigating the dependency of the threshold magnetic field value on the depth of the recess for other samples, the results shown in FIG. 10 were obtained.
According to FIG. 10, when the depth of the recess is 20% or more of the thickness of the ground plane film, the threshold magnetic field value is about the same as when the through hole is provided (100%). It can be seen that a recess having a depth of 20% or more of the film thickness of the ground plane film may be provided in order to obtain the same magnetic flux elimination effect as that in the case of providing a conventional mote without providing a through hole.
[0026]
【The invention's effect】
According to the present invention, since it is not necessary to provide a through hole in the ground plane film in order to obtain a magnetic flux exclusion effect, restrictions on circuit wiring when forming the upper film on the ground plane film are alleviated, and the superconducting circuit device A superconducting circuit device useful for practical application can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view (a) and a schematic plan view (b) of a superconducting circuit device in which a moat is provided on a ground plane film.
FIG. 2 is a schematic view showing an example of a method for producing a superconducting circuit device of the present invention.
FIG. 3 is a schematic view showing an example of a method for producing a superconducting circuit device of the present invention.
FIG. 4 is a schematic view showing an example of a method for producing a superconducting circuit device of the present invention.
FIG. 5 is a schematic view showing an example of a method for producing a superconducting circuit device of the present invention.
FIG. 6 is a schematic view showing an example of a method for producing the superconducting circuit device of the present invention.
FIG. 7 is a magnetic flux density grayscale image obtained by observing a sample (6% depth) produced in an example of the present invention with a scanning SQUID microscope.
FIG. 8 is a magnetic flux density grayscale image obtained by observing a sample (20% depth) produced in an example of the present invention with a scanning SQUID microscope.
FIG. 9 is a magnetic flux density grayscale image obtained by observing a sample (100% depth) produced in an example of the present invention with a scanning SQUID microscope.
FIG. 10 is a diagram showing the dependence of a threshold magnetic field on the depth of a recess.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Ground plane film 3 Insulating film 4 Lower electrode 5 Barrier layer 6 Upper electrode 7 Josephson element 8 Moat 9 Recess 10 Projection 11 Ga ion implantation region 12 Non-superconducting region 13 Non-superconducting region
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| JP2002232642A JP4136527B2 (en) | 2002-08-09 | 2002-08-09 | Superconducting circuit device with ground plane having magnetic flux trapping function |
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| JP2002232642A JP4136527B2 (en) | 2002-08-09 | 2002-08-09 | Superconducting circuit device with ground plane having magnetic flux trapping function |
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| JP2004072023A JP2004072023A (en) | 2004-03-04 |
| JP4136527B2 true JP4136527B2 (en) | 2008-08-20 |
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