JP4136372B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a zap diode is provided on the same substrate together with various semiconductor elements.
[0002]
[Prior art]
There is a case where it is desired to adjust circuit elements such as resistance in the semiconductor device after the process of the semiconductor device is completed. As one of countermeasures in such a case, there is a so-called Zener Zap method in which a diode is provided in parallel with a resistor and short-circuited by application of high energy (Fuji Time Report Vol. 67, No. 2, page 107, 1994). (Issued February 10, 2013). A zap diode is an element used in this zener zap.
[0003]
FIG. 11 is a longitudinal sectional view showing a conventional zap diode formed in a diffusion layer. As shown in FIG. 11, in the zap diode, a P ⁻ well region 12 is formed in the surface layer of the N ⁻ semiconductor layer 11, and a P ⁺ anode region 13 and an N ⁺ cathode region 14 are formed in the P ⁻ well region 12. In addition, the anode electrode 15 and the cathode electrode 16 are connected to the P ⁺ anode region 13 and the N ⁺ cathode region 14, respectively. After the zap, the PN junction is destroyed by applying a reverse bias voltage equal to or higher than the breakdown voltage, and the anode 15 and the cathode electrode 16 are short-circuited to become a resistor 17 as shown in FIG.
[0004]
In the zap diode having the above-described configuration, the P ⁻ well region 12 is often used in common with a diffusion region forming a control circuit and set as a power supply line or a GND line of the control circuit. For this reason, since one potential of the zap diode is set to the power supply potential or the ground potential, the formation position thereof is limited. In addition, a parasitic thyristor may be formed by the zap diode, which causes a problem such as latch-up.
[0005]
Therefore, the present inventor previously proposed that a zap diode be formed on a semiconductor substrate via an insulating film (Japanese Patent Laid-Open No. 11-297846). FIG. 13 shows the longitudinal sectional structure of this zap diode. As shown in FIG. 13, in the zap diode, an insulating film 22 is formed on the surface of a semiconductor substrate 21, and an N ⁺ cathode region 23, a P ⁺ anode region 24 and an N ⁺ cathode region 25 made of polysilicon are formed thereon. In this configuration, metal electrodes 27 and 28 serving as anodes or cathodes are connected to N ⁺ cathode regions 23 and 25 at both ends via an interlayer insulating film 26.
[0006]
According to this configuration, since the zap diode is insulated from the semiconductor substrate, there is an advantage that the formation position is free. Further, there is an advantage that the configuration is simple and the zap diode can be set to an intermediate potential other than the power supply potential and the GND potential. Furthermore, there is an advantage that parasitic operation can be suppressed.
[0007]
[Problems to be solved by the invention]
However, as a result of subsequent studies by the present inventors, when a zap diode is formed on an insulating film on a semiconductor substrate, a rupture failure occurs when the PN junction is broken, and the resistance value increases or becomes open. It has been found that there is a drawback that later properties are not stable.
[0008]
The present invention has been made in view of the above problems, and a semiconductor device in which a zap diode having stable characteristics after zapping is formed on a substrate on which another semiconductor element is formed via an insulating film. The purpose is to provide.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor device according to the present invention forms a zap diode through an insulating film on a semiconductor substrate on which another semiconductor element is formed, and forms an interlayer insulating film on the zap diode. By laminating a metal film on the interlayer insulating film, the PN junction portion of the zap diode is covered with the metal film. According to the present invention, when a reverse bias voltage equal to or higher than the breakdown voltage is applied to the zap diode, the PN junction is destroyed, but even if rupture breakdown occurs at that time, the zap diode is short-circuited by the metal film on the PN junction. And become resistance. In addition, it is considered that by covering the zap diode with a metal film, the metal film covering the zap diode functions as a heat sink, thereby suppressing burst destruction by relaxing the concentration of heat.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Embodiment 1 FIG.
FIG. 1 is a longitudinal sectional view showing a configuration of a zap diode of a semiconductor device according to a first embodiment of the present invention. As shown in FIG. 1, an insulating film 32 is formed on the surface of the semiconductor substrate 31. Polysilicon is laminated on the insulating film 32. Both ends of this polysilicon are a first N ⁺ cathode region 33 and a second N ⁺ cathode region 35, and a P ⁺ anode region 34 is in between.
[0011]
An interlayer insulating film 36 is laminated on the polysilicon composed of these regions 33, 34, and 35. The first metal electrode 37 and the second metal electrode 38 serving as the anode or the cathode are respectively connected to the first N ⁺ cathode region 33 and the second N ⁺ cathode region through the contact hole penetrating the interlayer insulating film 36. 35.
[0012]
On the interlayer insulating film 36, a PN junction between the first N ⁺ cathode region 33 and the P ⁺ anode region 34 and a PN junction between the P ⁺ anode region 34 and the second N ⁺ cathode region 35 are provided. A metal film 39 is provided so as to cover the surface. In the first embodiment, the metal film 39 is continuous with the first metal electrode 37 and is insulated from the second metal electrode 38. That is, the first metal electrode 37 also serves as the metal film 39. Further, the metal film 39 is not particularly limited. For example, as shown in FIG. 1, the metal film 39 covers almost the entire first N ⁺ cathode region 33, P ⁺ anode region 34 and second N ⁺ cathode region 35. Is formed.
[0013]
FIG. 2 is a plan sectional view showing a configuration of a zap diode of the semiconductor device according to the first embodiment of the present invention. As shown in FIG. 2, each width of the PN junction between the first N ⁺ cathode region 33 and the P ⁺ anode region 34 and the PN junction between the P ⁺ anode region 34 and the second N ⁺ cathode region 35. a represents the contact portion 41 between the first N ⁺ cathode region 33 and the first metal electrode 37 (not shown in FIG. 2), and the second N ⁺ cathode region 35 and the second metal electrode 38 ( It is narrower than each width A of the contact portion 42 (not shown in FIG. 2).
[0014]
In the example shown in FIG. 2, the first and second N ⁺ cathode regions 33 and 35 extend uniformly to the vicinity of the contact portions 41 and 42 with the same width a as the width of the PN junction portion. On the other hand, as in the modification shown in FIG. 3, the first and second N ⁺ cathode regions 33 and 35 slightly extend with the same width a as the width of the PN junction, and from there near the contact portions 41 and 42 It may extend so that it may spread gradually.
[0015]
FIGS. 4 to 7 are diagrams showing various combinations of semiconductor regions constituting the zap diode and their symbols. The zap diode 51 having the configuration shown in FIG. 4 has a standard PN diode structure and has one PN junction. The zap diode 52 having the configuration shown in FIG. 5 has the NPN structure used in the zap diode shown in FIGS. The zap diode 53 having the configuration shown in FIG. 6 has a PNP structure having a configuration opposite to that of the zap diode shown in FIGS. Both NPN and PNP structures have two PN junctions.
[0016]
The zap diode 54 configured as shown in FIG. 7 has a PNPN structure in which two P ⁺ semiconductor regions and two N ⁺ semiconductor regions are alternately arranged, and has three PN junctions. In any of the configurations shown in FIGS. 4 to 7, the PN junction is covered with the metal film 39 via the interlayer insulating film 36. In any of the configurations shown in FIGS. 5 to 7, the term “diode” is used to mean two terminals.
[0017]
By the way, although not shown in FIG. 1, the semiconductor substrate 31 is not limited to a zap diode, for example, a circuit element comprising a MOS transistor, a bipolar transistor, an IGBT (insulated gate bipolar transistor), or another semiconductor element such as a resistor or a capacitor. Is formed. These semiconductor elements form, for example, a control circuit, and the zap diode is connected to the control circuit and its circuit elements.
[0018]
As shown in FIG. 8, in the branch in which the zap diode 5 is connected in parallel to the circuit or the circuit element 6, the branch of the zap diode 5 works for the power supply voltage equal to or lower than the breakdown voltage of the zap diode 5. Absent. However, when a reverse bias voltage equal to or higher than the breakdown voltage is applied to the zap diode 5 and the zap diode 5 is short-circuited, the branch of the zap diode 5 works and the circuit or the circuit element 6 is short-circuited.
[0019]
Further, as shown in FIG. 9, when the zap diode 5 is connected in series to the circuit or the circuit element 6, the circuit or circuit element 6 is connected to the power supply voltage equal to or lower than the breakdown voltage of the zap diode 5. Will not be. When the zap diode 5 is short-circuited, the circuit or circuit element 6 is activated.
[0020]
According to the first embodiment described above, since the zap diode is covered with the metal film 39 via the interlayer insulating film 36, the reverse bias voltage higher than the breakdown voltage is applied to the zap diode to destroy the PN junction. Even if burst destruction occurs, the zap diode is short-circuited by the metal film 39 thereon to become a resistance. Therefore, a semiconductor device including a zap diode having a stable characteristic with a low resistance value can be obtained.
[0021]
In the first embodiment, if the zap diode has an NPN structure or a PNP structure, the zap diode blocks the voltage in any direction as long as it is lower than the breakdown voltage. Therefore, there is an advantage that the surrounding circuit or the circuit element 6 is not affected. Further, there is an advantage that zap is possible with the voltage in any direction. Further, if the zap diode has a PNPN structure in the first embodiment, a zap diode having a higher breakdown voltage can be obtained.
[0022]
Further, according to the first embodiment, since the width a of the PN junction portion of the zap diode is narrower than the width A of the contact portions 41 and 42, the resistance of the wiring and the contact portions 41 and 42 is reduced, and the PN junction portion It becomes easy to concentrate energy. As a result, a semiconductor device including a zap diode that can be easily zapped with a small amount of energy can be obtained.
[0023]
Embodiment 2. FIG.
FIG. 10 is a longitudinal sectional view showing a configuration of a zap diode of the semiconductor device according to the second embodiment of the present invention. Also in the second embodiment, as in the first embodiment, the N ⁺ cathode region 73, the P ⁺ anode region 74 and the N ⁺ cathode region 75 are formed on the semiconductor substrate 71 via the insulating film 72. Metal electrodes 77 and 78 are connected to the N ⁺ cathode regions 73 and 75 through an interlayer insulating film 76. In the second embodiment, the PN junction between the first N ⁺ cathode region 73 and the P ⁺ anode region 74, and the P ⁺ anode region 74 and the second N ⁺ cathode region are formed on the interlayer insulating film 76. A metal film 79 covering the PN junction with 75 is provided independently of the other electrodes. That is, in the second embodiment, the metal film 79 is insulated from both the first metal electrode 77 and the second metal electrode 78.
[0024]
In addition, the cross-sectional configuration of the zap diode in the second embodiment, the configuration by various combinations of semiconductor regions constituting the zap diode, and the connection configuration between the zap diode and the control circuit and its circuit elements are the same as in the first embodiment. Since there is, description is abbreviate | omitted. According to the second embodiment, as in the first embodiment, a semiconductor device including a zap diode having a stable characteristic with a low resistance value after zapping is obtained.
[0025]
In the above, the present invention can be variously changed. For example, regarding various combinations of semiconductor regions constituting the zap diode, a total of five or more P ⁺ semiconductor regions and N ⁺ semiconductor regions may be alternately arranged.
[0026]
【The invention's effect】
According to the present invention, even if a burst breakdown occurs when a reverse bias voltage higher than the breakdown voltage is applied to the zap diode to break the PN junction, the zap diode is short-circuited by the metal film on the PN junction to become a resistance. Therefore, a semiconductor device having a stable characteristic with a low resistance value and having a zap diode formed on a semiconductor substrate via an insulating film can be obtained.
[Brief description of the drawings]
FIG. 1 is a longitudinal sectional view showing a configuration of a zap diode of a semiconductor device according to a first embodiment of the present invention;
FIG. 2 is a plan sectional view showing a planar configuration of a zap diode of the semiconductor device according to the first embodiment of the present invention;
FIG. 3 is a plan sectional view showing another example of the planar configuration of the zap diode of the semiconductor device according to the first embodiment of the present invention;
FIG. 4 is a diagram illustrating an example of a configuration of a combination of semiconductor regions constituting a zap diode of the semiconductor device according to the first embodiment of the present invention and its symbol;
FIG. 5 is a diagram illustrating an example of a configuration of a combination of semiconductor regions constituting a zap diode of the semiconductor device according to the first embodiment of the present invention and its symbol;
FIG. 6 is a diagram illustrating an example of a configuration of a combination of semiconductor regions constituting a zap diode of the semiconductor device according to the first embodiment of the present invention and its symbol;
FIG. 7 is a diagram showing an example of a configuration by a combination of semiconductor regions constituting a zap diode of the semiconductor device according to the first embodiment of the present invention and its symbol;
FIG. 8 is a block diagram showing an example of a basic connection form between a zap diode and other circuits in the semiconductor device according to the first embodiment of the present invention;
FIG. 9 is a block diagram showing another example of a basic connection form between a zap diode and other circuits in the semiconductor device according to the first embodiment of the present invention;
FIG. 10 is a longitudinal sectional view showing a configuration of a zap diode of a semiconductor device according to a second embodiment of the present invention;
FIG. 11 is a longitudinal sectional view showing a configuration of a conventional zap diode.
12 is a longitudinal sectional view conceptually showing a state after zapping of the zap diode shown in FIG. 11. FIG.
FIG. 13 is a longitudinal sectional view showing another configuration of a conventional zap diode.
[Explanation of symbols]
5, 51 to 54 Zap diode 6 Circuit or circuit element 31, 71 Semiconductor substrate 32, 72 Insulating film 33, 35 N-type semiconductor region (N ⁺ cathode region)
34 P-type semiconductor region (P ⁺ anode region)
36, 76 Interlayer insulating film 37, 38, 77, 78 Metal electrode 39, 79 Metal film 41, 42 Contact part

Claims (3)

In a semiconductor device in which a zap diode used for adjustment of circuit elements after completion of a semiconductor process is formed on the same semiconductor substrate together with other semiconductor elements,
The zap diode is provided on an insulating film stacked on the semiconductor substrate, and has a PN junction made up of a P-type semiconductor region and an N-type semiconductor region, and at least the PN junction has an interlayer insulating film. The semiconductor device is covered with a metal film in the longitudinal direction of the PN junction .   The zap diode has a PN structure having one PN junction, an NPN structure or PNP structure having two PN junctions, a PNPN structure having three PN junctions, or four or more PN junctions. The semiconductor device according to claim 1, wherein the semiconductor device has a structure.   The width of the PN junction is narrower than the width of a contact portion between a metal electrode serving as an anode electrode or a cathode electrode of the zap diode and the P-type semiconductor region or the N-type semiconductor region. 3. The semiconductor device according to 1 or 2.

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