JP4134852B2 - Data processing system, method and data processing apparatus - Google Patents

Description

  The present invention relates to a data processing system for accessing a storage device with respect to frame data including video data and audio data, a method thereof, and a data processing device.

For example, there is a system that writes frame data to a storage device in response to a write command.
Such a system usually writes audio data and video data in frame data to one storage device without separating them.

  By the way, in the above-described system, for example, when a plurality of commands accompanying access to a storage device are generated in response to an editing operation related to video or audio, etc., in order to guarantee a somewhat short response time for each command. There is a demand for speeding up access to storage devices related to frame data.

  The present invention is made in view of the above-described prior art, and provides a data processing system capable of accessing a storage device that stores a plurality of frame data each containing video data and audio data at high speed, a method thereof, and a device thereof. The purpose is to do.

To achieve the above object, a data processing system according to a first aspect of the present invention is a data processing system for writing a plurality of frame data each including video data and audio data to a storage device in response to a write command. A plurality of first processing devices which output a frame data write command and alternately output video data and audio data in the plurality of frame data to be written, and the number of the first processing devices The plurality of first processing devices are connected to the input side by the same number of ports, and the plurality of video recording devices are connected to the output side by the same number of ports as the number of the plurality of video recording devices. With the same number of ports as the number of audio recording devices, the plurality of audio recording devices are connected to the output side to record video data. Video storage means, audio storage means for storing audio data, and the video data selected from the video data and the audio data output alternately by the first processing device over a first time. And writing to the video storage means, selecting the audio data and writing to the audio storage means, and writing to the video storage means based on the write command output by the plurality of first processing devices. said video data and of said audio data written to the audio recording device, a short second time than the first time, the plurality of the plurality of video storage devices and selects the video data output with all number as many ports of the video recorder, said selecting said audio data Outputs using all the number of audio storage device of said plurality of audio recording device number and the same number of ports, and an input of a predetermined number of frame data from the plurality of first processing unit, the input The timing for completing the control is shifted by the second time between the plurality of first processing devices, and writing and reading to and from the video storage means and the audio storage means are performed at the first time. And a second processing device having a processing means .

The operation of the data processing system of the first invention is as follows.
The first processing device outputs a plurality of frame data write commands, and alternately outputs the video data and the audio data in the plurality of frame data to be written.
Then, based on the write command output by the first processing device, the second processing device outputs the video data out of the video data and the audio data that are alternately output by the first processing device. Is selected and output to the video storage device, and the audio data is selected and output to the audio storage device.

A data processing method according to a second aspect of the present invention is a data processing method for writing a plurality of frame data each including video data and audio data to a storage device in response to a write command, wherein the plurality of first processing devices are configured as described above. A first step of outputting a plurality of frame data write commands, alternately outputting video data and audio data in the plurality of frame data to be written over a first time, and storing the video data Video storage means, audio storage means for storing audio data, and processing means for controlling writing to and reading from the video storage means and the audio storage means, the same number as the number of the plurality of first processing devices The plurality of first processing devices are connected to the input side by the same port, and the number of the plurality of video recording devices is the same. The ports, the connected plurality of video recording devices on the output side, and, depending on the number and the same number of ports of a plurality of audio recording device, a second processing device to the plurality of audio recording device is connected to the output side Based on the write command output by the first processing device in the first step, the video data and the audio data output alternately by the first processing device over a first time. Of these, the video data is selected and written to the video storage means, and the audio data is selected and written to the audio storage means, and the video data written to the video storage means and the audio recording means are written. among said audio data, said first short at the second time than the multi select the video data Wherein the video storage more with all number as many ports of the video recorder to output, the same number as the number of the plurality of audio recording device to the plurality of audio storage device by selecting the audio data Output a predetermined number of frame data from the plurality of first processing devices, and determine the timing at which the input is completed between the plurality of first processing devices. in and shifted by the second time, and a second step performed in the first time.

A data processing device according to a third aspect of the present invention is a data processing device for writing a plurality of frame data each containing video data and audio data to a storage device in response to a write command, and writing from a plurality of first processing devices A first interface having the same number as the number of the plurality of first processing devices, which inputs a command and alternately inputs video data and audio data in the plurality of frame data to be written over a first time. The same number of second interfaces as the number of the plurality of video recording devices that output video data to a plurality of video storage devices, and the number of the plurality of audio recording devices that output audio data to the plurality of audio storage devices. It is stored as many third interface, and a video storage means for storing video data, audio data An audio storage unit, of said video data and said audio data over the first time enter alternately through the first interface, write to the video storage means to select the video data, the Audio data is selected and written to the audio storage means, and the video data read from the video storage means at a second time shorter than the first time is stored in the video storage via all of the second interfaces. Output the audio data read out from the audio storage means to the audio storage device via all of the third interface , and a predetermined number of frames from the plurality of first processing devices The timing of completing the input of data is determined according to the phase of the plurality of first processing devices. And shifted by the second time between, and a processing means for performing at the first time.

The operation of the data processing apparatus of the third invention is as follows.
The first interface inputs a write command, and alternately inputs the video data and the audio data in the plurality of frame data to be written.
A processing unit selects the video data from the video data and the audio data alternately input via the first interface, writes the video data to the video storage unit, selects the audio data, and selects the audio data. Write to storage means.
Then, the processing means outputs the video data read from the video storage means to the video storage device via the second interface, and the audio data read from the audio storage means is sent to the third interface. To the audio storage device.

Fourth data processing system of the present invention, depending on the read command, a data processing system for reading video data and audio data including frame data from the storage device, the plurality of outputting the read command frame data 1 And the plurality of first processing devices are connected to the output side by the same number of ports as the number of the plurality of first processing devices, and the number of ports equal to the number of the plurality of video recording devices A plurality of video recording devices connected to the input side, and a plurality of audio recording devices connected to the input side by the same number of ports as the number of the plurality of audio recording devices, and video storage means and audio for storing video data audio storage means for storing data, based on the read command, wherein the first processing unit has output the first time Only by the operation of reading the video data of the frame data from said plurality of video storage using all of the plurality of number as many ports of the video recording apparatus, the frames from the plurality of audio storage device An operation of reading out the audio data of data using all of the same number of ports as the number of the plurality of audio recording devices is performed in parallel, and the video data out of the read video data and the audio data Select data to write to the video storage means, select the audio data to write to the audio storage means, the video data written to the video storage means and the audio data written to the audio recording means in combination to generate the frame data, said first Long second time than during, and outputs the frame data to the first processing unit, and an output of a predetermined number of frame data to the plurality of first processing unit, the output is completed Processing means for controlling writing to and reading from the video storage means and the audio storage means performed at the second time by shifting the timing among the plurality of first processing devices by the first time. And a second processing apparatus .

The operation of the data processing system of the fourth invention is as follows.
The first processing device outputs a frame data read command.
Then, the second processing device reads the video data of the frame data from the video storage device based on the read command output from the first processing device, and the frame data from the audio storage device. An operation of reading out audio data is performed in parallel, and the frame data is generated by combining the video data and the audio data read out in parallel.
Then, the second processing device outputs the generated frame data to the first processing device.

Data processing method of the fifth invention, in accordance with the read command, a data processing method for reading video data and audio data including frame data the data processing apparatus from the storage device, a plurality of first processing unit wherein based on the read command frame data, over the first time, the operation of reading the video data of the frame data from the plurality of the number as many ports of the video recording apparatus of a plurality of video storage devices, a plurality A first step of simultaneously performing an operation of reading audio data of the frame data from the same number of ports as the number of the plurality of audio recording devices of the audio storage device , and reading in parallel in the first step The video data is selected from the video data and the audio data and written to the video storage means The generating the second step and the frame data in combination with the second step the video data has been written in and said audio data to be, written into the audio memory means by selecting the audio data 3 and the second time longer than the first time, the frame data generated in the third step is output to the first processing device , and the plurality of first processes Outputting a predetermined number of frame data to the apparatus at the second time by shifting the completion timing of the output by the first time between the plurality of first processing apparatuses; It has these processes .

Sixth data processing apparatus of the present invention of, in response to a read command, a data processing apparatus for reading video data and audio data including frame data from the storage device, the frame data from a plurality of the first processing unit The same number of first interfaces as the number of the plurality of first processing devices that input a read command, and the same number of second interfaces as the number of the plurality of video recording devices that input video data from a plurality of video storage devices. And a third interface having the same number as the number of the plurality of audio recording devices that input audio data from the plurality of audio storage devices, and the first instruction based on the read command input via the first interface . over time, the off from said plurality of video storage devices through all of the second interface An act of reading the video data of Mudeta, the third conducted from said plurality of audio storage device via all interfaces in parallel with operation of reading the audio data of the frame data, read the video Of the data and the audio data, the video data is selected and written to the video storage means, the audio data is selected and written to the audio storage means, and the written video data and the audio data are combined. Generating the frame data, outputting the frame data via the first interface at a second time longer than the first time , and a predetermined number of the plurality of first interfaces The output of the frame data is the timing when the output is completed. And shifted by the first time among each other first processing device number, and a processing means for performing at the second time.

The operation of the data processing apparatus of the sixth invention is as follows.
The first interface inputs a frame data read command.
Then, the processing means reads the video data of the frame data from the video storage device via the second interface based on the read command input via the first interface; The operation of reading the audio data of the frame data from the audio storage device via the interface 3 is performed in parallel.
The processing means generates the frame data by combining the video data and the audio data read in parallel, and outputs the frame data via the first interface.

  According to the present invention, it is possible to provide a data processing system, method and apparatus capable of accessing a storage device storing a plurality of frame data each containing video data and audio data at high speed.

Hereinafter, a server system 1 according to an embodiment of the present invention will be described with reference to FIGS.
First, the correspondence between the constituent elements of each claim of the present invention and the constituent elements of the present embodiment will be described.
Each of the computers P_1 to P8 shown in FIG. 2 corresponds to the first processing apparatus of the present invention.
The downstream distribution device 11 corresponds to the second processing device of the first and second inventions and the data processing device of the third invention.
The upstream distribution device 12 corresponds to the second processing device of the third and fourth aspects of the invention and the data processing device of the sixth aspect of the invention.
RAID_A1 to A4 correspond to the audio storage device of the present invention, and RAID_V1 to V32 correspond to the video storage device of the present invention.
12 correspond to the first interface of the third invention, the interfaces IF_D2_2 to 9 correspond to the second interface of the third invention, and the interface IF_D2_1 corresponds to the third interface of the third invention. It corresponds to the interface. The memory 52V corresponds to the video storage means of the third invention, the memory 52A corresponds to the audio storage means of the third invention, and the processing circuit 51 corresponds to the processing means of the third invention.
Interface IF_D21_1-28 shown in FIG. 15 corresponds to the first interface of the sixth invention, interface IF_D2_12-19 corresponds to the second interface of the sixth invention, and interface IF_D2_11 is the third interface of the sixth invention. It corresponds to the interface. The memory 62V corresponds to the video storage means of the sixth invention, the memory 62A corresponds to the audio storage means of the sixth invention, and the processing circuit 61 corresponds to the processing means of the sixth invention.

Further, write data WD and read data RD for 328 frames correspond to a predetermined number of frame data of the present invention.
1 TS (Time Slot) corresponds to the first time of the present invention, and 8 TS corresponds to the second time of the present invention.

An outline of the server system 1 is shown below.
The computer P_1 shown in FIG. 3 and FIG. 5 outputs a plurality of frame data write commands COM2 each including video data and audio data to the downlink distributor 11.
In addition, the computer P_1 alternately outputs video data and audio data in a plurality of frame data to be written to the downlink distribution device 11 as write data WD.
Based on the write command COM2, the downstream distributor 11 selects video data from the video data and audio data output alternately by the computer P_1 and outputs them to the RAID_V1 to RAID8, selects the audio data, and selects RAID_A1. Output to.

Hereinafter, the server system 1 of the present embodiment will be described in detail.
FIG. 1 is an overall configuration diagram of a server system 1 according to an embodiment of the present invention.
As illustrated in FIG. 1, the server system 1 includes, for example, 80 (channel) terminal devices 3_1 to 80 (terminal device 3) and a server 5.
In the server system 1, the terminal devices 3_1 to 80 share the server 5. Each of the terminal devices 3_1 to 80 writes video data and audio data to the server 5 and reads video data and audio data from the server 5.

[Terminal devices 3_1 to 80]
The terminal devices 3_1 to 80 perform various processes such as editing and reproduction using the server 5 that stores video data and audio data.
The terminal devices 3_1 to 80 output commands (commands) COM1_1 to 80 (COM1) for instructing the server 5 to access video data and audio data to the server 5, respectively.

[Server 5]
2 to 4 are configuration diagrams of the server 5 shown in FIG. 1, FIG. 3 is a diagram for explaining the connection relationship between the downlink distribution device 11 shown in FIG. 2, the computer, and the RAID, and FIG. 2 is a diagram for explaining a connection relationship between an upstream distribution device 12 shown in FIG. 2 and computers and RAID (Redundant Arrays of Inexpensive Disks).
As shown in FIG. 2, the server 5 includes, for example, eight computers P_1 to 8 (P), a downlink distribution device 11, an upstream distribution device 12, four RAID_A1 to A4 (RAID) for audio, And 32 RAID_V1 to V32 (RAID) for video.
As shown in FIG. 2, each of the computers P_1 to 8 is connected to, for example, 10 terminal devices 3 (3_1 to 80), and 10 commands (for 10 channels) from these 10 terminal devices 3. Enter COM1.
Further, as shown in FIGS. 3 and 4, each of the computers P_1 to P_8 is connected to the downstream distribution device 11 via the eight downstream buses BUS_D1, and is connected to the eight upstream buses BUS_U1. To the upstream distribution device 12.
That is, the computers P_1 to 8 and the downstream distribution device 11 are connected through a total of 64 downstream buses BUS_D1_1 to 64, and the computers P_1 to 8 and the upstream distribution device 12 are connected to a total of 64 upstream devices. They are connected via buses BUS_U1_1 to 64.

The downlink distribution device 11 and RAID_A1 to A4, V1 to V32 are connected via a total of 72 downlink buses BUS_D2_1 to 72.
The upstream distributor 12 and the RAID_A1 to A4, V1 to V32 are connected via a total of 72 upstream buses BUS_U2_1 to 72.

When performing a write operation from a single computer P to RAID, the server 5 distributes 328 frames, which are write data for 2 channels, between 8 TSs from the computer P via 64 buses BUS_D1_1 to 64. After transferring to the device 11, the write data is transferred (written) to RAID_A1 to A4 and V1 to V32 via 72 buses BUS_D2_1 to 72 during 1TS.
In the present embodiment, one TS (time slot) is a time corresponding to four frames, for example, about 133 ms.
In the above writing operation, the writing data (328 frames) input from each of the eight computers P_1 to P8 are continuously obtained by shifting the period of the 8TS by 1 TS between the eight computers P_1 to P_8. The data can be sequentially transferred to RAID_A1 to A4 and V1 to V32 during 8TS.
Here, since the write data transferred to the RAID_A1 to A4 and V1 to V32 from the downlink distribution device 11 during one TS is 328 frames for two channels, the write data for 80 channels is transferred from the downlink distribution device 11. 40 (= 80/2) TS is required to transfer to RAID_A1 to A4 and V1 to V32. That is, one round is 40 TS.

On the other hand, in the read operation from the RAID of a single computer P, the server 5 converts RAID_A1 to A4, V1 to 328 frames as read data for two channels via 72 buses BUS_U2_1 to 72 between 1 TS, for example. The data is transferred from V32 to the upstream distribution device 12. Thereafter, the upstream distribution device 12 transfers the 328 frame to the computer P via 64 buses BUS_U1_1 to 64 during 8 TSs.
The reading operations from the RAID_A1 to A4 and V1 to V32 of the 328 frames are continuously performed between the eight computers P_1 to P_8.
Here, since the read data transferred from the RAID_A1 to A4, V1 to V32 to the upstream distribution device 12 during 1 TS is 328 frames for two channels, the read data for 80 channels are assigned RAID_A1 to A4, V1 to V1. 40 (= 80/2) TS is required to transfer from V32 to the upstream distribution device 12. That is, one round is 40 TS.
Here, in the server 5, as shown in FIGS. 2 to 4, the writing path and the reading path are provided independently between the computers P_1 to P8 and the RAID_A1 to A4 and V1 to V32. For both reading and reading, one round of 40 TS can be realized for 80 channels. That is, for all 80 channels, one write operation and one read operation in 40 TS are guaranteed as response times.

In this embodiment, each of the computers P_1 to 8 has 8 downstream ports and 8 upstream ports, and each of RAID_A1 to A4 and V1 to V32 has 2 downstream ports and 2 upstream ports.
In the server 5, the transfer rate between the computers P_1 to 8 and the downlink distribution device 11, the transfer rate between the downlink distribution device 11 and the RAID_A1 to A4, V1 to V32, and the RAID_A1 to A4, V1 to V32 and the uplink. All of the computers P_1 to 8 and RAID_A1 to A4, V1 to V32 in order to sufficiently secure the transfer rate between the distribution device 12 and the upstream distribution device 12 and the computers P_1-8. Use the port. In order to realize this, for example, as shown in FIG. 3, the downstream distribution device 11 includes eight distribution circuits 21 </ b> _ <b> 1-8 each having 8 input ports and 9 output ports. As shown in FIG. 4, the upstream distribution device 12 includes eight distribution circuits 22 </ b> _ <b> 1-8 each having 9 inputs and 8 outputs.
That is, each of RAID_A1 to A4 and V1 to V32 inputs data from two different distribution circuits 21 and outputs data to two different distribution circuits 22.
The server 5 may be configured such that, for example, the distribution circuits 21_1 to 21_8 illustrated in FIG. 3 are connected to four different RAID_Vs, and the distribution circuits 22_1 to 8 illustrated in FIG. 4 are connected to four different RAID_Vs. Good.

Hereinafter, each component of the server 5 will be described.
<Computer P_1-80>
As shown in FIG. 3, the computer P_1 is connected to the downstream distribution device 11 via the eight downstream buses BUS_D1_1 to 8, and the upstream distribution device via the eight upstream buses BUS_U1_1 to 8. 12 is connected.
The computer P_1 inputs commands COM1_1 to 10 (COM1, commands for 10 channels) from the ten terminal devices 3_1 to 10.
The computer P_1 outputs the write commands COM2_1 to 8 (COM2) generated based on the commands COM1_1 to COM10 to the downlink distribution device 11 via each of the eight buses BUS_D1_1 to 8.
Further, when the computer P_1 outputs the write command COM2 to the downlink distributor 11, the computer P_1 outputs the write data to the downlink distributor 11 via the same bus BUS_D1_1-8.
The computer P_1 outputs a read command COM2_1 to 2_8 (COM2) generated based on the commands COM1_1 to 10 to the upstream distributor 12 via each of the eight buses BUS_U2_1 to 8.
Further, the computer P_1 inputs read data read in response to the read command COM2 from the upstream distributor 12 via the bus BUS_U1_1 to 8.

FIG. 5 is a configuration diagram of the computer P_1 shown in FIGS.
As shown in FIG. 5, the computer P_1 includes 10 interfaces CH_IF_1 to 10, 5 processing circuits 15_1 to 5, 8 downstream interfaces IF_D1_1 to 8 and 8 upstream interfaces IF_U1_1 to 8. Have.
The interfaces CH_IF_1 to 10 perform data input / output with the terminal devices 3_1 to 10 shown in FIGS. 1 and 2, respectively.
The processing circuit 15_1 interprets the instructions COM1_1 and 2 input via the interfaces CH_IF_1 and 2, specifies RAID_A1 to A4 and V1 to V32 to be accessed by the instructions COM1_1 and 2, and generates a new instruction COM2. This is output via the interfaces IF_D1_1 to 8 and IF_U1_1 to the distribution circuits 21_1 to 8 and 22_1 to 8 of the downlink distribution device 11 and the upstream distribution device 12 that perform processing related to the RAID to be accessed.
The processing circuits 15_2 to 5-5 are the same as the processing circuit 15_1 described above except that the processing described above is performed on the command COM1 input via the interfaces CH_IF_3, 4, CH_IF_5, 6, CH_IF_7, 8 and CH_IF_9, 10. It is.

The downlink interfaces IF_D1_1 to 8 are respectively connected to the distribution circuits 21_1 to 21_8 of the downlink distribution device 11 via the bus BUS_D1_1 to 8 illustrated in FIG.
The eight upstream interfaces IF_U1_1 to 8_8 are respectively connected to the distribution circuits 22_1 to 22_8 of the upstream distribution device 12 via the bus BUS_U1_1 to 8 illustrated in FIG.

  The computers P_2 to P8 are respectively terminal devices 3_1 to 20, 3_21 to 30, 3_31 to 40, 3_41 to 50, 3_51 to 60, 3_61 to 70, 3_71 to 80, COM1_11 to 20, 1_21 to 30, 1_31 to 40, respectively. , 1_41 to 50, 1_51 to 60, 1_61 to 70, and 1_71 to 80 are the same as the computer P_1.

Hereinafter, the instruction COM2 generated by the processing circuits 15_1 to 5-5 illustrated in FIG. 3 will be described.
FIG. 6 is a diagram for explaining the instruction COM2 generated by the distribution circuits 15_1 to 5-5 illustrated in FIG.
As shown in FIG. 6, the instruction COM2 includes synchronization data SYNC, header data HEADER, and eight instructions com1-8.
The eight instructions com1-8 are defined in correspondence with, for example, eight RAID_Vs accessed by each of the distribution circuits 21_1-8 shown in FIG. 3 and the distribution circuits 22_1-8 shown in FIG. RAID_A is automatically generated in the distribution circuits 21_1 to 8_1 and the distribution circuits 22_1 to 8 shown in FIG. 4 based on the instructions com1 to 8, for example.
Here, the synchronization data SYNC is used for the downstream distribution device 11 in the subsequent stage to specify (extract) the command COM2.
The header data HEADER has, for example, a flag DI indicating that the write data WD is transmitted in a predetermined time slot TS following the instruction COM2.
As shown in FIG. 6, each of the instructions com1 to 8 has an instruction code OP_CODE, a data length, a control code CONT, and a RAID designation code RAID_I.
The instruction code OP_CODE indicates, for example, a write instruction, a read instruction, or an instruction for notifying the flag D1.
The data length indicates the number of bytes of write data, for example.
The control code CONT indicates whether the instruction indicated by the instruction code OP_CODE is for video data or audio data.
The RAID designation code RAID_I indicates the RAID_V of the video accessed by the instruction indicated by the instruction code OP_CODE, and the HDD (Hard Disk Drive) number in the RAID_V.

Hereinafter, an operation example in the case where the computer P_1 outputs a write command to the downlink distribution device 11 will be described.
FIG. 7 is a diagram for explaining an operation example when the computer P_1 outputs a write command to the downlink distribution device 11.
As illustrated in FIG. 7, the computer P_1 performs data transfer with the downlink distribution device 11 on the basis of the jumbo slot JS corresponding to 8TS.
The jumbo slot JS is defined such that, for example, the computers P_1 to P_8 are sequentially shifted from each other by 1 TS. The computers P_1 to P8, the downlink distribution device 11 and the uplink distribution device 12 specify the timing of the jumbo slot JS based on a predetermined synchronization signal.

As shown in FIG. 7, the jumbo slot JS has a time corresponding to 8TS.
Here, as shown in FIG. 8, a command transmission period CT and a data transmission period DT are defined in one TS.
In the command transmission period CT, the command COM2 shown in FIG. 6 is transferred from the computer P_1 to the downlink distribution device 11.
In the data transmission period DT, write data is transferred from the computer P_1 to the downlink distribution device 11.
In the read operation described later, the command COM2 shown in FIG. 6 is transferred from the computer P_1 to the upstream distributor 12 in the command transmission period CT, and the read data is transferred from the upstream distributor 12 to the computer P_1 in the data transmission period DT. Is done.

FIG. 9 is a flowchart for explaining the writing operation of the computer P_1.
Step ST1:
The processing circuit 15_1 of the computer P_1 shown in FIG. 5 receives, for example, write commands COM1_1 and 2 for two channels and write data WD (328 frames) for two channels from the terminal devices 3_1 and 3_2 via the interfaces CH_IF_1 and 2. input.
Step ST2:
The processing circuit 15_1 generates a write command COM2 for each of the distribution circuits 21_1 to 8 corresponding to the write destination RAID based on the write commands COM1_1 and 2. As described with reference to FIG. 6, the write command COM2 includes commands com1 to 8 defined corresponding to the eight RAID_Vs accessed by each of the distribution circuits 21_1 to 8 shown in FIG. ing. In addition, the commands com1 to 8 include the RAID_V of the video to be accessed and the designation code RAID_I indicating the HDD number in the RAID_V.

Step ST3:
The processing circuit 15_1 outputs the write data WD from the interfaces IF_D1_1 to 8 corresponding to the write destination RAID to the downlink distributor 11 via the bus BUS_D1_1 to 8TS over 8TS.
Specifically, for example, as shown in FIG. 7A, the computer P_1 sends write data WD for 1 TS in the data transmission period DT of 1 TS immediately before a predetermined jumbo slot JS to the downlink distribution device 11. Then, in the subsequent 7TS data transmission period DT, the remaining 7TS worth of write data WD is transmitted to the downlink distribution device 11 so that the 8TS data transmission period DT has two channels of write data WD (328 frames). Is transmitted to the downlink distribution device 11.
At this time, the processing circuit 15_1 generates the instruction COM2 in which the above-described flag DI in the header data HEADER shown in FIG. 6 is set to indicate that the write data WD is transmitted, and the first 1TS of the jumbo slot JS is generated. In the command transmission period CT, the command COM2 is output from the interfaces IF_D1_1 to 8 corresponding to the write destination RAID to the downstream distribution device 11 via the bus BUS_D1_1 to 8.
Further, as illustrated in FIG. 8, the processing circuit 15_1 transmits the write data WD to the downlink distribution device 11 by arranging the frame data for each frame data. That is, the processing circuit 15_1 is arranged so that the audio data A and the video data V are alternately positioned within the data transmission period DT. The processing circuit 15_1 can arrange the write data WD for 41 frames in the data transmission period DT of 1TS. For example, when transmitting a plurality of frame data using a data transmission period DT for 8 TS, the processing circuit 15_1 performs transmission by arranging the audio data A and the video data V sequentially from the first 1 TS. In this case, the processing circuit 15_1 performs transmission by arranging the frame data in the data transmission period DT for 8 TS so that the break of each TS coincides with the break of the frame data.

Step ST4:
As shown in FIG. 7A, the processing circuit 15_1 receives the bus BUS_D1_1 from the interface IF_D1_1 to 8 corresponding to the write destination RAID in the data transmission period DT of the first 1TS of the jumbo slot JS next to the jumbo slot JS. The write command COM2 is output to the downstream distribution device 11 through .about.8.
Step ST5:
The processing circuit 15_1 inputs the status data STATUS corresponding to the write command COM2 from the downlink distribution device 11 at the command transmission time CT in the third 1TS of the next jumbo slot JS.

The processing circuits 15_2 to 15_5 perform the same configuration and operation as the processing circuit 15_1 described above. In this case, the processing circuits 15_1 to 5_1 perform the above operation on the basis of different jumbo slots JS that do not overlap and are continuous.
Accordingly, the computer P_1 accesses RAID_A1 to A4 and V1 to V32 with respect to the write commands COM1_1 to 10 for 10 channels from all of the terminal devices 3_1 to 10 with 5JS, that is, 40 (= 5 × 8) TS. Can guarantee.

Hereinafter, an operation example when the computer P_1 outputs the read command COM2 to the upstream distribution device 12 will be described.
FIG. 10 is a diagram for explaining an operation example when the computer P_1 outputs a read command COM2 to the upstream distribution device 12.
As shown in FIG. 10, as described above, the computer P_1 performs data transfer with the upstream distribution device 12 with reference to the jumbo slot JS corresponding to 8TS.
Further, as described above with reference to FIG. 8, the command transmission period CT and the data transmission period DT are defined in 1 TS.
In the command transmission period CT, a read command COM2 is output from the computer P_1 to the upstream distribution device 12.
Also, in the data transmission period DT, the computer P_1 inputs read data from the upstream distribution device 12.

FIG. 11 is a flowchart for explaining a read operation of the computer P_1.
Step ST11:
The processing circuit 15_1 of the computer P_1 illustrated in FIG. 5 inputs read commands COM1_1 and 2 from the terminal devices 3_1 and 3_2 via, for example, the interfaces CH_IF_1 and 2.
Step ST12:
Based on the read commands COM1_1 and 2, the processing circuit 15_1 generates a read command COM2 for each of the distribution circuits 22_1 to 8 shown in FIG. 4 corresponding to the read-out RAID.
As described with reference to FIG. 6, the read command COM2 includes commands com1 to 8 defined corresponding to the eight RAID_Vs accessed by the distribution circuits 22_1 to 8 shown in FIG. ing. In addition, the commands com1 to 8 include the RAID_V of the video to be accessed and the designation code RAID_I indicating the HDD number in the RAID_V.

Step ST13:
As shown in FIG. 10A, the processing circuit 15_1 transmits from the interface IF_U1_1 to 8 corresponding to the read RAID via the bus BUS_U1_1 to 8 during the instruction transmission period CT in the first 1TS of the jumbo slot JS. The read command COM <b> 2 is output to the distribution device 12.

Step ST14:
The processing circuit 15_1 inputs the status data STATUS indicating the read state from the upstream distributor 12 in the next 1TS command transmission period CT after 1 TS from which the read command COM2 is output ends.
Further, the processing circuit 15_1 reads the above-mentioned data from the upstream distribution device 12 via the bus BUS_U1_1 to 8 through the interface IF_U1_1 to 8 corresponding to the RAID of the read destination in the data transmission period DT of 8 TS continuous from the 1TS. Read data RD (328 frames), which is frame data for two channels corresponding to the command COM2, is input.
Step ST15:
The processing circuit 15_1 distributes the read data RD (328 frames) for two channels input in step ST14 based on the read command COM1_1, 2 input in step ST1, and the terminal device 3_1 via the interface CH_IF_1, 2. , 2 are output.

The processing circuits 15_2 to 15_5 perform a reading operation similarly to the above-described processing circuit 15_1. In this case, the processing circuits 15 </ b> _ <b> 1 to 15 </ b> _ <b> 5 perform the above-described reading operation with reference to different jumbo slots JS that do not overlap and are continuous.
Thus, the computer P_1 can guarantee that RAID_A1 to A4 and V1 to V32 are read in response to the read commands COM1_1 to 10 from all of the terminal devices 3_1 to 10 in 5JS, that is, 40TS.

<Downlink distribution device 11>
As shown in FIG. 3, the downstream distribution device 11 includes eight distribution circuits 21_1 to 8_1.
The distribution circuit 21_1 is connected to RAID_A1 via the bus BUS_D2_1.
The distribution circuit 21_1 is connected to RAID_V1 to V8 via buses BUS_D2_2 to 9 respectively.
The distribution circuit 21_2 is connected to RAID_A1 via the bus BUS_D2_10.
The distribution circuit 21_2 is connected to RAID_V1 to V8 via buses BUS_D2_1 to 18, respectively.
The distribution circuit 21_3 is connected to RAID_A2 via the bus BUS_D2_19.
The distribution circuit 21_3 is connected to RAID_V9 to V16 via buses BUS_D2_20 to 27, respectively.
The distribution circuit 21_4 is connected to RAID_A2 via the bus BUS_D2_28.
The distribution circuit 21_4 is connected to the RAID_V9 to V16 via the bus BUS_D2_29 to 36, respectively.
The distribution circuit 21_5 is connected to RAID_A3 via the bus BUS_D2_37.
The distribution circuit 21_5 is connected to RAID_V17 to V24 via buses BUS_D2_38 to 45, respectively.
The distribution circuit 21_6 is connected to the RAID_A3 via the bus BUS_D2_46.
The distribution circuit 21_6 is connected to RAID_V17 to V24 via buses BUS_D2_47 to 54, respectively.
The distribution circuit 21_7 is connected to the RAID_A4 via the bus BUS_D2_55.
The distribution circuit 21_7 is connected to the RAID_V25 to V32 via the buses BUS_D2_56 to 63, respectively.
The distribution circuit 21_8 is connected to the RAID_A4 via the bus BUS_D2_64.
The distribution circuit 21_8 is connected to the RAID_V25 to V32 via the bus BUS_D2_65 to 72, respectively.

Hereinafter, the distribution circuit 21_1 illustrated in FIG. 3 will be described.
12 is a configuration diagram of the distribution circuit 21_1 shown in FIG.
As illustrated in FIG. 12, the distribution circuit 21_1 includes, for example, interfaces IF_D1_1-11, a processing circuit 51, a memory 52V, a memory 52A, and interfaces IF_D2_1-9.
The interfaces IF_D1_11 to 18 are connected to buses BUS_D1_1, 9, 17, 25, 33, 41, 49, and 57 shown in FIG.
The processing circuit 51 interprets the instructions COM2 input from the computers P_1 to P8 through the interfaces IF_D1_1 to 18, and generates instructions COM3 for the RAID_A1 and V1 to V8 based on the interpretation results. The data is output to RAID_A1, V1 to V8 via IF_D2_1 to 9, respectively.
Specifically, the processing circuit 51 holds, for example, data indicating the correspondence between the video data stored in advance in each HDD in RAID_V1 to 4 and the HDD in RAID_A1 corresponding to the video data. Based on the data and the HDDs specified by com1 to 8 in the command COM2, the HDD to be accessed in RAID_A1 is specified, and the command COM3 for RAID_A1 is generated.
The processing circuit 51 temporarily stores the frame data, which is the write data WD input via the interfaces IF_D1_11 to 18 in response to the write command COM2, in the memories 52A and 52V. At this time, when the write data WD is frame data, the processing circuit 51 separates the frame data into video data V and audio data A, writes the video data V into the memory 52V, and writes the audio data A into the memory 52A. Write.
The interfaces IF_D2_1 to 9 are respectively connected to RAID_A1, V1 to V8 via buses BUS_D2_1 to 9 shown in FIG.

As described above, the downlink distribution device 11 inputs the command COM2 for two channels and the write data WD (328 frames) for two channels between 8TSs from a single computer P_1 shown in FIG.
At this time, the write data WD is distributed and transferred from the computer P_1 to the distribution circuits 21_1 to 8 based on the write destination RAID.
In FIG. 7A, the distribution circuits 21_1 to 8 write the write data WD input from the computer P_1 during 8TS indicated by (*) together with the flag DI included in the instruction COM2 in the next 1TS. Transfer to the previous RAID via bus BUS_D2.
Then, the distribution circuits 21_1 to 8_1 input the status data STATUS indicating the write status from the write destination RAID to the command transfer time CT of the next 1TS after 1 TS from the transferred 1TS to the write data WD. Through and output to the computer P_1.
That is, the downlink distribution device 11 transfers the write data WD for two channels input from the computer P_1 in 8TS to the write destination RAID_A1 to A4, V1 to V32 in 1TS.

The distribution circuits 21_2 to 8 are the same as the distribution circuit 21_1 described above except for the bus BUS_D1 connected to the interfaces IF_D1_1 to 18 and the RAID connected to the interfaces IF_D2_1 to 9.
In this case, as described above, the jumbo slots JS are defined so as to be shifted from each other in the order of 1TS between the computers P_1 to P_8. Therefore, in each of the distribution circuits 21_1 to 8 as shown in FIG. The timing of the 1TS for transferring the write data WD_1 to 2 for two channels input from P_1 to 8 to the write destination RAID_A1 to A4, V1 to V32 in 1TS differs from the computers P_1 to 8 by 1TS. Thereby, it is possible to guarantee the access amount allowed in one TS for RAID_A1 to A4 and V1 to V32. Further, continuous access to RAID_A1 to A4 and V1 to V32 can be realized. That is, the timing at which RAID_A1 to A4 and V1 to V32 cannot be accessed can be eliminated, and RAID_A1 to A4 and V1 to V32 can be used efficiently.

Hereinafter, an operation example of the distribution circuit 21_1 illustrated in FIG. 12 will be described.
FIG. 14 is a diagram for explaining the operation of distribution circuit 21_1 shown in FIG.
Step ST21:
The processing circuit 51 of the distribution circuit 21_1 shown in FIG. 12 is input from the computer P_1 via the bus BUS_D1_1 in the instruction transmission period CT in the first 1TS of the jumbo slot JS assigned to the computer P_1 shown in FIG. Based on the flag DI of the instruction COM2, it notifies the RAID_A1, V1 to V8 indicated by the RAID designation code RAID_I shown in FIG. 6 in the instruction COM2 that the write data WD is transferred.
RAID_A 1 and V 1 to 8 enter a standby state based on the notification and stop rebuild processing other than the processing necessary for data input. The notification is performed, for example, in the command transmission period CT of the last 1TS in the jumbo slot JS as shown in FIG.
Step ST22:
The processing circuit 51 receives write data WD (frame data written to RAID_A1, V1-8 among the write data for two channels) input from the computer P_1 via the bus BUS_D1_1 in 8TS (*) shown in FIG. Audio data A and video data V are separated, audio data A is written into memory 52A, and video data V is written into memory 52V.
The processing circuit 51 separates the write data WD based on, for example, the data lengths in the above-described instructions com1 to 8 in the instruction COM2 input in step ST21, the control code CONT, and the like.
In this case, as described with reference to FIG. 8, since the audio data A and the video data V are alternately arranged in the data transmission period DT of each TS, for example, the data transmission When frame data is stored as the write data WD within the period DT, the processing circuit 51 writes the write data based on the data length and arrangement information of the video data and audio data acquired in advance or information in the command COM2. By switching the WD in the order of input, video data and audio data can be efficiently separated and written to the memories 52V and 52A.
Further, for example, when all the write data WD in 1TS is audio data, the processing circuit 51 writes it in the memory 52A based on the control code CONT. On the other hand, for example, when all the write data WD in 1TS is video data, the processing circuit 51 writes it in the memory 52V based on the control code CONT.

Step ST23:
The processing circuit 51 reads the audio data A written in the memory 52A with 8TS in step ST22 during the data transmission period of the last 1TS of the jumbo slot JS, and outputs it to the RAID_A1 via the interface IF_D2_1.
The processing circuit 51 reads the video data V written in the memory 52V by 8TS in step ST22 in the data transmission period of the last 1TS of the jumbo slot JS, and outputs it to the RAID_V1 to 8 through the interfaces IF_D2_2-9.
At this time, based on the RAID designation code RAID_I in the instruction COM2 input in step ST21, the processing circuit 51 uses the interfaces IF_D2_1 to IF_D2_1 corresponding to the write destination RAID for the audio data A and video data V read from the memories 52A and 52V. 9 and output.
Step ST24:
The processing circuit 51 generates a video write command COM3 based on the write command COM2 input from the computer P_1 via the bus BUS_D1_1 in the first 1TS of the jumbo slot JS next to the jumbo slot JS shown in FIG. Are output to RAID_V1 to RAID_V8 designated by the RAID designation code RAID_I in the write command COM2, as shown in FIG.
Further, the processing circuit 51 generates a write command COM3 related to audio based on the RAID designation code RAID_I in the write command COM2, and outputs this to RAID_V1.
Step ST25:
As shown in FIG. 7D, the processing circuit 51 vacates 1TS from the 1TS that transferred the write command COM3, and indicates the write status from the write target RAID_A1, V1-8 during the next 1TS command transmission period CT. The status data STATUS is input, and it is passed through as shown in FIG. 7E and output to the computer P_1 within the same TS.

[Upward distribution device 12]
As illustrated in FIG. 4, the upstream distribution device 12 includes eight distribution circuits 22_1 to 8_1.
The distribution circuit 22_1 is connected to RAID_A1 via the bus BUS_D2_1.
The distribution circuit 22_1 is connected to RAID_V1 to V8 via buses BUS_D2_2 to 9, respectively.
The distribution circuit 22_2 is connected to RAID_A1 via the bus BUS_D2_10.
The distribution circuit 22_2 is connected to RAID_V1 to V8 via buses BUS_D2_1 to 18, respectively.
The distribution circuit 22_3 is connected to RAID_A2 through the bus BUS_D2_19.
The distribution circuit 22_3 is connected to RAID_V9 to V16 via buses BUS_D2_20 to 27, respectively.
The distribution circuit 22_4 is connected to RAID_A2 through the bus BUS_D2_28.
The distribution circuit 22_4 is connected to RAID_V9 to V16 via buses BUS_D2_29 to 36, respectively.
The distribution circuit 22_5 is connected to the RAID_A3 via the bus BUS_D2_37.
The distribution circuit 22_5 is connected to RAID_V17 to V24 via buses BUS_D2_38 to 45, respectively.
The distribution circuit 22_6 is connected to the RAID_A3 via the bus BUS_D2_46.
The distribution circuit 22_6 is connected to RAID_V17 to V24 via buses BUS_D2_47 to 54, respectively.
The distribution circuit 22_7 is connected to the RAID_A4 via the bus BUS_D2_55.
The distribution circuit 22_7 is connected to RAID_V25 to V32 via buses BUS_D2_56 to 63, respectively.
The distribution circuit 22_8 is connected to the RAID_A4 via the bus BUS_D2_64.
The distribution circuit 22_8 is connected to the RAID_V25 to V32 via the bus BUS_D2_65 to 72, respectively.

Hereinafter, the distribution circuit 22_1 illustrated in FIG. 4 will be described.
FIG. 15 is a configuration diagram of the distribution circuit 22_1 shown in FIG.
As illustrated in FIG. 15, the distribution circuit 22_1 includes, for example, interfaces IF_D1_21 to 28, a processing circuit 61, a memory 62V, a memory 62A, and interfaces IF_D2_1 to 19-19.
The interfaces IF_D1_21 to 28 are respectively connected to buses BUS_U1_1, 9, 17, 25, 33, 41, 49, and 57 shown in FIG.
The processing circuit 61 interprets the command COM2 input from the computers P_1 to 8 through the interfaces IF_D1_21 to 28, generates the commands COM3 for the RAID_A1 and V1 to V8 based on the interpretation results, and interfaces them. The data is output to RAID_A1, V1 to V8 via IF_D2_1 to 19 respectively.
Specifically, the processing circuit 61 holds, for example, data indicating a correspondence relationship between the video data stored in advance in each HDD in the RAID_V1 to 4 and the HDD in the RAID_A1 corresponding to the video data. Based on the data and the HDDs specified by com1 to 8 in the command COM2, the HDD to be accessed in RAID_A1 is specified, and the command COM3 for RAID_A1 is generated.
The interfaces IF_D2_11 to 19 are connected to RAID_A1, V1 to V8 via buses BUS_U2_1 to 9 shown in FIG. 4, respectively.
The processing circuit 61 writes the audio data A as read data RD input from the interface IF_D2_11 in response to the read command COM2 into the memory 62A, and the video data V as read data RD input from the interfaces IF_D2_12 to 19 to the memory 62V. Write.

As described above, as shown in FIG. 10A, when the upstream distribution device 12 receives the read command COM2 from the computer P_1, it outputs the corresponding read command COM3 to the RAID_A1 to A4 and V1 to V32.
Then, the upstream distribution apparatus 12 inputs read data RD (328 frames) for two channels from RAID_A1 to A4 and V1 to V32 in the next 1TS.
In FIG. 10D, distribution circuits 22_1-8 transfer read data RD input from RAID_A1, V1-V8 during 1TS indicated by (*) to computer P_1 in the next 8TS.
At this time, the distribution circuits 21_1 to 8 input status data STATUS indicating the read status from RAID_A1 to A4 and V1 to V32 during the command transmission period CT of the next 1TS after issuing the read command COM3. , Through it and output it to the computer P_1.
That is, the upstream distributor 12 outputs the read data RD for two channels input from RAID_A1 to A4 and V1 to V32 in 1TS to the computer P_1 over 8TS.
Further, the upstream distribution device 12 performs the same operation on the computers P_2 to 8 as when the read command COM2 from the computer P_1 is input.
However, the timing at which the upstream distribution device 12 receives the read command COM2 from the computers P_1 to P8 is shifted by 1 TS, so that the read timing for RAID_A1 to A4 and V1 to V32 does not compete as shown in FIG. Further, continuous access to RAID_A1 to A4 and V1 to V32 can be realized. That is, the timing at which RAID_A1 to A4 and V1 to V32 cannot be accessed can be eliminated, and RAID_A1 to A4 and V1 to V32 can be used efficiently.

  The distribution circuits 22_2 to 8 are the same as the distribution circuit 22_1 described above except for the bus BUS_D1 connected to the interfaces IF_D1_21 to 28 and the RAID connected to the interfaces IF_D2_1 to 19-19.

Hereinafter, an operation example of the distribution circuit 22_1 illustrated in FIG. 15 will be described.
FIG. 17 is a diagram for explaining the operation of distribution circuit 22_1 shown in FIG.
Step ST31:
The processing circuit 61 of the distribution circuit 22_1 shown in FIG. 15 performs a video read COM3 based on a read command COM2 input from the computer P_1 via the bus BUS_D1_1 in the first 1TS of the jumbo slot JS shown in FIG. As shown in FIG. 10A, this is output to RAID_V1 to RAID_V8 designated by the RAID designation code RAID_I in the read instruction COM2.
Further, the processing circuit 61 generates a write command COM3 related to audio based on the RAID designation code RAID_I in the write command COM2, and outputs this to RAID_A1.
The processing circuit 61 outputs the instruction COM3 with 1TS to which the instruction COM2 is input.
Step ST32:
The processing circuit 61 inputs read data RD (data read from RAID_A1, V1-8 among the read data for two channels) through the interface IF_D2_1-11 in the data transmission time DT of the next 1TS. .
The processing circuit 61 writes the audio data A input from the RAID_A1 via the interface IF_D2_11 into the memory 62A.
The processing circuit 61 writes the video data V input from the RAID_V1 to 8 through the interfaces IF_D2_12 to 19 to the memory 62V.
Step ST33:
The processing circuit 61 inputs the status data STATUS indicating the read state from the RAID_A1, V1-8 at the next 1TS command transmission time CT, and outputs the status data STATUS through the computer P_1.
Step ST34:
The processing circuit 61 generates frame data from the video data read from the memory 62V and the audio data A read from the memory 62A between the 8 TSs starting from 1TS that output the status data STATUS in step ST33. The read data RD is output to the computer P_1 via the interface IF_D1_21.

Next, the overall operation of the server system 1 will be described.
[Write operation]
First, the user operates the terminal devices 3_1 to 80, and write commands COM1_1 to 1-80 corresponding to the operations are output to the corresponding computers P_1 to P_8 of the server 5.
Here, for example, paying attention to the processing related to the write commands COM1_1 and 2 for two channels, the computer P_1 uses the jumbo slot JS shown in FIG. 7 defined for the computer P_1 as a reference to write commands COM1_1 and two channels. 2 and the write data WD are used to perform the operations of steps ST1 to ST3 shown in FIG.
On the other hand, the distribution circuits 21_1 to 21_8 of the downlink distribution device 11 perform the operation shown in FIG. 14 with the jumbo slot JS as a reference.
As a result, the write operation for RAID_A1 to A4 and V1 to V32 is performed for the two-channel write commands COM1_1 and 2, and the status data STATUS is output to the computer P_1.
Similarly, the computers P_2 to 8 perform the above-described writing operation of the computer P_1 with reference to the jumbo slot JS shifted by 1 TS. As a result, with a total of 8 TS, the writing operation for 16 channels (= 2 × 8) related to the computers P_1 to 8 does not compete, and the access allowance for RAID_A1 to A4 and V1 to V32 is used to the maximum. Can be realized in the state. By repeating this operation for 8 TS five times, the response time of memory access to the write commands COM1_1 to 80 (80 channels) can be guaranteed at 40TS.

[Read operation]
First, the user operates the terminal devices 3_1 to 80, and read commands COM1_1 to 1-80 corresponding to the operations are output to the computers P_1 to P_8 corresponding to the server 5.
Here, for example, paying attention to the processing related to the read commands COM1_1 and 2 for two channels, the computer P_1 performs the operation shown in FIG. 11 with reference to the jumbo slot JS shown in FIG. 10 defined for the computer P_1.
On the other hand, the distribution circuits 22_1 to 22_8 of the upstream distribution device 12 perform the operation shown in FIG. 17 with the jumbo slot JS as a reference.
As a result, the read operation for RAID_A1 to A4 and V1 to V32 is performed for the read instructions COM1_1 and 2 for two channels, and the status data STATUS is output to the computer P_1.
Similarly, the computers P_2 to 8 perform the above-described reading operation of the computer P_1 with reference to the jumbo slot JS shifted by 1 TS. As a result, the read operation for 16 channels (= 2 × 8) related to the computers P_1 to 8 in 8 TS in total does not compete, and the access allowance for RAID_A1 to A4 and V1 to V32 is used to the maximum. Can be realized in the state. By repeating the operation for 8 TS five times, the response time of memory access to the read commands COM1_1 to 80 (80 channels) can be guaranteed at 40TS.

As described above, according to the server system 1, access to RAID_A1 to A4 and V1 to V32 is continuously performed according to the write command and the read command from the 80 terminal devices 3_1 to 80. RAID_A1 to A4 and V1 to V32 can be accessed efficiently.
In addition, according to the server system 1, the access operation to the RAID_A1 to A4 and V1 to V32 is always performed once in 40TS for each of the write command and the read command from the 80 terminal devices 3_1 to 80, A response time of 40 TS can be guaranteed.
In addition, according to the server system 1, by accessing data for two channels with 1 TS to RAID_A1 to A4 and V1 to V32, one round of 40 TS can be realized with respect to 80 channels.
In this case, by separating RAID_A1 to A4 and RAID_V1 to V32, the number of seeks in one TS is reduced compared to the case of using a mixed AV RAID, and RAID_A1 to A4 and V1 to V32 are included in one TS. On the other hand, it is possible to access two channels.
That is, the server system 1 is a large-scale system of 80 channels, and even when each channel handles data at a very high rate of HDCAM, all the channels store data stored in RAID_A1 to A4 and V1 to V32. Can be output without disturbance in 40TS without blocking even if accessed at the same time.

  Further, according to the server system 1, when the write data WD is transmitted from the computers P_1 to P8 to the downlink distribution device 11, the audio is transmitted within the data transmission period DT of each TS, as described with reference to FIG. Data A and video data V are arranged alternately. As a result, the processing circuit 51 of the distribution circuit 21_1 of the downlink distribution device 11 shown in FIG. By switching (frame data) in the order of input, video data and audio data can be efficiently separated and written to the memories 52A and 52V.

  Further, according to the server system 1, for example, as shown in FIG. 3, the number of distribution circuits 21_1 to 8 and 22_1 to 8 corresponding to the number of the computers P_1 to 8 are provided, and each of the downstream and upstream of the computers P_1 to 8 is provided. By using 8 ports and all 2 ports of RAID_A1 to A4 and V1 to V32, and connecting the downlink distribution device 11 and the upstream distribution device 12 to RAID_A1 to A4 and V1 to V32 as shown in FIG. The amount of data that can be written in 1 TS in RAID_A1 to A4, V1 to V32 can be transmitted in 8TS between each of the computers P_1 to P8 to the downstream distribution device 11 and the upstream distribution device 12.

Further, according to the server system 1, the memory capacity of the memories 52A and 52V can be reduced by outputting data input from the computers P_1 to 8 in 8TS to the RAID in the next 1TS in the distribution circuit 21_1 shown in FIG.
Similarly, in the distribution circuit 22_1 shown in FIG. 15, the data input from the RAID in 1 TS is output from the next 1 TS to the computers P_1 to 8 in a total of 8 TS, thereby reducing the memory capacity of the memories 62A and 62V.

Further, according to the server system 1, as shown in FIG. 7, the computers P_1-8 transfer the write data WD to the downstream distribution device 11 over 8TS, and then write the first 1TS in the next jumbo slot JS. The command COM2 is output to the downstream distribution device 11.
Further, the downlink distribution device 11 outputs the write command COM3 obtained from the write command COM2 input from the computers P_1 to P8 to the RAID_A1 to A4, V1 to V32 by the TS to which the write command COM2 is input, and RAID_A1 to A4. The status data STATUS from V1 to V32 is output to the computers P_1 to P-8 at the TS to which the status data STATUS is input. As a result, the computers P_1 to P_8 can make the time from the output of the write command COM2 until the status data STATUS is obtained the same as the time from the output of the read command COM2 until the status data STATUS is obtained. Can be constructed efficiently.

The present invention is not limited to the embodiment described above.
In the above-described embodiment, the case of 80 channels (80 terminal devices 3) is illustrated, but the present invention can be applied to other channel numbers, for example, 96 channels, 40 channels, 48 channels, and the like. . In the above-described embodiment, the case where the frame data is HD (High Definition) is illustrated, but the present invention can be applied to the case of SD (Standard Definition).
In that case, based on the number of channels, HD / SD, and the amount of access per TS of RAID, the number of computers P, the distribution device for downlink 11, the distribution device for uplink 12 and the RAID, and jumbo Determine slot JS.

  The present invention is applicable to a data processing system that accesses a storage device with respect to frame data including video data and audio data.

FIG. 1 is an overall configuration diagram of a server system 1 according to an embodiment of the present invention. FIG. 2 is a configuration diagram of the server 5 shown in FIG. FIG. 3 is a diagram for explaining a connection relationship between the downlink distribution device shown in FIG. 2, the computer, and the RAID. FIG. 4 is a diagram for explaining a connection relationship between the upstream distribution device shown in FIG. 2 and the computer and RAID. FIG. 5 is a block diagram of the computer shown in FIGS. FIG. 6 is a diagram for explaining an instruction COM2 issued by the computer. FIG. 7 is a diagram for explaining an operation example when the computer outputs a write command to the downlink distribution device. FIG. 8 is a diagram for explaining data that flows in 1 TS between the computer, the downlink distribution device, and the uplink distribution device. FIG. 9 is a flowchart for explaining the writing operation of the computer. FIG. 10 is a diagram for explaining an operation example when the computer outputs the read command COM2 to the upstream distribution device. FIG. 11 is a flowchart for explaining the reading operation of the computer. FIG. 12 is a block diagram of the distribution circuit shown in FIG. FIG. 13 is a diagram for explaining the write timing from the downlink distribution device to the RAID. FIG. 14 is a diagram for explaining the operation of the distribution circuit shown in FIG. FIG. 15 is a block diagram of the distribution circuit shown in FIG. FIG. 16 is a diagram for explaining the read timing from the RAID by the upstream distributor. FIG. 17 is a diagram for explaining the operation of the distribution circuit shown in FIG.

Explanation of symbols

3_1 to 80 ... terminal device, 5 ... server, P_1 to 8 ... computer, 11 ... downstream distribution device, 12 ... upstream distribution device, 15_1-8 ... processing circuit, 21_1-8 ... distribution circuit, 22_1-8 ... distribution Circuit, 51 ... Processing circuit, 52 ... Memory, 61 ... Processing circuit, 62 ... Memory

Claims (11)

Outputs a write command of a plurality of frame data, a plurality of first processing unit for outputting alternately the video data and audio data in the plurality of frame data to be written,
The plurality of first processing devices are connected to the input side by the same number of ports as the number of the plurality of first processing devices, and the plurality of video recording devices are provided by the same number of ports as the number of the plurality of video recording devices. Are connected to the output side, and the plurality of audio recording devices are connected to the output side by the same number of ports as the number of the plurality of audio recording devices,
Video storage means for storing video data;
Audio storage means for storing audio data;
Of the video data and the audio data output alternately by the first processing device over a first time, the video data is selected and written to the video storage means, and the audio data is selected. Write into the audio storage means,
Based on the write command output by the plurality of first processing devices, the video data written to the video storage means and the audio data written to the audio recording means ,
Selecting the video data at a second time shorter than the first time and outputting the selected video data to the plurality of video storage devices using all the same number of ports as the number of the plurality of video recording devices; Select and output data to the plurality of audio storage devices using all of the same number of ports as the number of the plurality of audio recording devices; and
The input of a predetermined number of frame data from the plurality of first processing devices is performed by shifting the completion timing of the input by the second time between the plurality of first processing devices. Do in time,
Processing means for controlling writing to and reading from the video storage means and the audio storage means;
A second processing device having
A data processing system for writing a plurality of frame data each including video data and audio data to a storage device in response to a write command. The first time the second time N (N is an integer of 2 or more) times, for each of the N second time, the data transmission for transmitting commands transmission period and the data output instruction When a period is specified,
The first processing device outputs the write command to the second processing device in the command transmission period, and outputs the predetermined number of frame data in the N data transmission periods in the first time. The data processing system according to claim 1 , wherein the data processing system outputs the second processing apparatus. The first processing device outputs the predetermined number of frame data to the second processing device in the data transmission period so that a break in the data transmission period coincides with a break in the frame data. 2. The data processing system according to 2. The first processing unit, wherein the N data transmission period, according to claim 3, time is output from the previous data transmission period to the predetermined number of frame data and the second processing unit to place the order Data processing system. When the second processing device outputs the video data to a plurality of video storage devices that store video data corresponding to the audio data stored in the audio storage device,
The first processing device outputs the write command including specific information specifying one or more video storage devices to which the frame data is written, to the second processing device,
The data processing system according to claim 1, wherein the second processing device outputs the audio data to the audio storage device based on the specific information included in the write command. A plurality of first processing devices output a write command for the plurality of frame data, and alternately output video data and audio data in the plurality of frame data to be written over a first time . 1 process,
Video storage means for storing video data;
Audio storage means for storing audio data;
Processing means for controlling writing to and reading from the video storage means and the audio storage means;
Have
The plurality of first processing devices are connected to the input side by the same number of ports as the number of the plurality of first processing devices, and the plurality of video recording devices are provided by the same number of ports as the number of the plurality of video recording devices. Is connected to the output side, and the second processing device is connected to the output side by the same number of ports as the number of the plurality of audio recording devices .
Based on the write command output by the first processing device in the first step, the video data and the audio data output alternately by the first processing device over a first time Selecting and writing the video data to the video storage means; and selecting and writing the audio data to the audio storage means;
It said video storage means written the video data and one of the audio data written to the audio recording device, the first of the second time shorter than the time, the plurality of selecting the video data The same number of ports as the number of the plurality of video recording devices are output to the video storage device, and the audio data is selected and the same number as the number of the plurality of audio recording devices is selected in the plurality of audio storage devices . The output is performed using all of the ports, and the input of a predetermined number of frame data from the plurality of first processing devices is performed between the plurality of first processing devices at the timing when the input is completed. A second step performed at the first time by shifting the second time ;
A data processing method for writing a plurality of frame data each including video data and audio data to a storage device in response to a write command.

Enter a write instruction from the plurality of the first processing device, the plurality of first process of alternately input video data and audio data in the plurality of frame data to be written over the first time The same number of first interfaces as the number of devices ;
A second interface equal in number to the plurality of video recording devices for outputting video data to a plurality of video storage devices;
The same number of third interfaces as the number of the plurality of audio recording devices that output audio data to a plurality of audio storage devices;
Video storage means for storing video data;
Audio storage means for storing audio data;
Of the video data and the audio data input alternately via the first interface over a first time, the video data is selected and written to the video storage means, and the audio data is selected. Write to the audio storage means,
The video data read from the video storage means at a second time shorter than the first time is output to the video storage device via all of the second interface , and the video data read from the audio storage means Audio data is output to the audio storage device via all of the third interface , and the input of a predetermined number of frame data from the plurality of first processing devices is completed when the input is completed. Processing means for performing the first time by shifting the second time between a plurality of first processing devices ;
A data processing device for writing a plurality of frame data each including video data and audio data to a storage device in response to a write command. A plurality of first processing devices for outputting a frame data read command;
The plurality of first recording devices are connected to the output side by the same number of ports as the number of the plurality of first processing devices, and the plurality of video recording devices are connected by the same number of ports as the number of the plurality of video recording devices. Connected to the input side, and the plurality of audio recording devices are connected to the input side by the same number of ports as the number of the plurality of audio recording devices,
Video storage means for storing video data;
Audio storage means for storing audio data;
Based on the read command output from the first processing device, the video data of the frame data from the plurality of video storage devices is equal to the number of the plurality of video recording devices over a first time. The operation of reading out using all of the ports of the plurality of audio data and the operation of reading out the audio data of the frame data from the plurality of audio storage devices using all of the same number of ports as the number of the plurality of audio recording devices And do
Of the read video data and audio data, the video data is selected and written to the video storage means, the audio data is selected and written to the audio storage means,
The frame data is generated by combining the video data written in the video storage means and the audio data written in the audio recording means, and the frame is generated at a second time longer than the first time. The data is output to the first processing device, and a predetermined number of frame data is output to the plurality of first processing devices, and the timing of completion of the output is determined between the plurality of first processing devices. Processing means for controlling writing to and reading from the video storage means and the audio storage means performed at the second time by shifting the first time between
A second processing device having
A data processing system for reading out frame data including video data and audio data from a storage device in response to a read command. When the second processing device outputs the video data to a plurality of video storage devices that store video data corresponding to the audio data stored in the audio storage device,
The first processing device outputs the read command including specific information specifying one or more video storage devices to which the frame data is written, to the second processing device,
The data processing system according to claim 8 , wherein the second processing device inputs the audio data from the audio storage device based on the specific information included in the read command. Based on the read command of the frame data from the plurality of first processing devices, the frame data is transferred from the same number of ports as the number of the plurality of video recording devices of the plurality of video storage devices over a first time . A first step of performing in parallel an operation of reading video data and an operation of reading audio data of the frame data from the same number of ports of the plurality of audio recording devices of a plurality of audio storage devices;
Of the video data and the audio data read in parallel in the first step, the video data is selected and written to the video storage means, the audio data is selected and written to the audio storage means, A second step of performing
A third step of generating the frame data by combining the writing and the video data performed the audio data in the second step
The frame data generated in the third step is output to the first processing device at a second time longer than the first time , and predetermined to the plurality of first processing devices. A fourth step of outputting a plurality of frame data at the second time by shifting the completion timing of the output by the first time between the plurality of first processing devices;
A data processing method in which a data processing device reads frame data including video data and audio data from a storage device in response to a read command including: The same number of first interfaces as the number of the plurality of first processing devices that input the frame data read command from the plurality of first processing devices ;
The same number of second interfaces as the number of the plurality of video recording devices for inputting video data from a plurality of video storage devices;
As many third interfaces as the number of the plurality of audio recording devices for inputting audio data from a plurality of audio storage devices;
Based on the read command input through the first interface, the video data of the frame data is read from the plurality of video storage devices through all of the second interfaces over a first time. A read operation and an operation of reading the audio data of the frame data from the plurality of audio storage devices through all of the third interface are performed in parallel.
Of the read video data and audio data, the video data is selected and written to the video storage means, the audio data is selected and written to the audio storage means,
In conjunction with the written the video data and the audio data to generate the frame data, at a second time longer than the first time, and outputs the frame data via the first interface And outputting a predetermined number of frame data to the plurality of first interfaces by shifting the timing at which the output is completed between the plurality of first processing devices by the first time, Processing means to perform in the second time ;
A data processing device for reading out frame data including video data and audio data from a storage device in response to a read command .

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