JP4132564B2 - Image input / output device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image input / output device, for example, an image input / output device applied to an image processing device such as a copying machine or a printer.
[0002]
[Prior art]
Conventionally, an image input / output device generally requires a buffer memory in order to absorb a time difference between drums in a system applied thereto. Therefore, for example, when a printer is configured by connecting a drawing device to this image output device, a large amount of memory is required in addition to the drawing memory on the drawing device.
[0003]
FIG. 17 shows a configuration example of a printer using a conventional image output method. In this conventional system, the engine unit (106) has an image memory (109). The image memory (109) has a memory capable of storing an image for one plane in order to absorb the physical distance between the drum units (110, 111, 112, 113).
[0004]
In the “image forming apparatus” disclosed in Japanese Patent Laid-Open No. 10-98595, an image is output while being converted from RBG to YMCK by a tandem color copier equipped with a compression / decompression unit.
[0005]
[Problems to be solved by the invention]
However, the conventional configuration requires a large amount of memory, which causes a problem of increasing costs.
[0006]
An object of the present invention is to provide an image input / output device that outputs an image without having a large amount of memory in the engine unit.
[0007]
[Means for Solving the Problems]
In order to achieve such an object, an image input / output device according to the present invention includes an image input device having image data storage means for storing input image data for each color, and a plurality of colors arranged along a paper conveyance path. And an image output device that sequentially conveys paper to the plurality of recording devices and forms an image by sequentially superimposing image data output from the image input device on the paper. The input / output device, the image input device includes a plurality of first buffer memories for storing the image data stored in the image data storage means for each color, and the image output device includes a plurality of image data at a predetermined timing. first accesses the buffer memory, the image data reading means for reading the image data stored in the first buffer memory accessed, the image read by the image data reading means A plurality of second buffer memory over data is stored for each color, when receiving an instruction of the image forming of the input image data, the image input device, image data stored in the image data storage unit Is read for each color and stored for each color in a plurality of first buffer memories. When the sheet passes a predetermined position on the sheet conveyance path by the image data reading means , the image output device A predetermined first buffer memory of one buffer memory is accessed, image data of a predetermined color is read and stored in the second buffer memory, and the image data stored in the second buffer memory is converted into the color of the image data. Is output to the recording device at the timing when the image is formed, and the image input device outputs the first one of the plurality of first buffer memories that has been vacated by the reading of the image output device. Respect of the buffer memory, is characterized by filling newly read out from the image data storage means image data of a predetermined color.
[0008]
In the image input / output device according to the present invention , the image output device includes a decompressing unit that decompresses the compressed data when the image data read from the plurality of first buffer memories is the compressed data. Yes.
[0009]
Furthermore, in the image input / output device according to the present invention, when the image data read from the plurality of first buffer memories is compressed data that is ordered and compressed for each color, the decompression means compresses the compressed data according to the order. It is characterized by stretching .
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of an image input / output device according to the present invention will be described in detail with reference to the accompanying drawings. 1 to 16 show an embodiment of an image input / output device of the present invention.
[0011]
FIG. 1 shows a system configuration diagram of an embodiment of an image input / output device according to the present invention. In the present invention, the printer is configured so that a buffer memory for absorbing the time difference between the drums is not required even when combined with the drawing apparatus. In FIG. 1, the image input / output apparatus of this embodiment stores a printer drawing apparatus 201, an ASIC 202 of a printer drawing apparatus incorporating a memory controller, a CPU I / F, and the like, and a program for drawing by the drawing apparatus. ROM 203, CPU 204, memory 205, engine unit 206, ASIC 207 of the engine incorporating a memory controller, CPU I / F, etc., CPU 208 for mainly controlling the paper feed mechanism, drum unit 210 for outputting yellow, magenta A drum unit 211 for outputting cyan, a drum unit 212 for outputting cyan, and a drum unit 213 for outputting black.
[0012]
The drawing apparatus (201) includes a host I / F (214), a CPU (204), a ROM (203) for storing a program, a memory (205) used as a work area / stack / image memory of the system, ASIC (202) that generates these control signals.
[0013]
After the power is turned on, the CPU (204) issues a program read request to the ASIC (202). The ASIC (202) determines from the read request address that the read target is the ROM (203), reads the program code from the ROM (203), and passes it to the CPU (204). By repeating this, the CPU (204) executes the program on the ROM (203). When the initialization process is completed by the program, the CPU (204) waits for an instruction from the host I / F (214).
[0014]
The engine unit (206) includes a CPU (208) for controlling the entire unit, a drum unit (210) for outputting yellow, a drum unit (211) for outputting magenta, and a cyan unit for outputting cyan. It comprises a drum unit, a drum unit for outputting black, a drawing device (201), and an ASIC (207) for exchanging commands and data.
[0015]
When the power is turned on, the engine unit (206) is initialized by the CPU (208) and waits for initialization from the drawing apparatus (201). The engine unit (206) is initialized in the initialization process of the drawing apparatus (201). The CPU ( 204 ) of the drawing apparatus (201) secures a page frame as an image memory in the memory (205) upon receiving a drawing command using a bitmap or page description language from a host connected to the host I / F (214). And start drawing. FIG. 2 shows a detailed block diagram including the ASIC (202) of the drawing apparatus (201).
[0016]
ASIC (202) is written in detail as ASIC (313). The ASIC (313) includes a ROM I / F (311), a CPU I / F (314), an HDD I / F (305), a compression / decompression unit (304), an engine I / F (306), an arbiter (307), and a host I / F. F (310) and a memory controller (308). The ROM I / F (311) has a function of reading out necessary data from a ROM (312) in which a program is stored.
[0017]
The CPU I / F (314) has a function of converting a signal of the CPU (301) and transmitting a request to the ROM I / F (311) and the arbiter (307). The HDD I / F (305) is connected to the HDD (302) and has a function of writing and reading data to and from the memory (309) in accordance with parameters set by the CPU (301). The compression / decompression unit (304) compresses and encodes image data existing in the memory (309), writes the data to the HDD (302) via the memory (309) or the HDD I / F (305), and the memory (309). ) Or the code data stored in the HDD (302) is read out and decompressed, and written into the memory (309) or the engine I / F (306).
[0018]
The engine I / F (306) has a function of reading image data from the memory (309) or the compression / decompression unit (304) and passing it to the engine unit (303). The arbiter (307) has a function of arbitrating a device attempting to access the memory (309). The engine unit (303) and the ASIC (313) are connected by a PCI bus. The PCI bus is a general-purpose bus used in a PC.
[0019]
FIG. 3 shows a connection form of the HDD I / F (305), the compression / decompression unit (304), and the engine I / F (306). The DMAC (404) is connected to the selector (401) and manages DMA operations during reading and writing between the memory and the HDD.
[0020]
The DMAC (405) is an image output DMAC, reads image data from the memory, and passes it to the engine I / F (409). The DMAC (406) controls the DMA for reading the memory in order to pass the image data or code data stored in the memory to the compression / decompression unit (408).
[0021]
The DMAC (407) controls the DMA for writing the image data or code data output from the compression / decompression unit (408) to the memory. The compression / decompression unit (408) is connected to the selector (401) and can transfer the decompressed image to the engine I / F (409) or the compressed code data to the HDD I / F (402).
[0022]
The compression / decompression unit (408) can perform either expansion or compression. In the ASIC (313) of FIG. 2, there may be a plurality of compression / decompression machines (304). It is possible to provide two or four according to the processing speed of the system. FIG. 4 illustrates a data transfer time difference depending on a physical distance between drums in the engine unit.
[0023]
The drum unit (501) is a unit for outputting yellow, and passes paper first when transferring. The drum unit (502) is a unit for outputting magenta, and passes paper second when transferring. The drum unit (503) is a unit for outputting cyan, and passes the paper third when transferring. The drum unit (504) is a unit for outputting, and passes paper fourth when transferring. Here, the order is YMCK (yellow, magenta, cyan, black), but the order may be determined in any way.
[0024]
The yellow image transfer data (505) is data necessary for the drum unit (501). The magenta image transfer data (506) is data necessary for the drum unit (502). The cyan image transfer data (507) is data necessary for the drum unit (503).
[0025]
The black image transfer data (508) is data necessary for the drum unit (504). Ys (509) is a parameter representing the time difference between yellow and magenta, and the unit may be time, data amount, or the number of sub-scanning lines. Similarly, Ms (510) is a parameter representing the time difference between magenta and cyan, and Cs (511) is a parameter representing the time difference between cyan and black. FIG. 5 shows the relationship when the parameter is considered as the number of pixels.
[0026]
Ys (611) indicates the number of pixels in the yellow plane from the start of transfer of the yellow pixel (605) to the start of transfer of the magenta pixel (606). Ms (602) indicates the number of pixels of the magenta plane from the start of magenta pixel (606) transfer to the start of cyan pixel (607) transfer. Cs (604) indicates the number of pixels in the cyan plane from the start of cyan pixel (607) transfer to the start of black pixel (608) transfer. TLEN (603) indicates the number of pixels in one plane. The numbers assigned to the pixels indicate the necessary order.
[0027]
FIG. 6 shows the page sync timing of each drum unit. VCLK (701) is a synchronous clock signal. PSYNCY (702) is a signal indicating a page effective area when yellow is output. Similarly, PSYNCM (703) is a magenta signal, PSYNCC (704) is cyan, and PSYNCK (705) is a signal indicating a page effective area. As shown in the figure, the page effective area of each drum has a time difference.
[0028]
(Example 1)
Example 1 is shown in FIG. In order to output an image without having a plane memory on the engine unit side, each drum unit may read image data from the drawing device at a necessary timing. For this purpose, the engine unit has a DMAC. From the drawing device, when receiving a signal of drawing completion, CPU of the drawing apparatus, for the control registers of the DMAC of the engine unit (1001) (1002), indicating the address in the image. Four addresses are designated for each plane. Thereafter, the CPU of the drawing apparatus starts image output to the CPU (1015) of the engine unit.
[0029]
When the engine unit is activated, the CPU (1015) controls the mechanical control unit (1016) and starts to convey paper from the paper tray. When the original passes through a predetermined position, the DMAC (1001) first accesses the engine I / F of the drawing apparatus to read out yellow image data. The read yellow image is stored in the FIFO (1003), and the FIFO (1003) outputs data at a timing as shown in FIG.
[0030]
VCLK (1301) is a synchronous clock signal for image output, and all signals operate in synchronization therewith. PSYNCY (1302) is a page sync signal, which is the start timing of the top of the page for irradiating the drum with a laser beam. While PSYNCY (1302) is asserted, the width of one page of sub-scanning is shown. When LSYNCY (1303) is further asserted within the effective range of PSYNCY (1302), the beam irradiation of the main scanning is started. Thereafter, yellow data DATAY (1304) is output.
[0031]
Timing a (1305) is an area that is effective as a page after PSYNCY (1302) is asserted. Timing b (1303) is a dummy clock, and VCLK (1301) is idled until main scanning becomes valid. In this example, it is one clock but it is actually more and depends on the system.
[0032]
Timing c (1307) indicates that main scanning has become effective after the page has become effective. Image data is output from the next clock. Actually, after the timing c (1307), there may be a dummy clock until image data is output. This is system dependent. At the timing shown in FIG. 12, yellow pixels are output. At this time, paper conveyance continues at the same time. After passing through a certain position, magenta image data is required next.
[0033]
The DMAC (1001) accesses the address where the magenta data is stored, and stores the data in the FIFO (1004). After that, magenta is output at the same timing as yellow. If the yellow FIFO (1003) is free, the DMAC (1001) takes the yellow image data and stores it in the FIFO (1003). At this time, the paper conveyance continues, and when the paper comes to a certain position, cyan image data is required. When the cyan image data is required, the DMAC (1001) accesses the address where the cyan image data is stored, takes the cyan image data, and stores it in the FIFO (1005). If the yellow FIFO (1003) and the magenta FIFO (1004) are free, image data is read out and stored in the FIFO.
[0034]
When the paper is at a certain position, black image data is required next. Similarly, black image data is read out and stored in the FIFO (1006). This is repeated to complete the image output.
[0035]
The operation of the drawing apparatus at this time will be described with reference to FIG. The drawing device (901) instructs the DMAC (903) to start the image data of each plane, and activates the DMAC (903). When activated, the DMAC (903) reads yellow image data and stores it in the FIFO (904). Next, when the magenta image data is read, it is stored in the FIFO (905). Next, when the cyan image data is read, it is stored in the FIFO (906). Next, when the black image data is read, it is stored in the FIFO (907). When the engine unit (902) is activated, the engine unit (902) accesses the FIFO (904, 905, 906, 907) and reads out the image data as necessary.
[0036]
The DMAC (903) of the drawing apparatus (901) fills the image data in order when each FIFO (904, 905, 906, 907) is free. This is repeated to output an image. The drawing apparatus and the engine unit are connected by PCI, and data transfer is performed according to a protocol as shown in FIG. Requests for each plane are processed in turn by the arbiter.
[0037]
FIG. 14 shows the state of arbitration. It is necessary to arbitrate four request sources internally and to have one request source on the PCI bus, but here, it is described that the four request sources share the PCI bus. Requests from each drum unit are REQY # (1502), REQM # (1504), REQC # (1506), and REQK # (1508), and requests are generated simultaneously. However, the bus use right is given to GNTY # (1503), GNTM # (1505), GNTC # (1507), and GNTK # (1509) in order without giving priority to any one. PCICLK (1501) is a clock of the PCI bus, and signals of the PCI bus basically transition in synchronization with this.
[0038]
(Example 2)
As shown in FIG. 8, the decompressor (910) is provided in the engine unit (902), and at the same time, the image data compressed for each plane is transferred from the DMAC (903) to the FIFO (904, 905, 906). 907), and decompressing on the engine unit side for each plane eliminates the decompressor on the drawing device (901) side, thereby reducing the cost. At the same time, the load on the PCI bus can be reduced and a higher-speed image output apparatus can be made.
[0039]
FIG. 10 shows the structure of the engine unit. When the DMAC (1101) is activated from the drawing apparatus, the DMAC (1101) first reads out the compressed code data of yellow and stores it in the FIFO (1103). The decompressor (1107) decompresses the code from the FIFO (1103) and stores the image data in the FIFO (1111). The image correction unit (1151) corrects and drives the LD driver (1119) when image data is extracted from the FIFO (1111) in which the image data is stored. Similarly, the DMAC (1101) takes out the code data and stores it in the FIFO (1104, 1105, 1106) in response to the request of each remaining plane, outputs the image by driving the decompression, correction, and LD driver. .
[0040]
(Example 3)
Since the YMCK image data is determined to be processed in a specific order in the system at the final output stage, if it is compressed in the order of the pixel numbers shown in FIG. Is possible. FIG. 16 shows the registers necessary for the drawing apparatus to do so.
[0041]
The memory width register (1701) is a parameter necessary for two-dimensional management of an image, and indicates a difference between a line and the head address of the next line. The address register Y (1702) indicates an address where yellow image data is stored. An address register M (1703) indicates an address where magenta image data is stored. An address register C (1704) indicates an address where cyan image data is stored. An address register K (1705) indicates an address where black image data is stored. The address register MEM (1706) is the start address of the buffer to which the compressed code is written back, and is not necessary for direct output. Necessary when storing in memory once.
[0042]
An offset register a (1707) is a register for designating a time difference in FIG. 5, and indicates a difference between yellow and magenta. The offset register b (1708) indicates the difference between magenta and cyan. The offset register c (1709) indicates the difference between cyan and black. The main scanning length register (1710) indicates the data amount of one line. A sub-scanning line number register (1711) indicates the number of lines of the page.
[0043]
FIG. 15 shows the necessary registers on the engine unit side. An offset register a (1601) is a register for designating a time difference in FIG. 5, and indicates a difference between yellow and magenta. The offset register b (1602) indicates the difference between magenta and cyan. The offset register c (1603) indicates the difference between cyan and black. The main scanning length register (1604) indicates the data amount of one line. A sub-scanning line number register (1605) indicates the number of lines of the page. The address register (1606) sets an address where data compressed by this method is present. It is necessary to set the same value for the parameters on the drawing apparatus side and the engine unit side.
[0044]
FIG. 11 shows the configuration. Basically, it is the same as FIG. 10, but the code data read out by the DMAC (1201) does not need to be divided, so only one FIFO (1203) is required.
[0045]
Example 4
The fourth embodiment is a system in which, in the third embodiment, the value of the offset register is the data amount (number of bytes).
[0046]
(Example 5)
The fifth embodiment is a system in which the value of the offset register in the third embodiment is set to the number of sub-scanning lines.
[0047]
【The invention's effect】
As is apparent from the above description, the image input / output apparatus of the present invention transfers data via a FIFO in synchronization with the drum, so that output is possible without having a page memory on the engine side.
[0048]
Since the image input / output device of the present invention has a compression / decompression unit and can output the compressed data, the memory of the drawing device, FAX device, or image input device can be used effectively.
[0049]
Since the image input / output device of the present invention absorbs the time difference in the order of compression, it is not necessary to consider the time difference, and the page memory on the engine unit side can be eliminated.
[Brief description of the drawings]
FIG. 1 is a system configuration diagram of an embodiment of an image input / output device according to the present invention.
FIG. 2 shows a detailed block diagram including the ASIC (202) of the drawing device (201).
FIG. 3 shows a connection form of an HDD I / F (305), a compression / decompression unit (304), and an engine I / F (306).
FIG. 4 is a diagram for explaining a time difference in data transfer depending on a physical distance between drums in an engine unit.
FIG. 5 shows a relationship when a parameter is considered as the number of pixels.
FIG. 6 shows page sync timing of each drum unit.
FIG. 7 is a configuration diagram of an embodiment of this method.
FIG. 8 shows the operation of the drawing apparatus.
9 shows Example 1. FIG.
FIG. 10 shows the structure of an engine unit.
FIG. 11 shows the structure of an engine unit.
FIG. 12 shows data output timing.
FIG. 13 shows a data transfer protocol.
FIG. 14 shows the state of arbitration.
FIG. 15 shows necessary registers on the engine unit side.
FIG. 16 shows registers necessary for the drawing apparatus.
FIG. 17 illustrates a configuration example of a printer using a conventional image output method.
[Explanation of symbols]
201 Printer Drawing Device 202 Printer Drawing Device ASIC
203 ROM
204, 301 CPU
205 Memory 206 Engine unit 207 Engine ASIC
208 CPU
210, 211, 212, 213 Drum unit 302, 403 HDD
303 Engine unit 304 Compression / decompression unit 305, 402 HDD I / F
306 Engine interface 307 Memory bus arbiter 308 Memory controller 309 Image memory 310 Host I / F
311 ROMI / F
312 ROM where the program is stored
313 ASIC
401 Selector 404 DMAC for HDD
405 DMAC for engine output
406 DMAC for compression decompressor input
407 Output DMAC for compression / decompression
408 Compression / decompression machine 409 Engine I / F
501, 502, 503, 504 Drum unit 505, 506, 507, 508 Transfer data 509, 510, 511 Transfer start time difference 601, 602 Transfer start time difference or data amount difference 603 1 plane transfer time or data amount 604 Time difference between cyan transfer start time and black transfer start time or data amount difference 605, 606, 607, 608 Image data 701 Clock 702, 703, 704, 705 for transferring image data Page sync signal 801 Drawing device (controller) )
802 DMAC for image output
803, 805, 807, 808, 809, 810 Buffer FIFO
804 DMAC for image reading
806 Expander 811 Engine unit 901 Drawing device (controller)
902 Engine unit 903 Image output DMAC
904, 905, 906, 907 FIFO
908 DMAC for image readout
909 Buffer FIFO
910 Extender 911, 912, 913, 914 FIFO
1001 DMAC for image reading
1002 Image reading DMAC and parameter setting registers 1003, 1004, 1005, 1006 FIFO
1007, 1008, 1009, 1010 Image correction unit 1011, 1012, 1013, 1014 Laser diode driver 1015 CPU for engine unit control
1016 Mechanical control unit 1101 DMAC for image reading
1102 Image reading DMAC and parameter setting registers 1103, 1104, 1105, 1106 FIFO
1107, 1108, 1109, 1110 Decompressor 1111, 1112, 1113, 1114 FIFO
1115, 1116, 1117, 1118 Image correction unit 1119, 1120, 1121, 1122 Laser diode driver 1201 DMAC for image reading
1202 Image reading DMAC and parameter setting register 1203 Image reading buffer FIFO
1204 Decompressor 1205, 1206, 1207, 1208 Image output buffer FIFO
1209, 1210, 1211, 1212 Image correction units 1213, 1214, 1215, 1216 Laser diode driver 1301 Video clock signal 1302 Page sync signal 1303 Line sync signal 1304 Yellow image data 1305 Page sync assert detection timing 1306 Dummy clock 1307 Line sync assert Detection timing 1401 Synchronous clock 1402 Bus request 1403 Bus grant 1404 Frame signal 1405 indicating access Command / byte enable signal 1406 Address / data signal 1407 Device select signal 1408 Initiator ready signal 1409 Target ready signal 1410 Bus acquisition timing 1411 Access start timing 1412 Dummy Clock 1501 Synchronous clock 1502, 1503, 1504, 1506 Bus request 1507, 1508, 1509 Bus grant 101 Printer drawing device 102 Printer drawing device ASIC
103 ROM
104, 108 CPU
105, 109 Memory 106 Engine unit 107 Engine ASIC
110, 111, 112, 113 drum unit

Claims (3)

An image input device having image data storage means for storing input image data for each color;
A plurality of recording means corresponding to a plurality of colors are arranged along the paper conveyance path, and the image data output from the image input device by sequentially conveying the paper to the plurality of recording means is placed on the paper. An image input / output device comprising: an image output device that forms images one after the other,
The image input device includes:
A plurality of first buffer memories for storing the image data stored in the image data storage means for each color;
The image output device includes:
Image data reading means for accessing the plurality of first buffer memories at a predetermined timing and reading image data stored in the accessed first buffer memory;
A plurality of second buffer memory in which the image data read by the image data reading means is stored for each color,
When receiving an instruction to form an image of the input image data,
The image input device reads the image data stored in the image data storage unit for each color, stores the data in the plurality of first buffer memories for each color,
The image output apparatus, by the image data reading means, when said sheet passes through a predetermined position on the paper transport path, to access the predetermined first buffer memory of the plurality of first buffer memory The image data of a predetermined color is read and stored in the second buffer memory, and the image data stored in the second buffer memory is recorded at a timing when the recording apparatus corresponding to the color of the image data forms an image. Output to the device,
The image input device newly sends image data of a predetermined color from the image data storage means to the first buffer memory that is freed by reading of the image output device among the plurality of first buffer memories. An image input / output device characterized by being read and filled. The image output device includes:
2. The image input / output apparatus according to claim 1, further comprising decompression means for decompressing the compressed data when the image data read from the plurality of first buffer memories is compressed data . When the image data read from the plurality of first buffer memories is compressed data that is ordered and compressed for each color, the decompressing means decompresses the compressed data according to the order. The image input / output device according to claim 2 .

Images