JP4122978B2 - Booster circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a charge pump type booster circuit.
[0002]
[Prior art]
The charge pump circuit switches the connection state of capacitors provided in a plurality of stages via diodes, for example, at a frequency of about 100 kHz, thereby charging the capacitor and transferring the charge to the next-stage capacitor. The pressure is increased sequentially. The steep charge / discharge current flowing through the capacitor during the boosting operation is discharged to the outside as noise through the voltage input terminal of the charge pump circuit.
[0003]
One means for reducing this noise is disclosed in Patent Document 1. This booster circuit includes a charge / discharge circuit and an auxiliary charge / discharge circuit. When the booster circuit is started, the charge / discharge circuit and the auxiliary charge / discharge circuit are operated in parallel to increase the drive capability of the drive circuit (gate circuit). In the steady state where a large drive capacity is not required, the charge time of the capacitor is shortened. On the other hand, by operating the charge / discharge circuit independently, the drive capacity is reduced compared to the start-up, reducing power consumption loss and noise. is doing. That is, this means is intended to reduce noise while ensuring the starting ability.
[0004]
[Patent Document 1]
JP 2001-69747 A
[0005]
[Problems to be solved by the invention]
By the way, when the charge pump circuit is used in an in-vehicle electronic control device, there is a situation that the input voltage of the charge pump circuit greatly varies depending on the battery voltage. In this case, even when the battery voltage reaches the minimum input voltage (for example, 4.5 V) for guaranteeing operation in a state where a predetermined load is connected to the charge pump circuit, the charge pump circuit has a predetermined voltage value. A boosted voltage of 12V or more (for example, 12V) must be output.
[0006]
Since the conventional charge pump circuit is designed assuming such a condition that it is difficult to boost, the boosting capability becomes excessive when the battery voltage is within a standard range (for example, about 12V), and noise generated There is a problem that increases. In particular, when the charge pump circuit is used in an on-vehicle electronic control device, the noise becomes a more serious problem because it becomes radio noise in the AM band.
[0007]
Therefore, conventionally, noise emission is suppressed by inserting a filter including a reactor and a capacitor in the input power supply line of the charge pump circuit. However, in order to effectively block noise, a large inductance and electrostatic capacity are required, so that the size of electronic components constituting the filter is increased, resulting in a mounting problem.
[0008]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a booster circuit capable of obtaining a predetermined boosted voltage regardless of fluctuations in input voltage and reducing generated noise without adding a noise filter. It is to provide.
[0009]
[Means for Solving the Problems]
According to the means described in claim 1, the first voltage and the second voltage are alternately applied to the other terminal of each capacitor connected to the common connection point between the diodes. Are sequentially charged and transferred to the next-stage capacitor, and boosted by a charge pump system. In this case, the drive circuit has a maximum drive capability capable of boosting to a predetermined voltage or higher even when the voltage at the voltage input terminal is a predetermined minimum input voltage with a predetermined load connected to the voltage output terminal. I have. For this reason, even if the input voltage fluctuates, a predetermined boosted voltage can be obtained as long as the input voltage decreases to the minimum input voltage.
[0010]
  The drive capability adjusting means reduces the drive capability of the drive circuit as the input voltage detected by the voltage detection circuit is higher.This reduces the AM band radio noise when the battery voltage applied to the voltage input terminal is high.Therefore, even if the input voltage is higher than the minimum input voltage, it is possible to prevent the drive circuit from being excessively driven.AM band radioThe amount of noise generation can be reduced. This means occurredAM band radioRather than removing noiseAM band radioIt suppresses the generation of noise itself, and there is no need to add a filter as used conventionally.Since the booster circuit is used in an electronic control device mounted on a vehicle, the user can listen to the radio sound with a clear sound.
[0011]
According to the means described in claim 2, the drive capability adjusting means lowers the switching frequency when switching the connection state of the other terminals of the capacitors as the detection voltage is higher. When the switching frequency is lowered, the drive capability of the drive circuit is suppressed and the amount of noise is reduced. In addition, the harmonic components of the noise are shifted to the lower frequency side as a whole. This can be shifted from the AM band, and a radio noise can be greatly reduced in an in-vehicle electronic control device or the like.
[0012]
According to the means described in claim 3, the drive capacity adjusting means has an advantage that it is easy to configure as a digital circuit because the switching frequency is lowered stepwise as the detection voltage increases.
[0013]
According to the means described in claim 4, the driving ability adjusting means adjusts the switching frequency in two steps according to whether or not the detected input voltage is equal to or higher than a predetermined threshold value. According to this means, the circuit configuration of the drive capacity adjusting means becomes relatively simple, and additional application to the conventional booster circuit becomes easy.
[0014]
According to the means described in claim 5, since the driving capacity adjusting means continuously adjusts the switching frequency according to the detected voltage, the driving capacity of the driving circuit is always adjusted to the minimum necessary regardless of the input voltage. It becomes possible.
[0015]
According to the means described in claim 6,By alternately applying the first voltage and the second voltage to the other terminal of each capacitor connected to the common connection point between the diodes, the charge to each capacitor is charged and the capacitor to the next stage capacitor is charged. Charge transfer is sequentially performed, and boosting by a charge pump method is performed. In this case, the drive circuit has a maximum drive capability capable of boosting to a predetermined voltage or higher even when the voltage at the voltage input terminal is a predetermined minimum input voltage with a predetermined load connected to the voltage output terminal. I have. For this reason, even if the input voltage fluctuates, a predetermined boosted voltage can be obtained as long as the input voltage decreases to the minimum input voltage.
The drive capability adjusting means lowers the drive capability of the drive circuit as the input voltage detected by the voltage detection circuit is higher, so that the drive capability of the drive circuit is maintained even when the input voltage becomes higher than the minimum input voltage. It can be prevented from becoming excessive, and the amount of noise generated from the booster circuit can be reduced. This means does not remove the generated noise but suppresses the generation of noise itself, and it is not necessary to add a filter as used conventionally.
  The first and second voltages applied to the other terminal of each capacitor via a pair of FETs are an input voltage and a ground voltage, respectively. In this case, since the FETs have the same conductivity type (for example, N channel type), a gate voltage higher than the threshold voltage of the FET is required to turn on the FET on the voltage input terminal side. In this means, since the boosted voltage generated by the booster circuit itself is used as the gate voltage, it is not necessary to provide a separate booster circuit, and the circuit configuration can be simplified.
[0016]
According to the means described in claim 7, the number of diodes interposed in the charging path from the voltage input terminal to each capacitor can be substantially reduced, and the initial charging of each capacitor by the input voltage before the start of boosting. The voltage can be increased. As a result, at the start of boosting, a higher gate voltage can be applied to the FET on the voltage input terminal side, so that the FET can be turned on / off, and hence the boosting operation of the booster circuit can be performed from a lower input voltage. become.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.
FIG. 1 shows the electrical configuration of the charge pump circuit. This charge pump circuit 1 (corresponding to a booster circuit) is used for generating a gate voltage of an N-channel MOS transistor M1 functioning as a high-side switch, for example, in an electronic control device mounted on a vehicle. The circuit portion of the charge pump circuit 1 excluding capacitors C1 to C4 described later is configured as a part of a control IC (not shown).
[0018]
A battery voltage VB is applied to an input terminal 2 (corresponding to a voltage input terminal) and an input terminal 3 of the charge pump circuit 1 from a positive terminal and a negative terminal of a battery (not shown) via an ignition switch or the like. . The nominal voltage of the battery voltage VB, which is this input voltage, is 12 V, but it varies greatly depending on the battery usage period, usage condition, vehicle condition, and the like.
[0019]
The gate of the transistor M1 is connected to the output terminal 4 (corresponding to a voltage output terminal) of the charge pump circuit 1. A battery voltage VB is applied to the drain of the transistor M 1, and a solenoid 6 is connected between the source and the output terminal 5. In FIG. 1, only one transistor M1 is shown as the load of the charge pump circuit 1, but in reality, the gates of a plurality of N-channel MOS transistors are connected.
[0020]
Even if the input voltage (battery voltage VB) drops to 4.5 V which is the minimum input voltage in a state where the transistor M1 as a load is connected to the output terminal 4, the charge pump circuit 1 has a predetermined voltage, for example, It has the maximum capability to output an output voltage (boost voltage Vo) close to (VB + 8V).
[0021]
Now, between the input terminal 2 and the output terminal 4, diodes D1, D2, D3, and D4 are connected in series with the input terminal 2 side as an anode. If the common connection point between the diodes D1 and D2, the common connection point between the diodes D2 and D3, and the common connection point between the diodes D3 and D4 are nodes Na, Nb, and Nc, respectively, the input terminal 2 and the node Nb Between the input terminal 2 and the node Nc, diodes D5 and D6 are connected with the input terminal 2 side as an anode, respectively. The nodes Na, Nb, and Nc are connected to one terminals of capacitors C1, C2, and C3, respectively, and a predetermined voltage is applied to the other terminals of the capacitors C1, C2, and C3 by the drive circuit 7. It has become. A smoothing capacitor C4 is connected between the output terminals 4 and 5.
[0022]
The drive circuit 7 is configured as follows. That is, N-channel MOS transistors M2 and M3 and M4 and M5 are connected in series between the power supply line 8 connected to the input terminal 2 and the power supply line 9 (ground line) connected to the input terminal 3, respectively. A node Nd, which is a common connection point between the source of the transistor M2 and the drain of the transistor M3, is connected to the other terminals of the capacitors C1 and C3, and is a common connection point between the source of the transistor M4 and the drain of the transistor M5. A certain node Ne is connected to the other terminal of the capacitor C2.
[0023]
An N-channel MOS transistor M6 is connected between the gate of the transistor M2 and the power supply line 9, and the gate of the transistor M2 is connected to the node Nb via a resistor R1. Similarly, an N-channel MOS transistor M7 is connected between the gate of the transistor M4 and the power supply line 9, and the gate of the transistor M4 is connected to the node Nc via a resistor R2. Here, the drive circuit 7a is constituted by the transistors M2, M3, M6 and the resistor R1, and the drive circuit 7b is constituted by the transistors M4, M5, M7 and the resistor R2.
[0024]
The gates of the transistors M3 and M6 are connected in common, and a gate signal g1 is given from an oscillation circuit 10 described later. Similarly, the gates of the transistors M5 and M7 are also connected in common, and a gate signal g2 obtained by inverting the gate signal g1 by the inverter 11 is given. Transistors M2 to M7 (corresponding to switching elements) used in the drive circuit 7 are power MOSFETs having a high breakdown voltage.
[0025]
The voltage detection circuit 12 is a circuit that outputs a detection voltage Vb obtained by dividing the input voltage (battery voltage VB) between the input terminals 2 and 3. The oscillation circuit 10 (corresponding to drive capability adjusting means) switches the frequency of the gate signal g1 in two steps based on the detection voltage Vb, and specifically has an electrical configuration shown in FIG. That is, the comparator 13 compares the switching reference voltage Va (corresponding to the threshold value) obtained by dividing the reference voltage Vref with the resistors R3 and R4 with the detection voltage Vb. Is configured to output a gate signal g1 obtained by dividing the clock output from the CR oscillation circuit 14 in accordance with the output voltage level of the comparator 13.
[0026]
Since the charge pump circuit 1 uses open loop control for the boosted voltage Vo, the boosted voltage Vo may be excessive. Therefore, a clamp circuit 16 composed of a series circuit of an 8V Zener diode D7, a diode D8, and a resistor R5 is connected between the power supply line 8 and the output terminal 4.
[0027]
Next, the operation of this embodiment will be described.
First, the basic operation of the charge pump circuit 1 will be described. When a battery voltage VB is applied between the input terminals 2 and 3 by turning on an ignition switch (not shown) of the vehicle or the like, initial charges are charged in the capacitors C1 to C4. At this time, the capacitor C1 is charged via the diode D1, the capacitor C2 is charged via the diode D5, and the capacitor C3 is charged via the diode D6. That is, by providing the diodes D5 and D6, the voltage of the capacitor C2 (the voltage of the node Nb) and the voltage of the capacitor C3 (the voltage of the node Nc) are both VB−Vf (Vf: forward voltage of the diode). An initial voltage higher by Vf or 2 · Vf can be obtained than in the conventional configuration in which D5 and D6 are not provided.
[0028]
In this embodiment, since the voltages of the nodes Nb and Nc are used as the gate voltages of the transistors M2 and M4, respectively, a higher gate voltage is secured at the start of boosting, and the battery voltage VB is set to the minimum input voltage (4 .5V), the transistors M2 and M4 are devised so as to be surely turned on.
[0029]
In the drive circuit 7, the transistors M2, M3, M6 driven by the gate signal g1 and the transistors M4, M5, M7 driven by the gate signal g2 operate in a complementary manner. When the transistors M3 and M6 are turned on, the transistor M2 is turned off. Similarly, when the transistors M5 and M7 are turned on, the transistor M4 is turned off. That is, the transistors M2 and M3 and the transistors M4 and M5 operate complementarily. The operation after the CR oscillation circuit 14 in the oscillation circuit 10 starts oscillation of the clock and starts outputting the gate signal g1 is as follows. The input voltage (battery voltage VB) corresponds to the first voltage referred to in the present invention, and the ground voltage corresponds to the second voltage referred to in the present invention.
[0030]
(1) Transistors M3 and M4: ON, transistors M2 and M5: OFF
A charging current flows from the input terminal 2 through the power supply line 8, the diode D1, the capacitor C1, the transistor M3, the power supply line 9, and the input terminal 3, and the capacitor C1 is charged.
[0031]
(2) Transistors M3 and M4: off, transistors M2 and M5: on
A charging current flows from the input terminal 2 through the power supply line 8, the transistor M2, the capacitor C1, the diode D2, the capacitor C2, the transistor M5, the power supply line 9, and the input terminal 3, and the charge of the capacitor C1 passes through the diode D2 to the next stage. Moved to capacitor C2. Boosting is performed in this process.
[0032]
(3) Transistors M3 and M4: ON, transistors M2 and M5: OFF
A charging current flows from the input terminal 2 through the power supply line 8, the transistor M4, the capacitor C2, the diode D3, the capacitor C3, the transistor M3, the power supply line 9, and the input terminal 3, and the charging charge of the capacitor C2 passes through the diode D3. Moved to capacitor C3. Boosting is also performed in this process.
[0033]
That is, the boosted voltage Vo of the charge pump circuit 1 is expressed as follows, assuming that the output current is Iout, the frequency of the gate signals g1 and g2 (corresponding to the switching frequency) is f, and the capacitances of the capacitors C1 to C4 are C. As shown in the formula.
Vo = 3 · (VB−Vf) −Vf
-((3 · Iout) / (C · f)) + VB (1)
[0034]
Here, the first term is due to the above-described step-up operations (2) and (3), the second term is the forward voltage loss of the diode D1, and the third term is the voltage drop due to the output current Iout. ing. Further generalizing this equation (1) gives the following equation (2), where N is the number of boosting stages and Vφ is the swing voltage per stage. The swing voltage Vφ is a difference voltage between the first voltage and the second voltage in the present invention.
Vo = N · (Vφ−Vf) −Vf
− ((N · Iout) / (C · f)) + VB (2)
[0035]
According to these equations (1) and (2), the boost voltage Vo increases in proportion to the number of boost stages N and the battery voltage VB (swing voltage Vφ), and decreases as the output current Iout increases and the frequency f decreases. I understand that
[0036]
Now, the comparator 13 in the oscillation circuit 10 constantly compares the detection voltage Vb with the switching reference voltage Va. The switching reference voltage Va is set to a voltage corresponding to 10V of the battery voltage VB, and the comparator 13 outputs an L level when the battery voltage VB falls below 10V, and an H level when the battery voltage VB becomes 10V or higher. Is output.
[0037]
When the output level of the comparator 13 becomes L level, the frequency dividing circuit 15 sets the frequency dividing ratio to be small and outputs a gate signal g1 having a relatively high frequency f1 (corresponding to the first frequency, 100 kHz as an example). The frequency f1 is a frequency at which the maximum capability of outputting the boosted voltage Vo of 12V is obtained even when the battery voltage VB is reduced to 4.5V that is the minimum input voltage. In this case, the steep charge / discharge current flowing through the capacitors C1 to C4 is increased, and the main harmonic component of the frequency f1 overlaps with the radio AM band (530 kHz to 1620 kHz), so that radio noise is not reduced. However, since the state in which the battery voltage VB is lower than 10V hardly occurs during normal vehicle use, even if radio noise increases, the influence on the vehicle user is small.
[0038]
On the other hand, when the output level of the comparator 13 becomes H level, the frequency dividing circuit 15 sets a high frequency dividing ratio and has a relatively low frequency f2 (corresponding to the second frequency, for example, several tens of kHz). The signal g1 is output. The frequency f2 is a frequency at which the ability to output a boosted voltage Vo of VB + 8V = 18V, which is a predetermined voltage, is obtained when the battery voltage VB is 10V. In this case, the steep charge / discharge current flowing in the capacitors C1 to C4 is reduced, and the main harmonic component of the frequency f2 is shifted from the AM band of the radio to the low frequency side, so that the radio noise is reduced. During normal vehicle use, the battery voltage VB is higher than 10V, so that the user can hear the radio sound with a clear sound.
[0039]
Note that, as the battery voltage VB increases, the boosted voltage Vo further increases beyond VB + 8V. However, when the boosted voltage Vo reaches approximately VB + 9V, a current flows through the clamp circuit 16 and further voltage rise is suppressed. Therefore, the boosted voltage exceeds the breakdown voltage of the components of the charge pump circuit 1 and the transistor M1 connected to the output terminal 4. The voltage Vo is not generated.
[0040]
As described above, the charge pump circuit 1 according to the present embodiment detects the input voltage (battery voltage VB), and when the magnitude of the input voltage becomes 10 V or more which is a predetermined threshold value, the transistors M2 to M7 Since the switching frequency is lowered to lower the drive capability of the drive circuit 7, the amount of noise emitted from the charge pump circuit 1 to the outside can be reduced. In addition, since the noise frequency band shifts to the low frequency side, the main frequency components of noise can be shifted from the AM band of the radio, and a significant reduction effect can be obtained for radio noise.
[0041]
The charge pump circuit 1 does not remove generated noise but suppresses generation of noise itself. For this reason, it is not necessary to add a filter comprising a reactor or a capacitor as used in the prior art, and the size and cost can be reduced. Further, when the input voltage becomes less than 10V and the boosting capability is insufficient, the boosted voltage Vo of VB + 8V, which is a predetermined voltage, can be output in order to increase the switching frequency of the transistors M2 to M7.
[0042]
Further, as described above, by adjusting the driving capability of the driving circuit 7 in two stages or by removing the filter components, it is possible to reduce the power loss in the charge pump circuit 1 and to obtain the effect of improving the efficiency compared to the conventional case. . Further, the voltage detection circuit 12 newly added to the conventional configuration and the comparator 13 and the frequency dividing circuit 15 in the oscillation circuit 10 have a small circuit scale and can be easily integrated into an IC or discretely. Circuit modification is easy.
[0043]
In the drive circuit 7 used in this embodiment, all N-channel MOS transistors are used, which is advantageous in terms of chip area and on-resistance. Further, since the voltage boosted by itself is used as the gate voltage, it is not necessary to provide a separate booster circuit, and the circuit configuration can be simplified.
[0044]
(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIGS.
FIG. 3 shows an electrical configuration of the charge pump circuit, and the same components as those in FIG. 1 are denoted by the same reference numerals. The drive circuit 18 of the charge pump circuit 17 includes drive circuits 18a1 and 18a2 for driving other terminals of the capacitors C1 and C3, and drive circuits 18b1 and 18b2 for driving the other terminals of the capacitor C2. Yes. Here, the drive circuits 18a1 and 18b1 are the same circuits as the drive circuits 7a and 7b shown in FIG. 1, respectively, and are renumbered for convenience.
[0045]
The drive circuit 18a2 has a circuit configuration similar to that of the drive circuit 18a1, and includes transistors M8 and M9 connected in series between the power supply lines 8 and 9, a transistor M12 connected between the gate of the transistor M8 and the power supply line 9, And a resistor R6 connected between the gate of the transistor M8 and the node Nb. Similarly, the drive circuit 18b2 includes transistors M10 and M11 connected in series between the power supply lines 8 and 9, a transistor M13 connected between the gate of the transistor M10 and the power supply line 9, and the gate of the transistor M10 and the node Nc. The resistor R7 is connected between the two.
[0046]
The drive control circuit 19a (corresponding to the drive capability adjusting means) converts the gate signal g1 into the gate signals g3 and g4 to the transistors M9 and M12 when the switching signal Sc from the voltage detection circuit 20 described later is at the L level. If the switching signal Sc is at the H level, the gate signal g3 is set at the L level and the gate signal g4 is set at the H level. On the other hand, the drive control circuit 19b (corresponding to the drive capability adjusting means) also outputs the gate signal g2 as the gate signals g5 and g6 to the transistors M11 and M13 when the switching signal Sc is at the L level. When Sc is at the H level, the gate signal g5 is set to the L level and the gate signal g6 is set to the H level.
[0047]
The oscillation circuit 21 includes a CR oscillation circuit, and the oscillation frequency is constant (for example, 100 kHz). As shown in FIG. 4, the voltage detection circuit 20 divides and detects the voltage between the input terminals 2 and 3, resistors R8 and R9, resistors R10 and R11 for generating the switching reference voltage Va, and the detection voltage. And a comparator 22 for comparing the switching reference voltage Va.
[0048]
In the present embodiment, the switching frequency, the transistor sizes of the transistors M2 to M13, and the like are set to values that satisfy drive capability (step-up characteristics) described later. For example, by adjusting the transistor size, each drive capability of the drive circuits 18a1, 18a2, 18b1, and 18b2, and thus the capability ratio between the drive circuits 18a1 and 18a2, and the capability ratio between the drive circuits 18b1 and 18b2 are set to desired values. be able to.
[0049]
Next, the operation of this embodiment will be described.
When the battery voltage VB, which is the input voltage, drops below 10V, the voltage detection circuit 20 outputs an L level switching signal Sc. In this case, the gate signal g1 is applied to the transistors M3, M6, M9, and M12, and the gate signal g2 is applied to the transistors M5, M7, M11, and M13. For this reason, the drive circuits 18a1 and 18a2 and the drive circuits 18b1 and 18b2 perform parallel operations, respectively, and perform charge / discharge operations of the capacitors C1 to C3 with the maximum drive capability. As a result, a larger charge / discharge current can be allowed to flow, and a 12V boosted voltage Vo can be output even when the battery voltage VB drops to 4.5V, which is the minimum input voltage.
[0050]
On the other hand, when the battery voltage VB becomes 10 V or more, the voltage detection circuit 20 outputs an H level switching signal Sc. In this case, the transistors M8, M9, M10, and M11 are turned off, and the drive circuits 18a2 and 18b2 stop the drive operation. For this reason, only the drive circuits 18a1 and 18b1 perform the drive operation independently, and perform the charge / discharge operation of the capacitors C1 to C3 with a drive capability lower than the maximum drive capability. This driving capability is a driving capability that can output a boosted voltage Vo of VB + 8V = 18V, which is a predetermined voltage, when the battery voltage VB is 10V.
[0051]
According to the present embodiment, the drive circuits 18a1 and 18a2 and the drive circuits 18b1 and 18b2 are respectively operated in parallel and the drive circuits 18a1 and 18b1 are independently operated, and both operations are performed according to the input battery voltage VB. The drive capability of the drive circuit 18 is adjusted by switching the mode. Therefore, when the battery voltage VB is equal to or higher than the minimum input voltage (4.5 V), a predetermined boosted voltage Vo of approximately VB + 8 V can be output, and when the battery voltage VB increases, the charging / discharging currents of the capacitors C1 to C3 are suppressed. Thus, the amount of generated noise can be reduced. As a result, similar to the first embodiment, downsizing, cost reduction, high efficiency, and the like can be achieved.
[0052]
(Other embodiments)
The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified or expanded as follows, for example.
The charge pump circuits 1 and 17 are not limited to the on-vehicle electronic control device, and can be applied to other devices that require a boosted voltage.
The first voltage and the second voltage applied to the other terminal of each capacitor are not limited to the input voltage (battery voltage VB) and the ground voltage.
The switching element is not limited to the FET, but may be a bipolar transistor or an IGBT.
[0053]
The means for changing the switching frequency shown in the first embodiment may be combined with the means for switching the operation mode of the driving device shown in the second embodiment. In the first embodiment, the switching frequency f may be switched to three or more stages according to the input voltage. Further, the switching frequency f may be continuously changed according to the input voltage. By increasing or continuously changing the number of stages to be switched, the drive capability of the drive circuit can be brought close to the minimum necessary value, and the generated noise can be further reduced.
[Brief description of the drawings]
FIG. 1 is an electrical configuration diagram of a charge pump circuit showing a first embodiment of the present invention.
FIG. 2 is an electrical configuration diagram of an oscillation circuit.
FIG. 3 is a view corresponding to FIG. 1, showing a second embodiment of the present invention.
FIG. 4 is an electrical configuration diagram of a voltage detection circuit.
[Explanation of symbols]
Reference numerals 1 and 17 are charge pump circuits (boost circuits), 2 is an input terminal (voltage input terminal), 4 is an output terminal (voltage output terminal), 7, 7a, 7b, 18, 18a1, 18a2, 18b1, and 18b2 are drive circuits. 10 is an oscillation circuit (drive capability adjusting means), 12 and 20 are voltage detection circuits, 19a and 19b are drive control circuits (drive capability adjusting means), M2 to M13 are MOS transistors (FET, switching elements), D1 to D6 Is a diode, and C1-C4 are capacitors.

Claims (7)

Used in an electronic control device mounted on a vehicle,
A plurality of diodes connected in series with the same polarity between the voltage input terminal and the voltage output terminal;
A plurality of capacitors each having one terminal connected to each connection point where the diodes are connected;
The first voltage and the second voltage are alternately applied to the other terminals of the capacitors, and the voltage at the voltage input terminal is set to a predetermined value with a predetermined load connected to the voltage output terminal. A drive circuit having a maximum drive capability such that the voltage at the voltage output terminal is equal to or higher than a predetermined voltage when the input voltage is the minimum input voltage;
A voltage detection circuit for detecting a battery voltage applied to the voltage input terminal;
By lowering the driving capability of the driving circuit as the detected voltage is higher, characterized in that a drive capability adjusting means for reducing radio noise of AM band when the voltage of the voltage input terminal is higher Boost circuit. The drive circuit includes a switching element that switches a connection state of the other terminals of the capacitors,
2. The booster circuit according to claim 1, wherein the drive capability adjusting means is configured to lower a switching frequency of the switching element as the detection voltage is higher. 3. The booster circuit according to claim 2, wherein the drive capability adjusting means is configured to adjust the switching frequency in a stepwise manner in accordance with the detected voltage. The drive capability adjusting means sets the switching frequency to a first frequency so that the drive circuit has the maximum drive capability when the detected voltage is less than a predetermined threshold, 4. When the detection voltage is equal to or higher than a predetermined threshold value, the switching frequency is configured to be set to a second frequency lower than the first frequency. The booster circuit described. 3. The booster circuit according to claim 2, wherein the drive capacity adjusting means is configured to continuously adjust the switching frequency in accordance with the detected voltage. A plurality of diodes connected in series with the same polarity between the voltage input terminal and the voltage output terminal;
A plurality of capacitors each having one terminal connected to each connection point where the diodes are connected;
The first voltage and the second voltage are alternately applied to the other terminals of the capacitors, and the voltage at the voltage input terminal is set to a predetermined value with a predetermined load connected to the voltage output terminal. A drive circuit having a maximum drive capability such that the voltage at the voltage output terminal is equal to or higher than a predetermined voltage when the input voltage is the minimum input voltage;
A voltage detection circuit for detecting a voltage of the voltage input terminal;
Driving capability adjusting means for reducing the driving capability of the driving circuit as the detection voltage is higher,
The drive circuit has a form in which FETs of the same conductivity type that perform complementary operations are connected in series with the other terminal of each capacitor interposed between the voltage input terminal and a ground terminal, and the voltage input terminal side of the FET you characterized in that it is configured to operate themselves boosted voltage as the gate voltage boost circuit. 7. The booster circuit according to claim 6, wherein a diode is further connected between the voltage input terminal and a common connection point of the diodes so as to have the same polarity as the diode.

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