JP4112579B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for monitoring the width of a microfabricated pattern with high accuracy. Furthermore, the present invention relates to an exposure method, an etching method, a semiconductor device manufacturing method, and an exposure processing apparatus using the monitoring method.

  The performance of semiconductor devices is largely governed by the dimensional accuracy of fine patterns. In microfabrication, a base film such as an insulating film or a conductive film is dry-etched using a resist pattern formed by photolithography as a mask. In semiconductor device manufacturing, improvement of processing dimensional accuracy in the semiconductor substrate surface is one of the major issues, and it is necessary to control parameters for improving processing dimensional accuracy of photolithography and dry etching with higher accuracy. It has been demanded.

  The photolithography process is a process of transferring a semiconductor device pattern onto a semiconductor substrate coated with a resist film as a photosensitive agent using an exposure apparatus, for example, a reduction projection exposure apparatus (stepper). Specifically, light emitted from a light source passes through a reticle on which a semiconductor device pattern to be transferred is drawn, is reduced by an optical system, and then projected onto a semiconductor substrate to form a resist pattern. In pattern formation using a reduction projection exposure apparatus, the resolving power of the exposure apparatus is given by the following equation from optical theory.

R = k ₁ λ / NA (1)

DOF = k ₂ λ / NA ² (2)

Here, R represents the resolving power and DOF represents the depth of focus. In each parameter, k ₁ and k ₂ are process coefficients, λ is an exposure light wavelength, and NA is a numerical aperture. Therefore, in response to the demand for miniaturization of semiconductor devices, the exposure wavelength has been shortened, the projection lens has a higher NA, and the process has been improved accordingly. However, it has become extremely difficult to secure the exposure latitude and the depth of focus in response to recent demands for further miniaturization of semiconductor devices. For this reason, more accurate exposure amount and focus management are required in order to effectively utilize a small exposure margin and improve the processing dimension accuracy without causing a decrease in yield.

  For example, even when a large number of semiconductor device patterns are exposed on the semiconductor substrate with the same set exposure amount, the flatness of the semiconductor substrate surface, the thickness distribution of the resist film in the semiconductor substrate surface, or post-exposure baking (PEB) or development Due to non-uniformity within the surface of the semiconductor substrate, etc., the appropriate exposure amount varies within the surface of the semiconductor substrate, resulting in a decrease in yield.

  Focusing on exposure dose management, Integrated Circuit Metrology, Inspection and Process Control 4 (SPIE Vol.1261 Integrated Circuit Metrology, Inspection, and Process Control 4 (1990) p.315) and JP 2000-310850 A The publication proposes an exposure amount monitoring method. The feature of these proposals is that the reticle in which the pattern in which the dimensional ratio (duty ratio) of the transmission part and the light-shielding part is continuously changed in one direction is arranged at a pitch not resolving on the semiconductor substrate in the reduction projection exposure apparatus to be used. Thus, the exposure is performed with an inclination distribution. According to this method, it is possible to know the fluctuation distribution of the effective appropriate exposure amount for forming the resist mask pattern.

  Further, in order to reduce variation in pattern dimensional accuracy on the semiconductor substrate after the photolithography process, an exposure method in which the semiconductor substrate is divided into several areas and an exposure amount is set for each area is disclosed in JP-A-10-270320. Proposed in the Gazette. However, this method does not seem to be an effective correction method because the approximation accuracy of the set exposure dose is not so high.

  The dry etching process is performed subsequent to the photolithography process. In the dry etching process, the base film on the semiconductor substrate is etched by colliding ions generated by forming gas plasma using the resist pattern formed in the photolithography process as a mask. The processing dimensional accuracy of dry etching affects not only the etching conditions such as the substrate temperature, gas flow rate, plasma density, and self-bias voltage, but also the shape of the resist mask. Therefore, it is difficult to measure separately the effects of dry etching and photolithography, and it is impossible to monitor directly.

In addition, in order to achieve high-precision microfabrication control, a fine pattern width monitoring technique is also important. Conventionally, a scanning electron microscope (SEM) has been used for this width monitor. However, in SEM measurement, (a) it is close to the measurement limit of SEM due to pattern miniaturization, and sufficient measurement accuracy cannot be obtained, and (b) the resist film, underlying film or semiconductor substrate is irradiated by electron beam irradiation. There were problems such as being easy to damage.

  As described above, in microfabrication, in order to obtain the processing accuracy and uniformity of the pattern dimensions of a semiconductor device, it is important to control the exposure conditions of photolithography, the etching conditions of dry etching, and the like with high precision. However, there is a problem in a method for measuring a fine pattern easily and accurately without damaging the semiconductor substrate. In addition, since it is difficult to measure with high accuracy by separating the influences on the microfabrication of each step of photolithography and dry etching, there is a problem that the processing control of the semiconductor device cannot be effectively performed.

  An object of the present invention is to provide a method of manufacturing a semiconductor device that can solve such problems and improve the precision and uniformity of microfabrication.

  In order to solve the above-mentioned problems, the first aspect of the present invention is as follows. (A) In an exposure area of a semiconductor substrate divided into a plurality, the exposure amount for each exposure area is approximated by a function of the position coordinates of the semiconductor substrate. (B) forming a base film on the semiconductor substrate; and (c) transferring an exposure monitor pattern comprising a diffraction grating whose light transmission characteristics change monotonously in one direction on the base film. Forming a monitor resist pattern; (d) forming a monitor base film pattern by selectively etching the base film under a set etching condition using the monitor resist pattern as a mask; and (e) monitoring in one direction. The step of measuring the deviation width distribution of the difference between the width of the base film pattern and the width of the monitor resist pattern for each exposure area, and (f) comparing the deviation of the deviation width distribution with the reference value. In this case, the following processing is performed while maintaining the exposure amount setting of the exposure area. If the variation exceeds the reference value, the deviation width distribution is approximated again by a function of the position coordinates of the semiconductor substrate. The present invention is summarized as a semiconductor device manufacturing method including a step of calculating and setting a new exposure amount for each exposure region.

  The second aspect of the present invention includes: (a) a step of setting an exposure amount for each exposure region of a semiconductor substrate divided into a plurality; and (b) a step of forming a base film on the semiconductor substrate; C) A step of applying a resist film on the base film, and (d) a monitor resist pattern formed by transferring an exposure monitor pattern made of a diffraction grating whose light transmission characteristics change monotonously in one direction on the base film. (E) a step of measuring the deviation width of the monitor resist pattern in one direction for each exposure region; and (f) selectively etching the base film under the etching conditions set by using the monitor resist pattern as a mask. A step of forming a monitor base film pattern, (g) a step of measuring the shift width of the monitor base film pattern in one direction for each exposure region, and (h) the shift width of the monitor base film pattern and the monitor resist pattern Take the difference from the width, obtain the deviation width difference distribution, compare the deviation of the deviation width with the reference value, and if the fluctuation is smaller than the reference value, perform the following process while maintaining the etching condition settings. When the variation exceeds the reference value, the gist of the present invention is a method for manufacturing a semiconductor device, including a step of changing a setting of etching conditions and setting a new etching condition.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which can improve the precision and uniformity of microfabrication can be provided.

  Hereinafter, first and second embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

(First embodiment)
In the monitoring method according to the first embodiment of the present invention, as shown in FIG. 1 (a), deposited on the semiconductor substrate 1, the base film 2 surface made of, for example, a silicon oxide film (SiO _2), A monitor resist pattern 13 having an inclined side wall 20 having a gentle angle θ with the surface and a steep side wall 21 close to 90 degrees is formed. After the base film 2 is dry-etched using the monitor resist pattern 13 as a mask, the monitor resist pattern 13 is removed, and the deviation width Δs of the monitor base film pattern 12 shown in FIG. 1B is measured.

  The side wall shape of the monitor resist pattern 13 affects the finished width of the pattern in the case of anisotropic dry etching such as reactive ion etching (RIE). That is, in the RIE process in which processing is performed in a direction perpendicular to the semiconductor substrate surface, the steep angle side wall 21 of the monitor resist pattern 13 is hardly irradiated with ions, but the inclined side wall 20 is hit by ions and etched. End up. In the inclined side wall 20, the edge position of the monitor resist pattern 13 is reduced and retracted during RIE. In general, the receding width Δs depends on the inclination angle θ of the pattern side wall, and becomes larger as the inclination angle becomes smaller. On the other hand, in the steep angle side wall 21 close to the vertical, the edge position hardly recedes. Accordingly, the backward shift width Δs of the edge position reflects and amplifies the influence on the processing pattern size of RIE, and can be used for evaluation of processing accuracy of RIE. Further, the uniformity of RIE processing can be examined from the in-plane distribution of the deviation width Δs.

  The exposure apparatus 50 used in the description of the photolithography process of the first embodiment of the present invention is a reduction projection exposure apparatus (stepper) as shown in FIG. 2, and the reduction ratio is 1: 5. An illumination optical system 40 is configured by the light source 41, the shutter 42, and the illumination lens system 44. A krypton fluoride (KrF) excimer laser with a wavelength λ: 248 nm is used as the light source 41, and the illumination lens system 44 includes a flyan lens and a condenser lens. The coherence factor σ of the illumination optical system is 0.75. The projection optical system 46 includes a projection lens, a pupil stop, and the like, and the lens numerical aperture NA is 0.6. The exposure light 7 reduces and projects the pattern of the reticle 4 placed between the illumination optical system 45 and the projection optical system 46 onto the semiconductor substrate 1 on the stage 48. The exposure range per shot is 20 mm square. For convenience of explanation, the reduction ratio of the exposure apparatus 50 is 1: 5, but it is needless to say that any reduction ratio may be used. In the following description, the dimensions of the pattern on the reticle 4 are described in terms of the dimensions projected on the semiconductor substrate 1 unless otherwise noted.

  As shown in FIG. 3, the resist sensitivity curve used in the description of the first embodiment of the present invention has sensitivity at a certain exposure amount EXc or more. The resist film exposed at an exposure amount of EXc or higher is dissolved in the development step to reduce the film thickness, and is completely dissolved at an exposure amount of EX0 or higher. Normally, an exposure amount EX of EX0 or more is given with a margin. Between EXc and EX0, although the resist film is reduced in the intermediate region, it remains on the substrate surface without being removed. If the exposure amount is set to be much larger than EX0 and so-called overexposure, although there is no residual resist film, the width of the resist pattern to be left is also reduced. Therefore, the exposure amount is set such that an exposure amount several tens of percent over is used as EX.

  The reticle 4a shown in FIG. 4A is provided with a light shielding film 6 that blocks exposure light on a part of a transparent substrate 5 such as a quartz substrate. In general, a metal film such as chromium is used as the light-shielding film 6, but other materials such as alloys, metal oxides, or organic substances may be used as long as they have a sufficient light-shielding property against exposure light. . When this reticle is used to expose the semiconductor substrate 1 coated with a resist film with an exposure amount EX, as shown in FIG. 4B, the exposure amount is at an exposure position corresponding to the edge of the light shielding film 6 of the reticle 4a. An optical image that changes rapidly from 0 to EX is obtained. Here, the exposure light transmittance of the light shielding film 6 of the reticle 4a is 0%, and the transmission part of the transparent substrate 5 without the light shielding film 6 is 100%. This optical image is transferred to the resist film according to the sensitivity curve of the resist, and a resist pattern 11 is formed as shown in FIG. The edge of the resist pattern 11 formed on the semiconductor substrate 1 becomes a substantially vertical steep side wall 21 according to the exposure intensity shown in FIG.

  Next, as shown in FIG. 5, consider a reticle 4b of an exposure test pattern 15 in which a diffraction grating of a thin light-shielding film 6 whose pitch P satisfies the following conditions is arranged on a transparent substrate 5.

P <λ / NA (1 + σ) --- (3)

However, P is the pitch of the reduced projected pattern, and, as described above, has a size five times on the reticle 4b. When the pitch P satisfies the condition of the expression (3), the pattern projected by the reticle 4b is not resolved on the substrate. In the case of the exposure apparatus 50 (λ: 248 nm, NA: 0.6, σ: 0.75) of the first embodiment of the present invention, the pitch P that satisfies the condition of the expression (3) is about 234 nm or less. As shown in FIG. 6, the exposure light 7 having the exposure intensity EX is diffracted by the exposure test pattern 15 of the reticle 4b, but the first-order diffracted light 9 is blocked by the pupil stop 10 of the projection optical system 46 of the exposure apparatus, and the semiconductor substrate. Does not reach the surface. That is, only a uniform distribution of the 0th-order diffracted light 8 occurs on the semiconductor substrate surface, and the diffraction grating pattern is not imaged.

  FIG. 7 shows the 0th-order diffracted light of the exposure light transmitted through the semiconductor substrate 1 using the reticle 4b having a different aperture ratio of the diffraction grating of the exposure test pattern 15 at a constant pitch P that satisfies the condition of the expression (3). 8 is a result of measuring the intensity of 8; Here, the transmitted light intensity is expressed as a ratio to the incident exposure intensity EX. When the diffraction grating aperture ratio is increased from 0 to 100%, the transmitted light intensity increases correspondingly from 0 to 1, as shown in FIG. Accordingly, if a pattern in which the aperture ratio of the diffraction grating is changed at a desired ratio is arranged, an exposure pattern having an effective exposure light transmittance distribution can be formed.

  As shown in FIGS. 8A and 8B, the exposure monitor pattern 16 of the reticle 4c used for explaining the first embodiment of the present invention has a width of a plurality of light shielding films 6a to 6m on the transparent substrate 5. Is a diffraction grating in which the aperture ratio is continuously changed by increasing at a fixed rate with a fixed pitch P satisfying the condition of the expression (3). The right side of the light shielding film 6a toward the paper surface has an aperture ratio of 100%, and the light shielding film 6m has an aperture ratio of 0%.

  As shown in FIG. 9A, the reticle 4c having the exposure monitor pattern 16 is irradiated with the exposure amount EX to expose the semiconductor substrate 1 coated with the resist film. For example, if the left edge of the light-shielding film 6m of the exposure monitor pattern 16 is used as a base point, as shown in FIG. 9B, the obtained optical image has an exposure intensity that gradually increases toward the right side of the paper, and exposure is performed. The monitor pattern 16 has a distribution reaching an exposure intensity of 1 at the right edge of the light shielding film 6a. Since the exposure amount EX is sufficiently larger than EX0, it is transferred to the resist film on the semiconductor substrate 1 according to the resist sensitivity curve shown in FIG. 3, and a monitor resist pattern 13 as shown in FIG. 9C is obtained. That is, at the exposure position corresponding to a range where the exposure intensity is smaller than EXc / EX, the resist film remains as it is, and the inclined sidewall 20 of the monitor resist pattern 13 is formed between EXc / EX and EX0 / EX. Since the resist film is removed at the exposure position corresponding to between EX0 / EX to 1, the monitor resist pattern 13 is reduced and retracted from the edge of the exposure monitor pattern 16 on the light shielding film 6a side as shown in the figure. . The angle θ of the inclined side wall 20 can be adjusted by changing the rate of change of the aperture ratio. For example, when the reticle pitch P is constant at 190 nm and the aperture ratio is changed at a constant 5 nm width, the total width of the exposure monitor pattern 16 is about 7.2 μm. Although the width of the monitor resist pattern 13 to be formed is reduced depending on the amount of incident exposure, the angle θ of the inclined side wall 20 is about 60 degrees. In the case of an exposure monitor pattern in which the change width of the aperture ratio is as small as 2.5 nm, the angle θ of the inclined sidewall of the monitor resist pattern is further reduced to about 25 degrees. In this case, the total length of the exposure monitor pattern is 14.4 μm.

  As described above, the shape of the sidewall of the monitor resist pattern 13 formed on the semiconductor substrate 1 can be controlled by the rate of change in the aperture ratio of the exposure monitor pattern 16.

  The monitor resist pattern 13 according to the first embodiment of the present invention shown in FIG. 1A is projected and transferred from the exposure monitor pattern 16 shown in FIG. The monitor base film pattern 12 formed by RIE using the monitor resist pattern 13 as a mask has a shift width Δs compared to the monitor resist pattern 13 by etching the resist on the inclined side wall 20 side of the monitor resist pattern 13 during RIE. Just shrink. The edge of the monitor base film pattern 12 corresponding to the steep angle side wall 21 of the monitor resist pattern 13 is formed at substantially the same position as the edge of the monitor resist pattern 13. In addition, as described with reference to FIG. 9C, the monitor resist pattern 13 is reduced in size by the width of the exposure monitor pattern 16 in the photolithography process. Therefore, the pattern width of the monitor resist pattern 13 after exposure and development is obtained in advance, and the shift width Δs is obtained by subtracting the pattern width of the monitor base film pattern 12 after etching.

  FIG. 10 shows the shift width Δs of the monitor base film pattern 12 with respect to the angle θ of the inclined side wall 20 of the monitor resist pattern 13 with respect to the RIE etching time. As θ decreases, that is, as the cross-sectional shape of the resist pattern falls, the shift width Δs increases, and the shift width Δs changes more depending on the etching time. For example, when the monitor resist pattern 13 having an angle θ of 60 degrees is used, the shift width Δs of the monitor base film pattern 12 is about 90 nm when the RIE time is 60 seconds. In addition, even if the reduction of the monitor resist pattern 13 in the photolithography process is taken into consideration, it is possible to form the monitor base film pattern 12 with a width of several μm, regardless of the measurement technique such as SEM using a charged beam, Optical measurement methods can be applied. The total width of the monitor base film pattern 12 shown in FIG. 10 is approximately 6 μm. The measurement of the deviation width in FIG. 10 uses an optical misalignment inspection apparatus. The measurement accuracy of the misalignment inspection apparatus is ± 1 nm, and the deviation width Δs can be measured with higher accuracy than the measurement accuracy of SEM (± 5 nm).

With reference to FIG. 11, the steps for carrying out the monitoring method according to the first embodiment of the present invention will be described. As shown in FIG. 14, the semiconductor substrate 1 to be used is a Si semiconductor substrate having a diameter of 200 mm. The position in the surface of the semiconductor substrate 1 is represented by position coordinates (x, y) with the center of the semiconductor substrate 1 as the origin (0, 0). Here, the coordinates x and y are expressed in mm. The shot position on the semiconductor substrate 1 of the exposure apparatus 50 is S (x, y). Here, S (x, y) is represented by the center coordinates (x, y) of the exposure shot area 20 mm square. The shot position S (0, 0) is a square area specified by position coordinates (−10, −10), (−10, 10), (10, 10), and (10, −10). Further, the shot positions along the x-axis are along S (−80,0), S (−60,0), S (−40,0),..., S (80,0), and y-axis. Are S (0, -80), S (0, -60), S (0, -40), ..., S (0, 80). The entire semiconductor substrate 1 having a diameter of 200 mm has a total of 61 shot positions as depicted in a grid pattern in FIG. Under the above conditions,
(A) First, as shown in FIG. 11A, a base film 2 having a thickness of 200 nm is formed on a semiconductor substrate 1. Further, as shown in FIG. 11B, a resist film 3 having a thickness of 600 nm is formed on the base film 2 by spin coating.

  (B) Using the exposure apparatus 50 (see FIG. 2), the resist film 3 on the surface of the semiconductor substrate 1 is exposed to the pattern of the reticle 4d shown in FIG. Here, a line / space (L / S) pattern 18 which is a desired pattern and an exposure monitor pattern 16 according to the first embodiment of the present invention are arranged on the reticle 4d. . As shown in FIG. 12, the L / S pattern 18 and the exposure monitor pattern 16 are a pattern in which a plurality of light shielding films 6 and light shielding films 6a to 6l extending in the vertical direction toward the paper surface are arranged at a constant pitch P. is there. The L / S pattern 18 sets the width and pitch P of the light-shielding film 6 to constant values of 150 nm and 300 nm, respectively, and the exposure monitor pattern 16 increases the width of the light-shielding films 6a to 6l at a constant rate while keeping the pitch P constant to 190 nm. Pattern. In the first embodiment, the exposure monitor pattern 16 has an increased width of the light shielding film of 5 nm. In FIG. 12, for simplicity, the light shielding films 6a to 6l are representatively shown. The total length of the light shielding film pattern is 7.2 μm. As described above, the L / S pattern 18 is resolved on the semiconductor substrate 1 and the exposure monitor pattern 16 is not resolved under the condition of the pitch P in the expression (3).

  (C) A predetermined development process is performed after the exposure of the resist film 3 to obtain a line / space resist pattern 23 and a monitor resist pattern 13 as shown in FIG. The finished widths of the obtained line / space resist pattern 23 and monitor resist pattern 13 are respectively measured by an optical misalignment inspection apparatus equipped with an SEM and a CCD camera. The misalignment inspection apparatus measures the pattern length by image analysis.

  (D) Next, as shown in FIG. 10 (d), the underlying film 2 is etched by anisotropic RIE using the line / space resist pattern 23 and the monitor resist pattern 13 as a mask, so that the line / space underlying film pattern 22 is obtained. Then, a monitor base film pattern 12 is formed.

  (E) Finally, the resist is removed by wet etching to obtain a line / space underlayer film pattern 22 and a monitor underlayer film pattern 12 etched on the semiconductor substrate 1 as shown in FIG. The finished widths of the line / space base film pattern 22 and the monitor base film pattern 12 are measured. The measuring method is the same apparatus as the line / space resist pattern 23 and the monitor resist pattern 13.

  FIGS. 13A and 13B show the shape of the monitor resist pattern 13 of the exposure monitor pattern 16 and the shape of the monitor base film pattern 12 after RIE etching, respectively. The edge positions of the monitor resist pattern 13 and the monitor base film pattern 12 coincide with each other on the steep side wall on the left side of the cross section of the monitor resist pattern 13, but the edge of the monitor base film pattern 12 recedes on the inclined side wall. You can see that In the misalignment inspection apparatus, image analysis of the monitor resist pattern 13 and the monitor base film pattern 12 is performed, the total length is measured, and the shift width Δs is obtained from the difference.

  FIG. 15A shows a distribution of shift widths, which is a difference between the widths of the line / space resist pattern 23 and the line / space base film pattern 22 measured by SEM, and FIG. 15B shows a monitor measured by a misalignment inspection apparatus. This is the distribution of the shift width Δs between the resist pattern 13 and the monitor base film pattern 12. Each width measurement is performed three times in succession. In the SEM measurement, discharge treatment is performed at the end of each measurement. The horizontal axis is the substrate position x in the diameter direction (y = 0) along the x-axis of the semiconductor substrate 1.

  In the measurement by SEM, since the oxide film is charged up by the electron beam, the measurement value easily flies, and the variation in the measurement results of three times is large as seen in FIG. In the case of SEM measurement, in order to ensure sufficient measurement accuracy, the number of measurements must be increased and an average taken. Furthermore, in order to eliminate the charge-up, it is necessary to perform a discharge process such as taking out the sample from the vacuum for each measurement, which takes time. On the other hand, the receding width measurement result in FIG. 15B shows that the three measurement values are almost the same value, and it is considered that the measurement accuracy is sufficient. Since the misalignment device is optical, it can be easily measured with good reproducibility without charge-up. Both measurement results show the same tendency, and the shift width is small and the shift width is large at the central portion of the semiconductor substrate 1. That is, it is predicted that the etching progresses faster in the central part of the semiconductor substrate than in the peripheral part.

  In the first embodiment, the influence of the dry etching is investigated using the shift width Δs of the monitor base film pattern 12, but the shift of the pattern center of the monitor base film pattern 12 is changed instead of the shift width Δs. It goes without saying that the same measurement can be performed by detection.

  As described above, according to the monitoring method according to the first embodiment of the present invention, it is possible to easily and accurately measure the influence of dry etching on the formation of the base film pattern with high reproducibility.

(Modification)
Next, a monitoring method according to a modification of the first embodiment of the present invention will be described. The modification of the first embodiment is characterized by the exposure monitor pattern, and the others are the same as those of the first embodiment, and thus redundant description is omitted.

  In order to efficiently monitor the line width even under various etching conditions used in dry etching, in the modified example of the first embodiment, a resist pattern in which opposing side walls are both inclined side walls is used. Further, a plurality of resist patterns having different inclination angles θ are provided.

  As shown in FIG. 16, the reticle used in the modified example of the first embodiment has an aperture ratio of 0 to 100% at a constant rate on the transparent substrate 5 from the center to both ends at a constant pitch. The left-right symmetrical diffraction grating-shaped exposure monitor pattern 17 is provided. Further, a plurality of exposure monitor patterns having the same symmetrical shape as the exposure monitor pattern 17 and different opening ratio changes are prepared, and a plurality of exposure monitor resist patterns having different side wall shapes as shown in FIGS. 17 and 18 are formed. To do. The cross sections AA ′, BB ′, and CC ′ of the exposure monitor resist patterns 33a, 33b, and 33c in FIG. 17A are bilaterally symmetric as shown in FIG. However, the angles of the inclined side walls are different from each other. RIE is performed using the exposure monitor resist patterns 33a, 33b, and 33c as a mask to obtain exposure monitor base film patterns 32a, 32b, and 32c as shown in FIG. FIG. 18B shows cross sections D-D ′, E-E ′, and F-F ′ of the exposure monitor base film patterns 32 a, 32 b, and 32 c, respectively.

  In the modification, the exposure monitor resist pattern is an inclined side wall whose opposing side walls are symmetrical with each other, so that the shift width of the underlying silicon oxide film pattern is doubled and measurement can be performed with higher accuracy. In addition, since a plurality of exposure monitor resist patterns having different inclination angles are provided, it is possible to select and use the one having the highest sensitivity for measurement of the deviation width by etching according to the RIE conditions. It is done.

  As described above, according to the modification of the first embodiment of the present invention, it is possible to provide a monitoring method that can easily and accurately measure the influence of dry etching on formation of a base film pattern with high reproducibility.

(Second Embodiment)
In the monitoring method according to the second embodiment of the present invention, as shown in FIG. 19, reference position patterns 19a to 19d made of a square frame-shaped light shielding film made of a uniform light shielding film on the transparent substrate 5, and A reticle provided with a misalignment monitor pattern 26 composed of exposure monitor patterns 16a to 16d arranged on the outside surrounding the reference position patterns 19a to 19d is used. As shown in FIG. 19, the exposure monitor patterns 16a and 16b are inclined to the exposed resist by increasing the aperture ratio on the right side toward the paper surface and the exposure monitor patterns 16c and 16d on the upper side toward the paper surface. Side walls are formed. Dry etching is performed using a resist pattern having an inclined side wall formed using a reticle having the positional deviation monitor pattern 26 as a mask, and the positional deviation of the outer base film pattern is obtained based on the inner base film pattern position. The state of progress of etching can be examined.

  The monitoring method according to the second embodiment is characterized in that a shift between two types of patterns having different pattern shifts due to the dry etching process is measured, and the other is the same as the first embodiment. Duplicate descriptions are omitted.

  With reference to FIG. 20, the process of performing the monitoring method according to the second embodiment of the present invention will be described.

  (A) First, as shown in FIG. 20A, a base film 2 having a thickness of 200 nm is formed on a semiconductor substrate 1. Then, as shown in FIG. 20B, a resist film 3 having a thickness of 600 nm is formed on the base film 2 by spin coating.

  (B) The pattern of the reticle 4e shown in FIG. 21 is exposed to the resist film 3 on the surface of the semiconductor substrate 1 by using an exposure apparatus 40 (see FIG. 2). Here, on the reticle 4e, a line / space pattern 18, which is a desired pattern, reference position patterns 19a and 19b, and exposure monitor patterns 16a and 16b are arranged. As shown in FIG. 21, in the line / space pattern 18 and the exposure monitor patterns 16a and 16b, a plurality of light shielding films 6 and light shielding films 6a to 6l extending in a direction perpendicular to the paper surface are arranged at a constant pitch P. It is a pattern. Here, as an example, the following configuration is adopted. The line / space pattern 18 has a pitch P of 300 nm and the width of the light shielding film 6 is fixed to 150 nm, and the exposure monitor patterns 16a and 16b have a pitch P of 190 nm and the width of the light shielding films 6a to 6l at a constant ratio of 5 nm. The pattern width is 7.2 μm. The distance between the centers of the exposure monitor patterns 16a and 16b is 25 μm. The reference position patterns 19a and 19b are arranged between the exposure monitor patterns 16a and 16b, and have a width of 1 μm and a center-to-center distance of 10 μm. Here, the line / space pattern 18 and the reference position patterns 19a and 19b are resolved on the semiconductor substrate 1, and the exposure monitor patterns 16a and 16b are not resolved.

  (C) A predetermined development process is performed after exposure to obtain a line / space resist pattern 23, monitor resist patterns 13a and 13b, and reference position resist patterns 14a and 14b, as shown in FIG. The center position of each of the pattern made up of the monitor resist patterns 13a and 13b and the pattern made up of the reference position resist patterns 14a and 14b is measured by the misalignment inspection apparatus.

  (D) Next, as shown in FIG. 20D, the underlying film 2 is subjected to anisotropic RIE using the line / space resist pattern 23, the monitor resist patterns 13a and 13b and the reference position resist patterns 14a and 14b as a mask. Etching is performed to form the line / space base film pattern 22, the monitor base film patterns 12a and 12b, and the reference position base film patterns 24a and 24b.

  (E) Finally, the resist pattern is removed by wet etching, and as shown in FIG. 20E, the line / space underlayer film pattern 22 and the monitor underlayer film patterns 12a and 12b etched on the semiconductor substrate 1 are obtained. Then, the reference position base film patterns 24a and 24b are obtained. The center position of each of the pattern made of the monitor base film patterns 12a and 12b and the pattern made of the reference position base film patterns 24a and 24b is measured by the misalignment inspection apparatus.

  The resist pattern shape formed by exposing the reference position patterns 19a, 19b and the exposure monitor patterns 16a, 16b and the underlying silicon oxide film pattern shape formed by RIE using the resist pattern as a mask are shown in FIGS. It shows to Fig.23 (a), (b). Here, as shown in FIG. 22A, in order to simplify the description, the center position Ca of the pattern made up of the reference position resist patterns 14a and 14b and the center position Cb of the pattern made up of the monitor resist patterns 13a and 13b are Suppose that they match. As shown in FIG. 22B, even after dry etching, the center position Ca of the pattern made of the reference position base film patterns 24a and 24b coincides with the center position Ca of the pattern made of the reference position resist patterns 14a and 14b, The center position Cb ′ of the pattern made of the outer monitor base film patterns 12a and 12b is shifted by the shift width Δc from the center position Cb of the pattern made of the monitor resist patterns 13a and 13b. In FIG. 23, the entire misregistration monitor resist pattern 27 or misregistration monitor base film pattern 28 is shown. The monitor resist patterns 13a to 13d shown in FIG. 23A have inclined side walls on the right and upper sides toward the paper surface, and the reference position resist patterns 14a to 14d are steep side walls. The center position of the square pattern composed of the monitor base film patterns 12a to 12d after the dry etching is shifted in the lower left direction toward the paper surface with respect to the square pattern composed of the reference position base film patterns 24a to 24d. As described above, according to the second embodiment, it is possible to use not only a one-dimensional deviation width Δc but also a two-dimensional deviation width as a pattern center deviation width Δc, so that more accurate measurement can be performed.

  Thus, it is possible to provide a monitoring method that can easily and accurately measure the influence of dry etching with high reproducibility.

  Here, in the second embodiment, a square frame shape is used as the reference position pattern 19, but any shape may be used as long as the center position is not shifted by dry etching. FIG. 24 shows an example, and shows a reticle in which a square reference position pattern 19a is arranged on the transparent substrate 5 with respect to the exposure monitor patterns 16a to 16d. It is clear that the center silicon oxide film pattern formed from the reference position pattern 19a has the same center position with respect to the resist pattern, and can be used as a reference position for deviation of the exposure monitor patterns 16a to 16d.

  In the above-described example of the second embodiment, two sets of patterns are formed, and the position shift width is measured so that one of the centers does not shift even by dry etching. Combination patterns having different widths may be used. In this case, from the viewpoint of increasing measurement accuracy, a combination that causes a reverse positional shift is desirable. For example, as shown in FIG. 25, a reticle in which exposure monitor patterns 16a to 16h are provided on a transparent substrate 5 may be used. The exposure monitor patterns 16a, 16b, 16e and 16f are diffraction gratings extending in the vertical direction toward the paper surface. However, the exposure monitor patterns 16e and 16f have a change in aperture ratio with respect to the exposure monitor patterns 16a and 16b. The direction to be reversed is reversed. The exposure monitor patterns 16c, 16d, 16g, and 16h are diffraction gratings that extend in the left-right direction toward the paper surface. However, the exposure monitor patterns 16g and 16h change the aperture ratio with respect to the exposure monitor patterns 16c and 16bd. The direction is reversed. When the base film is dry-etched using the resist pattern formed from this pattern, the monitor base film pattern formed from the exposure monitor patterns 16a to 16d shifts, for example, in the upper left direction, while from the exposure monitor patterns 16e to 16h. The formed monitor base film pattern is shifted in the opposite lower right direction. In this way, the directions in which the patterns deviate from each other are opposite to each other, so that the observed deviation width Δc is increased, and a simpler and more accurate measurement can be performed.

  In FIG. 22, the center position Ca of the reference position resist patterns 14a and 14b and the center position Cb of the monitor resist patterns 13a and 13b are described as being coincident. However, of course, each of the center positions Ca and Cb is one. You don't have to. The center position Cb of the monitor resist patterns 13a and 13b and the center position Cb ′ of the monitor base film patterns 12a and 12b are measured with reference to Ca, for example, without causing a center position shift by photolithography or dry etching process. The shift width Δc may be obtained.

  Further, in FIG. 19, the reference position patterns 19a and 19b are patterns formed in the substantially central portion surrounded by the exposure monitor patterns 16a and 16b. However, the formation positions of the reference position patterns 19a and 19b are the exposure monitor patterns. It may be at any position of the portion surrounded by 16a and 16b, and a part of the pattern may be formed outside the exposure monitor patterns 16a and 16b, or the entire pattern may be formed outside. Of course.

  According to the monitoring method according to the second embodiment of the present invention, the influence of dry etching on the formation of the underlying film pattern can be easily measured with high accuracy and good reproducibility.

(Exposure system control system)
The system for controlling the exposure apparatus 50 according to the present invention is constituted by an exposure apparatus control unit 51 and an exposure processing unit 60, as shown in FIG.

  The exposure apparatus 50 is a reduced projection exposure apparatus shown in FIG. The exposure apparatus control unit 51 aligns the exposure pattern with an illumination optical system module 52 that controls collimation and on / off of incident light from the light source, a projection optical system module 53 that controls reduction projection of the exposure pattern of the reticle, and the like. It comprises an alignment system module 54 that controls and a stage drive system module 55 that controls the drive of the stage.

  The exposure processing unit 60 is a process condition input module 61 that acquires the etching conditions of the dry etching apparatus 80 from the dry etching apparatus control module 81 and data that acquires measurement data from the misalignment inspection control module 71 from the misalignment inspection control module 71. An input module 62; an exposure amount calculation module 63 that calculates an effective exposure amount from the measurement data input from the data input module 62; a correction coefficient calculation module 64 that calculates an exposure correction coefficient from the calculated effective exposure amount; The data output module 65 sets the exposure amount based on the corrected correction coefficient, and the storage device 66 stores the exposure management information. The exposure processing unit 60 is connected to a local area network (LAN) 90 and is managed by a host computer 91.

  The semiconductor circuit pattern exposure method according to the present invention uses a reticle 4d equipped with an exposure monitor pattern 16 characterized by using a desired L / S pattern and a pitch below the resolution limit as shown in FIG. 8, for example. The exposure correction coefficient is obtained from the relationship between the deviation width of the monitor resist pattern 13 and the exposure amount measured in advance, and the exposure amount of each shot of the semiconductor substrate is set using the exposure correction coefficient. And

  First, in order to obtain the relationship between the positional deviation width of the exposure monitor resist pattern and the effective exposure amount, the semiconductor substrate 1 coated with a resist film is exposed by changing the set exposure amount by the reticle 4d including the exposure monitor pattern 16 shown in FIG. To do. Then, the misalignment width of the monitor resist pattern 13 as shown in FIG. The measured receding width is taken as a deviation width by taking a difference from an arbitrary reference receding width set in advance. Therefore, the value of the shift width is not necessarily coincident with the width of the monitor resist 13 that is retreated, and is a relative shift width. As a result, the relationship of the exposure amount setting value-deviation width as shown in FIG. 27 is obtained. From the relationship shown in FIG. 27, the least square method is used to derive an expression for obtaining the effective exposure amount from the shift width.

ED = −34.4RL + 31.8 (4)

Here, ED is an effective exposure amount, and RL is a shift width of the monitor resist pattern 13.

Next, the semiconductor substrate 1 coated with a resist film using the reticle 4d is exposed to each shot position S (x, y) shown in FIG. 14 with a uniform exposure amount DB. After the development, the shift width RL (x, y) of the monitor resist pattern 13 is measured and converted into an effective exposure amount ED (x, y) using the equation (4). FIG. 28 shows the shift width distribution of the L / S resist pattern 23 corresponding to the desired L / S pattern 18 by uniform exposure, measured by SEM. On the other hand, FIG. 29 shows an effective exposure amount distribution converted from the shift width of the monitor resist pattern 13 corresponding to the exposure monitor pattern 16. The shift width distribution of the L / S resist pattern 23 shows a variation of 9 nm or more at 3σ (σ: standard deviation). In FIG. 28, the tendency of the shift width distribution is not clearly seen. On the other hand, the effective exposure distribution shown in FIG. 29 clearly shows a tendency close to a symmetrical circular distribution. For the effective exposure amount data of FIG. 29, the following second-order polynomial,

F (x, y) = ax ² + by ² + cxy + dx + ey + f (5)

To approximate the trend of the effective exposure distribution. Here, (x, y) are coordinates indicating the position of the semiconductor substrate 1 shown in FIG. 14 or 28, 29, and a, b, c, d, e, and f are measured effective exposure amounts and position coordinates ( It is a correction coefficient determined by x, y). The correction coefficient is obtained by fitting by the least square method. In the third embodiment, from FIG. 29, these correction coefficients are a: 2.67 × 10 ⁻¹¹ , b: 2.89 × 10 ⁻¹¹ , c: 3.41 × 10 ⁻¹² , d: 6.53 × 10 ⁻⁸ , e: -3.3 × 10 ⁻⁷ , f: 19.57. Here, the effective exposure distribution is approximated by a second-order polynomial, but can be similarly corrected if it is an n-order polynomial (n is 2 or more).

  Next, the corrected exposure dose is set as follows using the obtained approximate expression.

SH (x, y) = 2DB-F (x, y) (6)

Here, SH is a corrected exposure amount at each shot position S (x, y), and DB is a uniform exposure amount. Equation (6) is corrected by adding the excess / deficiency (DB-F (x, y)) of the calculated effective exposure amount to the uniform exposure amount DB.

  The results of performing photolithography with the corrected exposure dose of equation (6) are shown in FIGS. FIG. 30 is a shift width distribution diagram of the L / S resist pattern 18 measured by SEM. The shift width in the semiconductor substrate 1 is reduced to 6 nm or less at 3σ. FIG. 31 is a diagram in which the result of the shift width of the monitor resist pattern 13 is converted into an effective exposure amount distribution by the equation (4). As is clear from comparison with FIG. 29, the effective exposure dose shows a flat distribution, and it can be seen that the correction by the simple second-order polynomial shown in the equation (5) is sufficiently effective.

Further, by recalculating the deviation width of the monitor base film pattern 12 formed by dry etching by the process shown in FIG. 11 as the deviation width BL from an arbitrary reference point set in advance, it is the same as in the case of the resist pattern. The relationship of exposure amount setting value-shift width is obtained. Similarly, the formula for obtaining the effective exposure amount from the shift width of the monitor base film pattern 12 is as follows:

ED = −34.4BL + 31.8 (7)

It becomes. Using the formula (7), it is possible to obtain the corrected exposure amount by the method described above.

  With the exposure method according to the third embodiment of the present invention, it is possible to easily and accurately control the dimensions of a semiconductor device.

  Next, an example in which the exposure method according to the present invention is applied to a semiconductor device manufacturing process will be described with reference to FIG.

  (A) First, in step S201, the exposure amount setting data output module 65 sets exposure conditions uniform for each shot.

  (B) In step S202, a dummy wafer (semiconductor substrate) on which the resist film 3 is spin-coated is set in the exposure apparatus 50.

  (C) In step S203, exposure and development are performed using a predetermined reticle 4d to form a resist pattern. Here, since the exposure conditions are uniform, the exposure apparatus control unit 51 performs each shot exposure under the same exposure conditions.

  (D) In step S204, the misalignment width distribution RL (x, y) of the monitor resist pattern 13 is measured by the misalignment inspection apparatus 70, and the result is received from the misalignment inspection control module 71 by the data input module 62 of the exposure processing unit 60. To pass.

  (E) In step S <b> 205, the exposure amount calculation module 63 calculates an effective exposure amount from the position shift width, and obtains an effective exposure amount distribution in the semiconductor substrate 1. The calculation result is registered in the storage device 66 together with the positional deviation width data.

  (F) In step S206, the correction coefficient calculation module 64 obtains a quadratic function approximation formula F (x, y) using the formula (5) from the effective exposure amount distribution.

  (G) In step S207, the correction coefficient calculation module 64 calculates the corrected exposure amount SH (x, y) at each shot position from the obtained F (x, y) using the equation (6). It is registered in the storage device 66 together with (x, y).

  (H) In step S208, a semiconductor device manufacturing lot process is started.

  (I) In step S209, the data output module 65 outputs the corrected exposure dose SH (x, y) to the exposure apparatus control unit 51.

  (N) In step S210, a lot semiconductor substrate (semiconductor substrate 1) that has undergone a predetermined semiconductor manufacturing process is set in the exposure apparatus 50.

  (L) In step S211, exposure is performed in accordance with the shot SH (x, y) set using a predetermined reticle 4c, development is performed, and a resist pattern is formed.

  (E) In step S212, the deviation distribution RL (x, y) of the monitor resist pattern 13 is measured by the misalignment inspection device 70, and the result is transferred from the misalignment inspection control module 71 to the storage device 66 of the exposure processing unit 60. store.

  (W) In step S213, the semiconductor substrate 1 is set in the dry etching apparatus 80, and the base film 2 is etched using the resist pattern as a mask under predetermined RIE conditions.

  (F) In step S214, the resist pattern is removed by wet etching.

  (E) In step S215, the semiconductor substrate 1 is set in the misalignment inspection apparatus 70, and the deviation width distribution BL (x, y) of the monitor base film pattern 12 is measured. The result is stored in the storage device 66 of the exposure processing unit 60 by the misalignment inspection control module 71.

  (T) In step S216, the exposure amount calculation module 63 reads the distribution BL (x, y) of the deviation width of the monitor base film pattern 12 from the storage device 66, obtains 3σ, and compares it with the preset 3σ reference value. Check if it is within range. If it is within the allowable range, the process returns to step S210 to repeat the processing of the lot semiconductor substrate.

  (3) If 3σ of the distribution BL (x, y) is larger than the set 3σ reference value and exceeds the allowable range, the exposure amount calculation module 63 uses BL (x, y) in step S217 (7 ) To calculate the effective exposure amount, and obtain the effective exposure amount distribution ED (x, y) in the semiconductor substrate 1. The calculation result is registered in the storage device 66.

  (S) In step S218, the correction coefficient calculation module 64 obtains a quadratic function approximate expression F (x, y) from the effective exposure amount distribution, and updates and registers it in the storage device 66.

  (Iv) In step S207, the correction coefficient calculation module 64 reads the current corrected exposure dose SH (x, y) and renames it to DB (x, y). Using the obtained F (x, y) and DB (x, y), a new corrected exposure dose SH (x, y) is calculated from the equation (6), updated and registered in the storage device 66, and the process returns to step S209. Restart the lot process.

  The exposure apparatus control system according to the present invention can provide a semiconductor device manufacturing method using an exposure method that improves the precision and uniformity of microfabrication.

  In addition to calculating the corrected exposure amount based on the inspection result after the photolithography process, the corrected exposure amount is calculated based on the inspection result of the exposure amount monitor pattern after the dry etching process. Become.

(Modification)
In the exposure apparatus control system according to the present invention, the exposure processing unit 60 is realized by an exposure processing apparatus such as an individual computer, for example. In a modification of the exposure apparatus control system, the function of the exposure processing unit is included in the exposure apparatus control unit attached to the exposure apparatus. Since others are the same, the duplicate description is omitted.

  As shown in FIG. 33, an exposure apparatus 50 as a modification of the exposure apparatus control system is the reduced projection exposure apparatus shown in FIG. The exposure apparatus control unit 51a aligns the exposure pattern with an illumination optical system module 52 that controls collimation and on / off of incident light from the light source, a projection optical system module 53 that controls reduction projection of the exposure pattern of the reticle, and the like. Alignment system module 54 for controlling, stage drive system module 55 for controlling the drive of the stage, process condition input module 61 for obtaining the etching conditions of the dry etching apparatus 80 from the dry etching apparatus control module 81, and misalignment inspection control From a data input module 62 that acquires measurement data from the misalignment inspection device 70 from the module 71, an exposure amount calculation module 63 that calculates an effective exposure amount from the measurement data input from the input module 62, and a calculated effective exposure amount Exposure compensation A correction coefficient calculation module 64 for calculating the number, the data output module 65 for setting an exposure amount calculated correction coefficient on the basis of, and exposure management information from the storing memory 66.. The exposure apparatus control unit 51 a is connected to a local area network (LAN) 90 and is managed by the host computer 91.

  According to the modification of the exposure apparatus control system of the present invention, it is possible to provide a semiconductor device manufacturing method using an exposure method that improves the precision and uniformity of microfabrication.

(Example)
A method for manufacturing a semiconductor device according to an embodiment of the present invention uses an exposure monitor pattern to obtain a difference in width between patterns formed in a photolithography process and a dry etching process. It is characterized by performing monitoring and processing control, and the others are the same as those in the first and second embodiments, and redundant description is omitted.

  As described above, in the present invention, the pattern forming process of the semiconductor device is controlled by the corrected exposure amount. The corrected exposure amount includes correction of variation components in dry etching. However, when the dry etching has a large distribution that is significantly deviated from the optimum condition, the control with the correction of only the exposure amount becomes difficult, and the variation in the pattern width also increases. When the dry etching conditions are clearly shifted and a large distribution is generated, the process can be managed more efficiently by readjusting the dry etching conditions. The semiconductor device manufacturing method according to the embodiment of the present invention is a method of extracting and monitoring the influence of the pattern width by dry etching and obtaining the optimum etching conditions by the same method as the exposure amount correction.

  (A) In step S301 of FIG. 34, the data output module 65 reads out the corrected exposure amount SH (x, y) stored in advance from the storage device 66 and outputs it to the exposure device control unit 51.

  (B) In step S302, an etching test wafer (semiconductor substrate 1) that has undergone a predetermined process is set in the exposure apparatus 50.

  (C) In step S303, using a predetermined reticle 4c, exposure is performed according to the set shot SH (x, y), development is performed, and a resist pattern is formed.

  (D) In step S304, the misalignment width distribution RL (x, y) of the monitor resist pattern 13 is measured by the misalignment inspection apparatus 70, and the result is transferred from the misalignment inspection control module 71 to the storage device 66 of the exposure processing unit 60. store.

  (E) In step S305, the semiconductor substrate 1 is set in the dry etching apparatus 80, and the base film 2 is etched using the resist pattern as a mask under predetermined RIE conditions.

  (F) In step S306, the resist pattern is removed by wet etching.

  (G) In step S307, the semiconductor substrate 1 is set in the misalignment inspection apparatus 70, and the distribution BL (x, y) of the misalignment width of the monitor base film pattern 12 is measured. The result is stored in the storage device 66 of the exposure processing unit 60 by the misalignment inspection control module 71.

  (H) In step S308, the exposure amount calculation module 63 obtains the shift width distribution RL (x, y) of the monitor resist pattern 13 and the shift width distribution BL (x, y) of the monitor base film pattern 12 from the storage device 66. The difference between BL (x, y) and RL (x, y) is obtained by reading, and a deviation width difference distribution is obtained.

  (I) In step S309, it is checked whether the variation in the deviation width difference distribution is within an allowable range. For example, 3σ of the deviation width difference distribution is calculated and compared with a predetermined reference value.

  (N) If the deviation width difference distribution exceeds the allowable range, the etching conditions are readjusted in step S310, the process returns to step S302, and the etching test is repeated.

  (L) If it is within the allowable range, the process proceeds to step S311 to start the processing of the lot semiconductor substrate.

  In this embodiment, the monitor base film pattern 12 formed by RIE is formed using the monitor resist pattern 13 projected and transferred from the exposure monitor pattern as a mask. A deviation width difference distribution is obtained from the deviation width of the monitor resist pattern 13 after photolithography and the deviation width of the monitor base film pattern 12 after RIE. Accordingly, the deviation width difference distribution is obtained by extracting the in-plane distribution of etching by RIE. Of course, the same processing may be performed by converting the shift width into the effective exposure amount.

  FIGS. 35 and 36 are effective exposure distributions calculated from the pattern shift widths of the monitor resist pattern 13 and the monitor base film pattern 12 obtained in steps S304 and S307, respectively. FIG. 37 is an effective exposure difference distribution obtained by subtracting each effective exposure distribution. As described above, according to the embodiment of the present invention, the tendency of dimensional variation due to dry etching can be observed as an effective exposure amount distribution.

  It is also clear from the above description that the influence of dry etching can be measured in the same manner even when the exposure monitor pattern of the second embodiment of the present invention is used.

  According to the embodiment of the present invention, it is possible to provide an etching method using a monitoring method that improves the precision and uniformity of microfabrication.

(Other embodiments)
As described above, the present invention has been described according to the first and second embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  In the embodiment of the present invention, a KrF excimer laser reduced projection exposure apparatus is used for convenience of explanation. However, as a light source, ultraviolet rays such as i-line and g, other excimer lasers, electron beams, and X-rays are used. Of course, etc. may be used. An exposure apparatus such as a contact system, a proximity system, or a mirror projection system may be used.

  The RIE plasma source used as an anisotropic dry etching method is well known as a parallel plate type, but there are various types depending on the frequency band of electromagnetic waves used, the method of introducing electromagnetic waves, and the method of applying electromagnetic waves and magnetic fields. Of course, a plasma source of a form, for example, a magnetic field microwave type represented by electron cyclotron resonance (ECR), a magnetron type, a helicon wave type, a surface wave type, etc. can be used for dry etching, and further, RIE In addition, it is needless to say that anisotropic dry etching methods such as reactive ion beam etching (RIBE) and ion beam etching (IBE) can be applied.

  In the embodiment of the present invention, an exposure pattern in which the aperture ratio of the diffraction grating is changed at a desired ratio is used in order to provide the distribution of the transmittance of the exposure light. Of course, any method may be used as long as the distribution of the transmittance of the exposure light can be provided. For example, even if it is a metal, if it is made into a thin film, light transmittance will arise, Therefore If the metal used as a light shielding film is deposited with thickness distribution, the light transmittance can be made variable. Alternatively, the transmittance can be varied by changing the particle density by making the light-shielding material particulate.

Further, although the silicon oxide film (SiO ₂ ) is used as the base film, other insulating films such as a silicon nitride film (SiN), a silicon oxynitride film (SiON), phosphorus, or phosphorus and boron are diffused. It is clear that silicon oxide film (PSG or BPSG), spin-on-glass film (SOG) with silicone resin, polyimide resin film, fluorine-added silicon oxide film, organopolysiloxane compound, inorganic polysiloxane compound, etc. can be used. It is. Furthermore, not only the insulating film but also conductive film formation, for example, metal films such as aluminum (Al) and copper (Cu), refractory metal films represented by titanium (Ti), tungsten (W), and silicide films thereof. Of course, a polysilicon film or the like may be used as a base film processed by anisotropic dry etching.

  As described above, the present invention naturally includes various embodiments that are not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

It is sectional drawing which shows an example of the semiconductor substrate used for the monitoring method which concerns on the 1st Embodiment of this invention. It is a schematic block diagram of the exposure apparatus used for the monitoring method which concerns on the 1st Embodiment of this invention. It is a figure which shows the residual film characteristic with respect to the exposure amount of the resist for description of the monitoring method which concerns on the 1st Embodiment of this invention. 1A is a cross-sectional view of a reticle, FIG. 2B is a view showing transmission characteristics of exposure light, and FIG. 1C is a cross-section of a resist pattern to be described for explaining the monitoring method according to the first embodiment of the present invention. It is an example of a figure. It is sectional drawing which shows an example of the reticle used for description of the monitoring method which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the exposure method for description of the monitoring method which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the permeation | transmission characteristic of exposure light with respect to the aperture ratio of the reticle for description of the monitoring method which concerns on the 1st Embodiment of this invention. 1A is a plan view and FIG. 1B is a cross-sectional view showing an example of a reticle used in the monitoring method according to the first embodiment of the present invention. 1A is a cross-sectional view of a reticle, FIG. 3B is a cross-sectional view of a monitor resist pattern to be formed, and FIG. It is an example. It is a figure which shows the relationship with the inclination side wall angle of the shift | offset | difference width by the monitoring method which concerns on the 1st Embodiment of this invention. It is an example of process sectional drawing for demonstrating the monitoring method which concerns on the 1st Embodiment of this invention. It is an example of sectional drawing of the reticle used for the monitoring method which concerns on the 1st Embodiment of this invention. It is an example of sectional drawing of (a) monitor resist pattern and (b) monitor base film pattern obtained at the process explaining the monitoring method which concerns on the 1st Embodiment of this invention. It is a figure which shows the exposure shot position of the semiconductor substrate by the exposure apparatus of FIG. It is a figure which shows an example of distribution of (a) shift width of a line / space base film pattern, and (b) shift width of a monitor base film pattern by the monitoring method which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of a reticle for description of the monitoring method concerning the modification of the 1st Embodiment of this invention. It is an example of the top view of (a) monitor resist pattern obtained by the monitoring method concerning the modification of the 1st Embodiment of this invention, and (b) monitor base film pattern. It is an example of sectional drawing of (a) monitor resist pattern obtained by the monitoring method concerning the modification of the 1st Embodiment of this invention, and (b) monitor base pattern. It is a top view which shows an example of the position shift monitor pattern used for description of the monitoring method which concerns on the 2nd Embodiment of this invention. It is an example of process sectional drawing for demonstrating the monitoring method which concerns on the 2nd Embodiment of this invention. It is an example of sectional drawing of the reticle used for the monitoring method which concerns on the 2nd Embodiment of this invention. It is an example of sectional drawing of (a) monitor resist pattern obtained by the process explaining the monitoring method concerning the 2nd Embodiment of this invention, and (b) monitor base film pattern. It is an example of the top view of the (a) position shift monitor resist pattern obtained by the monitoring method concerning the 2nd Embodiment of this invention, and the (b) position shift monitor base film pattern. It is a top view which shows the other example of the position shift monitor pattern used for description of the monitoring method which concerns on the 2nd Embodiment of this invention. It is a top view which shows the further another example of the position shift monitor pattern used for description of the monitoring method which concerns on the 2nd Embodiment of this invention. It is a schematic block diagram of the exposure system used for the exposure method which concerns on the 3rd Embodiment of this invention. It is a figure which shows the relationship between the shift | offset | difference width of the resist pattern used for description of the exposure method which concerns on this invention, and exposure amount setting value. It is a figure which shows an example of distribution of the shift width of the line / space resist pattern used for description of the exposure method which concerns on this invention. It is a figure which shows an example of distribution of the effective exposure amount used for description of the exposure method which concerns on this invention. It is a figure which shows an example of distribution of the shift width of the line / space resist pattern obtained with the exposure method which concerns on this invention. It is a figure which shows an example of distribution of the effective exposure amount obtained by the exposure method which concerns on this invention. It is a flowchart which shows an example of the process for description of the exposure method which concerns on this invention. It is a schematic block diagram of the exposure system used for the exposure method which concerns on the modification of this invention. It is a flowchart which shows an example of the process for description of the dry etching control method which concerns on the Example of this invention. It is a figure which shows an example of distribution of the effective exposure amount with respect to the resist pattern obtained by the dry etching control method which concerns on the Example of this invention. It is a figure which shows an example of distribution of the effective exposure amount with respect to the base silicon oxide film pattern obtained by the dry etching control method which concerns on the Example of this invention. It is a figure which shows an example of distribution of the effective exposure amount difference obtained by the dry etching control method which concerns on the Example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Base film 3 Resist film 4, 4a-4e Reticle 5 Transparent substrate 6, 6a-6m Light-shielding film 7 Exposure light 8 0th-order diffracted light 9 1st-order diffracted light 10 Pupil diaphragm 11 Resist pattern 12, 12a, 12b, 32a- 32c Monitor base film pattern 13, 13a, 13b, 33a to 33c Monitor resist pattern 14a, 14b Reference position resist pattern 15 Exposure test pattern 16, 16a to 16h, 17 Exposure monitor pattern 18 Line / space pattern 19 Reference position pattern 20 Inclined sidewall 21 Steep angle side wall 22 Line / space underlayer film pattern 23 Line / space resist pattern 24a, 24b Reference position underlayer film pattern 26 Misalignment monitor pattern 27 Misalignment monitor resist pattern 28 Misalignment monitor underlayer pattern 40 Illumination optical system 41 Light source 42 Shutter 44 Illumination lens system 46 Projection optical system 48 Stage 50 Exposure apparatus 51 Exposure apparatus control unit 52 Illumination optical system module 53 Projection optical system module 54 Alignment system module 55 Stage drive system module 60 Exposure processing unit 61 Process condition input module 62 Data input module 63 Exposure amount calculation module 64 Correction coefficient calculation module 65 Data output module 66 Storage device 70 Misalignment inspection device 71 Misalignment inspection control module 80 Dry etching device 81 Dry etching device control module 90 LAN
91 Host computer

Claims (7)

A step of approximating and setting an exposure amount for each exposure region as a function of position coordinates of the semiconductor substrate in an exposure region of the semiconductor substrate divided into a plurality of sections;
Forming a base film on the semiconductor substrate;
Forming a monitor resist pattern by transferring an exposure monitor pattern formed of a diffraction grating whose light transmission characteristics monotonously change in one direction on the base film;
Measuring the width of the monitor resist pattern in the one direction for each exposure region;
Selectively etching the base film under a set etching condition using the monitor resist pattern as a mask to form a monitor base film pattern;
Measuring the deviation width distribution of the difference between the width of the monitor base film pattern in one direction and the width of the monitor resist pattern for each exposure region;
The variation of the deviation width distribution is compared with a reference value, and if the variation is smaller than the reference value, the following processing is performed while maintaining the exposure amount setting of the exposure region. A step of calculating and setting a new exposure amount for each exposure region by approximating the deviation width distribution again with a function of the position coordinates of the semiconductor substrate when the reference value is exceeded. A method for manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the function is a second or higher order polynomial of the position coordinates of the semiconductor substrate.   3. The method of manufacturing a semiconductor device according to claim 1, wherein a pitch of the diffraction grating is smaller than a width determined by a light source wavelength, a lens numerical aperture, and a coherence factor of the exposure apparatus that performs the transfer. When the pitch P of the diffraction grating is λ as the light source wavelength, NA as the lens numerical aperture, and σ as the coherence factor,
P <λ / (NA × (1 + σ))
The method for manufacturing a semiconductor device according to claim 1, wherein the following condition is satisfied. A step of setting an exposure amount for each exposure area of the semiconductor substrate divided into a plurality of areas;
Forming a base film on the semiconductor substrate;
Applying a resist film on the base film;
Forming a monitor resist pattern by transferring an exposure monitor pattern composed of a diffraction grating whose light transmission characteristics monotonously change in one direction on the base film;
Measuring a deviation width of the monitor resist pattern in the one direction for each exposure region;
Selectively etching the base film under a set etching condition using the monitor resist pattern as a mask to form a monitor base film pattern;
Measuring a deviation width of the monitor base film pattern in the one direction for each exposure region;
When the difference between the shift width of the monitor base film pattern and the shift width of the monitor resist pattern is taken, a shift width difference distribution is obtained, the variation of the shift width is compared with a reference value, and the variation is smaller than the reference value Performing the following process while maintaining the setting of the etching condition, and if the variation exceeds the reference value, changing the setting of the etching condition and setting a new etching condition. A method for manufacturing a semiconductor device, comprising:   6. The method of manufacturing a semiconductor device according to claim 5, wherein the pitch of the diffraction grating is smaller than a width determined by a light source wavelength, a lens numerical aperture, and a coherence factor of the exposure apparatus that performs the transfer. When the pitch P of the diffraction grating is λ as the light source wavelength, NA as the lens numerical aperture, and σ as the coherence factor,
P <λ / (NA × (1 + σ))
The method for manufacturing a semiconductor device according to claim 5, wherein the following condition is satisfied.