JP4105677B2 - Head position detection method and disk device - Google Patents

Description

  The present invention relates to a head position detection method and a disk device, and more particularly to a head position detection method and a disk device that detect a servo signal by an area servo system. In recent years, with the increase in the amount of information in the information society, there has been a demand for an increase in storage capacity of a magnetic disk device and a faster access to stored data. For this reason, an increase in BPI (Byte Per Inch: a unit indicating recording density) and improvement in TPI (Tracks Per Inch: a unit indicating track density) are required for magnetic disk devices.

  On the other hand, when the TPI is increased in the magnetic disk device, the dead space between tracks decreases. When dead space between tracks is reduced, high head position detection accuracy is required. Further, in order to realize high head position detection accuracy, it is necessary to detect servo signals with high accuracy. For this reason, the servo signal detection method detects the head position from the peak value of the conventional servo signal, so-called area servo, which integrates the servo signal waveform from the so-called peak hold method and detects the head position by the integrated value. The method has been shifted.

  FIG. 10 is a block diagram showing an example of a conventional magnetic disk device. The magnetic disk device 1 records and reproduces information by bringing a magnetic head 3 close to a magnetic disk 2 made of a magnetic material rotating in the direction of arrow A. In the magnetic disk 2, concentric cylinders are set in advance in order to determine the information recording / reproducing position. The magnetic head 3 is held at the tip of the arm 4. The other end of the arm 4 is held by the actuator 5. The actuator 5 rotates the arm 4 about the shaft 5a in the direction of arrow B, and controls the position of the magnetic head 3 to a desired cylinder.

  A signal reproduced by scanning the magnetic disk 2 with the magnetic head 3 is supplied to an R / W (Read / Write) preamplifier 6. The R / W preamplifier 6 amplifies the signal reproduced by the magnetic head 3, supplies the amplified signal to an automatic gain control (AGC) amplifier 7, and amplifies the recording signal recorded on the magnetic disk 2 to amplify the magnetic head. 3 is supplied.

  The AGC circuit 7 controls the reproduction signal amplified by the R / W preamplifier 6 so that the amplitude of the main signal is below a certain level. The output signal of the AGC circuit 7 is supplied to the signal detection unit 8 and the servo detection unit 9. The signal detector 8 reads control information and data from the reproduction signal, converts them into digital information, and supplies the digital information to the CPU 10. The CPU 10 decodes the digital information read from the signal detection unit 8 and outputs it as reproduction data.

  The servo detection circuit 9 detects the servo part from the output signal of the AGC amplifier 7, detects the current position of the magnetic head 3 from the servo burst signal of the servo part, generates an error signal, and supplies it to the CPU 10. . The CPU 10 generates a position control signal for controlling the position of the magnetic head 3 in accordance with the error signal from the servo detector 9 and supplies the position control signal to a D / A (Digital / Analog) converter 11. In the D / A converter 11, the position control signal supplied from the CPU 10 is converted into an analog signal and supplied to the driver 12. The driver 12 generates a drive signal for driving the actuator 5 according to the position control signal supplied from the D / A converter 11 and supplies the drive signal to the actuator 5.

  The actuator 5 is rotated about the shaft 5 a by the drive signal supplied from the driver 12 to rotate the arm 4 in the arrow B direction. As the actuator 5 rotates, the magnetic head 3 held at the tip of the arm 4 moves in the direction of arrow B on the magnetic disk 2 to scan a desired cylinder on the magnetic disk 2. FIG. 11 shows the data format of the magnetic disk. FIG. 11A is a perspective view of the magnetic disk, and FIG. 11B is a development view of the cylinder.

  As shown in FIG. 11A, the magnetic disk 2 has a plurality of cylinders 21 concentrically formed on both sides. As shown in FIG. 11B, servo units 22 for recognizing the position of the magnetic head 3 by being read by the magnetic head 3 are formed in the cylinder 21 at a predetermined interval. Is formed.

  The servo burst signal written in the servo unit 22 at the time of recording / reproduction is reproduced by the magnetic head 3, and the cylinder number that the magnetic head 3 is currently scanning and the positional deviation on the cylinder 21 are recognized by the CPU 10 by the reproduced signal. Is done. FIG. 12 shows the data format of the servo part of the magnetic disk. The servo unit 22 generates an AGC unit 24 for unifying the signal reception level, a tracing pattern unit 25 indicating the start of servo information, a servo information unit 26 in which digital information such as a cylinder number is recorded, and a tracking error signal The servo burst unit 27 is recorded with a servo burst signal for recording.

  As shown in FIG. 12, the servo burst unit 27 is composed of servo burst signals S1 and S2 formed across adjacent cylinders 21 and servo burst signals S3 and S4 formed on each cylinder 21, and servo burst signal S1. , S2, S3, S4 are sequentially formed in the extending direction of the cylinder. FIG. 13 shows a waveform diagram of a servo burst signal reproduced by the magnetic head. FIG. 13 shows a waveform diagram of a reproduction signal when the magnetic head 3 in FIG. 12 scans the approximate center of the cylinder 21-1 in the direction of arrow C.

  First, at time t0 to t1, the magnetic head 3 scans the servo burst signal S1. At this time, since the servo burst signal S1 is formed from the center of the cylinder 21-1 to the center of the cylinder 21-2, when the magnetic head 3 scans the center of the cylinder 21-1, approximately half of the servo burst signal S1 is scanned. Will do. For this reason, the amplitude is approximately half that when the servo burst signal is reproduced by the entire magnetic head 3.

  Next, when the magnetic head 3 scans on the cylinder 21-1 in the direction of arrow C at time t1 to t2, the magnetic head 3 scans on the servo burst signal S2. At this time, since the servo burst signal S2 is formed from the center of the cylinder 21-3 to the center of the cylinder 21-1, when the magnetic head 3 scans the center of the cylinder 21-1, approximately half of the servo burst signal S2 is scanned. Will do. For this reason, the amplitude is approximately half that when the servo burst signal is reproduced by the entire magnetic head 3.

  Next, when the magnetic head 3 scans on the cylinder 21-1 in the direction of arrow C at time t2 to t3, the magnetic head 3 scans on the servo burst signal S3. At this time, since the servo burst signal S3 is formed over the entire width of the cylinder 21-1, all signals reproduced by the magnetic head 3 become servo burst signals, and when the servo burst signal is reproduced by the magnetic head 3. The maximum amplitude of.

  Next, when the magnetic head 3 scans on the cylinder 21-1 in the direction of arrow C at time t3 to t4, the magnetic head 3 scans between the servo burst signals S4. For this reason, the servo burst signal S4 is not reproduced. As shown in FIG. 13, the reproduction signal of the servo burst signal is supplied to the servo detection unit 9 via the R / W preamplifier 6 and the AGC amplifier 7. The servo detector 9 integrates an integrated value obtained by integrating the servo burst signal S1 and the servo burst signal S2 in order to accurately obtain the difference between the servo burst signal S1 and the servo burst signal S2 formed between the adjacent cylinders. Ask.

  FIG. 14 is a block diagram showing an example of a conventional servo detector. The servo detection unit 9 is obtained by a full-wave rectifier 31 that full-wave rectifies the output servo burst signal of the AGC amplifier 7, an integration circuit 32 that integrates the servo burst signal that is full-wave rectified by the full-wave rectifier 31, and an integration circuit 32. The A / D converter 33 that converts the integrated value into digital data, the zero-cross detector 34 that detects the zero-cross point of the output servo burst signal of the AGC amplifier 7, and the zero-cross point detected by the zero-cross detector 34 are counted in advance. The integration control circuit 35 controls the integration circuit 32 so as to hold the integration value of the integration circuit 32 when the set count value is reached.

  FIG. 15 shows a block diagram of a conventional integrating circuit. The integrating circuit 32 includes a capacitor Cap that stores the servo burst signal that has been full-wave rectified by the full-wave rectifier 31, and a hold circuit 36 that holds the charging voltage stored in the capacitor Cap. The hold circuit 36 is connected to the CPU 10 and the integration control circuit 35, and discharges the charging voltage held in the capacitor Cap and holds the charging voltage of the capacitor Cap. The hold circuit 36 discharges the capacitor Cap in accordance with the start control signal from the CPU 10 and charges the servo burst signal to the capacitor Cap.

  The integration control circuit 35 is also supplied with a start control signal from the CPU 10, and the count value at the zero cross point is reset. The integration control circuit 35 is reset by a start control signal from the CPU 10, starts counting, and holds the charging voltage of the capacitor Cap in the hold circuit 36 when the count reaches a predetermined count value set in advance.

  FIG. 16 is a diagram for explaining the operation of the conventional servo detector. 16A shows the servo burst signal, FIG. 16B shows the zero cross point count value, and FIG. 16C shows the charging voltage of the capacitor Cap. When a start control signal is output from the CPU 10 at time t0, the capacitor Cap is discharged, the charging voltage of the capacitor Cap becomes 0 as shown in FIG. 16C, and the integration as shown in FIG. The control circuit 35 is reset, and the count value at the zero cross point of the servo burst signal is set to zero.

  Next, as shown in FIG. 16A, when the servo burst signal passes through the zero cross point at time t1, the count value of the integration control circuit 35 is counted up and becomes "1". Similarly, the servo burst signal crosses zero at times t2 to t10, and the count value of the integration control circuit 35 is counted up. During this time, the capacitor Cap is charged by a signal obtained by full-wave rectification of the servo burst signal shown in FIG. 16A, and the charging voltage rises as shown in FIG.

  When the count value of the integration control circuit 35 reaches a predetermined count value “10” set in advance at time t10, the integration control circuit 35 controls the hold circuit 36 to stop charging the capacitor Cap. Further, the integration control circuit 35 holds the charging voltage V1 at that time in the hold circuit 36. The charging voltage V1 held in the hold circuit 36 is converted into digital data by the A / D converter 33 and supplied to the CPU 10.

  The CPU 10 outputs an error signal for controlling the position of the magnetic head 3 so that the magnetic head 3 scans the center of the desired cylinder 21-1 according to the difference between the integral values of the servo burst signal S1 and the servo burst signal S2. Generate.

  However, in the servo detection circuit using the area servo system of the conventional magnetic disk device, noise appears near the zero cross point of the servo burst signal as shown by broken lines in the vicinity of times t11, t5 and t12 in FIG. 16B, the noise is counted as a zero cross point as shown in (5) and (7), the number of peaks of the burst signal to be integrated increases, and the count value of the integration control circuit is increased at time t8. It becomes “10”. Therefore, the capacitor Cap, whose integration is originally stopped at the time t10, is stopped at the time t8, so that the integration value V2 which is shorter in the integration period by the time (t10-t8) than the normal integration value V1. It will be detected.

  Therefore, there is a problem in that the integrated value of the servo burst signal varies due to noise, the accurate on-track state cannot be grasped, and the head position cannot be accurately positioned. Further, the servo circuit using the area servo system of the conventional magnetic disk device has a constant capacity for charging the servo burst signal. On the other hand, the waveform of the read servo burst signal differs depending on whether the position of the magnetic head is on the inner peripheral side of the magnetic disk or the outer peripheral side of the magnetic disk.

FIG. 17 shows waveform diagrams of servo burst signals on the inner and outer peripheral sides of the magnetic disk. In FIG. 17, the solid line indicates the waveform of the servo burst signal on the inner peripheral side, and the broken line indicates the waveform of the servo burst signal on the outer peripheral side. Since the recording density of the magnetic disk is different between inner and outer peripheries of the magnetic disks, a difference in the half value width W ₅₀ is generated in reproducing the servo burst signals and to maximize the recording density on the inner peripheral side, the outer peripheral side, distorted as indicated by a broken line in the half-value width W ₅₀ is reduced view of the servo burst signal.

  For this reason, on the outer peripheral side of the magnetic disk, the integral value of the servo burst signal is smaller than that on the inner peripheral side by the amount indicated by the oblique lines in FIG. When the integral value of the servo burst signal is small, the change in the integral value with respect to the position of the magnetic head is also small. Therefore, the difference in the integral value of the burst signal with respect to the amount of change is small, and the sensitivity to the positional deviation of the magnetic head is reduced. There was a problem that the position could not be accurately positioned.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a head position detection method and a disk apparatus that can accurately position a head by accurately detecting a servo burst signal.

  The present invention reads a servo signal written in advance on a disk by a head, integrates the servo signal read by the head by the number of predetermined zero cross points, and based on the integrated value, In the head position detection method for detecting the position at, the zero cross point of the servo signal is detected, the zero cross point is counted, and the time from the start of detection of the zero cross point of the servo signal is counted, When the measured time is equal to or longer than a predetermined time smaller than the time when the servo signal zero-cross point count starts and becomes a constant count value, and the detected zero-cross point is detected for the predetermined number of times, The servo signal integration operation is stopped.

  According to the present invention, even if the noise in the servo signal is counted as a zero cross point and becomes a constant count number within the predetermined time, the integration stop is not permitted unless the predetermined time elapses. Since a small integrated value is not detected, the influence of noise and the like can be reduced, and the position of the head on the disk can be accurately detected.

  As described above, according to the present invention, even if the noise in the servo signal is counted as the zero cross point and becomes a constant count within the predetermined time, the integration is not allowed to stop unless the predetermined time elapses. Since an integral value smaller than necessary is not detected, the effects of noise and the like can be reduced, and the position of the head on the disk can be accurately detected.

  FIG. 2 shows a block diagram of an embodiment of the present invention. In the figure, the same components as those in FIG. 14 are denoted by the same reference numerals, and the description thereof is omitted. In this embodiment, the servo signal detection method of the present invention is applied to a hard disk drive (HDD).

  The hard disk drive 100 according to this embodiment is characterized by a servo detection unit 101 and a CPU 102. The servo detection unit 101 of this embodiment is a circuit that detects an integrated value of a servo burst signal and generates a tracking error signal from the difference between the servo burst signals. In addition to removing noise, the servo burst signal period is limited to prevent erroneous detection of the servo burst signal.

  FIG. 1 is a block diagram of a servo detection unit 101 according to an embodiment of the present invention. In the figure, the same components as those in FIG. 10 are denoted by the same reference numerals, and the description thereof is omitted. The servo detection unit 101 of this embodiment is supplied with the output signal of the AGC amplifier. In the servo detection unit 101, the output signal of the AGC amplifier 7 is first supplied to a low-pass filter 111 that removes noise.

  When the frequency of the servo burst signal is about 7 to 8 MHz, the low-pass filter 111 is set to a characteristic that cuts a signal having a frequency of 20 MHz or more, which is twice that of the servo burst signal. The low-pass filter 111 removes the noise component without distorting the waveform of the servo burst signal and supplies it to the zero-cross detector 34. For this reason, the zero cross detector 34 does not erroneously detect a noise component as a zero cross point.

  The signal from which the noise component has been removed by the low-pass filter 111 is supplied to the full-wave rectifier 31 and the zero-cross detector 34. The full wave rectifier 31 performs full wave rectification on the signal supplied from the low pass filter 111. The zero cross detector 34 detects a zero cross point of the signal supplied from the low pass filter 111. The signal that has been full-wave rectified by the full-wave rectifier 31 is supplied to the integration circuit 112. The integration circuit 112 detects the integrated value of the servo burst signal by charging a capacitor that has been full-wave rectified by the full-wave rectifier, converts the signal into digital data by the A / D converter 33, and supplies the digital data to the CPU 102. .

  Here, details of the integration circuit 112 will be described with reference to the drawings. FIG. 3 is a block diagram of an integration circuit according to an embodiment of the present invention. The integrating circuit 112 of this embodiment holds two capacitors C1 and C2 having different capacities, a switching circuit 121 that switches a capacitor to be charged among the capacitors C1 and C2, and a charging voltage of the capacitor selected by the switching circuit 121. The hold circuit 122 is configured.

  The capacitor C1 is set to have a larger capacity than the capacitor C2, and is selected when the position of the magnetic head 3 is located on the inner peripheral side from a predetermined position of the magnetic disk 2. The capacitor C2 is set to have a smaller capacity than the capacitor C1, and is selected when the position of the magnetic head 3 is positioned on the outer peripheral side from a predetermined position of the magnetic disk 2.

  A switching control signal is supplied from the CPU 102 to the switching circuit 121. The switching circuit 121 switches the connection between the capacitors C1 and C2 in accordance with a switching control signal supplied from the CPU 102. The CPU 102 generates a switching control signal by a capacity switching process that is performed according to the detection result of the cylinder number.

  FIG. 4 is a flowchart of the CPU capacity switching process according to the embodiment of the present invention. The CPU 102 monitors the signal from the signal detection unit 8 and executes a capacity switching process when it detects reading of the servo unit shown in the figure. First, the CPU 102 recognizes the cylinder number information Sa supplied from the signal detector 8 (steps S1-1 and S1-2).

  When the cylinder number information Sa is recognized in step S1-2, the recognized cylinder number information Sa is compared with a preset cylinder number S0 that separates the outer peripheral side and the inner peripheral side of the magnetic disk 2 (step S1-2). S1-3). If the recognized cylinder number Sa is smaller than the boundary cylinder number Sa in step S1-3, it is determined that the magnetic head 3 is located on the inner peripheral side with respect to the magnetic disk 2, and the switching circuit 121 is connected to the capacitor C1. A switching control signal is generated to control so as to be controlled (step S1-4).

  In step S1-3, if the recognized cylinder number Sa is larger than the boundary cylinder number Sa, it is determined that the magnetic head 3 is positioned on the outer peripheral side with respect to the magnetic disk 2, and the switching circuit 121 is connected to the capacitor C1. Then, a switching control signal is generated to control as described above (step S1-5). In this manner, the magnetic head 3 is currently on the magnetic disk 2 in accordance with the cylinder number information stored in the servo unit currently scanned by the magnetic head 3 on the magnetic disk 2 by the capacity switching process by the CPU 102. It is determined whether it exists on the inner peripheral side or the outer peripheral side, and a switching control signal corresponding to the position of the magnetic head 3 is supplied to the switching circuit 121. The switching circuit 121 switches to either a capacitor C1 having a large capacity or a capacitor C2 having a small capacity in accordance with a switching control signal from the CPU 102.

  Thus, when the magnetic head 3 is located on the inner peripheral side of the magnetic disk 2, the capacitor C1 having a large capacity is connected, and when the magnetic head 3 is located on the outer peripheral side of the magnetic disk 2, the capacitor C2 having a small capacity is connected. For this reason, as shown in FIG. 17, the servo burst signal is charged by the capacitor C1 having a larger capacity than the outer peripheral side on the inner peripheral side of the magnetic disk where the half-value width of the reproduction signal from the magnetic head 3 is large, and the integral value is obtained. As shown in FIG. 17, the servo burst signal is charged by the capacitor C1 having a smaller capacity than that of the inner peripheral side on the outer peripheral side of the magnetic disk 2 where the half-value width of the reproduction signal from the magnetic head 3 becomes smaller, and the integral value is obtained. Therefore, if setting is made so that there is no difference in the integral value between the inner and outer peripheral sides of the magnetic disk 2, the sensitivity of position control on the inner and outer peripheral sides of the magnetic disk 2 can be made substantially equal. Accordingly, the positioning accuracy of the magnetic head 3 can be made constant over the entire surface of the magnetic disk 2.

  In the integration circuit 112, the slope of the integral value is made constant regardless of the inner and outer circumferences of the magnetic disk by switching the capacitors C1 and C2 having different capacities. A configuration in which the integral value is made constant by changing the head 3 according to the position on the magnetic disk 2 is also conceivable. FIG. 5 is a block diagram showing a modification of the integrating circuit according to the embodiment of the present invention. In the figure, the same components as those in FIG. 3 are denoted by the same reference numerals, and the description thereof is omitted.

  The integration circuit 123 of this modification is configured such that the capacitance of the capacitor C0 is fixed and a current corresponding to the output signal of the full-wave rectifier is supplied to the capacitor C0 by the charge pump circuit 124. The gain of the output current with respect to the output signal of the full-wave rectifier 31 of the charge pump circuit 124 changes according to the instruction information from the CPU 102. The instruction information of the CPU 102 is converted into an analog signal by the D / A converter 125 and supplied to the charge pump circuit 124.

  FIG. 6 shows a flowchart of the capacity switching process of the CPU when the integration circuit of the modification of the embodiment of the present invention is used. The CPU 102 monitors the signal from the signal processing unit. When the CPU 102 recognizes and detects reading of the servo unit shown in the figure, it executes a capacity switching process. The CPU 102 recognizes the cylinder number information Sa supplied from the signal detection unit 8 (steps S2-1 and S2-2).

When the cylinder number information Sa is recognized in step S2-2, the CPU 102 reads out charging current information set in advance in accordance with the recognized cylinder number information Sa and supplies it to the D / A converter (step S2-2). S2-3). The charging current information is set according to the half-value width W ₅₀ of the reproduction signal of the servo burst portion, and the charging current supplied from the charge pump circuit 124 to the capacitor C 0 is larger as the cylinder number on the inner peripheral side of the magnetic disk becomes larger. It is set to be.

  The D / A converter 125 converts the charging current information supplied from the CPU 102 into an analog signal and supplies the analog signal to the charge pump circuit 124. The charge pump circuit 124 supplies a charging current obtained by amplifying the output signal of the full-wave rectifier to the capacitor C0 with a gain corresponding to the charging current information from the CPU. As described above, since the slope of the integral value of the servo burst portion can be made constant regardless of the position of the magnetic head 3 on the magnetic disk 2, the sensitivity of position control on the inner and outer peripheral sides of the magnetic disk 2 can be increased. Accordingly, the positioning accuracy of the magnetic head 3 can be made constant over the entire surface of the magnetic disk 2.

  The integrated value of the servo burst signal detected by the integrating circuits 112 and 123 shown in FIGS. 3 and 5 is supplied to the A / D converter 33. The A / D converter 33 converts the analog integration value of the servo burst signal detected by the integration circuit 112 into digital data and supplies the digital data to the CPU 102. The CPU 102 performs servo processing for controlling the position of the magnetic head 3 relative to the magnetic disk 2 based on the digital information supplied from the A / D converter 125.

  FIG. 7 shows a flowchart of the servo processing of the CPU according to the embodiment of the present invention. In the servo process, the CPU 102 first acquires digital information corresponding to the integral value of the first servo burst signal S1 shown in FIG. 12 from the A / D converter 33 and holds it (step S3-1). Next, the CPU 102 acquires digital information corresponding to the integral value of the second servo burst signal S2 arranged next to the first servo burst signal S1 shown in FIG. Step S3-2).

  The CPU 102 detects the difference between the integrated value of the first servo burst signal S1 acquired / held in step S2-1 and the integrated value of the second servo burst signal S2 acquired / held in step S3-2, and detects the first servo. A head position control signal is created according to the difference between the integral value of the burst signal S1 and the integral value of the second servo burst signal S2 (steps S3-3 and S3-4).

  The CPU 102 supplies the head position control signal created in step S3-4 to the D / A converter 11 and ends the servo processing (step S3-5). The D / A converter 11 converts the head position control signal supplied from the CPU 102 into an analog signal and supplies the analog signal to the driver 12 that drives the actuator 5. The driver 12 corrects the drive signal for driving the actuator 5 in accordance with the head position control signal supplied from the D / A converter 11.

  The drive signal generated by the driver 12 is supplied to the actuator 5. The actuator 5 rotates according to the drive signal supplied from the driver 12 to move the magnetic head 3 in the inner and outer peripheral directions of the magnetic disk 2. As described above, the first and second servo burst signals S1 and S2 arranged at the boundary with the cylinder adjacent to the cylinder currently being scanned by the magnetic head 3 are detected, and the magnetic head is selected according to the difference between the integrated values. 3 is controlled so that the difference between the integrated values of the first and second servo burst signals S1 and S2 is eliminated, that is, the magnetic head 3 scans the center line of the desired cylinder.

  Here, the zero cross counter 113 and the timer circuit 114 will be described with reference to FIG. In the servo detection unit 101, the output signal of the low-pass filter 111 is supplied to the integration circuit 112 via the full-wave rectifier 31, integrated, and supplied to the zero cross detector 34, so that the integration circuit 112 controls the integration period. Used.

  The zero cross detector 34 detects the zero cross point of the signal supplied from the low-pass filter 111 and generates a one-shot pulse at the zero cross point. The one-shot pulse generated at the zero cross point is supplied to the zero cross counter 113. The zero cross counter 113 counts one-shot pulses generated at the zero cross point supplied from the zero cross detector 34. At this time, the zero cross counter 113 is reset by a start control signal supplied from the CPU 102, and raises the output pulse to a high level.

  When the count value reaches a predetermined count number set in advance, the zero-cross counter 113 inverts the output pulse to make it low level. The count value of the zero cross counter 113 is supplied to the timer circuit 114. The timer circuit 114 is supplied with the same start control signal as that supplied from the CPU 102 to the zero cross counter 113, and is reset in synchronization with the zero cross counter 113 by the start control signal, for a predetermined time set in advance. Measure time. The timer circuit 114 permits the output of the output pulse of the zero cross counter 113 after a predetermined time has elapsed.

  FIG. 8 is a diagram for explaining the operation of the timer circuit according to one embodiment of the present invention. 8A shows a reproduction signal waveform of the servo burst portion that has been full-wave rectified by the full-wave rectifier 31, FIG. 8B shows a charging voltage waveform of the capacitor C1 or C2, and FIG. 8C shows an output of the timer circuit 114. A pulse waveform is shown. When the servo burst portion is detected at time t1, a start control signal is supplied from the CPU 102 to the hold circuit 122, zero cross counter 113, and timer circuit 114. The hold circuit 122 discharges the capacitor C1 or C2 in accordance with the start control signal from the CPU 102 and resets the held integral value. For this reason, the charging voltage of the capacitor C1 or C2 is set to “0” as shown in FIG.

  Next, as shown in FIG. 8A, when a signal obtained by full-wave rectifying the reproduction signal of the servo burst part is supplied from the full-wave rectifier 31 to the integrating circuit 112, the capacitor C1 or C2 of the integrating circuit 112 becomes full-wave. It is charged by the output signal of the rectifier 31. Therefore, as shown in FIG. 8B, the charging voltage of the capacitor C1 or C2 is gradually charged by the reproduction signal of the servo burst part.

  On the other hand, the zero cross counter 113 is reset in response to the start control signal from the CPU 102 at time t1, and the output pulse is set to the high level. Next, the zero cross counter 113 counts the zero cross points of the reproduction signal of the servo burst portion detected by the zero cross detector 34. The zero cross counter 113 inverts the output pulse from the high level to the low level when the zero cross point is counted to a predetermined number, for example, “10”.

  The timer circuit 114 is reset in response to a start control signal from the CPU 102 at time t1, and keeps timing until time t2 when a predetermined time T0 has elapsed. The timer circuit 114 permits the output of the output pulse of the zero cross counter 113 after a predetermined time T0 has elapsed. The predetermined time T0 is set to a time until the predetermined number is reached when the zero cross point is counted in the normal time.

  For this reason, even if the zero cross point reaches the predetermined count at time t3 and the output pulse of the zero cross counter 113 becomes low level, the timer circuit 114 has not timed since the predetermined time T0 from time t1. The output pulse supplied from the timer circuit 114 to the integrating circuit 112 is maintained at the high level, and is set to the low level at the time t2 when the time measured by the timer circuit 114 has passed the predetermined time counter T0.

  In addition, after the time measured by the timer circuit 114 reaches the predetermined time T0 after the reproduction signal of the servo burst part is supplied, the output pulse of the zero cross counter 113 is supplied to the integrating circuit 112. At this time, if the zero cross counter 113 has not reached the predetermined count, the output pulse of the zero cross counter 113 is at a high level, so the pulse supplied to the integration circuit 112 is maintained at a high level.

  When the count value of the zero cross point of the zero cross counter 113 reaches the predetermined count value at time t4, the output pulse of the zero cross counter 113 is inverted to low level, so that the pulse supplied to the integration circuit 112 at time t4 is also inverted and low. Become a level. An output pulse from the timer circuit 114 is supplied to the hold circuit 122 of the integration circuit 112. The hold circuit 122 of the integrating circuit 112 captures and holds the charging voltage charged in the capacitor C1 or C2 when the output pulse from the timer circuit 114 is at a high level, and the capacitor 122 when the output pulse from the timer circuit 114 is at a low level. The connection with C1 or C2 is disconnected, and the charging voltage when it becomes low level is held.

  For this reason, the count number of the zero cross point of the reproduction signal of the servo burst part is distorted due to noise or the like, and even if the zero cross point is not counted up to the original zero cross point to be counted, it is close to the position of the original count number. The timer circuit 114 holds the charging voltage of the capacitor C 1 or C 2 of the integrating circuit 112 by the hold circuit 122. Therefore, it is possible to detect an integral value approximated to the servo burst portion.

  Further, when the zero cross point of the reproduction signal of the servo burst portion is accurately counted, the timer circuit 114 finishes timing just before the zero count point of the accurate count number, and when the counting is finished, the integration circuit 112 The charge voltage of the capacitor C1 or C2 is held by the hold circuit 122. For this reason, the integral value of the servo burst portion can be accurately detected.

  According to the present embodiment, the zero-cross point count number to be counted by the zero-cross counter 113 is managed, and the timer circuit 114 manages the time at which the zero-cross point of the reproduction signal of the servo burst portion should become a predetermined count number. Since the integration value of the servo burst portion can be accurately detected by controlling the detection time of the charging voltage of the capacitor C1 or C2 of the integration circuit 112, the scanning of the magnetic head 3 on the cylinder can be performed accurately.

  In this embodiment, the timer circuit 114 is controlled to stop the integration circuit 112 by the output of the zero-cross counter 113 after a predetermined time T0 has elapsed from the start of integration, but further sets the integration end time. Thus, a configuration that prevents overintegration due to a count error or the like is also conceivable. FIG. 9 shows an operation explanatory diagram of a modified example of the timer circuit according to the embodiment of the present invention. FIG. 9A shows the reproduction signal waveform of the servo burst part that has been full-wave rectified by the full-wave rectifier 31, FIG. 9B shows the charging voltage waveform of the capacitor C1 or C2, and FIG. 9C shows the output of the timer circuit 114. The waveform diagram of a pulse permission signal is shown.

  When the servo burst portion is detected at time t1, a start control signal is supplied from the CPU 102 to the hold circuit 122, zero cross counter 113, and timer circuit 114. The hold circuit 122 discharges the capacitor C1 or C2 in accordance with the start control signal from the CPU 102 and resets the held integral value. For this reason, the charging voltage of the capacitor C1 or C2 is set to “0” as shown in FIG.

  Next, when a signal obtained by full-wave rectifying the reproduction signal of the servo burst part is supplied from the full-wave rectifier 31 to the integration circuit 112 as shown in FIG. 9A, the capacitor C1 or C2 of the integration circuit 112 becomes full-wave. It is charged by the output signal of the rectifier 31. Therefore, as shown in FIG. 9B, the charging voltage of the capacitor C1 or C2 is gradually charged by the reproduction signal of the servo burst portion.

  On the other hand, the zero cross counter 113 is reset in response to the start control signal from the CPU 102 at time t1, and the output pulse is set to the high level. Next, the zero cross counter 113 counts the zero cross points of the reproduction signal of the servo burst portion detected by the zero cross detector 34. The zero cross counter 113 inverts the output pulse from the high level to the low level when the zero cross point is counted to a predetermined number, for example, “10”.

  The timer circuit 114 is reset in response to a start control signal from the CPU 102 at time t1, and starts measuring time. The timer circuit 114 holds the pulse supplied to the integration circuit 112 at a high level until the time t2 when the measured time reaches the preset first time T1, and the time t3 when the preset second time T2 is reached. Thereafter, the signal is held at the low level, and the output pulse of the zero cross counter 113 is supplied to the integrating circuit 112 during the time T0 after the first time T1 elapses until the second time T2 elapses after the reset. Allow.

  At this time, the first time T1 is set to a time before a time that would be a predetermined number when the zero-cross point is counted in normal time, and the second time T2 is counted as the zero-cross point in normal time. In some cases, it is set to a time after the time that would be the predetermined number. Therefore, even if the zero cross point reaches a predetermined count at time t4 and the output pulse of the zero cross counter 113 becomes low level, the timer circuit 114 does not measure the predetermined time T0 from time t1. The output pulse supplied from the timer circuit 114 to the integrating circuit 112 is maintained at a high level, and is set to a low level at time t2 when the time measured by the timer circuit 114 becomes the first time T1, and the integrating operation of the integrating circuit 112 is performed. Is stopped.

  Further, after the time measured by the timer circuit 114 reaches the first time T1 after the reproduction signal of the servo burst portion is supplied, the output pulse of the zero cross counter 113 is supplied to the integrating circuit 112. Therefore, when the count value of the zero cross point of the zero cross counter 113 does not reach a predetermined value, the output pulse of the zero cross counter 113 is high level, so that the pulse supplied to the integration circuit 112 is maintained at high level. Here, when the count value of the zero cross point of the zero cross counter 113 reaches a predetermined count value at time t5, the output pulse of the zero cross counter 113 is inverted to a low level, so the pulse supplied to the integration circuit 112 at time t5 is also inverted. As a result, the integration level of the integration circuit 112 is stopped.

  Furthermore, when the time measured by the timer circuit 114 reaches the second time T2 after the playback signal of the servo burst part is supplied, the time is supplied to the integrating circuit 112 regardless of the output pulse of the zero cross counter 113. This pulse is forcibly set to a low level, and the integration operation of the integration circuit 112 is stopped. According to the present embodiment, when the time measured by the timer circuit 114 reaches the time t3 when the second time T2 is reached, the pulse supplied to the integrating circuit 112 is forced to be low regardless of the output pulse of the zero cross counter 113. Since the integration operation of the integration circuit 112 is stopped, the counting time of the zero crossing point is set in advance even if there is a zero crossing point that is not counted by the zero crossing counter 113 due to a counting error or the like. Since the integration operation of the integration circuit 112 can be stopped at the second time T2, which is greatly deviated from the predetermined count value, it is not necessary to perform an integration operation more than necessary in the integration circuit 112. Therefore, the integral value of the servo burst signal is not greatly shifted, and an accurate servo operation can be executed.

It is a block block diagram of the servo detection part of one Example of this invention. It is a block block diagram of one Example of this invention. It is a block block diagram of the integration circuit of one Example of this invention. It is a flowchart of the capacity | capacitance switching process of CPU of one Example of this invention. It is a block block diagram of the modification of the integration circuit of one Example of this invention. It is a flowchart of the capacity | capacitance switching process of CPU when using the integration circuit of the modification of one Example of this invention. It is a follow chart of the servo processing of CPU of one Example of this invention. It is operation | movement explanatory drawing of the timer circuit of one Example of this invention. It is operation | movement explanatory drawing of the modification of the timer circuit of one Example of this invention. It is a block block diagram of an example of the conventional magnetic disk apparatus. It is a figure which shows the data format of a magnetic disc. It is a figure which shows the data format of the servo part of a magnetic disc. FIG. 5 is a waveform diagram of a reproduction signal when a servo burst signal is reproduced by a magnetic head. It is a block block diagram of an example of the conventional servo detection part. It is a block block diagram of an example of the conventional integration circuit. It is operation | movement explanatory drawing of the conventional servo detection part. It is a wave form diagram of the servo burst signal of the inner peripheral side and outer peripheral side of a magnetic disk.

Explanation of symbols

2 Magnetic disk 3 Magnetic head 4 Arm 5 Actuator 6 R / W preamplifier 7 AGC amplifier 8 Signal detector 11 D / A converter 12 Driver 101 Servo detector 102 CPU
111 Low-pass filters 112 and 123 Integration circuit 113 Zero-cross counter 114 Timer circuit 121 Switching circuit 122 Hold circuit 124 Charge pump circuit 125 A / D converter

Claims (7)

The servo signal written in advance on the disk is read by the head, the servo signal read by the head is integrated by the number of predetermined zero cross points, and the position of the head on the disk is determined based on the integrated value. In the head position detecting method for detecting,
Detecting the zero cross point of the servo signal, counting the zero cross point, and measuring the time from the start of detection of the zero cross point of the servo signal,
When the measured time is equal to or longer than a predetermined time that is a constant count value since the counting of the zero cross point of the servo signal is started, and when the detected zero cross point is detected for the predetermined number of times, A head position detecting method, wherein the servo signal integration operation is stopped. Claims the previous SL measurement time, characterized in that stopping the integration of the servo signal when it is the servo signal counts of the zero-crossing point is started a predetermined time greater than the time at which the predetermined count value from the 2. The head position detection method according to 1. Wherein regardless of the detected position of the servo signal, the head position according to claim 1, wherein the sensitivity of the position control by the servo signal and controls the integrating sensitivity to be constant in the upper disk by pre SL head Detection method. The head position is detected by removing a noise component that changes the servo signal across a zero-cross point of the detected servo signal and integrating the servo signal from which the noise component has been removed. Item 4. The head position detection method according to Item 3. A signal detection means for detecting a signal written in advance on the disk, a zero-cross counter for counting a zero-cross point of a servo signal for detecting the position of the head in the signal detected by the signal detection means, and the servo signal A disk comprising an integrating circuit that integrates until the count value of the zero-crossing counter reaches a predetermined count value, and control means for controlling the position of the head on the disk based on the integrated value integrated by the integrating circuit In the device
Time measuring means for measuring the time from when the count of the zero cross counter is started,
The time measured by the time measuring means is equal to or longer than a predetermined time that is a certain count value after the start of counting of the zero cross point of the servo signal, and the detected zero cross point is detected by the predetermined count number. And an integration stop control means for stopping the integration operation of the servo signal when the servo signal is supplied. Timing means for pre-Symbol zero-crossing counter counts to counts the time from the start,
Integration stop control means for stopping the integration operation of the servo signal when the timed time has reached a predetermined time greater than the time when the servo signal reaches the constant count value after the count of the zero cross point of the servo signal is started. The disk device according to claim 5 . Regardless of the detected position of the servo signal on the disk by previous SL head, wherein the sensitivity of the position control by the servo signal and having an integral sensitivity control means for controlling the integral sensitivity to be constant Item 6. The disk device according to Item 5 .

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