JP4103071B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP4103071B2
JP4103071B2 JP2002172302A JP2002172302A JP4103071B2 JP 4103071 B2 JP4103071 B2 JP 4103071B2 JP 2002172302 A JP2002172302 A JP 2002172302A JP 2002172302 A JP2002172302 A JP 2002172302A JP 4103071 B2 JP4103071 B2 JP 4103071B2
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polarity
zno
thin film
zinc
substrate
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JP2004022626A (en
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吉博 伊藤
道雄 門田
慎 西條
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/024Group 12/16 materials
    • H01L21/02403Oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02554Oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/22Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/22Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
    • H01L29/2206Amorphous materials

Description

【0001】
【発明の属する技術分野】
本発明は半導体デバイスの製造方法に関し、より詳しくは半導体材料として酸化亜鉛(ZnO)を使用した半導体デバイスの製造方法に関する。
【0002】
【従来の技術】
II-VI族化合物半導体の一種であるZnOは、MgOやCdO等との混晶化によってバンドギャップエネルギを変化させることができ、量子井戸等の多層構造が可能であり、さらには励起子の結合エネルギが非常に大きいことから、発光素子への応用が期待されており、また、可視領域で透明であることから液晶ディスプレイ駆動用の透明薄膜トランジスタへの応用が期待されている。
【0003】
ところで、ZnOはウルツ鉱型の結晶構造(六方晶)を有しており、図6に示すように、c軸方向(上下方向)に対称中心を有さず、分子構造上極性を有している。
【0004】
すなわち、ZnOは、図6(a)に示すように、Zn原子51に結合している3本の結合子が下方を向き、酸素原子52に結合している3本の結合子が上方を向いている亜鉛極性(+c極性)と、図6(b)に示すように、Zn原子51に結合している3本の結合子が上方を向き、酸素原子52に結合している3本の結合子が下方を向いている酸素極性(−c極性)とを有しており、しかも、極性によって結晶の表面形状や半導体デバイスの電気特性が異なることから、半導体デバイスの技術分野では、極性制御が重要な技術的課題になっている。
【0005】
ここで、上記極性とは、上記結合子の向きを示しており、表面終端元素のことではない。
【0006】
そして、このようなZnO薄膜について、PMBE(plasma-assisted molecular-beam epitaxy;プラズマアシスト分子線エピタキシ)法により、サファイア基板上に酸素極性を有するZnO薄膜が成膜可能なことが既に報告されている(APPLIED PHYSICS LETTERS Vol. 80 No. 8 (2002) pp.1358 − 1360 ; 以下、「第1の従来技術」という)。
【0007】
また、サファイア基板上にGa極性を有するGaNを成膜し、ZnO薄膜の成膜条件を制御することにより前記GaN上に亜鉛極性又は酸素極性を有するZnO薄膜が成膜可能なことも既に報告されている(APPLIED PHYSICS LETTERS Vol. 77 No. 22 (2000) pp.3571 − 3573 ; 以下、「第2の従来技術」という)。
【0008】
さらに、基板上に形成されるZnO等の圧電膜の極性を規定することのできる技術も既に提案されている(特開2001−144328号公報;以下、「第3の従来技術」という)。
【0009】
【発明が解決しようとする課題】
しかしながら、上記第1の従来技術では、サファイア基板上に形成されるZnO薄膜は、同軸型直衝突イオン散乱分光法(Coaxial Impact Collision Ion Scattering Spectroscopy ; CAICISS)により酸素極性を有することが確認されており、したがって亜鉛極性を有するZnO薄膜を形成することができず、極性を制御することはできない。
【0010】
また、上記第2の従来技術によれば、成膜条件を変えることにより、ZnO薄膜の極性を制御しているが、サファイア基板上に形成されたGaN膜を介して極性制御を行っている。換言すれば、GaN膜を介さなければ第1の従来技術と同様、極性制御を行うことができない。
【0011】
しかも、上記第2の従来技術では、サファイア基板上にGaN膜を形成しているため生産工程が煩雑化する他、GaN膜上にZnO薄膜を形成する際に基板温度が昇温するため、GaNの構成元素であるGaがZnO薄膜へ拡散する虞がある。そして、GaはZnOに対しドナーとして作用するため、GaがZnO薄膜中に拡散するとZnOが低抵抗化する。また、前記拡散を制御することは困難であるため、半導体デバイスのデバイス特性にバラツキの生じる虞がある。
【0012】
さらに、上記第2の従来技術は、GaNとZnOとで格子不整合が存在するため、斯かる格子不整合を緩和すべく格子欠陥が導入され、その結果ZnO薄膜の結晶性が劣化して電気特性の悪化を招来する。
【0013】
また、上記第3の従来技術では、基板の種類に応じて+面(亜鉛極性)又は−面(酸素極性)を有する圧電膜(ZnO膜)の形成が可能であり、また、基板加熱温度等の成膜条件を変えることにより、基板上に形成されるZnO等の圧電膜の極性を制御しているが、極性が薄膜の表面形状や電気特性に及ぼす影響については何ら開示されておらず、しかも基板材料が圧電膜材料とが異なるため、第2の従来技術と同様、格子不整合に起因した結晶性の悪化を招来する虞がある。
【0014】
本発明はこのような事情に鑑みなされたものであって、簡単な方法で極性制御を行うことにより所望極性を有する酸化亜鉛を主成分とする薄膜を容易に得ることができる半導体デバイスの製造方法を提供することを目的とする。
【0015】
【課題を解決するための手段】
下地基板として酸化亜鉛を主成分とする単結晶基板を使用し、酸化亜鉛をターゲット物質としてスパッタリング処理を施すことにより、前記酸化亜鉛を主成分とする単結晶基板上には酸化亜鉛薄膜を容易に成膜することができると考えられるが、〔従来の技術〕の項で述べたように、酸化亜鉛のようなウルツ鉱型構造では結晶構造に対称中心がなく、極性(反位区)を有している。
【0016】
そして、結晶の表面構造は極性によって異なるため、酸化亜鉛を主成分とする単結晶基板上に成膜される酸化亜鉛薄膜の結晶成長過程も極性によって差違が生じ、その結果、極性によって酸化亜鉛薄膜の表面形状や電気特性にも大きな差違が生じる。
【0017】
すなわち、酸化亜鉛を主成分とする単結晶基板の表面に単に酸化亜鉛薄膜を形成したのみでは、極性制御が行われていないため、成膜された酸化亜鉛薄膜が亜鉛極性を有するのか、或いは酸素極性を有するのかを判別することができず、このため酸化亜鉛薄膜の表面形状や電気特性に大きなバラツキが生じる虞があり、所望の電気特性を有する信頼性に優れた半導体デバイスを得ることができない。
【0018】
そこで、本発明者らが鋭意研究を行ったところ、酸化亜鉛を主成分とする単結晶基板の亜鉛極性面上に酸化亜鉛薄膜を形成した場合は、該酸化亜鉛薄膜は亜鉛極性を有し、酸化亜鉛を主成分とする単結晶基板の酸素極性面上に酸化亜鉛薄膜を形成した場合は、該酸化亜鉛薄膜は酸素極性を有することが判明し、これにより酸化亜鉛薄膜の極性が制御されて所望極性の酸化亜鉛薄膜を容易に得ることができるという知見を得た。
【0022】
本発明はこのような知見に基づきなされたものであって、本発明に係る半導体デバイスの製造方法は、酸化亜鉛を主成分とする単結晶基板の表面が亜鉛極性面又は酸素極性面のいずれであるかを判別し、該判別結果に基づいて亜鉛極性面又は酸素極性面の少なくともいずれか一方の極性面を選択し、該選択した極性面上に酸化亜鉛を主成分とする少なくとも1層以上の薄膜を形成し、前記薄膜を前記単結晶基板の前記亜鉛極性面上に形成した場合は、前記薄膜は亜鉛極性を有し、前記薄膜を前記単結晶基板の前記酸素極性面上に形成した場合は、前記薄膜は酸素極性を有していることを特徴としている。
【0023】
上記製造方法によれば、酸化亜鉛を主成分とする単結晶基板の表面の極性を判別して該極性を特定し、斯かる特定の極性を有する基板表面に亜鉛極性又は酸素極性を有する酸化亜鉛系の薄膜を形成することができるので、所望極性を有する酸化亜鉛系の薄膜を具備した半導体デバイスを簡単且つ容易に製造することができる。
【0024】
【発明の実施の形態】
次に、本発明の実施の形態を図面に基づいて詳説する。
【0025】
図1及び図2は本発明に係る半導体デバイスの製造方法によって製造された半導体デバイスの一実施の形態を示す模式断面図であって、この半導体デバイスは、ZnOを主成分とする単結晶基板(以下、「ZnO基板」という)1亜鉛極性面1aと酸素極性面1bとを有している。そして、図1ではECRスパッタ法等により亜鉛極性面1a上に亜鉛極性を有するZnO薄膜2が形成され、図2では酸素極性面1b上に酸素極性を有するZnO薄膜3が形成されている。
【0026】
次に、上記半導体デバイスの製造方法を説明する。
【0027】
まず、SCVT(Seeded Chemical Vapor Transport)法等でZnO単結晶を作製し、ZnO単結晶を結晶軸のc軸方向に垂直な面に切出して鏡面研磨を施し、ZnO基板を作製してその極性を確認する。
【0028】
ZnOのように圧電性を有する化合物半導体の極性を判別する方法としては、同軸型直衝突イオン散乱分光(CAICISS)法(APPLIED PHYSICS LETTERS Vol.72 (1998) p824)、収束電子線回折(CBED)法(APPLIED PHYSICS LETTERS Vol.69 (1996) p337)、非線型誘電率顕微鏡(SNDM)法(先端技術シンポジウム「圧電材料と弾性波デバイス」(2000年2月) pp.23−30)等が知られているが、本実施の形態ではSNDM(Scanning Nonlinear Dielectric Microscopy)法でZnO基板の極性を確認している。
【0029】
すなわち、SNDMは、ZnO基板1上でプローブ探針を走査させながら電位を印加するとZnO基板1の極性を反映した強度信号を検出する。一方、印加電位が「0」のときは電位が印加されていないため、極性を反映した強度信号は検出されない。つまり、SNDM法では、ZnO基板1上に電位を印加すると、印加電位が「0」の場合に比べ、強度信号が+側又は−側に変位することとなり、したがって、印加電位が「0」のときの強度を基準信号とし、ZnO基板1上でプローブ探針を走査させながら電位を印加したときの強度信号を極性信号とすることにより、極性信号が基準信号に対して+側に変位するか−側に変位するかでZnO基板の極性を判別することができる。尚、本実施の形態では、SNDMの装置的な構成上、極性信号が基準信号に対し−側に変位したときは+極性(亜鉛極性)を示し、極性信号が基準信号に対し+側に変位したときは−極性(酸素極性)を示すようになっている。
【0030】
図3(a)(b)はZnO基板1の極性特性を示す図であって、横軸は走査長(μm)、縦軸は強度(a.u.;任意単位)を示している。また、図3中、矢印X方向がZnO基板1の極性信号を示し、矢印X′方向は電位を印加しなかった場合の基準信号を示している。
【0031】
そして、図3(a)に示すように、極性信号が基準信号に比べて−側に変位した場合はZnO基板1の極性面は亜鉛極性面であり、図3(b)に示すように、極性信号が基準信号に比べて+側に変位した場合はZnO基板1の極性面は酸素極性面であると判別することができる。
【0032】
次に、上述の如くZnO基板1の極性を判別した後、電子サイクロトロン共鳴(Electron Cyclotron Resonance ; 以下、「ECR」という)スパッタ装置を使用し、ZnO基板1の亜鉛極性面1a又は酸素極性面1b上にZnO薄膜を積層する。
【0033】
具体的には、プラズマ生成室と成膜室とに区分されたECRスパッタ装置を準備し、亜鉛極性面1a又は酸素極性面1bが上面となるようにZnO基板1を成膜室の所定位置にセッティングすると共に、ZnO基板1を所定温度(例えば、620℃)に加熱する。
【0034】
次いで、所定流量(例えば、10sccm)の酸素ガス(反応性ガス)及び所定流量(例えば、20sccm)のArガス(プラズマ生成用ガス)をプラズマ生成室に供給すると共に、サイクロトロンが共鳴する周波数(2.45GHz)でマイクロ波放電を行い、これによりプラズマ生成室でプラズマを生成する。
【0035】
そしてこの後、スパッタターゲットに高周波電力(例えば、150W)を印加し、プラズマ生成室で生成されたプラズマを使用してターゲット物質(ZnO)をスパッタリングし、反応性スパッタリングによりZnO基板1の表面にZnO薄膜2又はZnO薄膜3を形成する。
【0036】
そして、本実施の形態では上記ZnO薄膜2及びZnO薄膜3の各極性を確認すべく、SNDM法で極性を判別している。
【0037】
すなわち、SNDMの深さ方向の感度はプローブ探針の針先半径と試料であるZnOの誘電率によって決定されるが、ZnOの場合、プローブ探針の針先半径と同程度の深さにのみ感度があるため、前記針先半径を膜厚より小さくすることにより、下地であるZnO基板1の極性とは無関係にZnO薄膜の極性を判別することができる。
【0038】
図4(a)はZnO薄膜2の極性特性を示す図であり、図4(b)はZnO薄膜3の極性特性を示す図である。尚、横軸は走査長(μm)、縦軸は強度(a.u.)を示し、矢印X方向がZnO基板1の極性信号を示し、矢印X′方向は電位を印加しなかった場合の基準信号を示している。
【0039】
そして、図4(a)では極性信号が基準信号に比べて−側に変位しており、また、図4(b)では極性信号が基準信号に比べて+側に変位している。すなわち亜鉛極性面1a上のZnO薄膜2は亜鉛極性面を有し、一方、酸素極性面上1bのZnO薄膜3は酸素極性面を有しており、これによりZnO膜の極性を容易に制御することができることが分かる。
【0040】
このように本実施の形態では、極性を制御することにより、所望の極性を有するZnO薄膜がZnO基板上に形成された各種半導体デバイスを容易に得ることができる。
【0041】
図5はこの種の半導体デバイスとしての発光ダイオード(Light Emitting Diode ; 以下、「LED」という)の模式断面図であって、該LEDでは、良好な電気特性を確保する観点から、ZnO膜は表面平滑性に優れ且つ結晶性の良好な亜鉛極性を有することが所望される。このため、上述の方法でZnO基板4の極性を判別した後、該ZnO基板4の亜鉛極性面4a上にZnO系の多層膜が積層されている。
【0042】
すなわち、該LEDでは、ZnO基板4の亜鉛極性面4a上に発光層5が形成され、該発光層5の表面には酸化インジウムスズ(Indium Tin Oxide ; 以下、「ITO」という)からなる透明電極6が形成され、さらに該透明電極6の表面略中央部にはNi膜、Al膜、及びAu膜が順次積層されたp側電極7が形成されている。また、ZnO基板4の酸素極性面4b上にはTi膜及びAu膜が順次積層されたn側電極8が形成されている。
【0043】
上記発光層5は、具体的には、n形コンタクト層9、n形クラッド層10、活性層11、p形クラッド層12、及びp形コンタクト層13が順次積層された多層膜で構成されている。すなわち、活性層11は、n形クラッド層10及びp形クラッド層12に挟持され、また、n形クラッド層10はn形コンタクト層9及びZnO基板4を介してn側電極8に接続され、p形クラッド層12はp形コンタクト層13を介して透明電極6に接続されている。
【0044】
活性層11は、CdOとZnOとを混晶させた膜厚約200nmのCdZn1−xO(xは、0≦x<1で、例えば0.1)で形成されている。尚、該活性層11は、n形のキャリアである電子とp形のキャリアである正孔との再結合により発光し、発光する光の波長はバンドギャップエネルギにより決定される。
【0045】
また、n形クラッド層10及びp形クラッド層12は、キャリアを活性層11内に有効に閉じ込める必要があることから、前記活性層11よりバンドギャップエネルギが大きく、例えば、MgOとZnOとを混晶させたMgZn1−yO(yは、0≦y<1で、例えば0.2)からなり、n形クラッド層10の膜厚は約2000nm、p形クラッド層12の膜厚は約600nmに形成されている。
【0046】
また、n形コンタクト層9及びp形コンタクト層6は、共に膜厚約200nmのZnOで形成されている。
【0047】
このように上記LEDによれば、ZnO基板4の亜鉛極性面4a上には所望の極性、すなわち亜鉛極性を有するZnO系多層膜が形成され、電気特性のバラツキを極力回避した信頼性に優れたLEDを得ることが可能となる。
【0048】
尚、本発明は上記実施の形態に限定されるものではない。上記実施の形態ではZnO系薄膜の形成を、ECRスパッタ法で行っているが、誘導結合形プラズマ(ICP)スパッタ法、ヘリコン波励起プラズマ(HWP)スパッタ法、イオンビームスパッタ法、又はクラスタビームスパッタ法等を使用してもよく、また、スパッタリング法以外の薄膜形成方法、例えば分子線エピタキシ(MBE)法、有機金属化学気相(MOCVD)法、レーザ分子線エピタキシ(レーザMBE)法、又はレーザアブレーション法等を使用してZnO系薄膜を形成するようにしてもよい。
【0049】
また、上記実施の形態では、発光層5として、p型クラッド層12とn型クラッド層10で活性層11を挟持させたダブルヘテロ構造を使用しているが、pn接合構造、MIS(メタル−絶縁層−半導体層)構造、或いはシングルヘテロ構造等を使用してもよい。
【0051】
【発明の効果】
以上詳述したように本発明に係る半導体デバイスの製造方法は、酸化亜鉛を主成分とする単結晶基板の表面が亜鉛極性面又は酸素極性面のいずれであるかを判別し、判別結果に基づいて亜鉛極性面又は酸素極性面の少なくともいずれか一方の極性面を選択し、該選択した極性面上に酸化亜鉛を主成分とする少なくとも1層以上の薄膜を形成し、前記薄膜を前記単結晶基板の前記亜鉛極性面上に形成した場合は、前記薄膜は亜鉛極性を有し、前記薄膜を前記単結晶基板の前記酸素極性面上に形成した場合は、前記薄膜は酸素極性を有しているので、酸化亜鉛系薄膜の極性を容易に制御することができ、所望極性を有する酸化亜鉛系薄膜を簡単な方法で製造することができる。すなわち、極性に起因する電気特性のバラツキを抑制することのできる一定の品質を有する信頼性に優れた半導体デバイスを容易に製造することができる。
【図面の簡単な説明】
【図1】本発明に係る半導体デバイスとしてZnO基板の亜鉛極性面上にZnO薄膜を形成した場合を模式的に示した断面図である。
【図2】本発明に係る半導体デバイスとしてZnO基板の酸素極性面上にZnO薄膜を形成した場合を模式的に示した断面図である。
【図3】ZnO基板の極性特性を示す図である。
【図4】ZnO薄膜の極性特性を示す図である。
【図5】LEDの構成を模式的に示した断面図である。
【図6】ZnOの結晶構造を示す図である。
【符号の説明】
1 ZnO基板
1a 亜鉛極性面
1b 酸素極性面
2 ZnO薄膜
3 ZnO薄膜
4 ZnO基板
4a 亜鉛極性面
4b 酸素極性面
5 発光層(ZnO系薄膜)
[0001]
BACKGROUND OF THE INVENTION
Relates to a manufacturing method of the present invention is a semi-conductor device, and more particularly relates to a method of manufacturing a semi-conductor device using zinc oxide (ZnO) as a semiconductor material.
[0002]
[Prior art]
ZnO, a kind of II-VI group compound semiconductor, can change the band gap energy by mixed crystallization with MgO, CdO, etc., and can have a multilayer structure such as a quantum well. Since the energy is very large, application to a light-emitting element is expected, and since it is transparent in the visible region, application to a transparent thin film transistor for driving a liquid crystal display is expected.
[0003]
By the way, ZnO has a wurtzite crystal structure (hexagonal crystal), and as shown in FIG. 6, it has no symmetry center in the c-axis direction (vertical direction) and has polarity in terms of molecular structure. Yes.
[0004]
That is, in ZnO, as shown in FIG. 6A, the three bonds bonded to the Zn atom 51 are directed downward, and the three bonds bonded to the oxygen atom 52 are directed upward. The zinc polarity (+ c polarity) and the three bonds bonded to the Zn atom 51 are directed upward and the three bonds bonded to the oxygen atom 52, as shown in FIG. 6B. Since the child has an oxygen polarity (-c polarity) facing downward, and the surface shape of the crystal and the electrical characteristics of the semiconductor device differ depending on the polarity, polarity control is not possible in the technical field of semiconductor devices. It has become an important technical issue.
[0005]
Here, the polarity indicates the direction of the connector, not the surface termination element.
[0006]
As for such a ZnO thin film, it has already been reported that a ZnO thin film having oxygen polarity can be formed on a sapphire substrate by a PMBE (plasma-assisted molecular-beam epitaxy) method. (APPLIED PHYSICS LETTERS Vol. 80 No. 8 (2002) pp.1358-1360; hereinafter referred to as “first prior art”).
[0007]
It has also been reported that a ZnO thin film having a zinc polarity or an oxygen polarity can be formed on the GaN by forming a GaN film having a Ga polarity on a sapphire substrate and controlling the film forming conditions of the ZnO thin film. (APPLIED PHYSICS LETTERS Vol. 77 No. 22 (2000) pp.3571-3573; hereinafter referred to as “second prior art”).
[0008]
Furthermore, a technique capable of defining the polarity of a piezoelectric film such as ZnO formed on a substrate has already been proposed (Japanese Patent Laid-Open No. 2001-144328; hereinafter referred to as “third prior art”).
[0009]
[Problems to be solved by the invention]
However, in the first prior art, it has been confirmed that the ZnO thin film formed on the sapphire substrate has an oxygen polarity by coaxial impact collision ion scattering spectroscopy (CAICISS). Therefore, a ZnO thin film having zinc polarity cannot be formed, and the polarity cannot be controlled.
[0010]
According to the second prior art, the polarity of the ZnO thin film is controlled by changing the film forming conditions, but the polarity is controlled via the GaN film formed on the sapphire substrate. In other words, the polarity cannot be controlled without the GaN film, as in the first prior art.
[0011]
Moreover, in the second prior art, since the GaN film is formed on the sapphire substrate, the production process becomes complicated, and the substrate temperature rises when the ZnO thin film is formed on the GaN film. There is a possibility that Ga, which is a constituent element, is diffused into the ZnO thin film. Since Ga acts as a donor for ZnO, when Ga diffuses into the ZnO thin film, the resistance of ZnO decreases. In addition, since it is difficult to control the diffusion, there is a possibility that the device characteristics of the semiconductor device may vary.
[0012]
Further, in the second prior art, since there is a lattice mismatch between GaN and ZnO, lattice defects are introduced to alleviate such a lattice mismatch. As a result, the crystallinity of the ZnO thin film is deteriorated and the electrical conductivity is reduced. It will cause deterioration of characteristics.
[0013]
In the third prior art, it is possible to form a piezoelectric film (ZnO film) having a + plane (zinc polarity) or a − plane (oxygen polarity) according to the type of the substrate, and the substrate heating temperature or the like. Although the polarity of the piezoelectric film such as ZnO formed on the substrate is controlled by changing the film formation conditions, there is no disclosure about the influence of the polarity on the surface shape and electrical characteristics of the thin film, Moreover, since the substrate material is different from the piezoelectric film material, the crystallinity may be deteriorated due to lattice mismatch as in the second prior art.
[0014]
The present invention has been made in view of such circumstances, the production of semi-conductor devices that can be easily obtained a thin film composed mainly of zinc oxide having a desired polarity by the polarity control in a simple manner It aims to provide a method.
[0015]
[Means for Solving the Problems]
By using a single crystal substrate mainly composed of zinc oxide as a base substrate and performing sputtering treatment using zinc oxide as a target material, a zinc oxide thin film can be easily formed on the single crystal substrate mainly composed of zinc oxide. The wurtzite structure such as zinc oxide has no symmetry center and has polarity (inversion zone) as described in the section of “Prior art”. is doing.
[0016]
Since the crystal surface structure varies depending on the polarity, the crystal growth process of the zinc oxide thin film formed on the single crystal substrate mainly composed of zinc oxide also varies depending on the polarity. As a result, the zinc oxide thin film depends on the polarity. There are also large differences in the surface shape and electrical characteristics of the.
[0017]
That is, simply forming a zinc oxide thin film on the surface of a single crystal substrate containing zinc oxide as a main component does not control the polarity. Therefore, whether the formed zinc oxide thin film has zinc polarity or oxygen It cannot be determined whether it has polarity, and there is a risk of large variations in the surface shape and electrical characteristics of the zinc oxide thin film, making it impossible to obtain a highly reliable semiconductor device having desired electrical characteristics. .
[0018]
Therefore, when the present inventors conducted extensive research, when a zinc oxide thin film was formed on the zinc polar surface of a single crystal substrate mainly composed of zinc oxide, the zinc oxide thin film had zinc polarity, When a zinc oxide thin film is formed on the oxygen polarity surface of a single crystal substrate containing zinc oxide as a main component, it was found that the zinc oxide thin film has an oxygen polarity, thereby controlling the polarity of the zinc oxide thin film. It was found that a zinc oxide thin film having a desired polarity can be easily obtained.
[0022]
The present invention was made based on these findings, a method of manufacturing a semiconductor device according to the present invention, either the surface of the single crystal substrate composed mainly of zinc oxide zinc-polar surface or oxygen polar surface And determining at least one of a zinc polar surface and an oxygen polar surface based on the determination result, and at least one layer of zinc oxide as a main component on the selected polar surface. When a thin film is formed and the thin film is formed on the zinc polar surface of the single crystal substrate, the thin film has a zinc polarity, and the thin film is formed on the oxygen polar surface of the single crystal substrate. The thin film has an oxygen polarity.
[0023]
According to the above manufacturing method, the polarity of the surface of a single crystal substrate mainly composed of zinc oxide is determined to identify the polarity, and the zinc oxide having zinc polarity or oxygen polarity on the substrate surface having such specific polarity Since a semiconductor thin film can be formed, a semiconductor device including a zinc oxide thin film having a desired polarity can be manufactured easily and easily.
[0024]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described in detail with reference to the drawings.
[0025]
FIG. 1 and FIG. 2 are schematic cross-sectional views showing an embodiment of a semiconductor device manufactured by the method for manufacturing a semiconductor device according to the present invention. The semiconductor device is a single crystal substrate (mainly ZnO) ( (Hereinafter referred to as “ZnO substrate”) 1 has a zinc polar face 1a and an oxygen polar face 1b. In FIG. 1, a ZnO thin film 2 having zinc polarity is formed on the zinc polar face 1a by ECR sputtering or the like, and in FIG. 2, a ZnO thin film 3 having oxygen polarity is formed on the oxygen polar face 1b.
[0026]
Next, a method for manufacturing the semiconductor device will be described.
[0027]
First, a ZnO single crystal is produced by a SCVT (Seeded Chemical Vapor Transport) method, etc., the ZnO single crystal is cut into a plane perpendicular to the c-axis direction of the crystal axis, mirror-polished, a ZnO substrate is produced, and its polarity is changed. Check.
[0028]
As a method of discriminating the polarity of a compound semiconductor having piezoelectricity such as ZnO, coaxial direct collision ion scattering spectroscopy (CAICSS) method (APPLIED PHYSICS LETTERS Vol.72 (1998) p824), focused electron diffraction (CBED) (APPLIED PHYSICS LETTERS Vol.69 (1996) p337), nonlinear dielectric constant microscope (SNDM) method (Advanced Technology Symposium “Piezoelectric Materials and Elastic Wave Devices” (February 2000) pp. 23-30), etc. However, in this embodiment, the polarity of the ZnO substrate is confirmed by the SNDM (Scanning Nonlinear Dielectric Microscopy) method.
[0029]
That is, the SNDM detects an intensity signal reflecting the polarity of the ZnO substrate 1 when a potential is applied while scanning the probe tip on the ZnO substrate 1. On the other hand, when the applied potential is “0”, since no potential is applied, an intensity signal reflecting the polarity is not detected. That is, in the SNDM method, when a potential is applied on the ZnO substrate 1, the intensity signal is displaced to the + side or the − side compared to the case where the applied potential is “0”, and therefore the applied potential is “0”. If the intensity signal when the electric potential is applied while scanning the probe tip on the ZnO substrate 1 is used as a polarity signal, the polarity signal is displaced to the + side with respect to the reference signal. The polarity of the ZnO substrate can be determined based on the displacement to the negative side. In the present embodiment, due to the SNDM device configuration, when the polarity signal is displaced to the-side with respect to the reference signal, + polarity (zinc polarity) is indicated, and the polarity signal is displaced to the + side with respect to the reference signal. When it does,-polarity (oxygen polarity) is shown.
[0030]
FIGS. 3A and 3B are diagrams showing the polar characteristics of the ZnO substrate 1, wherein the horizontal axis indicates the scanning length (μm) and the vertical axis indicates the intensity (au; arbitrary unit). In FIG. 3, the arrow X direction indicates the polarity signal of the ZnO substrate 1, and the arrow X ′ direction indicates the reference signal when no potential is applied.
[0031]
As shown in FIG. 3A, when the polarity signal is displaced to the negative side compared to the reference signal, the polar surface of the ZnO substrate 1 is a zinc polar surface, and as shown in FIG. When the polarity signal is displaced to the + side compared to the reference signal, it can be determined that the polar surface of the ZnO substrate 1 is an oxygen polar surface.
[0032]
Next, after determining the polarity of the ZnO substrate 1 as described above, an electron cyclotron resonance (hereinafter referred to as “ECR”) sputtering apparatus is used to form the zinc polar surface 1 a or the oxygen polar surface 1 b of the ZnO substrate 1. A ZnO thin film is laminated thereon.
[0033]
Specifically, an ECR sputtering apparatus divided into a plasma generation chamber and a film formation chamber is prepared, and the ZnO substrate 1 is placed at a predetermined position in the film formation chamber so that the zinc polar surface 1a or the oxygen polar surface 1b is the upper surface. While setting, the ZnO substrate 1 is heated to a predetermined temperature (for example, 620 ° C.).
[0034]
Next, oxygen gas (reactive gas) at a predetermined flow rate (for example, 10 sccm) and Ar gas (plasma generating gas) at a predetermined flow rate (for example, 20 sccm) are supplied to the plasma generation chamber, and the frequency at which the cyclotron resonates (2 .45 GHz), and plasma is generated in the plasma generation chamber.
[0035]
After that, high frequency power (for example, 150 W) is applied to the sputter target, the target material (ZnO) is sputtered using the plasma generated in the plasma generation chamber, and ZnO is formed on the surface of the ZnO substrate 1 by reactive sputtering. A thin film 2 or a ZnO thin film 3 is formed.
[0036]
And in this Embodiment, in order to confirm each polarity of the said ZnO thin film 2 and the ZnO thin film 3, the polarity is discriminate | determined by SNDM method.
[0037]
That is, the sensitivity of the SNDM in the depth direction is determined by the probe tip radius and the dielectric constant of the sample ZnO, but in the case of ZnO, the depth is only about the same depth as the probe tip radius. Because of the sensitivity, the polarity of the ZnO thin film can be determined regardless of the polarity of the underlying ZnO substrate 1 by making the needle tip radius smaller than the film thickness.
[0038]
FIG. 4A is a diagram showing the polarity characteristics of the ZnO thin film 2, and FIG. 4B is a diagram showing the polarity characteristics of the ZnO thin film 3. The horizontal axis indicates the scanning length (μm), the vertical axis indicates the intensity (au), the arrow X direction indicates the polarity signal of the ZnO substrate 1, and the arrow X ′ direction indicates the reference signal when no potential is applied. Show.
[0039]
In FIG. 4A, the polarity signal is displaced to the minus side compared to the reference signal, and in FIG. 4B, the polarity signal is displaced to the plus side compared to the reference signal. That is, the ZnO thin film 2 on the zinc polar face 1a has a zinc polar face, while the ZnO thin film 3 on the oxygen polar face 1b has an oxygen polar face, thereby easily controlling the polarity of the ZnO film. I can see that
[0040]
As described above, in this embodiment, by controlling the polarity, various semiconductor devices in which a ZnO thin film having a desired polarity is formed on a ZnO substrate can be easily obtained.
[0041]
FIG. 5 is a schematic cross-sectional view of a light emitting diode (hereinafter referred to as “LED”) as a semiconductor device of this type. In the LED, the ZnO film is formed on the surface from the viewpoint of ensuring good electrical characteristics. It is desirable to have zinc polarity with excellent smoothness and good crystallinity. For this reason, after determining the polarity of the ZnO substrate 4 by the above-described method, a ZnO-based multilayer film is laminated on the zinc polar surface 4 a of the ZnO substrate 4.
[0042]
That is, in the LED, the light emitting layer 5 is formed on the zinc polar surface 4a of the ZnO substrate 4, and the surface of the light emitting layer 5 is a transparent electrode made of indium tin oxide (hereinafter referred to as “ITO”). 6 is formed, and a p-side electrode 7 in which a Ni film, an Al film, and an Au film are sequentially laminated is formed at a substantially central portion of the surface of the transparent electrode 6. An n-side electrode 8 in which a Ti film and an Au film are sequentially stacked is formed on the oxygen polar surface 4b of the ZnO substrate 4.
[0043]
Specifically, the light emitting layer 5 is formed of a multilayer film in which an n-type contact layer 9, an n-type cladding layer 10, an active layer 11, a p-type cladding layer 12, and a p-type contact layer 13 are sequentially stacked. Yes. That is, the active layer 11 is sandwiched between the n-type cladding layer 10 and the p-type cladding layer 12, and the n-type cladding layer 10 is connected to the n-side electrode 8 through the n-type contact layer 9 and the ZnO substrate 4, The p-type cladding layer 12 is connected to the transparent electrode 6 through the p-type contact layer 13.
[0044]
The active layer 11 is formed of Cd x Zn 1-x O (x is 0 ≦ x <1, for example, 0.1) with a film thickness of about 200 nm obtained by mixing CdO and ZnO. The active layer 11 emits light by recombination of electrons, which are n-type carriers, and holes, which are p-type carriers, and the wavelength of the emitted light is determined by the band gap energy.
[0045]
In addition, since the n-type cladding layer 10 and the p-type cladding layer 12 need to effectively confine carriers in the active layer 11, the band gap energy is larger than that of the active layer 11, and, for example, MgO and ZnO are mixed. It is made of crystallized Mg y Zn 1-y O (y is 0 ≦ y <1, for example 0.2), the thickness of the n-type cladding layer 10 is about 2000 nm, and the thickness of the p-type cladding layer 12 is It is formed at about 600 nm.
[0046]
The n-type contact layer 9 and the p-type contact layer 6 are both made of ZnO having a thickness of about 200 nm.
[0047]
As described above, according to the LED, a ZnO-based multilayer film having a desired polarity, that is, a zinc polarity, is formed on the zinc polar surface 4a of the ZnO substrate 4, and the reliability excellent in avoiding variations in electrical characteristics as much as possible was obtained. An LED can be obtained.
[0048]
The present invention is not limited to the above embodiment. In the above embodiment, the ZnO-based thin film is formed by ECR sputtering, but inductively coupled plasma (ICP) sputtering, helicon wave excitation plasma (HWP) sputtering, ion beam sputtering, or cluster beam sputtering. A thin film forming method other than sputtering, such as molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), laser molecular beam epitaxy (laser MBE), or laser A ZnO-based thin film may be formed using an ablation method or the like.
[0049]
In the above embodiment, a double hetero structure in which the active layer 11 is sandwiched between the p-type cladding layer 12 and the n-type cladding layer 10 is used as the light-emitting layer 5, but a pn junction structure, MIS (metal- An insulating layer-semiconductor layer) structure or a single heterostructure may be used.
[0051]
【The invention's effect】
As described above in detail, the method for manufacturing a semiconductor device according to the present invention determines whether the surface of a single crystal substrate containing zinc oxide as a main component is a zinc polar surface or an oxygen polar surface, and based on the determination result. And selecting at least one of a zinc polar surface and an oxygen polar surface, forming at least one thin film mainly composed of zinc oxide on the selected polar surface, and forming the thin film into the single crystal When formed on the zinc polar surface of the substrate, the thin film has zinc polarity, and when the thin film is formed on the oxygen polar surface of the single crystal substrate, the thin film has oxygen polarity. Therefore, the polarity of the zinc oxide-based thin film can be easily controlled, and a zinc oxide-based thin film having a desired polarity can be manufactured by a simple method. That is, it is possible to easily manufacture a highly reliable semiconductor device having a certain quality capable of suppressing variations in electrical characteristics due to polarity.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view schematically showing a case where a ZnO thin film is formed on a zinc polar surface of a ZnO substrate as a semiconductor device according to the present invention.
FIG. 2 is a cross-sectional view schematically showing a case where a ZnO thin film is formed on an oxygen polar surface of a ZnO substrate as a semiconductor device according to the present invention.
FIG. 3 is a diagram showing the polarity characteristics of a ZnO substrate.
FIG. 4 is a diagram showing the polarity characteristics of a ZnO thin film.
FIG. 5 is a cross-sectional view schematically showing the configuration of an LED.
FIG. 6 is a view showing a crystal structure of ZnO.
[Explanation of symbols]
1 ZnO substrate 1a Zinc polar surface 1b Oxygen polar surface 2 ZnO thin film 3 ZnO thin film 4 ZnO substrate 4a Zinc polar surface 4b Oxygen polar surface 5 Light emitting layer (ZnO-based thin film)

Claims (1)

酸化亜鉛を主成分とする単結晶基板の表面が亜鉛極性面又は酸素極性面のいずれであるかを判別し、該判別結果に基づいて亜鉛極性面又は酸素極性面の少なくともいずれか一方の極性面を選択し、該選択した極性面上に酸化亜鉛を主成分とする少なくとも1層以上の薄膜を形成し、It is determined whether the surface of the single crystal substrate mainly composed of zinc oxide is a zinc polar surface or an oxygen polar surface, and based on the determination result, at least one of the polar surfaces of the zinc polar surface and the oxygen polar surface And forming at least one thin film mainly composed of zinc oxide on the selected polar face,
前記薄膜を前記単結晶基板の前記亜鉛極性面上に形成した場合は、前記薄膜は亜鉛極性を有し、  When the thin film is formed on the zinc polar surface of the single crystal substrate, the thin film has a zinc polarity,
前記薄膜を前記単結晶基板の前記酸素極性面上に形成した場合は、前記薄膜は酸素極性を有していることを特徴とする半導体デバイスの製造方法。  A method of manufacturing a semiconductor device, wherein the thin film has an oxygen polarity when the thin film is formed on the oxygen polarity surface of the single crystal substrate.
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