JP4088645B2 - LSI system design method - Google Patents

Description

  The present invention belongs to a technique related to so-called upstream design for a system including an LSI.

CMOS LSI, which has a history of more than 30 years since its commercialization and more than 10 years since occupying most of the market, has reached a major turning point. Until now, LSI manufacturers have been developing strategies for CMOS LSIs with miniaturization. However, coming here, it is difficult to achieve both high-speed and low-power CMOS LSI by miniaturization alone.
“Restructuring CMOS Strategy from Miniaturization to Comprehensive Strength” Nikkei Microdevices, August 2000, PP. 118-121

  One of the problems that make it difficult to achieve both high speed and low power is the problem of leakage current.

  In other words, if the gate oxide film is made thinner with miniaturization, the gate leakage current increases rapidly and the requirements of the applied equipment cannot be satisfied. For example, in the generation of the gate oxide film thickness of 2 to 2.5 nm corresponding to the 0.15 μm rule, the tunnel current value passing through the gate oxide film exceeds the standby current value of several μA required for the mobile device. On the other hand, if the standby current is to be suppressed as required by the applied equipment, it is impossible to further promote the thinning of the gate oxide film, which is indispensable for speeding up. This means that it is extremely difficult to achieve both high speed and low power.

  Therefore, an object of the present invention is to provide a design method that takes into account the peak current for the design at the upstream level of a system including an LSI.

In order to solve the above-mentioned problem, the solving means taken by the invention of claim 1 is a method of designing a system including an LSI at a system design level using a computer having a storage area. Design conditions including at least one of a power supply voltage, a threshold voltage, and a gate insulating film thickness while evaluating the performance of the entire system and the power consumption due to leakage current for each functional unit to be configured A hardware model representing a trade-off relationship between leakage current and performance based on the design condition for at least one of the functional units in the storage area in advance. In the first case where all the functional units are realized by software using a CPU. That the overall system performance, and determine the power consumption due to leakage current, the hardware model the predetermined functional units that are prepared as well as implemented by the hardware the remaining functional units of the second realized by software using the CPU The overall system performance obtained in the first and second cases is determined for each design condition with reference to the trade-off relationship expressed in the hardware model , and the performance of the entire system in this case and the power consumption due to the leakage current are obtained. When evaluating the performance and power consumption due to leakage current , selecting whether to implement the predetermined functional unit by software using a CPU or hardware, and realizing by hardware Further defines design conditions .

In the invention of claim 2, the hardware model in the LSI system design method of claim 1 is such that the relationship between the leakage power due to the source / drain leakage current and the performance is described using the threshold voltage as a parameter. Shall be included.

According to a third aspect of the present invention, the hardware model in the LSI system design method of the first aspect includes that in which the relationship between the leakage power due to the gate leakage current and the performance is described using the power supply voltage as a parameter.

In the invention of claim 4, the hardware model in the LSI system design method of claim 1 includes the relationship between the leakage power due to the gate leakage current and the performance described using the gate insulating film thickness as a parameter. .

Further, the solution provided by the invention of claim 5 is a method for designing a system including an LSI at a system design level using a computer having a storage area. For each functional unit constituting the system, While evaluating performance and power consumption due to leakage current , design conditions including at least one of power supply voltage, threshold voltage, and gate insulating film thickness are determined, and at least each of the functional units Any one of the functional units prepared in advance in the storage area and representing a trade-off relationship between leakage current and performance based on the design conditions is used, and all of the functional units are obtained by software using a CPU. the first of the entire system when performance to achieve, and power consumption due to a leakage current calculated Hardware model of the entire system when well as realized by hardware a predetermined function units prepared second realized by software using the CPU of the remaining functional unit performance, and power consumption due to leakage current, This is obtained for each design condition with reference to the trade-off relationship expressed in the hardware model, and the overall system performance obtained in the first and second cases and the power consumption due to the leakage current are evaluated. From the results, it is selected whether the predetermined functional unit is realized by software using a CPU or hardware. When the predetermined functional unit is realized by hardware, design conditions are further defined.

The solution provided by the invention of claim 6 is a recording medium for recording a program for causing a computer to design a system including an LSI at a system design level, and for each functional unit constituting the system, the entire system. The step of determining the design conditions including at least one of the power supply voltage, the threshold voltage, and the gate insulating film thickness is performed while evaluating the performance of the power consumption and the power consumption due to the leakage current , In the step, a hardware model representing a trade-off relationship between leakage current and performance based on the design conditions prepared in advance for at least one of the functional units is used, and all the functional units are performance of the entire system in the case of the first realized by software using the CPU And determine the power consumption due to leakage current, the hardware model of the entire system when well as realized by hardware a predetermined function units prepared second realized by software using the CPU of the remaining functional unit performance And the power consumption due to the leakage current are determined for each design condition with reference to the trade-off relationship represented in the hardware model, and the overall system performance and the leakage current determined in the first and second cases. From the evaluation result, it is selected whether the predetermined functional unit is realized by software using a CPU or hardware, and if it is realized by hardware, design conditions are further defined. Record a program that causes a computer to execute Those were.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  In the present embodiment, it is assumed that a system including an LSI is designed at a higher level called a system design level. Here, a design method called hardware / software co-design is adopted. “Hardware / software codesign” refers to a design in which hardware and software are mixed in the same system. Specifically, all the functional units constituting the LSI system are first realized by software using a CPU, and the processing time of the entire system at this time is evaluated. Then, the processing is executed by a procedure in which functional units are replaced with hardware in order so that the processing time satisfies a predetermined specification.

  FIG. 1 is an operation chart showing an outline of the operation of each functional unit constituting the LSI system to be designed. Each functional unit A, B, C, D constituting the LSI system operates at a timing as shown in FIG.

  In the present embodiment, a hardware model representing a trade-off relationship between leakage current and performance is prepared for the functional unit D.

  FIG. 2 is a diagram illustrating an example of a hardware model of the functional unit D. In the present embodiment, as shown in FIG. 2A, the table data in which the relationship between the leakage power Pleek due to the source / drain leakage current and the performance (delay) tpd is described using the threshold voltage Vth as a parameter is It is prepared as a hardware model of functional unit D. Here, it is assumed that the power supply voltage and the oxide film thickness are constant at predetermined values.

ここで、ＶＤＤは電源電圧、Ｃはキャパシタンス、ｋ，ｍは定数、ｓはスクエア定数である。したがって、しきい値電圧Ｖｔｈの値を変化させた場合、性能ｔｐｄおよびリーク電力Ｐｌｅａｋは、図２（ｂ）に示すような曲線に沿って変化する。 In general, the performance tpd and the leak power Pleak are expressed by the following equations.

Here, VDD is a power supply voltage, C is a capacitance, k and m are constants, and s is a square constant. Therefore, when the value of the threshold voltage Vth is changed, the performance tpd and the leakage power Pleek change along a curve as shown in FIG.

  Hereinafter, an LSI system design method according to the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 3A, all the functional units A, B, C, and D constituting the system are realized by software. FIGS. 3B and 3C show the evaluation results of the CPU load and power consumption in this case. As shown in FIG. 3B, the processing time in this case is “6.0”, and as shown in FIG. 3C, the power consumption due to the leakage current of the CPU is “6.0” (= 1 × 6).

  Next, as shown in FIG. 4A, only the function unit D is realized by hardware. 4B and 4C show the evaluation results of the CPU load and power consumption in this case. In this case, as shown in FIG. 4B, the processing time tpd of the functional unit D is shortened from “2.0” to “0.5”, and the processing time of the entire system is “4.5”. On the other hand, as shown in FIG. 4C, power consumption due to the leakage current of the functional unit D newly occurs, and the power consumption amount due to the leakage current is “13.5” (= (1 + 2)) together with the CPU. × 4.5).

  Furthermore, as shown in FIG. 5A, only the functional unit D is realized by the hardware D2. FIGS. 5B and 5C show the evaluation results of the CPU load and power consumption in this case. In this case, as shown in FIG. 5B, the processing time tpd of the functional unit D is “1.0”, and the processing time of the entire system is “5.0”. On the other hand, as shown in FIG. 5C, the power consumption due to the leakage current is “7.5” (= (1 + 0.5) × 5) together with the CPU.

  FIG. 6 summarizes the evaluation results described above. As can be seen from FIG. 6, when the functional unit D is realized by software, the power consumption due to the leakage current is minimized, but on the other hand, the processing time is increased. On the other hand, when the functional unit D is realized by the hardware D1, the processing time is the shortest, but the power consumption due to the leakage current is the largest. Further, when the functional unit D is realized by the hardware D2, compared with the case where the functional unit D is realized by software, the power consumption due to the leakage current is not so large and the processing time can be shortened. . With reference to the evaluation results as shown in FIG. 6, the method for realizing the functional unit D and the design conditions (here, the threshold voltage Vth) can be selected according to the application and function of the LSI system to be designed. .

  The setting of the threshold voltage Vt as shown in FIG. 2 can be easily realized by a general threshold voltage control technique such as VTCMOS. FIG. 7A is a circuit diagram of transistors corresponding to the hardware D1 and D2. In the hardware D2, a threshold voltage Vt different from that in the hardware D1 can be set by applying a bias voltage to the substrate potential. FIGS. 7B and 7C are diagrams conceptually showing the structure of the transistors corresponding to the hardware D1 and D2. In the structure of FIG. 7B, the source of the transistor is directly connected to the substrate contact 11, while in the structure of FIG. 7C, the source of the transistor is connected to the substrate contact 11 via the DC-DC converter 12. It is connected to the.

  Here, the source / drain leakage current is considered as the leakage current, but the gate leakage current can be similarly considered.

ここで、Ａ，ｎは定数、ＶＤＤは電源電圧、Ｔｏｘはゲート絶縁膜厚である。上式から分かるように、ゲートリーク電流Ｉｇｌｅａｋと性能ｔｐｄとの関係は、電源電圧ＶＤＤを媒介変数として記述することができ、また、ゲート絶縁膜厚Ｔｏｘを媒介変数として記述することも可能である。すなわち、ゲートリーク電流に関しては、図８および図９に示すようなハードウェアモデルを準備することができる。 In general, the performance tpd and the gate leakage current Igleak are expressed by the following equations.

Here, A and n are constants, VDD is a power supply voltage, and Tox is a gate insulating film thickness. As can be seen from the above equation, the relationship between the gate leakage current Igleak and the performance tpd can be described using the power supply voltage VDD as a parameter, and the gate insulating film thickness Tox can also be described as a parameter. . That is, for the gate leakage current, a hardware model as shown in FIGS. 8 and 9 can be prepared.

  FIG. 8A shows, as a hardware model of the functional unit D, table data in which the relationship between the leakage power Pgleak due to the gate leakage current and the performance tpd is described using the power supply voltage VDD as a parameter. Here, it is assumed that the threshold voltage Vt and the gate insulating film thickness Tox are constant at predetermined values. When the value of the power supply voltage VDD is changed, the performance tpd and the leakage power Pgleak change along a curve as shown in FIG.

  FIG. 9A shows, as a hardware model of the functional unit D, table data in which the relationship between the leakage power Pgleak due to the gate leakage current and the performance tpd is described using the gate insulating film thickness Tox as a parameter. Here, it is assumed that the power supply voltage VDD and the threshold voltage Vt are constant at predetermined values. When the value of the gate insulating film thickness Tox is changed, the performance tpd and the leakage power Pgleak change along a curve as shown in FIG.

  By designing a system in the same manner as described above using a hardware model as shown in FIG. 8 or FIG. 9, it is possible to design at a higher level in consideration of gate leakage current.

  The LSI system design method according to the embodiment of the present invention can be realized by an apparatus including a computer that executes a program for realizing the method. Further, it can be realized by recording a program for realizing the method on a computer-readable recording medium and causing the computer to execute the program recorded on the recording medium.

6 is an operation chart showing an outline of operation of each functional unit constituting the LSI system to be designed in the present embodiment. 3 is a diagram illustrating an example of a hardware model of a functional unit D. FIG. It is a figure which shows the evaluation result at the time of implement | achieving each function unit by software altogether. It is a figure which shows the evaluation result at the time of implement | achieving the functional unit D by the hardware D1. It is a figure which shows the evaluation result at the time of implement | achieving the functional unit D by the hardware D2. It is the figure which put together the evaluation result of FIGS. It is a figure which shows the implementation method of each hardware model of FIG. It is a figure which shows an example of the hardware model which considered the gate leakage current, and made the power supply voltage a parameter. It is a figure which shows an example of the hardware model which considered the gate leakage current, and made the gate insulating film thickness a parameter.

Explanation of symbols

VDD power supply voltage Vth threshold voltage tpd performance Pleak leakage power due to source / drain leakage current Pgleak leakage power due to gate leakage current Tox gate insulation film thickness

Claims (6)

A method of designing a system including an LSI at a system design level using a computer having a storage area,
For each functional unit constituting the system, the computer evaluates the performance of the entire system and the power consumption due to the leakage current, and at least one of the power supply voltage, the threshold voltage, and the gate insulating film thickness. Including a step for determining design conditions including
The step includes
For at least one of the functional units, a hardware model representing a trade-off relationship between leakage current and performance based on the design condition is prepared in the storage area in advance,
In the first case where all of the functional units are realized by software using a CPU, the performance of the entire system and the power consumption due to leakage current are obtained,
Performance of the entire system and power consumption due to leakage current in the second case where a predetermined functional unit for which a hardware model is prepared is realized by hardware and the remaining functional unit is realized by software using a CPU For each design condition with reference to the trade-off relationship represented in the hardware model,
The overall system performance obtained in the first and second cases and the power consumption due to the leakage current are evaluated. From this evaluation result, the predetermined functional unit is determined by either software or hardware using a CPU. An LSI system design method characterized in that design conditions are further determined when selecting whether to realize by hardware. The LSI system design method according to claim 1,
The hardware model is
An LSI system design method, characterized in that the relationship between leakage power and performance due to source / drain leakage current includes a threshold voltage as a parameter. The LSI system design method according to claim 1,
The hardware model is
An LSI system design method, wherein the relationship between leakage power and performance due to gate leakage current includes that described with a power supply voltage as a parameter. The LSI system design method according to claim 1,
The hardware model is
An LSI system design method, wherein the relationship between leakage power due to gate leakage current and performance includes a description in which the gate insulating film thickness is a parameter. A method of designing a system including an LSI at a system design level using a computer having a storage area,
For each functional unit constituting the system, including at least one of the power supply voltage, the threshold voltage, and the gate insulating film thickness while evaluating the performance of the entire system and the power consumption due to the leakage current , Design conditions,
Using a hardware model that represents a trade-off relationship between leakage current and performance based on the design conditions prepared in advance in the storage area for at least one of the functional units,
In the first case where all of the functional units are realized by software using a CPU, the performance of the entire system and the power consumption due to leakage current are obtained,
Performance of the entire system and power consumption due to leakage current in the second case where a predetermined functional unit for which a hardware model is prepared is realized by hardware and the remaining functional unit is realized by software using a CPU For each design condition with reference to the trade-off relationship represented in the hardware model,
The overall system performance obtained in the first and second cases and the power consumption due to the leakage current are evaluated. From this evaluation result, the predetermined functional unit is determined by either software or hardware using a CPU. An LSI system design method characterized by further selecting a design condition when selecting whether to realize by hardware. A recording medium recording a program for causing a computer to design a system including an LSI at a system design level,
For each functional unit constituting the system, including at least one of the power supply voltage, the threshold voltage, and the gate insulating film thickness while evaluating the performance of the entire system and the power consumption due to the leakage current , To execute the steps to determine the design conditions,
In the step,
Using a hardware model prepared in advance for at least one of the functional units and representing a trade-off relationship between leakage current and performance based on the design conditions ,
In the first case where all of the functional units are realized by software using a CPU, the performance of the entire system and the power consumption due to leakage current are obtained,
Performance of the entire system and power consumption due to leakage current in the second case where a predetermined functional unit for which a hardware model is prepared is realized by hardware and the remaining functional unit is realized by software using a CPU For each design condition with reference to the trade-off relationship represented in the hardware model,
The overall system performance obtained in the first and second cases and the power consumption due to the leakage current are evaluated. From this evaluation result, the predetermined functional unit is determined by either software or hardware using a CPU. A recording medium on which a program for causing a computer to execute further design conditions is selected when it is realized by hardware.

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