JP4085033B2 - Charge control device - Google Patents

Description

  The present invention relates to a charging control device that controls a charging device that charges a secondary battery.

A conventional charge control device that controls the charging of a secondary battery, for example, a lithium ion battery, by the output from the charger detects that the charger and the secondary battery are connected, operates a timer, and sets the initial charging current. The pre-charge circuit that operates within the specified range is activated to perform initial charging. When the secondary battery is charged to a voltage sufficient to operate the microcomputer within the set time of the timer, the timer operation is stopped. The charging circuit is controlled by a microcomputer so as to be rapidly charged. (For example, refer to Patent Document 1).
JP-A-10-257687 (page 3, FIG. 3).

  On the other hand, there is a charge control device 11 configured as shown in FIG. In the charging control device shown in FIG. 2, the adapter output voltage VA output from the output terminal 1 of the adapter that converts the input AC voltage into a DC voltage is supplied to the charging circuit 6 and output from the charging circuit 6 based on the charging control voltage. The secondary battery 7 is charged by the DC constant voltage / constant current output. The adapter may be an adapter that converts an input DC voltage into a DC voltage. The adapter output voltage VA is supplied to the three-terminal regulator 2 and converted to a stabilized DC voltage VC. The timer integrated circuit (also referred to as a timer IC, for example, a timer of HELF4541BP manufactured by Philips) 3) and the voltage Vtimer is supplied to the AND circuit 5 from the output terminal (OUT) of the timer IC3. In this case, the auto reset terminal (AUTO RESET) of the timer IC is grounded.

  A voltage indicating whether the secondary battery 7 to be charged is a secondary battery that can be charged in correspondence with the charging circuit 6 or a secondary battery that is not charged is applied to the secondary battery type determination terminal 4. When the rechargeable battery 7 connected to the charging circuit 6 is a rechargeable rechargeable battery, a low potential rechargeable battery type determining voltage is applied to the rechargeable battery type determining terminal 4, and when the rechargeable secondary battery is not charged. The secondary battery type discrimination voltage having a high potential is applied to the secondary battery type discrimination terminal 4. The secondary battery type determination voltage based on whether or not charging is possible is applied to the secondary battery type determination terminal 4 because, for example, if a nickel hydride battery is charged for a long time with a charging circuit compatible with a nickel cadmium battery, the cell may be damaged. Because there is.

  The voltage supplied to the secondary battery type determination terminal 4 is applied as a reset voltage to the reset (RESET) terminal of the timer IC 3 to cause the timer IC 3 to be master reset. The voltage applied to the secondary battery type discrimination terminal 4 is applied to the base of the transistor Q1 to which the DC voltage VC is supplied to the collector via the collector resistor R1 to obtain the secondary battery type discrimination voltage. Based on this, the transistor Q1 is turned on / off, the collector voltage VS of the transistor Q1 is supplied to the AND circuit 5, the AND circuit 5 is controlled together with the voltage Vtimer, and the charging control voltage output period of the AND circuit 5 is output. Then, the secondary battery 7 is charged by the charging circuit 6. Here, the transistor Q1 corresponds to the first switch means.

  The operation of the charging control device 11 described above is as follows. After the adapter output voltage VA is applied, it waits for the secondary battery 7 to be connected to the charging circuit 6. In this case, since the auto-reset terminal of the timer IC 3 is grounded, the auto-reset function works in this state, and the timer IC 3 starts timing. Therefore, a high potential Vtimer is output from the output terminal.

  On the other hand, in a state where the secondary battery is not connected to the charging circuit 6, high and low potential voltages are not applied to the secondary battery type determination terminal 4, and the DC voltage VC via the resistor R2 is applied to the transistor Q1. In addition to being applied to the base, it is applied to the reset terminal of the timer IC 3. As a result, the timer IC3 is not reset, the transistor Q1 is controlled to be in the ON state, the collector voltage VS becomes low potential, and the charge control voltage is not output from the AND circuit 5 regardless of the high potential Vtimer, and charging is performed. It will never be.

  When the secondary battery 7 is connected to the charging circuit 6, a low or high potential voltage is applied to the secondary battery type determination terminal 4 based on whether the connected secondary battery 7 can be charged or not. . When the secondary battery 7 is a rechargeable secondary battery, a low potential voltage is applied to the secondary battery type determination terminal 4, and the reset terminal of the timer IC 3 changes from a high potential to a low potential, and from a high potential to a low potential. All the functions including the timer function of the timer IC 3 are master reset by the falling edge when. This reset function is also referred to as a master reset function.

  Since the master reset function of the timer IC 3 is activated, the timer IC 3 is started again, the output terminal of the timer IC 3 is set to the high potential output for the set period, and the AND circuit 5 is set to the AND circuit 5 for the period for which the high potential output voltage Vtimer is set. Supplied. On the other hand, as a result of the low potential being applied to the secondary battery type determination terminal 4, the transistor Q 1 is controlled to be turned off, and the collector voltage VS having a high potential is supplied to the AND circuit 5. As a result, the charging control voltage is supplied to the charging circuit 6 and charging of the secondary battery 7 is started. When the period set for the timer IC3 elapses, the output voltage Vtimer of the timer IC3 is set to a low potential. Therefore, the charging control voltage disappears and charging ends.

  When the rechargeable secondary battery 7 is connected to the charging circuit 6, a high potential is applied to the secondary battery type discrimination terminal 4, the timer IC 3 is not reset, and the low potential output voltage Vtimer is output. Further, the transistor Q1 is controlled to be in the ON state, the collector voltage VS having a low potential is output, the charge control voltage is not output from the AND circuit 5, and charging of the secondary battery 7 by the charging circuit 6 is not started.

  The timer IC 3 is also used when the rechargeable secondary battery 7 is connected to the charging circuit 6 and the secondary battery type determination terminal 4 is in a low voltage state, and the adapter output voltage VA rises and changes from a low voltage to a high voltage. When the timer IC3 starts measuring time, the output terminal of the timer IC3 becomes a high potential, the high potential output voltage Vtimer is output, and charging is started.

  However, in the conventional charge control device 11 shown in FIG. 2 described above, when the input voltage of the adapter is momentarily interrupted, the adapter output voltage VA once decreases and then returns to a high voltage. As a result, the power supply voltage VC of the timer IC 3 once decreases and returns to the high voltage again. Therefore, when the power supply voltage VC of the timer IC 3 returns to the high voltage, the timer IC 3 auto-reset function works and the timer IC 3 is reset. This is because the threshold for the auto-reset function of the timer IC 3 is close to the power supply voltage Vdd, so that the auto-reset function works even if the power supply voltage VC is slightly lowered.

  In order to avoid this, in the conventional charging control device 11, as shown in FIG. 2, a diode D1 and a capacitor C1 having a large capacitance are connected to the output terminal of the three-terminal regulator 2 to reduce the adapter output voltage VA. Is preventing. However, a capacitor having a large capacitance has a large shape and has a problem in that it restricts circuit pattern formation.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a charge control device that eliminates the need for a diode and a large capacitance capacitor that have been conventionally required.

According to a first aspect of the present invention, the stabilized adapter output voltage is supplied as the power supply voltage, and when the secondary battery is not connected to the charging circuit, or the charging circuit is charged with no charge. First switch means controlled to a low potential output state when a secondary battery is connected and controlled to a high potential output state when a rechargeable secondary battery is connected to the charging circuit;
The adapter output voltage is supplied as a power supply voltage, the output from the first switch means is supplied as an input via a time constant circuit, and the low potential output is performed when the first switch means is in a high potential output state. Second switch means controlled to a high potential output state when the first switch means is in a low potential output state;
The adapter output voltage is applied as a power supply voltage and applied to an auto-reset terminal for auto-reset, the output of the second switch means is applied to the reset terminal, and the falling edge of the voltage applied to the reset terminal in being master reset, preset period after master reset, and a timer means for sending the high potential output,
Charging control voltage output means for outputting a charging control voltage to the charging circuit during a period when the output from the timer means is high output and the output from the first switch means is high potential;
And charging the secondary battery via the charging circuit during the output period of the charging control voltage.

  According to the charging control device of the first aspect of the present invention, when the secondary battery is not connected to the charging circuit, or when the secondary battery that is not charged is connected to the charging circuit, the first switch Since the output of the means is controlled to the low potential output state, the charging control voltage is not output and the charging circuit does not perform the charging action.

  When a rechargeable secondary battery is connected to the charging circuit, the output of the first switch means is controlled to the high potential output state. Further, by connecting a rechargeable secondary battery to the charging circuit, the second switching means is controlled from the high potential state to the low potential state, and the timer means is master reset at the falling edge and preset. The high-potential output is output from the timer means during this period, the charging control voltage is output, and the charging circuit charges the connected secondary battery. During this period, the adapter output voltage is momentarily interrupted, and even if the adapter output voltage is once lowered to a low voltage, the output of the second switch means is maintained in a high potential state for a period based on the time constant of the time constant circuit. For this reason, even if there is a momentary interruption of the adapter output voltage, the voltage at the reset terminal of the timer means does not decrease once during the momentary interruption. As a result, a falling edge is not applied to the reset terminal, and a master reset is not applied. For this reason, a diode and a capacitor having a large capacitance which are conventionally required are not required, and the second switch means and the time constant circuit are provided, and the degree of freedom of the circuit pattern is increased.

  DESCRIPTION OF EMBODIMENTS Hereinafter, a charge control device according to the present invention will be described with reference to embodiments.

  FIG. 1 is a block diagram showing a configuration of a charge control device according to an embodiment of the present invention.

  In the charge control device 10 according to the embodiment of the present invention, the same components as those in the conventional charge control device 11 shown in FIG. 2 are denoted by the same reference numerals, and the same components are used to avoid duplication. Description of is omitted.

  In the charging control device 10, the diode D1 and the capacitor C1 are not connected, and the same DC voltage VC as that of the power supply terminal Vdd is applied to the auto reset terminal of the timer IC. Further, the charge control device 10 includes a transistor Q2 having an emitter grounded and a DC voltage VC supplied to the collector via a collector resistor R4. The base of the transistor Q2 has a collector voltage of the transistor Q1 via a resistor R5. And the base of the transistor Q2 is grounded through the capacitor C2, and the resistor R1, the resistor R5, and the capacitor C2 form a time constant circuit, and the base potential of the transistor Q2 is determined based on the time constant by the time constant circuit. The collector voltage of the transistor Q2 is applied to the reset terminal of the timer IC3 so as to maintain the high potential. Other configurations are the same as those of the charge control circuit 11. Here, the transistor Q2 corresponds to the second switch means.

  The operation of the charging control device 10 configured as described above will be described. After the adapter output voltage VA is applied, it waits for the secondary battery 7 to be connected. In this case, since the DC voltage VC is applied to the auto reset terminal of the timer IC 3, the auto reset function does not work. Therefore, the high output voltage Vtimer is not output from the output terminal of the timer IC3.

  On the other hand, in a state where the secondary battery 7 is not connected to the charging circuit 6, high and low potential voltages are not applied to the secondary battery type determination terminal 4, but are applied to the base of the transistor Q1 via the resistor R2. The transistor Q1 is controlled to be on by the DC voltage VC applied, and the transistor Q2 is controlled to be off. Therefore, a high potential voltage is applied to the reset terminal of the timer IC3, the timer IC3 is not reset, the output of the timer IC3 is the low potential output voltage Vtimer, and the transistor Q1 is controlled to be on. The collector voltage VS becomes a low potential, the charge control voltage is not output from the AND circuit 5, and charging is not performed.

  When the secondary battery 7 is connected to the charging circuit 6 and the connected secondary battery 7 is a rechargeable secondary battery, a low potential voltage is applied to the secondary battery type determination terminal 4. Therefore, the transistor Q1 is controlled to the off state, the collector voltage VS of the transistor Q1 becomes a high voltage, the capacitor C2 is charged, the transistor Q2 is controlled to the on state, and the collector voltage of the transistor Q2 is controlled to the ground potential. Therefore, all the functions including the timer function of the timer IC3 are master reset by the falling edge when the collector voltage of the transistor Q2 changes from the high voltage to the low voltage.

  Since the master reset function of the timer IC 3 is activated, the timer IC 3 starts, and the high-potential output voltage Vtimer is supplied to the AND circuit 5 for a period set by the timer IC 3. On the other hand, the transistor Q1 is controlled to be in an OFF state, the collector potential VS of the transistor Q1 is high, and the high collector voltage VS is supplied to the AND circuit 5. As a result, the charging control voltage is supplied to the charging circuit 6 and charging of the secondary battery 7 is started. When the period set for the timer IC3 elapses, the output voltage Vtimer of the timer IC3 is set to a low potential. Therefore, the charging control voltage disappears and charging ends.

  When the secondary battery 7 is connected to the charging circuit 6 and the connected secondary battery 7 is a secondary battery that is not charged, a high potential voltage is applied to the secondary battery type determination terminal 4. In a state where a high potential voltage is applied to the secondary battery type determination terminal 4, the transistor Q1 is controlled to be on, the transistor Q2 is controlled to be off, and a high potential voltage is applied to the reset terminal of the timer IC3. Since the voltage is applied, the timer IC 3 is not reset and the low-potential output voltage Vtimer is output. on the other hand. Since the transistor Q1 is controlled to be in the ON state, the collector voltage VS having a low potential is output, and the output voltage Vtimer is a low potential voltage. Therefore, the charge control voltage is not output from the AND circuit 5, and the secondary battery 7 Charging by the charging circuit 6 is not started.

  Further, when the adapter output voltage VA rises from a low voltage to a high voltage while a low potential voltage is applied to the secondary battery type determination terminal 4, the reset terminal of the timer IC 3 via the resistor R4. A DC voltage VC is applied to. On the other hand, since the transistor Q1 is in the off state, the capacitor C2 is charged through the resistors R1 and R5 by the rising of the DC voltage VC, and the transistor Q2 is turned on with a time delay based on the time constant by the resistors R1, R5 and the capacitor C2. The reset terminal of the timer IC 3 is set to a low potential. Therefore, the timer IC3 master reset function operates at the falling edge of the potential of the reset terminal of the timer IC3, the timer IC3 starts, and at the same time, the output voltage Vtimer of the timer IC becomes a high potential, and the collector voltage of the transistor Q1 is also a high voltage. In addition, the charging control voltage is output from the AND circuit 5 and charging is started.

  In addition, when the adapter input voltage is momentarily interrupted, the adapter output voltage VA once decreases and then returns to a high voltage. Until the adapter output voltage VA once decreases and then returns to a high voltage, the transistor Q2 is turned on by the charge of the capacitor C2, and the reset terminal of the timer IC3 is maintained at a low potential voltage. It is avoided that the timer IC3 is reset when the voltage VC returns to the high voltage.

  As described above, in place of the diode D1 and the large-capacitance capacitor C1 required in the charge control device 11 in order to prevent the master reset function of the timer IC3 from working when the adapter voltage is momentarily interrupted, charging is performed. According to the control device 10, the transistor Q2, the small-capacitance capacitor C2, the resistor R4, and the resistor R5 are sufficient, and these have a small component shape and increase the judo of circuit pattern routing.

  Furthermore, because of the presence of the time constant circuit including the resistor R1, the resistor R5, and the capacitor, even if the voltage of the secondary battery type determination terminal 4 is chattered, the influence can be prevented.

It is a block diagram which shows the structure of the charge control apparatus concerning embodiment of this invention. It is a block diagram which shows the structure of the conventional charge control apparatus.

Explanation of symbols

1 Adapter output terminal 2 3 terminal regulator 3 Timer IC
4 Secondary battery type identification terminal 5 AND circuit 6 Charging circuit 7 Secondary battery 10 Charge control device Q1 and Q2 transistor

Claims (1)

When the stabilized adapter output voltage is supplied as the power supply voltage and the secondary battery is not connected to the charging circuit, or the secondary battery that is not charged is connected to the charging circuit, the output is controlled to the low potential output state. And a first switch means controlled to a high potential output state when a rechargeable secondary battery is connected to the charging circuit;
The adapter output voltage is supplied as a power supply voltage, the output from the first switch means is supplied as an input via a time constant circuit, and the low potential output is performed when the first switch means is in a high potential output state. Second switch means controlled to a high potential output state when the first switch means is in a low potential output state;
The adapter output voltage is applied as a power supply voltage and applied to an auto-reset terminal for auto-reset, the output of the second switch means is applied to the reset terminal, and the falling edge of the voltage applied to the reset terminal in being master reset, preset period after master reset, and a timer means for sending the high potential output,
Charging control voltage output means for outputting a charging control voltage to the charging circuit during a period when the output from the timer means is high output and the output from the first switch means is high potential;
And charging the secondary battery via the charging circuit during the output period of the charging control voltage.

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