JP4032822B2 - Address description conversion system and program for assembler program - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for converting an instruction description of one processor into an instruction description of another processor.
[0002]
[Prior art]
The processor is a computer that can provide processing contents as a program composed of a plurality of instructions. The smallest program unit is an instruction. The instructions include addition, subtraction, and processing for reading data from and writing data to the memory connected to the processor. Usually, the instructions vary from processor to processor. Therefore, a program described by an instruction for a certain processor does not operate on another processor. In order to operate this, it is necessary to convert the instruction described in the program into the instruction of the target processor.
[0003]
There are roughly two types of conversion methods. One is conversion at the binary code level, and the other is conversion at the source code level. Regarding conversion at the binary code level, DAISY [References 1 and 2] from IBM (http://www.ibm.com), FX! 32 [Reference 3] from DEC, Transmeta (http: // www The Crusoe processor of [.transmeta.com] [Reference 4], Dynamite of [Transitive.com] (http://www.transitive.com) [Reference 5], etc. are known. With regard to source code level conversion, there are [Reference 6] and [Reference 7] as examples of source code conversion described in assembly language.
[0004]
[Reference 1]; K. Ebcioglu, E. Altman, M. Gschwind, and S. Sathaye, "Dynamic binary translation and optimization," IEEE Transactions on Computers, Vol. 50, Issue 6, pp. 529-548, Jun . 2001.
・ [Reference 2]; Http://oss.software.ibm.com/developerworks/opensource/daisy/
[Reference 3]; A. Chernoff, M. Herdeg, R. Hookway, C. Reeve, N. Rubin, T. Tye, SB Yadavalli, and J. Yates, "FX! 32 A Profile-Directed Binary Translator," IEEE Micro, vol. 18, no. 2, pp. 56-64, Mar. 1998.
[Reference 4]; Alexander Klaib, "The Technology Behind Crusoe Processors," Technical report, Transmeta Corp., Santa Clara, Calif. USA, Jan. 2000, available at http://www.transmeta.com.
・ [Reference 5]; "The Technology Behind Crusoe Processors," Product data sheet, Transitive Technologies Ltd., 2001, available at http://www.transitives.com.
[Reference 6]; MF Smith and BE Luff, "Automatic assembler source translation from the Z80 to the MC6809," IEEE Micro, Vol. 4, No 2, pp. 3-9, Apr. 1984.
・ [Reference 7]; Texas Instruments Europe, "TMS320C5x to TMS320C54x Translation Utility," Literature Number: BPRA075, Feb. 1998.
[0005]
IBM's DAISY is software that converts binary code for Intel's x86 architecture and IBM's PowerPC architecture into IBM's VLIW (very long instruction word) processor at runtime [References 1 and 2]. DEC FX! 32 is software that converts binary code for the x86 architecture to run on the DEC Alpha processor [Reference 3]. Despite the fact that Transmeta's Crusoe processor has a different instruction set than Intel's x86 architecture, Crusoe can convert x86 instructions to Crusoe instructions at program level at the binary level, so it is written for the x86 architecture. Can be executed [Reference 3]. Transitive provides software that converts binary code for one processor into binary code for another processor [5].
[0006]
On the other hand, in [Reference 6], source code written in assembly language for Z80 processor from Zilog (http://www.zilog.com) is used for MC6809 from Motorola (http://www.motorola.com). A technique for converting into source code written in an assembly language for a processor is described. [Reference 7] converts source code written in assembly language for TMS320C5x processor of Texas Instruments (http://www.ti.com) into source code written in assembly language for TMS320C54x processor of the company. The technology is described.
[0007]
The advantage of binary level translation is that it can be executed on another processor without making any changes to the binary code once created for one processor. Even if there is no original source code, only binary code is required. The converted binary code is interpreted by the processor that executes it. If the conversion is performed when the program is executed, the user is not involved in the conversion and does not need to be aware that the program is converted.
[0008]
On the other hand, the disadvantage of binary level conversion is that it is very difficult for the user to correct the converted binary code. This is because editing the converted binary code requires disassembling it, but the resulting assembly source code is very difficult to understand. If the user is not satisfied with the execution speed of the converted binary code, it is almost impossible to improve it.
[0009]
If the user wants to make the binary code run time as short as possible after conversion,
Binary level conversion is not suitable. A source code level conversion is more suitable. If the user has the source code of the source program, it can be recompiled for the target processor. If the source program is written in a high-level language such as C, recompiling to the target processor is very easy. When the conversion source program is described in the assembly language, the user can optimize it after the conversion as long as the source code can be converted into the source code described in the assembly language of the target processor.
[0010]
In the conventional code conversion techniques described so far, processors with the same address system are targeted. In general, a processor assigns one address for each byte (8 bits) of data. This is called a byte address system. Most of the conventional examples shown as references are technologies for converting codes between processors based on the byte address system. On the other hand, there is a processor that assigns an address for each data of a plurality of bytes. For example, a signal processor called TMS320C5x or TMS320C54x from Texas Instruments assigns an address every 2 bytes (16 bits, 1 word). This is generally called a word address system.
[0011]
Although code conversion is theoretically possible even between processors having different address systems, no technology related to such code conversion has been reported so far. For example, it is possible to convert a program written for a word address type processor into a program for a byte address type processor, but there is no report on such conversion. One of the reasons for not having a report example is that when a program is converted between processors having different address systems, it is difficult to convert an address description included in the program. Conventionally, all address descriptions included in the original program cannot be automatically and efficiently converted. Efficient code conversion between processors with different address systems is not possible because the post-conversion program execution time and code size are significantly degraded compared to the original program and address description conversion must be performed manually. It was.
[0012]
Conventionally, a technique called emulation has been used to convert a program between processors having different address systems. Emulation is a technique for executing a program written for one processor on another processor. For example, when a program for the processor A is executed by the processor B using emulation, a virtual processor A is first constructed on the processor B. Then, the virtual processor A executes a program for the processor A. Since emulation executes a program for another processor through a virtual processor, the execution speed of the program deteriorates. Obviously, in order to execute the program at high speed, it is better to convert the program and the processor A directly executes the program.
[0013]
[Problems to be solved by the invention]
Included in the original program when a program is converted from a processor based on a word address system that assigns one address to multi-byte data to a processor based on a byte address system that assigns one address to 1-byte data Since all address descriptions could not be automatically and efficiently converted, the post-conversion program execution time and code size were significantly deteriorated compared to the original program, and it was necessary to perform address description conversion manually.
[0014]
The present invention pays attention to this point, and an object thereof is to efficiently convert an address description in code conversion in two processors having different address systems. Specifically, from the conversion source program for the conversion source processor based on the address system in which one address is assigned to the first number of bytes of data, an address to which one address is assigned to the second number of bytes of data. An object of the present invention is to efficiently convert an address description with respect to an execution time and a code size of a post-conversion program in conversion to a post-conversion program for a post-conversion processor based on the system.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, a character string conversion system (100 in FIG. 1) according to the present invention includes character string replacement means (110 in FIG. 1), character string replacement means (121 in FIG. 1), and character string insertion means. (122 in FIG. 1), unnecessary instruction deletion means (130 in FIG. 1), and output means (140 in FIG. 1).
[0016]
The conversion source program is input to the character string conversion system (100 in FIG. 1). The character string replacement means (110 in FIG. 1) finds a description referring to a symbol character string to which an address is automatically assigned by other software from the input source program, and the symbol character string is a branch instruction. If the symbol character string is not a symbol character string indicating the branch destination, the address assigned to the symbol character string is multiplied by 1 / L times [L = (number of bytes of data to which the conversion source processor assigns one address) / (Number of bytes to which the processor assigns one address after conversion), and an integer greater than or equal to 2)].
[0017]
The character string replacement means (121 in FIG. 1) reads from the memory using the address described by the symbol character string or numerical value in the program after the replacement by the first character string replacement means (110 in FIG. 1). If there is an instruction accompanied by a process for reading a value or an instruction accompanied by a process for writing a value to a memory using an address described in a symbol character string or a numerical value, the symbol character string or numerical value indicating the memory address is set to an L-fold address. Replace with the description to be.
[0018]
The character string insertion means (122 in FIG. 1) uses the address stored in the general-purpose register of the processor to store the value from the memory in the program that has been replaced by the first character string replacement means (110 in FIG. 1). If there is an instruction involving a read process or an instruction involving a process of writing a value to a memory using an address stored in a general-purpose register, an instruction to multiply the general-purpose register storing the address referred to by the instruction by L An instruction to be executed in a cycle is inserted, and an instruction for multiplying the general-purpose register by 1 / L is inserted to be executed in a cycle after the instruction.
[0019]
The unnecessary instruction deleting means (130 in FIG. 1) is an unnecessary instruction from all the character strings including the character strings processed by the character string replacing means (121 in FIG. 1) and the character string inserting means (122 in FIG. 1). Is deleted. The output means (140 in FIG. 1) outputs all character strings including instructions that have not been deleted by the unnecessary instruction deletion means (130 in FIG. 1).
[0020]
In order to achieve the above object, the character string conversion system (200 in FIG. 2) of the present invention has a first character string replacement unit (210 in FIG. 2) and a second character string replacement unit (in FIG. 2). 221), third character string replacement means (222 in FIG. 2), first character string insertion means (223 in FIG. 2), second character string insertion means (224 in FIG. 2), unnecessary Instruction deletion means (230 in FIG. 2) and output means (240 in FIG. 2) are provided.
[0021]
The character string replacing means (210 in FIG. 2) finds a description referring to a symbol character string to which an address is automatically assigned by other software from the inputted conversion source program, and the symbol character string is a branch instruction branch. If it is not the symbol character string indicating the destination, the symbol character string is replaced with a description that makes the address assigned to the symbol character string 1 / L times.
[0022]
The character string replacement means (221 in FIG. 2) reads a value from the memory using an address described by a symbol character string or a numerical value in the program that has been replaced by the character string replacement means (210 in FIG. 2). If there is an instruction that involves processing, or an instruction that involves writing a value to the memory using an address that is described by a symbol character string or a numerical value, a description that makes the symbol character string or numerical value indicating the memory address L times that address Replace with.
[0023]
The character string replacement means (222 in FIG. 2) is described by a symbol character string or a numerical value in the address dedicated register for storing the address in the program after the replacement by the character string replacement means (210 in FIG. 2). If there is an instruction for transferring the value, the symbol character string or numerical value is replaced with a description that uses an address that is L times the symbol character string or numerical value.
[0024]
The character string insertion means (223 in FIG. 2) receives the value from the location other than the address dedicated register for the address dedicated register for storing the address in the program after the replacement by the character string replacement means (210 in FIG. 2). If there is an instruction for transferring the instruction, an instruction for multiplying the value stored in the address dedicated register by L is inserted so as to be executed in a cycle subsequent to the instruction. Alternatively, an instruction for multiplying the transfer source value by L is inserted to be executed in the previous cycle of the instruction, and an instruction for multiplying the transfer source value by 1 / L is inserted to be executed in the cycle after the instruction. To do.
[0025]
The character string inserting means (224 in FIG. 2) sets the value from the address dedicated register for storing the address to a place other than the address dedicated register in the program after the replacement by the character string replacing means (210 in FIG. 2). If there is an instruction for transferring the instruction, an instruction for multiplying the value after the transfer by 1 / L is inserted so as to be executed in a cycle after the instruction. Alternatively, an instruction for multiplying the value stored in the address dedicated register by 1 / L is inserted so as to be executed in the previous cycle of the instruction, and an instruction for multiplying the value stored in the address dedicated register by L Insert to be executed in a later cycle of the instruction.
[0026]
The unnecessary instruction deleting means (230 in FIG. 2) searches for and deletes unnecessary instructions from the instructions inserted by the character string converting means (220 in FIG. 2). The output means (240 in FIG. 2) outputs all character strings including instructions that are not deleted by the unnecessary instruction deletion means (230 in FIG. 2).
[0027]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described in detail with reference to the drawings.
[0028]
[Description of configuration]
In a processor program, a value representing an address is generally divided into a base address and an offset address. In general, the base address is referred to as a symbol character string. For example, the name of the array (symbol character string) is used to refer to the start address of the array on the memory. The offset address is described directly as a numerical value or as a symbol character string to which a numerical value is assigned. Alternatively, the offset address may be expressed as a difference between symbol character strings that are automatically given addresses as the names of the arrays.
[0029]
Hereinafter, an address system in which one address is assigned to data of L bytes (L is an integer of 2 or more) will be referred to as a word address system. A processor that uses a word address is assumed to be processor W, and a processor that uses a byte address is assumed to be processor B. In a program written for processor W, a tool such as a linker automatically assigns a word address to the symbol character string indicating the name of the array. In the source code written in assembly language for processor B, a tool such as a linker automatically assigns a byte address to a symbol character string indicating the name of the array.
[0030]
Assume that the processor W and the processor B have the same architecture except for the address system, and have the same instruction set. In this case, when the program in which the instruction of the processor W is described is interpreted as it is as a program for the processor B, only the symbol character string to which an address is automatically assigned by the linker or the like has a byte address, and other than that Numeric values indicating symbols and symbol character strings hold word addresses.
[0031]
Even if processor W and processor B have exactly the same instruction set, the address system is different, so in order to interpret a program in which the instructions of processor W are described as a program for processor B, the address description is converted. There is a need. If the processor W and the processor B have different instruction sets, in addition to converting individual instructions, it is also necessary to convert the address description.
[0032]
The present invention converts a program of one address system into a program of another address system (for example, a program in which an instruction of the processor W based on the word address system is described is converted into a program for the processor B based on the byte address system. Addresses in the program required for conversion, and when converting programs between word address type processors in which the number of bytes of data to which one address is assigned differs and the ratio is an integer of 2 or more A system that converts descriptions.
[0033]
First, we describe a system that converts address descriptions when processor W and processor B have exactly the same instruction set, the assembly language specifications are exactly the same, and only the address system is different.
[0034]
Referring to FIG. 1, a first embodiment of a character string conversion system 100 according to the present invention includes a character string replacement unit 110, a character string conversion unit 120, an unnecessary instruction deletion unit 130, an output unit 140, and a recording medium K1. Composed. The character string conversion unit 120 includes a character string replacement unit 121 and a character string insertion unit 122. The recording medium K1 is a disk, semiconductor memory, or other recording medium, and stores a program for causing the computer to function as the character string conversion system 100. This program is read by a computer and its operation is controlled to realize a character string replacement unit 110, a character string conversion unit 120, an unnecessary instruction deletion unit 130, and an output unit 140 on the computer.
[0035]
First, the character string replacement unit 110 will be described. When a symbol character string to which an address is automatically assigned by other software such as a linker is referred to in the program, the character string replacing unit 110 sets the address assigned to the symbol character string to an address that is 1 / L times the address. Convert to description. Here, L is the number of bytes indicating the minimum data width to which an address is assigned in the processor W. For example, L is 2 when one address is assigned to 2-byte data.
[0036]
For example, in the conversion source program, when a symbol character string label to which a word address is automatically assigned by other software is referenced, the post-conversion program converts label to (label / L). Alternatively, a function div (x, L) for multiplying x by 1 / L is defined, and label is converted to div (label, L). In the post-conversion program, label has a byte address, so (label / L) and div (x, L) indicate the word address in the source processor.
[0037]
However, the symbol character string used to indicate the branch destination of the program in the branch instruction is not subject to replacement. A branch instruction is an instruction for switching the flow of program execution.
[0038]
Next, the character string conversion unit 120 will be described. The character string conversion unit 120 converts an instruction including an address description in the program that has been processed by the character string replacement unit 110. An instruction including an address description is an instruction accompanied by a process for reading data from a memory, an instruction accompanied by a process for writing data to the memory, or the like.
[0039]
Hereinafter, the character string conversion unit 120 will be described in detail. In order to explain the operation of the character string conversion means 120, it is necessary to assume the architecture of the processor and the instruction set. FIG. 3 shows register configurations of the processor W and the processor B. Processor W and processor B have N general-purpose registers and M address-only registers. N and M are integers of 0 or more. Here, it will be referred to as general-purpose register Rn. n is a number from 0 to N-1. When N is 0, the general-purpose register Rn does not exist. Here, the address dedicated register is called Am. Any number from 0 to M-1 applies to m. When M is 0, it is assumed that the address dedicated register Am does not exist. The general-purpose register Rn is a place for storing a value used by the processor and a calculation result. The general-purpose register Rn can also store an address indicating the position of data or an instruction on the memory. On the other hand, the address dedicated register Am is a place for storing an address indicating the position of data or an instruction on the memory.
[0040]
In the character string conversion system 100 according to the present embodiment, a part or all of the memory address is a symbol character string or a numerical value with respect to an address used when the processor reads data from the memory or writes data to the memory. Assume that you write directly or store some or all of the memory addresses in general purpose registers.
[0041]
In the character string conversion unit 120, the processor instructions to be processed are an instruction accompanied by a process for reading data from the memory and an instruction accompanied by a process for writing data to the memory. In these instructions, processing contents differ depending on how addresses indicating data locations are described in the instructions. The rules for determining the processing contents are shown below.
[0042]
Rule (1)
“If part or all of the address is described by a symbol character string or a numerical value, replace the symbol character string or numerical value indicating the memory address with a description that uses an L-fold address.”
Rule (2)
“If part or all of the address is stored in general-purpose register Rn, insert an instruction to multiply the address stored in general-purpose register Rn by L so that it is executed in the previous cycle of the instruction. An instruction for multiplying the address stored in the register Rn by 1 / L is inserted so that it is executed in the cycle after the instruction. "
[0043]
The character string converting unit 120 includes a character string replacing unit 121 and a character string inserting unit 122. If there is an instruction corresponding to the rule (1), the character string replacing unit 121 executes the process described in the rule (1). If there is an instruction corresponding to the rule (2), the character string insertion means 122 executes the process described in the rule (2). If there is an instruction that corresponds to multiple rules, the processing described in all the applicable rules is executed.
[0044]
A specific example of the rules (1) and (2) will be described using the basic instruction set 21 (FIG. 4) of the processors W and B. FIG. 4 shows instructions to be converted and instructions necessary for the conversion. In order to refer to the instruction shown in FIG. 4, the instruction reference symbol of FIG. 4 is used. The instruction description method differs depending on the processor, and also differs depending on the file format in which the instruction is described. Here, description will be made using the description example shown in FIG.
[0045]
Instruction LDST0 conversion method
The instruction LDST0 is an instruction for reading data from an address described by a symbol character string or a numerical value, or an instruction for writing data to the address. Therefore, rule (1) is applied. In instruction LDST0, a symbol character string or a numerical value indicating a part or all of the address is converted into a description multiplied by L. For example,
R0 = * [label + K]
The
R0 = ＊ [(label + K) ＊ L]
Convert to Here, label is a symbol character string whose address is automatically assigned by other software such as a linker, and K is a symbol character string or a numerical value representing an arbitrary constant.
[0046]
Instruction LDST1 conversion method
The instruction LDST1 is an instruction for reading data from an address indicated by the general-purpose register or an instruction for writing data to the address. Therefore, rule (2) is applied. In instruction LDST1, insert an instruction that multiplies the general-purpose register that holds part or all of the addresses so that it is executed in the cycle preceding the instruction to be converted. In addition, insert an instruction that multiplies the general-purpose register holding part or all of the address by 1 / L so that it is executed in the cycle after the instruction to be converted. For example, if L = 2,
R0 = * [R4]
The
R4 = R4 + R4
R0 = * [R4]
R4 = R4 >> 1
Are converted into three instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used.
[0047]
Instruction LDST2 conversion method
The instruction LDST2 is an instruction for reading data from an address indicated by the sum of an address described by a symbol character string or a numerical value and a general-purpose register, or an instruction for writing data to the address. Therefore, rule (1) and rule (2) apply. In the instruction LDST2, a symbol character string or a numerical value indicating a part or all of the address is converted to a description multiplied by L. Further, an instruction for multiplying the general-purpose register holding a part or all of the addresses by L is inserted so as to be executed in the cycle before the conversion target instruction. Further, an instruction for multiplying the general-purpose register holding a part or all of the address by 1 / L is inserted so as to be executed in the cycle after the instruction to be converted. For example, if L = 2,
R0 = * [R4 + K]
The
R4 = R4 + R4
R0 = * [R4 + (K) * 2]
R4 = R4 >> 1
Are converted into three instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used.
[0048]
Instruction LDST3 conversion method
The instruction LDST3 is an instruction for reading data from an address indicated by the sum of a general register and another general register, or an instruction for writing data to the address. Therefore, rule (2) is applied. In the instruction LDST3, an instruction that multiplies each general-purpose register that holds part or all of the addresses by L is inserted so as to be executed in the cycle preceding the instruction to be converted. Further, an instruction that multiplies the general-purpose registers holding part or all of the addresses by 1 / L is inserted so that it is executed in the cycle after the conversion target instruction. For example, if L = 2,
R0 = * [R4 + R5]
The
R4 = R4 + R4
R5 = R5 + R5
R0 = * [R4 + R5]
R4 = R4 >> 1
R5 = R5 >> 1
Is converted into five instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Similarly, left shift instruction R5 = R5 instead of addition instruction R5 = R5 + R5 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used. Similarly, another instruction that halves R4 may be used instead of the right 1-bit shift instruction.
[0049]
Instruction ADD1 conversion method
The instruction ADD1 is an instruction for adding the value stored in the general-purpose register and the value loaded from the memory and transferring the result to the general-purpose register. In the instruction ADD1, for example, when a part or all of the address of data to be loaded from the memory is described by a symbol character string or a numerical value, the symbol character string or numerical value indicating the memory address is changed to an L-fold address. replace. Or in the instruction ADD1, for example, when part or all of the address of the data to be loaded from the memory is stored in the general-purpose register, the instruction that multiplies the address stored in the general-purpose register by L is executed in the cycle before the instruction to be converted In addition, an instruction for multiplying the address stored in the general-purpose register by 1 / L is inserted so that it is executed in the cycle after the instruction to be converted.
[0050]
In the instruction ADD1, rule (1) is applied when an address is described by a symbol character string or a numerical value, for example. For example,
R0 = R0 + * [label + K]
The
R0 = R0 + * [(label + K) * L]
Convert to Here, label is a symbol character string to which an address is automatically assigned by other software such as a linker, and K is a symbol character string or a numerical value representing an arbitrary constant.
[0051]
In the instruction ADD1, for example, when L = 2 and the address is stored in the general-purpose register R4, the rule (2) is applied. For example,
R0 = R0 + * [R4]
The
R4 = R4 + R4
R0 = R0 + * [R4]
R4 = R4 >> 1
Are converted into three instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used.
[0052]
In the instruction ADD1, for example, when L = 2 and the address is represented by the sum of the general-purpose register R4 and the symbol character string K, the rule (1) and the rule (2) are applied. For example,
R0 = R0 + * [R4 + K]
The
R4 = R4 + R4
R0 = R0 + * [R4 + (K) * 2]
R4 = R4 >> 1
Are converted into three instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used.
[0053]
In the instruction ADD1, for example, when L = 2 and the address is represented by the sum of the general register R4 and the general register R5, the rule (2) is applied. For example,
R0 = R0 + * [R4 + R5]
The
R4 = R4 + R4
R5 = R5 + R5
R0 = R0 + * [R4 + R5]
R4 = R4 >> 1
R5 = R5 >> 1
Is converted into five instructions. Here, the add instruction R4 = R4 + R4 was used to double the general-purpose register R4, but the left shift instruction R4 = R4 <<1 may be used. Similarly, left shift instruction R5 = R5 instead of addition instruction R5 = R5 + R5 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R4 by 1/2, other instructions that multiply R4 by 1/2 may be used. Similarly, another instruction that halves R4 may be used instead of the right 1-bit shift instruction.
[0054]
Other instructions not described in FIG. 4, such as subtraction instructions, multiplication instructions, division instructions, shift instructions, logical operation instructions, etc., instructions that involve processing to read a value from a memory or write a value to a memory If there is, the description about the address included in the instruction is converted as described above.
[0055]
Of the instructions shown in Fig. 4, instructions that have not been described so far (MV0 instruction, ADD0 instruction, SHFT0 instruction) do not correspond to rule (1) or rule (2), so nothing is changed. .
[0056]
Next, the unnecessary instruction deletion unit 130 will be described. The unnecessary command deletion unit 130 takes the processing result of the character string conversion unit 120, analyzes the program, and deletes unnecessary commands.
[0057]
The program converted by the character string conversion unit 120 may include unnecessary instructions. Unnecessary instructions are undesirable because they increase program execution time and code size. Therefore, unnecessary instructions are deleted. The unnecessary instruction here is an instruction inserted by the character string conversion unit 120 and does not affect the execution result of the program.
[0058]
For example, the character string conversion means 120 inserts an addition instruction R0 = R0 + R0 (stores the sum of the general-purpose register R0 and the general-purpose register R0 in the general-purpose register R0) into a program and shifts right by 1 bit immediately after the instruction. Assume that the instruction R0 = R0 >> 1 (the general register R0 is shifted to the right by 1 bit and stored in the general register R0 again) is inserted. When it is known that the most significant bit of the general-purpose register R0 is 0 before and after the execution of the addition instruction R0 = R0 + R0, the addition instruction inserted by the character string conversion unit 120 and the right 1 immediately after Bit shift instructions are not required. This is because when the right 1-bit shift instruction R0 = R0 >> 1 is executed immediately after the addition instruction R0 = R0 + R0, R0 returns to the value before the execution of the addition instruction R0 = R0 + R0.
[0059]
Alternatively, it is assumed that the character string conversion unit 120 inserts a right 1-bit shift instruction R0 = R0 >> 1 into a certain program and inserts an addition instruction R0 = R0 + R0 immediately after the instruction. If it is known that the least significant bit of the general register R0 is 0 before the execution of the right 1-bit shift instruction R0 = R0 >> 1, the right 1-bit shift instruction inserted by the character string conversion means 2 The immediately following addition instruction is unnecessary. This is because when the addition instruction R0 = R0 + R0 is executed immediately after the right 1-bit shift instruction R0 = R0 >> 1, the value before the execution of the R0 right 1-bit shift instruction R0 = R0 >> 1 is restored. .
[0060]
It is possible to delete unnecessary instructions while converting a program. For example, when an instruction is converted, it is possible to determine whether the instruction is an unnecessary instruction by examining the relationship with the already converted instruction. Alternatively, it is possible to analyze the program before conversion and convert the program so that unnecessary instructions are not inserted. The character string conversion system of the present invention can be applied to either configuration.
[0061]
Next, the output unit 140 will be described. The output unit 140 outputs all character strings including instructions that have not been deleted by the unnecessary command deletion unit 130.
[0062]
Next, a second embodiment of the character string conversion system according to the present invention will be described with reference to FIG. The character string conversion system 200 according to the present embodiment includes a character string replacement unit 210, a character string conversion unit 220, an unnecessary command deletion unit 230, an output unit 240, and a recording medium K2. The recording medium K2 is a disk, semiconductor memory, or other recording medium, and stores a program for causing the computer to function as the character string conversion system 200. This program is read by a computer, and a character string replacing unit 210, a character string converting unit 220, an unnecessary instruction deleting unit 230, and an output unit 240 are realized on the computer.
[0063]
The character string replacement unit 210, unnecessary command deletion unit 230, and output unit 240 have the same configuration as the character string replacement unit 110, unnecessary command deletion unit 130, and output unit 140 shown in FIG. Only the character string conversion unit 220 will be described. In the character string conversion system 200 according to the present embodiment, a part or all of the addresses are directly expressed as symbol character strings or numerical values with respect to addresses used when the processor reads data from the memory or writes data to the memory. It is assumed that a part or all of the address is stored in the address dedicated register.
[0064]
In the character string conversion means 220, the instructions of the processor to be processed are an instruction accompanied by a process for reading data from the memory, an instruction accompanied by a process for writing data to the memory, an instruction for transferring a value to the address dedicated register, and an address This instruction transfers the value stored in the dedicated register to other than the address dedicated register. In these instructions, the processing contents differ depending on how the address is described, how the transferred value is described in the instruction, where the value is transferred, and the like.
[0065]
The rules for determining the processing contents are shown below.
[0066]
Rule (3)
“If an instruction with a process for reading a value from a memory or an instruction with a process for writing a value to a memory has a part or all of the address described in a symbol character string or numerical value, a symbol character string indicating the address of the memory Replace with a description that makes the number an L times the address. "
Rule (4)
“If the instruction to transfer a value to the address-only register Am is part or all of the value to be transferred described in a symbol character string or a numerical value, the symbol character string or numerical value indicating the memory address is the L times the address. Replace with the description that
Rule (5)
“If an instruction that transfers a value to the address dedicated register Am is partially or entirely stored in a location other than the address dedicated register, the instruction that multiplies the address dedicated register Am by L Insert an instruction to be executed in a cycle, or insert an instruction to multiply the transfer source value by L to be executed in the previous cycle of the instruction, and further add an instruction to multiply the transfer source value by 1 / L To be executed in a later cycle. "
Rule (6)
“In the instruction to transfer the value stored in the address dedicated register Am to a location other than the address dedicated register, if part or all of the transferred value is stored in the address dedicated register Am, the value after transfer is set to 1. Insert an instruction to multiply / L to be executed in the cycle after the instruction, or execute an instruction to multiply the value stored in the address dedicated register Am by 1 / L in the cycle before the instruction. Insert an instruction that multiplies the value stored in the address-only register Am by L so that it is executed in the cycle after the instruction. "
[0067]
The character string conversion unit 220 includes a character string replacement unit 221, a character string replacement unit 222, a character string insertion unit 223, and a character string insertion unit 224. If there is an instruction corresponding to the rule (3), the character string replacement means 221 executes the process described in the rule (3). If there is an instruction corresponding to the rule (4), the character string replacement unit 222 executes the process described in the rule (4). If there is an instruction corresponding to the rule (5), the character string insertion means 223 executes the process described in the rule (5). If there is an instruction corresponding to the rule (6), the character string insertion means 224 executes the process described in the rule (6). If there is an instruction corresponding to a plurality of rules, the processing described in all the corresponding rules is executed.
[0068]
Specific examples of the rules (3), (4), (5), and (6) will be described using the basic instruction sets 22 and 23 (FIGS. 5 and 6) of the processor W and the processor B. 5 and 6 show instructions to be converted and instructions necessary for the conversion. In order to refer to the instructions shown in FIGS. 5 and 6, the instruction reference symbols of FIGS. 5 and 6 are used. Although the instruction description method differs depending on the processor and the file format in which the instruction is described, here, description will be made using the description examples shown in FIGS.
[0069]
Instruction LDST0 conversion method
The instruction LDST0 is an instruction for reading data from an address described by a symbol character string or a numerical value, or an instruction for writing data to the address. Therefore, rule (3) is applied. In the instruction LDST0, the symbol character string indicating a part or all of the address or the numerical value converted to a description multiplied by L is converted. That means
R0 = * [label + K]
The
R0 = ＊ [(label + K) ＊ L]
Convert to Here, label is a symbol character string to which an address is automatically assigned by other software such as a linker, and K is a symbol character string or a numerical value representing an arbitrary constant.
[0070]
Instruction LDST5 conversion method
The instruction LDST5 is an instruction for reading data from an address indicated by the sum of an address described by a symbol character string or a numerical value and an address dedicated register, or an instruction for writing data to the address. Therefore, rule (3) is applied. In instruction LDST5, the address stored in the address dedicated register is considered to have been converted to a byte address when it is transferred to the address dedicated register, and only the symbol character string or numerical value indicating part or all of the address is multiplied by L Convert to the description. For example, if L = 2,
R0 = * [A0 + K]
The
R0 = * [A0 + (K) * L]
Convert to
[0071]
Instruction LDST7 conversion method
The instruction LDST7 reads a value from the memory and transfers it to the address dedicated register Am. In the instruction LDST7, conversion is performed so that a value L times the value read from the memory is transferred to the address dedicated register Am. Furthermore, if part or all of the memory address is described by a symbol character string or numerical value, it is converted to a description that is multiplied by L. For example, when L = 2 in the instruction LDST7 and reading a value from the memory using an address described by a symbol character string or a numerical value, the rule (3) and the rule (5) are applied. For example,
A0 = ＊ [label + K]
The
A0 = ＊ [(label + K) ＊ 2]
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used.
[0072]
Alternatively, when L = 2 in the instruction LDST7 and reading a value from the memory using the address stored in the address dedicated register, rule (5) is applied. For example,
A0 = * [A1]
The
A0 = * [A1]
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used.
[0073]
Or when L = 2 in instruction LDST7 and reading a value from memory using the address represented by the sum of the address stored in the address dedicated register and the address described by the symbol string or numerical value, the rule (3) Apply rule (5). For example,
A0 = * [A1 + K]
The
A0 = * [A1 + (K) * 2]
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used.
[0074]
Instruction LDST8 conversion method
The instruction LDST8 is an instruction for transferring the value stored in the address dedicated register Am to the memory. In the instruction LDST8, conversion is performed so that a value 1 / L times the value stored in the address dedicated register is transferred to the memory. Furthermore, if part or all of the memory address is described by a symbol character string or numerical value, it is converted to a description that is multiplied by L. For example, when L = 2 in the instruction LDST8 and a value is transferred to the memory using an address described by a symbol character string or a numerical value, the rule (3) and the rule (6) are applied. For example,
* [Label + K] = A0
The
A0 = A0 >> 1
* [(Label + K) * 2] = A0
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the address dedicated register A0 by 1/2, other instructions that multiply A0 by 1/2 may be used.
[0075]
Alternatively, when L = 2 in the instruction LDST8 and a value is transferred to the memory using the address stored in the address dedicated register, rule (6) is applied. For example,
* [A1] = A0
The
A0 = A0 >> 1
* [A1] = A0
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the address dedicated register A0 by 1/2, other instructions that multiply A0 by 1/2 may be used.
[0076]
Or, if L = 2 in the instruction LDST8 and the value is transferred to the memory using the address represented by the sum of the address stored in the address dedicated register and the address written in the symbol character string or numerical value, rule (3) And apply rule (6). For example,
* [A1 + K] = A0
The
A0 = A0 >> 1
* [A1 + (K) * 2] = A0
A0 = A0 + A0
Convert to Here, the add instruction A0 = A0 + A0 was used to double the address dedicated register A0, but the left shift instruction A0 = A0 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the address dedicated register A0 by 1/2, other instructions that multiply A0 by 1/2 may be used.
[0077]
Instruction MV1 conversion method
The instruction MV1 is an instruction for transferring a value described by a symbol character string or a numerical value to an address dedicated register. Therefore, rule (4) applies. In the instruction MV1, after the instruction is executed, the address dedicated register is converted so as to have a value of L times. That means
A0 = K
The
A0 = (K) * L
Convert to
[0078]
Instruction MV2 conversion method
The instruction MV2 is an instruction for transferring a value from the general-purpose register to the address dedicated register. Therefore, rule (5) applies. In instruction MV2, after the instruction is executed, the address dedicated register is converted to have a value L times that of the general-purpose register. For example, if L = 2,
A0 = R0
The
A0 = R0
A0 = A0 + A0
To two instructions. Or
R0 = R0 + R0
A0 = R0
R0 = R0 >> 1
Are converted into three instructions. Here, the add instruction R0 = R0 + R0 was used to double the general-purpose register R0, but the left shift instruction R0 = R0 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R0 by 1/2, other instructions that multiply R0 by 1/2 may be used.
[0079]
Instruction MV3 conversion method
The instruction MV3 is an instruction for transferring a value from the address dedicated register to the general purpose register. Therefore, rule (6) is applied. In the instruction MV3, after the instruction is executed, the general-purpose register is converted to have a value 1 / L times that of the address dedicated register. For example, if L = 2,
R0 = A0
The
R0 = A0
R0 = R0 >> 1
To two instructions. Or
A0 = A0 >> 1
R0 = A0
A0 = A0 + A0
Are converted into three instructions. Here, the add instruction A0 = A0 + A0 was used to double the address-only register A0, but the left shift instruction A0 = A0 <<1 may be used. Although the right 1-bit shift instruction is used to multiply the general-purpose register R0 by 1/2, other instructions that multiply R0 by 1/2 may be used. Although the right 1-bit shift instruction is used to multiply the address dedicated register A0 by 1/2, other instructions that multiply A0 by 1/2 may be used.
[0080]
Instruction ADD1 conversion method
The instruction ADD1 is an instruction for adding the value stored in the general-purpose register and the value loaded from the memory and transferring the result to the general-purpose register. Therefore, rule (3) is applied. In the instruction ADD1, for example, when a part or all of the address of data to be loaded from the memory is described by a symbol character string or a numerical value, the symbol character string or numerical value indicating the memory address is changed to an L-fold address. replace. For example, when the address is represented by the sum of the symbol character string label and the symbol character string K,
R0 = R0 + * [label + K]
The
R0 = R0 + * [(label + K) * L]
Convert to
[0081]
Alternatively, in the instruction ADD1, when the address is represented by the sum of the address dedicated register A0 and the symbol character string K, the symbol character string portion is replaced with a description multiplied by L. For example,
R0 = R0 + * [A0 + K]
The
R0 = R0 + * [A0 + (K) * L]
Convert to
[0082]
Processing to read a value from a memory or write a value to a memory in another instruction not described in FIGS. 5 and 6, such as a subtraction instruction, a multiplication instruction, a division instruction, a shift instruction, and a logical operation instruction If there is an instruction accompanied with, the description about the address included in the instruction is converted as described above.
[0083]
Of the instructions shown in FIG. 5 and FIG. 6, instructions that have not been described so far (LDST4 instruction, LDST6 instruction, ADD0 instruction, ADD2 instruction, MV0 instruction, SHFT0 instruction, SHFT1 instruction) are rules (3), ( Since it does not fall under 4), (5), (6), nothing is changed.
[0084]
The character string conversion system of the present invention described so far does not depend on the file format of the program. In other words, it can be applied to any file format. For example, the program may be described as source code or may be described as binary code. If the character string including the input program is in text format, the converted program is also output in text format. If the character string including the program to be input is in binary format, the converted program is output in either text format or binary format.
[0085]
Furthermore, the character string conversion system of the present invention can be applied to dynamic conversion as well as static conversion. Static conversion means converting a program before execution. Dynamic conversion means that a program is converted during execution.
[0086]
Up to now, the program has been converted from processor W based on the word address system, which assigns one address to L = 2 bytes of data, to processor B, based on the byte address system, which assigns one address to 1 byte of data. Only explained when to do.
[0087]
The character string conversion system according to the present invention can be easily applied not only to L = 2, but also when L is an integer larger than 2. Even if the two processors are both based on the word address system, the present invention can be applied when the ratio L of the number of bytes to which one address is allocated is an integer of 2 or more.
[0088]
In the past, when the processor W and the processor B have the same instruction set, the assembly language is exactly the same, and only the address system is different, the program written for the processor W is changed to the program for the processor B. Only the way to convert was mentioned. The character string conversion system of the present invention can be applied not only to such a case but also to a case where the processor W and the processor B have different instruction sets.
[0089]
For example, first, only the address system is converted by the character string conversion system of the present invention, and then the instruction set is converted. Conversely, it is also possible to convert the address system by the character string conversion system of the present invention after converting the instruction set first. Alternatively, it is conceivable to simultaneously convert the address system and the instruction set. When converting the address system and the instruction set at the same time, the character string conversion unit 2 in FIG. 1 of the present invention has a function of converting the instruction set. That is, in the character string conversion system 100 according to the first embodiment, the character string conversion means 120 has a means for converting the instruction set, and in the character string conversion system 200 according to the second embodiment, the character string conversion means 220 has an instruction set. It will be.
[0090]
Further, in order to perform more general conversion, a method of converting a program described for a conversion source processor into a program for a virtual processor and further converting it into a program for a target processor may be considered. In this case, the program is converted twice, and the present invention is used in either of them. Since both conversions require instruction set conversion, one of them uses the combination of the character string conversion system of the present invention and instruction set conversion as described above.
[0091]
[Description of operation]
First, if processor W and processor B have exactly the same instruction set, the assembly language is exactly the same, and only the address system is different, the program written for processor W is converted to a program for processor B The operation in this case will be described using the character string conversion system 100 of FIG. The processor W is a processor based on a word address system in which one address is assigned to L-byte data, and here, it is assumed that L = 2. The processor B is a processor based on a byte address system in which one address is assigned to 1-byte data. Assume that processor W and processor B have general purpose registers and address only registers as shown in FIG. Assume further that there is a basic instruction set 21 shown in FIG.
[0092]
FIG. 8 shows a program written in assembly language for the processor W. One instruction is described in one line, and a semicolon is described at the end of the instruction. Comments are enclosed in / * and * /. In FIG. 8, a symbol character string “label1” is a label indicating a certain address in the memory, and an actual address is automatically assigned by the linker.
[0093]
When the conversion source program of FIG. 8 is input, the character string replacement means 110 in the character string conversion system 100 performs a character string replacement process (FIG. 7, step S1). The character string replacement unit 110 converts a description that refers to a symbol character string description to which an address is automatically assigned by a tool so that a word address is referred to in a conversion destination processor. In FIG. 8, the only symbol character string to which an address is automatically assigned by the tool is label1. Therefore, label1 is converted into a description of (label1 / 2) by the character string replacement means 110. FIG. 9 shows a program that has been processed by the character string replacement unit 110.
[0094]
Next, the character string converter 120 converts an instruction including an address description (step S2). The character string conversion means 120 reads the program of FIG. 9 and converts each instruction including the address description one by one. The following describes how each instruction is converted. In order to refer to an instruction, the instruction reference symbol of FIG. 9 is used.
● Nothing is changed by the transfer instructions move0 and move1.
● In the load instruction load0, the symbol character string or numerical value indicating the address is doubled.
● In load instruction load1, an instruction that doubles R4 that stores the address is inserted before load1, and an instruction that doubles R4 is inserted after load1.
● In load instruction load2, an instruction that doubles R4 that stores the address is inserted before load2, and an instruction that doubles R4 is inserted after load2. Furthermore, the symbol character string and numerical value indicating the address are doubled.
● In load instruction load3, an instruction that doubles R4 and R5 that stored the address is inserted before load3, and an instruction that doubles R4 and R5 is inserted after load3.
● Addition instructions add0 and add1 do not convert anything.
[0095]
FIG. 10 shows a program that has been processed by the character string conversion means 120. In FIG. 10, the conversion source program does not originally exist, and the instruction added by the conversion is indented.
[0096]
Next, the unnecessary instruction deleting means 130 deletes unnecessary instructions from the instructions inserted by the character string converting means 120 (step S3). If the program FIG. 10 processed by the character string conversion means 120 is examined closely, it can be seen that some of the addition instructions and shift instructions added by the conversion are unnecessary. For example, immediately after the shift instruction R4 = R4 >> 1 (the eighth line), there is an addition instruction R4 = R4 + R4 (the ninth line) using the shift result. Both of these were inserted by the character string conversion means 120. In the sixth line, the least significant bit of the general register R4 is set to 0 by the addition instruction R4 = R4 + R4. Therefore, even if the two instructions in the eighth line and the ninth line are executed, the general register R4 Does not change. Therefore, it is meaningless to execute these instructions. The same applies to the shift instruction R4 = R4 >> 1 (11th line) and the addition instruction R4 = R4 + R4 (12th line). Unnecessary instruction deleting means 130 passes a program from which such instructions are deleted to output means 140.
[0097]
Then, the output unit 140 outputs the program taken from the unnecessary instruction deletion unit 130 (step S4). FIG. 11 shows the converted program output by the output means 140.
[0098]
Next, when processor W and processor B have exactly the same instruction set, the assembly language is exactly the same, and only the address system is different, the operation when converting the program written for processor W to processor B is as follows: This will be described using the character string conversion system 200 of FIG. The processor W is a processor based on a word address system in which one address is assigned to L-byte data, and it is assumed here that L = 2. The processor B is a processor based on a byte address system in which one address is assigned to 1-byte data. Assume that processor W and processor B have general purpose registers and address only registers as shown in FIG. Assume further that there is a basic instruction set 22 shown in FIG.
[0099]
FIG. 12 shows a program written in assembly language for the processor W.
One instruction is described in one line, and a semicolon is described at the end of the instruction. Comments are enclosed in / * and * /. In FIG. 12, a symbol character string “label1” is a label indicating a certain address in the memory, and an actual address is automatically assigned by the linker.
[0100]
When the conversion source program of FIG. 12 is input, the character string replacement means 210 in the character string conversion system 200 performs a character string replacement process (step S1 in FIG. 7). The character string replacing unit 210 converts a description that refers to a symbol character string description to which an address is automatically assigned by a tool so that a word address is referred to in the processor after conversion. In FIG. 12, the only symbol character string to which an address is automatically assigned by the tool is label1. Therefore, label1 is converted into a description of (label1 / 2) by the character string replacing means 210. FIG. 13 shows a program that has been processed by the character string replacement unit 210.
[0101]
Next, the character string conversion means 220 converts an instruction including an address description (step S2). The character string conversion means 220 reads the program of FIG. 13 and converts each instruction including the address description one by one. The following describes how each instruction is converted. In order to refer to the instruction, the instruction reference symbol of FIG. 13 is used.
● Nothing is changed by the transfer instructions move0 and move1.
● In transfer instructions move2 and move3, the value transferred to the address-only register is doubled.
● In transfer instructions move4 and move5, an instruction that doubles the address-only register is inserted after each instruction.
● In the load instruction load0, the symbol character string or numerical value indicating the address is doubled.
● Nothing is converted by the load instruction load4.
● In the load instruction load5, the symbol character string or numerical value indicating the address is doubled.
● Nothing is converted with the load instruction load6.
● Addition instructions add0 and add1 do not convert anything.
● Addition instruction add2 doubles the symbol character string and numerical value indicating the address.
● In transfer instruction move6, an instruction to halve the value of general-purpose register R4 is inserted after move6.
● Transfer instruction In move7, an instruction to halve the value of general-purpose register R5 is inserted after move7.
[0102]
FIG. 14 shows a program that has been processed by the character string conversion means 220. In FIG. 14, the conversion source program does not originally exist and the instruction added by the conversion is indented.
[0103]
Next, the unnecessary instruction deleting means 230 deletes unnecessary instructions from the instructions inserted by the character string converting means 220 (step S3). However, since the program processed by the character string converting means 220 does not happen to have an unnecessary instruction, the program shown in FIG. 14 is transferred to the output means 240 as it is.
[0104]
Then, the output unit 240 outputs the program taken from the unnecessary instruction deletion unit 230 (step S4). The program processed by the character string conversion means 220. Since there was no unnecessary command in the FIG. 14, the converted program output by the output means 240 is the same as that in FIG.
[0105]
Next, the operation when a program is converted between the processors W and B having different instruction sets will be described using the character string conversion system 200 of FIG. The processor W is a processor based on a word address system in which one address is assigned to L-byte data. Here, it is assumed that L = 2. The processor B is a processor based on a byte address system in which one address is assigned to 1-byte data. Assume that the processor W and the processor B have different instruction sets, and the assembly languages are also different. FIG. 5 shows a basic instruction set 22 of the processor W. FIG. 6 shows the basic instruction set 23 of the processor B. A method of converting a program written for the processor W into a program for the processor B under the above assumption will be described.
[0106]
FIG. 12 is used as a program written in assembly language for the processor W. As already explained, one instruction is described in one line, and a semicolon is described at the end of the instruction. Comments are enclosed in / * and * /. The symbol character string “label1” is a label indicating a certain address in the memory, and the actual address is automatically assigned by another tool such as a linker.
[0107]
When the conversion source program of FIG. 12 is input, the character string replacement unit 210 first replaces the character string (FIG. 7, step S1). The character string replacement unit 210 converts the description referring to the symbol character string description to which an address is automatically assigned by another tool so that all the word addresses are referred to. In FIG. 12, the only symbol character string to which an address is automatically assigned by another tool is label1. Therefore, label1 is converted into a description of (label / 2) by the character string replacement means 210. FIG. 13 shows a program that has been processed by the character string replacement unit 210. Up to this point, the operation is the same as when the instruction set already described is the same.
[0108]
Next, the character string converter 220 converts an instruction including an address description. Further, instruction set conversion is performed (step S2). If the instruction sets are different, in step S2, the instruction set conversion is simultaneously performed in addition to the address description conversion. The instruction set conversion is to convert all the instructions for the processor W included in the input character string of the program into one or more corresponding instructions for the processor B. The character string conversion unit 220 reads the program of FIG. 13 and converts each instruction including the address description one by one. The converted instruction is an instruction for processor B. Furthermore, instructions that do not include an address description are also converted into instructions for the processor B. The following describes how each instruction is converted.
[0109]
● Transfer instruction R4 = (label1 / 2) is converted to processor B instruction MVR4, (label1 / 2) by instruction set conversion.
● Transfer instruction R5 = 4 is converted to processor B instructions MV R5,4 by instruction set conversion.
● For transfer instruction A0 = (label1 / 2), the value transferred to the dedicated address register is doubled. Further, it is converted into an instruction MVA0 for processor B, ((label1 / 2)) * 2 by instruction set conversion.
● For transfer instruction A1 = 4, the value transferred to the address dedicated register is doubled. Furthermore, it is converted into the processor M instruction MVA0, (4) * 2 by instruction set conversion.
• The processor B instruction (ADD A0, A0, A0) that doubles the value of the address dedicated register A1 is inserted in the cycle immediately after the transfer instruction A0 = R4. Further, the transfer instruction A0 = R4 is converted into processor B instructions MVA0 and R4 by instruction set conversion.
• A processor B instruction (ADD A1, A1, A1) that doubles the value of the address dedicated register A1 is inserted in the cycle immediately after the transfer instruction A1 = R5. Further, the transfer instruction A1 = R4 is converted into processor B instructions MVA1 and R5 by instruction set conversion.
● The load instruction R0 = * [(label1 / 2) +4] doubles the symbol character string and numerical value indicating the address. Further, the instruction B is converted into an instruction M R0, * [(((label1 / 2) +4) * 2] for processor B by instruction set conversion.
● Load instruction R1 = * [A0] is instruction MV for processor B by instruction set conversion.
Converted to R1, * [A0].
● The load instruction R2 = * [A0 + 4] doubles the symbol character string and numerical value indicating the address. Furthermore, it is converted into an instruction M R2 for processor B, * [A0 + (4) * 2] by instruction set conversion.
● Load instruction R3 = * [A0 + A1] is converted to instruction MV R3, * [A0 + A1] for processor B by instruction set conversion.
● Addition instruction R4 = R4 + R5 is converted to processor B instruction ADD R4, R4, R5 by instruction set conversion.
● Addition instruction R5 = R5 + R3 is converted to processor B instruction ADD R5, R5, R3 by instruction set conversion.
● Addition instruction R5 = R5 + * [(label1 / 2) +4] doubles the symbol character string or numerical value indicating the address. Furthermore, it is converted into an instruction ADD R5, R5, * [(((label1 / 2) +4) * 2] for processor B by instruction set conversion.
• Processor B instructions (SHIFT_R R4, R4, 1) that halve general-purpose register R4 are inserted in the cycle immediately after transfer instruction R4 = A0. Further, the transfer instruction R4 = A0 is converted into the processor B instructions MVR4 and A0 by instruction set conversion.
● Processor B instructions (SHIFT_R R5, R5, 1) that halve general-purpose register R5 are inserted in the cycle immediately after transfer instruction R5 = A1. Further, the transfer instruction R5 = A1 is converted into the processor B instructions MVR5, A1 by instruction set conversion.
[0110]
FIG. 15 shows a program that has been processed by the character string conversion means 220.
[0111]
Next, the unnecessary instruction deleting means 230 deletes unnecessary instructions from the instructions inserted by the character string converting means 220 (step S3). However, since the program processed by the character string conversion unit 220 does not happen to have an unnecessary instruction, the program of FIG. 15 is transferred to the output unit 240 as it is.
[0112]
Then, the output unit 240 outputs the program taken from the unnecessary instruction deletion unit 230 (step S3). Program Processed by Character String Conversion Unit 220 Since there was no unnecessary instruction in FIG. 15, the converted program output by the output unit 240 is the same as that in FIG.
[0113]
In the embodiments described so far, the file format of the program has not been mentioned. This is because the present invention can be applied regardless of the file format. For example, even if the file format is a binary format or a text format, the present invention can be applied to both. When a binary format program is converted, a character string including the program to be input is given in the binary format and converted. The converted program may be output as a binary format or a text format.
[0114]
In the embodiments described so far, the processor W based on the word address system in which one address is assigned to L = 2 bytes of data and the byte address system in which one address is assigned to 1 byte of data. An example of converting a program to processor B is shown. This can easily be applied when L is an integer greater than 2. Even if the two processors are both based on the word address system, the present invention can be applied when the ratio L of the number of bytes to which one address is allocated is an integer of 2 or more. Furthermore, the character string conversion system of the present invention can be applied to dynamic conversion as well as static conversion. Static conversion means converting a program before execution. Dynamic conversion means that a program is converted during execution.
[0115]
【The invention's effect】
As described above, the character string conversion system according to the present invention has a ratio between the number of data bytes to which the conversion source processor assigns one address and the number of data bytes to which the converted processor assigns one address. Therefore, the address description in the conversion source program operable by the conversion source processor is converted into the address description suitable for the address system adopted by the processor after conversion. Can be automatically converted into a program for a converted processor having another address system. Therefore, it is possible to obtain a post-conversion program more efficiently than the conventional technique in which address description is manually performed. Also, if the post-conversion program created by the character string conversion system of the present invention is executed by the post-conversion processor, the execution speed of the program can be improved as compared with the conventional technique using emulation. Is possible.
[0116]
In addition, since the character string conversion system of the present invention includes unnecessary instruction deletion means for deleting unnecessary instructions in the program, it is possible to create a program with high execution efficiency.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of a first embodiment of a character string conversion system according to the present invention.
FIG. 2 is a block diagram showing a configuration example of a second embodiment of a character string conversion system according to the present invention.
FIG. 3 is a diagram illustrating a register configuration of a processor.
FIG. 4 is a diagram showing a basic instruction set 21 of a processor.
FIG. 5 is a diagram showing a basic instruction set 22 of a processor.
FIG. 6 is a diagram showing a basic instruction set 23 of a processor.
FIG. 7 is a flowchart showing a processing example of the character string conversion system.
FIG. 8 is a diagram illustrating an example of a conversion source program.
FIG. 9 is a diagram illustrating an example of a program that has been processed by the character string replacement unit 110;
FIG. 10 is a diagram illustrating an example of a program that has been processed by the character string conversion unit 120;
11 is a diagram showing an example of a post-conversion program output by the output unit 140. FIG.
FIG. 12 is a diagram showing another example of a conversion source program.
FIG. 13 is a diagram illustrating an example of a program that has been processed by the character string replacement unit 210;
14 is a diagram illustrating an example of a program that has been processed by the character string conversion unit 220 or a post-conversion program that has been output by the output unit 240. FIG.
15 is a diagram illustrating an example of a program that has been processed by the character string conversion unit 220 or a post-conversion program that has been output by the output unit 240. FIG.
[Explanation of symbols]
100: Character string conversion system
110: Character string replacement means
120: Character string conversion means
121: Character string replacement means
122: Character string insertion means
130: Unnecessary instruction deletion means
140: Output means
200: Character string conversion system
210: Character string replacement means
220: Character string conversion means
221: Character string replacement means
222: Character string replacement means
223: Character string insertion means
224: Character string insertion means
230: Unnecessary instruction deletion means
240: Output means
11: General-purpose register in which the processor stores input data and calculation results for calculation
12: Address dedicated register in which the processor stores an address indicating the position of data or an instruction in the memory
21: Basic instruction set of the processor
22: Basic instruction set of the processor
23: Processor basic instruction set

Claims (10)

A conversion source program that can be executed by a conversion source processor that employs an address system in which one address is assigned to data of the first byte number B1, and one address for data of the second byte number B2. An address description conversion system for an assembler program that converts to a post-conversion program that can be executed by a post-conversion processor that employs an assigning address method,
A symbol character indicating the branch destination of a branch instruction is found in the conversion source program, with the conversion source program as an input and a reference to a symbol character string to which an address is automatically assigned by other software. If not a column, first address description replacement means for replacing the symbol character string with a description that multiplies the address assigned to the symbol character string by 1 / L (L = B1 / B2, an integer of 2 or more). ,
In the program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a numerical value that includes a process for reading a value from a memory using an address described by a symbol character string or a numerical value If there is an instruction that involves a process of writing a value to the memory using an address, the symbol character string or numerical value indicating the memory address is replaced with a description that uses an L-fold address, and the value stored in the register is used to store the value from the memory. If there is an instruction I1 accompanied by a process of reading the instruction I2 or an instruction I2 accompanied by a process of writing a value to the memory using the address stored in the register, the instruction that multiplies the address referenced by the instructions I1 and I2 by the instruction I1 and I2 Is inserted to be executed in the previous cycle, and the address referred to by the instructions I1 and I2 is multiplied by 1 / L. Address description conversion means for inserting to run in the cycle after the instruction I1 and I2 a decree,
An address description conversion system for an assembler program , comprising: output means for outputting a program processed by the address description conversion means as the post-conversion program. The address description conversion system for an assembler program according to claim 1 ,
The address description conversion means comprises:
In the program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a value that includes a process of reading a value from a memory using an address described in a symbol character string or a numerical value A second address description replacement means for replacing a symbol character string or a numerical value indicating a memory address with a description of an L-fold address if there is an instruction involving a process of writing a value to the memory using an address ;
In the program that has been replaced by the first address description replacing means , the value is written to the memory using the instruction I3 that involves reading the value from the memory using the address stored in the register or the address stored in the register. If there is an instruction I4 with processing, an instruction to multiply the address referenced by the instructions I3 and I4 by L is inserted so as to be executed in the previous cycle of the instructions I3 and I4, and the instructions I3 and I4 refer to them. An address description conversion system for an assembler program, comprising: an address conversion instruction insertion means for inserting an instruction for multiplying an address by 1 / L so that the instruction is executed in a cycle after the instructions I3 and I4. A conversion source program that can be executed by a conversion source processor that employs an address system in which one address is assigned to data of the first byte number B1, and one address for data of the second byte number B2. An address description conversion system for an assembler program that converts to a post-conversion program that can be executed by a post-conversion processor that employs an assigning address method,
A symbol character indicating the branch destination of a branch instruction is found in the conversion source program, with the conversion source program as an input and a reference to a symbol character string to which an address is automatically assigned by other software. If not a column, first address description replacement means for replacing the symbol character string with a description that multiplies the address assigned to the symbol character string by 1 / L (L = B1 / B2, an integer of 2 or more). ,
In a program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a value that includes a process of reading a value from a memory using an address described in a symbol character string or a numerical value If there is an instruction that involves processing to write a value to the memory using an address, the symbol character string or numerical value indicating the memory address is replaced with a description that uses an L-fold address, and the address is stored in a dedicated address register. If there is an instruction that transfers a value described in a character string or a numerical value, the symbol character string or numerical value indicating the value is replaced with a description that is L times the value, and the address dedicated register that stores the address is dedicated to the address. If there is an instruction I5 that transfers a value from a place other than the register, an instruction that multiplies the transfer source value by L is sent in the cycle before the instruction I5. And an instruction for multiplying the value of the transfer source by 1 / L is inserted so that it is executed in the cycle after the instruction I5. If there is an instruction I6 for transferring a value to the instruction I6, an instruction for multiplying the address stored in the address dedicated register by 1 / L is inserted so as to be executed in the previous cycle of the instruction I6. An address description conversion means for inserting an instruction for multiplying the value stored in the register by L so that the instruction is executed in a cycle after the instruction I6;
An address description conversion system for an assembler program , comprising: output means for outputting a program processed by the address description conversion means as the post-conversion program. The address description conversion system for an assembler program according to claim 3 ,
The address description conversion means comprises:
In the program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a value that includes a process of reading a value from a memory using an address described in a symbol character string or a numerical value A second address description replacement means for replacing a symbol character string or a numerical value indicating a memory address with a description of an L-fold address if there is an instruction involving a process of writing a value to the memory using an address ;
In the program that has been replaced by the first address description replacing means , if there is an instruction for transferring a value described by a symbol character string or a numerical value to an address dedicated register for storing an address, this value is indicated. A third address description replacement means for replacing a symbol character string or numerical value with a description of a value that is L times the symbol character string or numerical value;
In the program that has been replaced by the first address description replacing means , if there is an instruction I7 that transfers a value from a location other than the address dedicated register to the address dedicated register for storing the address, the transfer source value is set. An instruction for multiplying by L is inserted to be executed in the cycle before the instruction I7, and an instruction for multiplying the transfer source value by 1 / L is inserted to be executed in the cycle after the instruction I7. Address translation instruction insertion means ,
During said replacement is completed but the program in the first address description replacement unit, in the character string first address description replacing means has outputted, values for locations from the address-only register other than the address-only register for storing an address If there is an instruction I8 for transferring the instruction I8, an instruction for multiplying the address stored in the address dedicated register by 1 / L is inserted so as to be executed in the previous cycle of the instruction I8, and further stored in the address dedicated register. An address description conversion system for an assembler program, comprising: a second address conversion instruction insertion means for inserting an instruction for multiplying the obtained value by L to be executed in a cycle after the instruction I8. 5. An address description conversion system for an assembler program according to claim 4 ,
An instruction for transferring a value from a place other than the address dedicated register to the address dedicated register for storing the address in the program after the replacement by the first address description replacing means by the first address translation instruction inserting means If there is I9, an address description conversion for an assembler program characterized in that an instruction for multiplying the value stored in the address dedicated register by L is inserted so that it is executed in a cycle after the instruction I9 System . 5. An address description conversion system for an assembler program according to claim 4 ,
The second address translation instruction insertion means transfers a value from the address dedicated register for storing the address to a place other than the address dedicated register in the program after the replacement by the first address description replacing means. If there is an instruction I10, an address description conversion system for an assembler program having a configuration in which an instruction for multiplying the value after transfer by 1 / L is inserted so as to be executed in a cycle after the instruction I10 . 5. An address description conversion system for an assembler program according to claim 4 ,
The first address translation instruction inserting means transfers a value from a place other than the address dedicated register to the address dedicated register for storing the address in the program after the replacement by the first address description replacing means. If there is an instruction I11, an instruction for multiplying the value stored in the dedicated address register by L is inserted so that it is executed in a cycle after the instruction I11.
The second address translation instruction inserting means transfers a value from the address dedicated register for storing the address to a place other than the address dedicated register in the program after the replacement by the first address description replacing means. If there is an instruction I12, an address description conversion system for an assembler program has a configuration in which an instruction for multiplying the value after transfer by 1 / L is inserted so as to be executed in a cycle after the instruction I12 . The address description conversion system for an assembler program according to any one of claims 1 to 7 ,
An address description conversion system for an assembler program, comprising: unnecessary instruction deletion means for deleting unnecessary instructions from instructions inserted by the address description conversion means . A conversion source program that can be executed by a conversion source processor that employs an address system in which one address is assigned to the first byte number B1 data is assigned to the second byte number B2 data. A program for functioning as an address description conversion system for an assembler program that converts to a post-conversion program that can be executed by a post-conversion processor adopting an address system that assigns two addresses,
The computer,
A symbol character indicating the branch destination of a branch instruction is found in the conversion source program, with the conversion source program as an input and a reference to a symbol character string to which an address is automatically assigned by other software. If not a column, first address description replacement means for replacing the symbol character string with a description that multiplies the address assigned to the symbol character string by 1 / L (L = B1 / B2, an integer of 2 or more);
In the program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a numerical value that includes a process for reading a value from a memory using an address described by a symbol character string or a numerical value If there is an instruction that involves a process of writing a value to the memory using an address, the symbol character string or numerical value indicating the memory address is replaced with a description that uses an L-fold address, and the value stored in the register is used to store the value from the memory. If there is an instruction involving the process of reading the instruction I13 or an instruction I13 involving the process of writing a value to the memory using the address stored in the register, an instruction for multiplying the address referred to by the instruction I13 by L is transmitted in the cycle preceding the instruction I13. An instruction to be executed is inserted, and an instruction for multiplying the address referred to by the instruction I13 by 1 / L is added to the support after the instruction I13. Address description conversion means for inserting to run on cycle,
A program for causing a program processed by the address description conversion means to function as an output means for outputting the program after the conversion. A conversion source program that can be executed by a conversion source processor that employs an address system in which one address is assigned to the first byte number B1 data is assigned to the second byte number B2 data. A program for functioning as an address description conversion system for an assembler program that converts to a post-conversion program that can be executed by a post-conversion processor adopting an address system that assigns two addresses,
The computer,
A symbol character indicating the branch destination of a branch instruction is found in the conversion source program, with the conversion source program as an input and a reference to a symbol character string to which an address is automatically assigned by other software. If not a column, first address description replacement means for replacing the symbol character string with a description that multiplies the address assigned to the symbol character string by 1 / L (L = B1 / B2, an integer of 2 or more);
In a program that has been replaced by the first address description replacing means , an instruction or a symbol character string or a value that includes a process of reading a value from a memory using an address described in a symbol character string or a numerical value If there is an instruction that involves processing to write a value to the memory using an address, the symbol character string or numerical value indicating the memory address is replaced with a description that uses an L-fold address, and the address is stored in a dedicated address register. If there is an instruction that transfers a value described in a character string or a numerical value, the symbol character string or numerical value indicating the value is replaced with a description that is L times the value, and the address dedicated register that stores the address is dedicated to the address. If there is an instruction I14 that transfers a value from a place other than the register, the instruction that multiplies the transfer source value by L is the cycle before the instruction I14. And an instruction for multiplying the value of the transfer source by 1 / L is inserted so that it is executed in the cycle after the instruction I14. From the address dedicated register for storing the address to other than the address dedicated register If there is an instruction I15 for transferring a value to a location, an instruction for multiplying the address stored in the address dedicated register by 1 / L is inserted so as to be executed in the previous cycle of the instruction I15, and the address An address description conversion means for inserting an instruction for multiplying the value stored in the dedicated register by L so that the instruction is executed in a cycle after the instruction I15;
A program for causing a program processed by the address description conversion means to function as an output means for outputting the program after the conversion.

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