JP4028841B2 - Computer apparatus, power control method, and program - Google Patents

Description

  The present invention relates to various computer apparatuses that receive power from a battery, and more particularly to a computer apparatus that improves system performance.

  In a computer device typified by a notebook personal computer (notebook PC), a battery (battery that can be used many times while being repeatedly charged and discharged, in addition to receiving power directly from a commercial power source, for example, via an AC adapter. ) Can be supplied with power. These batteries include nickel hydride batteries (NiMH batteries), nickel cadmium batteries (nickel cadmium batteries), lithium ion batteries with higher energy density per unit weight, and liquid electrolytes. A lithium polymer battery that uses a solid polymer without using a polymer is used. For example, a notebook PC is configured to be equipped with a battery pack in which these batteries are stored, and a user can operate the system main body by battery drive in a place where there is no AC power source.

  In recent years, the processor technology has advanced rapidly, and the power required for the processor has increased dramatically accordingly. For this reason, a battery is used for a mobile computer device such as a notebook PC. Various low power consumption technologies are being considered. For example, Intel SpeedStep ™ technology automatically detects whether the system is connected to an AC power source and changes the clock frequency and operating voltage to improve performance and battery life. A technology to optimize the balance is adopted. In addition to this, throttling of a method of thinning out the clock (reducing the output by moving the CPU intermittently) is also employed.

  As the prior art described in the publication, for example, in order to prevent the battery cells of the battery pack from reaching the limit temperature, the detection signal is activated when it is detected that the discharge current exceeds the threshold level. Accordingly, a technique for reducing the power consumption of the CPU has been proposed (see, for example, Patent Document 1).

JP 2002-304239 A (page 3, FIG. 2)

  Thus, even when a high-performance CPU is supported, if a battery having a sufficiently large discharge capacity cannot be adopted due to cost or the like, the throttling or the like is regularly performed when the battery is used. Therefore, it is necessary to apply the low power consumption technology of the above-mentioned, so that the original performance of the high performance CPU cannot be utilized. Therefore, a new method for utilizing the performance of the CPU is required.

  Here, the rated power of the battery is normally set to a value that allows steady discharge with the maximum power consumption of the system. However, in actual applications such as business applications, the power consumption temporarily increases depending on the system (CPU) load when the user performs an operation. It is considerably lower than the maximum power consumption. In addition, although the load increases instantaneously, the load is sparse and the duration is almost as short as several seconds. For this reason, it cannot be said that the battery discharge capability is fully utilized in actual applications. Therefore, the current low power consumption technology does not necessarily match the actual usage environment, and it is difficult to optimize the system with the current low power consumption technology.

The present invention has been made to solve the technical problems as described above. The object of the present invention is to substantially improve system performance even when a battery having a small discharge capacity is used. Is to improve.
Another object is to reduce the weight and cost of the system by providing performance with a battery having a smaller discharge capacity.

  For this purpose, the present invention makes it possible to take temporary power consumption larger than the rated value, for example, by supplying a large amount of power for 1 to 3 seconds when the load on the CPU becomes large. By controlling the average value below the rated power by throttling or the like, practical performance is improved even when a battery with a small discharge capacity is used. That is, the present invention is a computer device configured to be connectable to a battery that discharges after charging and supplies power to the system main body. When receiving power supply from the battery, the computer device temporarily exceeds the rating of the battery. CPU that operates at high performance, and the time that the observed power consumption exceeds a predetermined high threshold after the CPU is temporarily operated at high performance, and the observed power consumption is predetermined. And a controller that controls the CPU to operate at a low performance when a predetermined amount of time is subtracted from the time that is below the set low threshold. The “rating” of the battery is a guaranteed value that is different for each battery, and is a value determined by a continuously constant maximum discharge power at which the temperature rise of the cell does not exceed the limit.

  The controller can measure the predetermined time by counting the number of occurrences of the unit period. The low performance operation of the CPU may be characterized by throttling that moves intermittently to reduce output.

  On the other hand, the present invention relates to a power control method in a computer device connected to a battery that supplies power to a system body on which a CPU is mounted, the step of measuring power consumption discharged from the battery, The CPU is temporarily operated with high performance exceeding the rated power of the battery, the time when the measured power consumption exceeds a predetermined high threshold, and the measured power consumption are predetermined. And the step of operating the CPU with low performance when the subtraction from the time below the low threshold reaches a predetermined time.

  Here, the controlling step includes a section average method in which the average power consumption does not exceed a certain value within a certain period, a moving average method in which the averaging period moves with time, and a power value. It can be characterized in that it is controlled by at least one of fixed period methods for enabling / disabling throttling for a predetermined period when the threshold value is exceeded. In addition, the CPU may be deducted by performing a low-performance operation on the over portion where the power consumption exceeds the threshold value determined by the discharge capacity of the battery. Further, the step of acquiring the discharge capability information may be characterized in that operation information of overcurrent protection in the battery is extracted as a signal.

Furthermore, a program to which the present invention is applied includes a function of observing power consumption discharged from a battery and a power supply from the battery to a computer connected to a battery that supplies power to a system body on which the CPU is mounted. When receiving, the function of temporarily operating the CPU over the rated power of the battery with high performance, the time when the observed power consumption exceeds the predetermined high threshold, and the observed power consumption are predetermined A function of operating the CPU with low performance when the subtraction from the time below the low threshold reaches a predetermined time is realized.

  According to the present invention, even in a computer device configured to be connectable to a battery, even when a battery having a small discharge capacity is used, the performance of the system can be substantially improved.

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.
FIG. 1 is a diagram illustrating a hardware configuration of a computer apparatus 10 such as a notebook PC (notebook type personal computer). In the computer device 10, the CPU 11 functions as a brain of the entire computer device 10, and executes various programs under the control of the OS. The CPU 11 includes an FSB (Front Side Bus) 12 as a system bus, a Peripheral Component Interconnect (PCI) bus 20 as a high-speed I / O device bus, and an LPC (Low Pin Count) bus as a new interface replacing the ISA bus. Each component is interconnected via a 40-stage three-stage bus. In order to compensate for the shortage of the capacity of the primary cache provided in the CPU 11, a secondary cache 14 may be placed via a BSB (Back Side Bus) 13 that is a dedicated bus.

  The FSB 12 and the PCI bus 20 are connected by a CPU bridge (host-PCI bridge) 15 called a memory / PCI chip. The main memory 16 is a writable memory used as an execution program reading area for the CPU 11 and a work area for writing processing data. The execution program includes firmware such as an OS, various drivers, various application programs, and a basic input / output system (BIOS). The video subsystem 17 is a subsystem for realizing functions related to video, and includes a video controller. This video controller processes a drawing command from the CPU 11 and writes drawing information into the video memory, reads out the drawing information from the video memory, and outputs it to a liquid crystal display (LCD) 18 as drawing data.

  An I / O bridge 21, a card bus controller 22, an audio subsystem 25, a docking station interface (Dock I / F) 26, and a mini PCI connector (slot) 27 are connected to the PCI bus 20. The card bus controller 22 is a dedicated controller for directly connecting the bus signal of the PCI bus 20 to the interface connector (card bus) of the card bus slot 23. The card bus slot 23 can be loaded with a PC card 24. Is possible. The docking station interface 26 is hardware for connecting a docking station that is a function expansion device of the computer apparatus 10. The mini PCI connector 27 is connected to, for example, a mini PCI (mini PCI) card 28 having a built-in wireless LAN module.

  The I / O bridge 21 has a bridge function between the PCI bus 20 and the LPC bus 40. Also, an IDE (Integrated Device Electronics) interface function is provided, and the interface realized by this function is an IDE hard disk drive (HDD) 31 and a CD-ROM drive 32 connected by ATAPI (AT Attachment Packet Interface). Instead of the CD-ROM drive 32, another type of IDE device such as a DVD (Digital Versatile Disc) drive may be connected. The I / O bridge 21 is provided with a USB port and is connected to the USB connector 30. Furthermore, an EEPROM 33 is connected to the I / O bridge 21 via an SM bus. Also, the connector 47 is connected via an AC97 (Audio CODEC '97) that supports a modem function from the I / O bridge 21, an LCI (LAN Connect Interface) that is an interface to the Ethernet (registered trademark) built in the core chip, a USB, or the like. Are connected. A communication card 48 can be connected to each of the plurality of connectors 47.

Further, a power supply circuit 50 is connected to the I / O bridge 21. The power supply circuit 50 is configured to be connectable to an AC adapter 51 and a battery pack 52 that is a secondary battery that can be used any number of times while repeating charging and discharging. In addition, a current measurement circuit 53 that measures the current flowing through the resistor and a DC / DC converter (DC / DC) 55 that generates a DC constant voltage such as 5 V and 3.3 V used in the computer apparatus 10 are provided.
An embedded controller 41, a flash ROM 44, and a Super I / O controller 45 are connected to the LPC bus 40. A gate array logic 42 is connected to the embedded controller 41. An I / O port 46 is connected to the Super I / O controller 45. The embedded controller 41 controls a keyboard (not shown) and is connected to the power supply circuit 50 to perform a part of the power management function.

  FIG. 2 is a diagram showing a block configuration of a power supply system to which the present embodiment is applied. The battery pack 52 configured to be connectable to the system main body of the computer apparatus 10 supplies power to the CPU 11 and other system devices via the DC / DC converter 55. The battery pack 52 outputs various battery information such as battery capacity data to the embedded controller 41 via an SM bus (System Management Bus). The current measurement circuit 53 measures the voltage generated at both ends of a current detection resistor provided in the middle of the power output path from the battery pack 52, converts the voltage into a current value, and outputs the current value to the embedded controller 41. The embedded controller 41 measures the voltage value by performing A / D conversion on the divided voltage of the power output path. The embedded controller 41 observes the electric power discharged from the battery (battery pack 52) toward the system body based on the current value and the voltage value thus obtained. The embedded controller 41 generates a system management interrupt (SMI) by activating the system management interrupt pin (SMI #) of the CPU 11. When the SMI is generated, the CPU 11 shifts to the control of the system BIOS. In this control, for example, by appropriately setting a register in a TCC (Thermal Control Circuitry) 11a in the CPU 11, the throttling is controlled. Set valid / invalid and duty (throttling ratio). In addition, throttling can be performed by making STPCLK # of the external signal of the CPU 11 active. This is normally provided as a function of the chipset, and similarly, the system BIOS sets this function.

  The battery information provided to the embedded controller 41 via the SM bus includes, for example, information on overcurrent protection (OCP) as information on the discharge capability of the battery. In the present embodiment, OCP information is taken out from the battery (battery pack 52) as a signal so that the system can predict the operation. If this information is acquired by the embedded controller 41 and used for power management before the OCP is activated (for example, when a large current flows for 2 seconds), peak power can be extracted more effectively. That is, in this embodiment, as will be described later, the battery pack 52 is discharged exceeding the rated power of the battery, but the overcurrent state is not ignored and discharged. Care must be taken not to operate the battery overcurrent protection circuit (software OCP by the microcontroller in the battery pack 52). This can be done by setting in advance not to enter the overcurrent area, or lowering the power (current value) before entering the overcurrent area but before the protection circuit operates (managed by moving average described later, or moving average There is a way to make settings so as not to exceed certain conditions). In addition, when the overcurrent state is notified from the battery, the operation of the overcurrent protection circuit can be prevented in advance. In order to output this OCP, for example, a configuration in which an internal controller (not shown) of the battery pack 52 outputs using a thermistor terminal (not shown) can be adopted.

The overcurrent protection (software OCP) is activated when the internal controller (microcontroller) in the battery pack 52 monitors the current and the average current exceeds the threshold continuously for a certain period. In this embodiment, the operation information of the software OCP is taken out as a signal to a T terminal (thermistor terminal) so that the operation of the OCP in the battery can be predicted on the system side.
12 (a) and 12 (b) are diagrams showing an OCP state diagram. FIG. 12A shows the state transition on the battery side (battery pack 52), and FIG. 12B shows the state transition on the system side (computer device 10). As shown in FIG. 12A, there are three states on the battery side: normal (normal), alert (alart), and shutdown (shutdown). On the other hand, as shown in FIG. 12B, the system side has two states: a normal power mode in which throttling is not performed and a low power mode in which throttling is performed. For example, when the battery side is in a normal state and an overcurrent state occurs continuously for a predetermined time of T1 seconds, an alert state is entered and a LoadHI # = Lo warning is output to the system side. . The system receives this LoadHI # = Lo warning and shifts from the normal power mode to the low power mode. If the battery is in an overcurrent state for T2 seconds, which is a predetermined time, from the alert state on the battery side, the state shifts to a shutdown state. On the other hand, if the overcurrent state disappears within the T2 seconds from the alert state on the battery side, the state shifts to the normal state and LoadHI # / = Lo is output. The system side that has received LoadHI # / = Lo shifts to the normal power mode when LoadHI # / = Lo until the lapse of T3 seconds obtained by adding a slight margin time to T2 seconds. Note that a voltage that changes depending on the internal temperature of the battery pack 52 is output to the T terminal. For example, the system can be notified of an overcurrent state by forcibly setting the output voltage to 0. That is, in FIG. 12, the LoadHI # signal is assigned to the T terminal in duplicate, and an overcurrent state is warned to the system when LoadHI # = Lo.

  As described above, in general, the operation of the microcontroller is asynchronous to the system, and the current averaging method, period, and threshold value of the overcurrent detection are different for each battery supplier, so the operation timing of the OCP is known in advance. However, according to the present embodiment, it is possible to obtain information on the overcurrent state from the battery pack 52 slightly before the operation. For example, if the system side immediately shifts to the low power mode with this “slightly near” information and avoids a shutdown, an accident such as a user data loss can be prevented. Further, if the peak current (electric power) can be reliably supplied beyond the overcurrent detection threshold, the performance improvement effect can be enhanced, and the degree of freedom of various parameters and algorithms can be increased.

  Here, in the conventional power supply method, when the embedded controller 41 recognizes that the battery is driven from the battery pack 52 when the AC adapter 51 is not connected to the system main body, the embedded controller 41 sets the SMI #. Activate. Then, the system BIOS sets a register for controlling the throttling of the TCC 11a, receives the output, and the CPU 11 performs a throttling operation so that the discharge power from the battery is not increased. However, in a general use situation, high power consumption (performance) is required for a short time of several seconds or less, and thereafter returns to idling power. Therefore, in the present embodiment, when the performance is required, the peak power is supplied from the battery as much as possible, and the performance is greatly improved by controlling the power average to be equal to or less than the discharge capacity. In other words, the performance is improved by temporarily applying a load higher than the rated power to the battery and shifting the timing for executing the throttling. The “rated power” of this battery is the maximum discharge power that is limited by the temperature rise of the battery cell when discharged at a constant power, and is a value guaranteed for each battery pack 52.

  Next, a control method for improving performance in the present embodiment will be described. In the present embodiment, the following five control methods (algorithms) will be described. The five control methods are (1) simple delay method, (2) interval average method, (3) moving average method, (4) fixed period method, and (5) power balance method. Hereinafter, it demonstrates in order. In addition, although it is a way of taking the power average, it is preferable to consider the power management by the effective value of the power, but the simple average is taken in order to simplify the algorithm. In any control method, when the load on the CPU 11 is maximum, the discharge power is pulsed with a certain cycle that repeats high output / low output, but the error from the effective value at this time is generally several% or less. is there.

(1) Simple delay method The simple delay method is a method in which, for example, the peak power is simply supplied for 2 seconds and then the power saving mode is executed by throttling. The amount of calculation is very small, and the performance improvement effect is also very high. However, there are difficulties in terms of power average and ensuring that OCP does not work.

(2) Section average method The section average method is a method of controlling so that the power average does not exceed a certain value within a certain period.
FIG. 3 is a diagram for explaining the concept of the interval averaging method. In FIG. 3, for example, the movement of power consumption up to the current time in a measurement section of about 3 seconds is shown by a solid line. In the measurement period after the current time, the maximum power consumption when the throttling is executed and the CPU performance is low is indicated by a broken line. In FIG. 3, the difference of the power consumption with respect to the target value of average power consumption is represented by S1, S2, and S3. Here, a value obtained by adding the remaining minimum power margin (S3) to the difference (S1-S2) in the power consumption with respect to the target value of the average power consumption up to the current time is A, and high performance driving (High CPU Performance) When the value obtained by subtracting the target value of average power consumption from the maximum power consumption of the system at the time is B, for example,
If A <B, the next unit period is set to High CPU Performance.
If A ≧ B, the next unit period is set to Low CPU Performance.
By doing so, it is possible to perform control so that the power average does not exceed a certain value in the measurement section while maintaining high performance.

  FIG. 4 is a flowchart showing an example of the section average method. First, the embedded controller 41 acquires battery information (battery discharge capability information) from the battery pack 52 via the SM bus (step 101). Thereafter, initialization is performed by resetting the respective parameters, and the CPU 11 is brought into a state in which throttling is not performed (step 102). After that, the embedded controller 41 calculates power from the current value obtained from the current measurement circuit 53 and the measured voltage value, and uses the average of a plurality of samples at regular intervals of the power as the power consumption of the unit period (step 103). ). Here, a certain time (unit period) elapses.

  At this time, the embedded controller 41 determines whether or not there is a sufficient margin (step 104). That is, it is determined whether or not the CPU 11 can perform high performance driving (High CPU Performance) in the next loop. Even if the CPU 11 operates at the maximum power consumption in the next loop (unit period), the power average does not exceed the target value by driving the CPU 11 in the remaining section with low performance (Low CPU Performance). If it is possible, it is determined that there is sufficient margin. If it is determined that there is a sufficient margin, the CPU 11 is driven for high performance (High CPU Performance) (step 105). At this time, if throttling has already occurred, an interrupt (SMI) is issued from the embedded controller 41 to cancel throttling. If it is determined in step 104 that there is not enough room, the CPU 11 performs low-performance driving (Low CPU Performance) (step 106). At this time, if throttling has not been applied, an interrupt (SMI) is issued from the embedded controller 41 to enter throttling. Thereafter, it is determined whether or not the measurement section has ended (step 107). If the measurement section has not ended, the processing from step 103 is repeated. If the measurement section has ended, the initial step 102 is performed. Repeated from the process of conversion.

  Thus, in the section average method, since the power average is controlled so as not to exceed a certain value within a certain period, the power average is guaranteed and a high performance improvement effect can be obtained. However, the OCP operation may be unavoidable depending on the OCP current detection method, and the calculation amount is relatively large.

(3) Moving average method This is a method of controlling while confirming that there is a margin at each moment by moving the averaged section with time. The section for calculating the average value sequentially moves, and the average value is calculated while taking a history. The asynchronous OCP is monitored while taking a moving average of power values (actually, current values obtained from the current measurement circuit 53). The performance improvement effect is high, and it is excellent in that it can guarantee power average and OCP, but the amount of calculation is particularly large compared to other methods.

  FIG. 5 is a diagram showing a moving average example of 10 samples when the moving average method is employed. Here, actual power consumption, power at high performance (High CPU Performance), and CPU performance are shown. The high and low power thresholds are determined so that the power average does not exceed the target value at the maximum load. In FIG. 5, for example, the target value is 75 W, the high threshold is 75 W, and the low threshold is 70 W. The calculated moving average is indicated by a bold solid line. In this Figure 5, after continuing high performance driving from time 0 seconds, when the moving average exceeds the high threshold (after about 3 seconds time), it shifts to low performance driving (Low CPU Performance), moving average is When the low threshold is exceeded (after about 3.5 seconds), the state of returning to high performance driving is shown.

  FIG. 6 is a flowchart showing an example of the above-described moving average method. First, the embedded controller 41 acquires battery information (battery discharge capability information) from the battery pack 52 via the SM bus (step 201). Thereafter, initialization is performed by resetting the respective parameters, and the CPU 11 is brought into a state in which throttling is not performed (step 202). Thereafter, the embedded controller 41 calculates power from the current value obtained from the current measurement circuit 53 and the measured voltage value, and takes the average of a plurality of samples at regular intervals. Further, a moving average is calculated for the past n samples including this sample (step 203). Here, a certain time (unit period) elapses.

  At this time, the embedded controller 41 determines whether it is currently a high performance drive (High CPU Performance) or a low performance drive (Low CPU Performance) (step 204). In the case of high performance (High CPU Performance), it is determined whether or not the moving average exceeds the high threshold (power threshold (H)) (step 205). If it exceeds, the CPU 11 is driven with low performance (throttling) (step 206), and the process returns to step 203. If the moving average does not exceed the high threshold, the process returns to step 203 as it is. On the other hand, when the low performance is (Low CPU Performance) in step 204, it is determined whether or not the moving average is below the low threshold (power threshold (L)) (step 207). If it is lower, the CPU 11 is driven at high performance (not throttling) (step 208) and the process returns to step 203. If the moving average is not below the low threshold, the process returns to step 203 as it is.

(4) Fixed-cycle method After detecting that the power value exceeds a certain threshold value, throttling is disabled / enabled for a predetermined period. The throttling ratio and the invalid / valid period are determined in advance by evaluation using a moving average or the like so that the OCP does not operate. This fixed period method is not so high in performance improvement effect, but is superior in that calculation is not required and power average and OCP can be guaranteed.

  FIG. 7 is a diagram illustrating a control example of the fixed cycle method. Here, time is taken on the horizontal axis, and power consumption is taken on the vertical axis, and the state in which the power consumption changes is shown by a solid line. First, in the fixed-cycle non-operation section (High CPU), when the power consumption exceeds the power threshold Ptgt (power average target) for starting the fixed-cycle operation, the fixed-cycle operation section that performs control by the fixed-cycle method is entered. . Thereafter, after the fixed cycle operation is completed, the process returns to the fixed cycle non-operation section (High CPU). In this fixed period operation section, after a period (Th) of high performance drive (High CPU Performance) in which throttling is not performed, low performance drive (Low CPU Performance) in which throttling is performed is performed in period (Tl). .

In this case, the parameters are determined by assuming that the maximum power of the High CPU is Phmax and the maximum power of the Low CPU is Plmax.
Ptgt = (Phmax × Th + Plmax × Tl) / (Th + Tl)
It becomes. Th and Tl are determined within a range where the overcurrent protection does not operate.

  FIG. 8 is a flowchart showing an example of the above-described fixed cycle method. First, the embedded controller 41 acquires battery information (battery discharge capacity information) from the battery pack 52 via the SM bus (step 301). Thereafter, initialization is performed by resetting the respective parameters, and the CPU 11 is brought into a state in which throttling is not performed (step 302). Thereafter, the embedded controller 41 calculates the power from the current value obtained from the current measurement circuit 53 and the measured voltage value, and averages a plurality of samples at regular intervals of this power (step 303). Here, a certain time (unit period) elapses.

  At this time, the embedded controller 41 determines whether or not the power consumption is higher than the power threshold (Ptgt) for starting the fixed cycle operation (step 304). When the power consumption is higher than the threshold value (Ptgt), the process proceeds to the fixed cycle operation in step 305 and the subsequent steps. If it is lower than the threshold value (Ptgt), the process returns to step 303 as it is. In step 305, operation is performed for a predetermined time (Th) while maintaining high performance driving (High CPU Performance). After the elapse of time (Th), the embedded controller 41 increases the SMI and moves to the low performance (Low CPU Performance) (step 306). Finally, the SMI is raised again to return to the high performance drive (High CPU Performance) (step 307), and the process returns to step 303.

(5) Power balance method In the above-described section average method and moving average method, it is necessary to calculate an average value, which increases the burden on the embedded controller 41 that monitors power. In addition, the fixed period method does not require calculation, but high efficiency cannot be expected. This method was conceived there, and by balancing the number of periods of high power consumption and low power consumption, it is possible to control the average value closer to the target value without calculating the average value. I have to. That is, with respect to a target value (for example, 75 W) determined from the rating (for example, 80 W) of the battery (battery pack 52), the number of occurrences of a period of high power consumption exceeding this target value and a low threshold value for which power consumption is predetermined. The difference in the number of occurrences during a period of less than is measured, and when the difference exceeds a certain number of times, a low-performance operation is executed in the sense of subtracting the excess and adjusting. In other words, this power balance method is used when the difference between the overtime when the power consumption exceeds the threshold determined by the discharge capacity of the battery and the undertime when the power consumption is below a certain level increases. The CPU 11 is controlled so that the power average does not exceed the rated power of the battery by operating the CPU 11 at a low performance.

  FIG. 9 is a diagram for explaining the concept of the power balance method. Here, time is taken on the horizontal axis, and power consumption is taken on the vertical axis, and the state in which the power consumption changes is shown by a solid line. In FIG. 9, the maximum power consumption of the system at the time of high performance drive (High CPU Performance) without throttling is Phmax, the target value of average power consumption determined from the battery rating is Ptgt, and the throttling is low The maximum power consumption during performance driving (Low CPU Performance) is shown as Plmax and the low threshold (Low Threshold) as Plth.

As a method of determining these parameters, for example, assuming that Ptgt which is a target value of average power consumption is equal to Phth of a high threshold (High Threshold),
Phth = Ptgt = (Phmax + Plth) / 2
It is said.
The time is measured by counting the unit period. The ratio between the initial counter value (tmax) and the throttling period (tlo) is the weighted average of power.
(Phmax × tmax + Plmax × tlo) / (tmax + tlo) <Ptgt
It is determined to satisfy.

  Here, for example, if the maximum power consumption (Phmax) of the system is 100 W and the target value (Ptgt) of average power consumption is 75 W, the low threshold (Plth) is 50 W. At this time, for example, the subtraction between the time when the observed power consumption of the system exceeds the high threshold value of 75 W (exceeds) and the time when the power consumption of the system falls below the low threshold value of 50 W is 3 seconds. If it becomes, throttling is forcibly performed for 3 seconds. With this configuration, at least the average power consumption does not exceed the target of 75 W. Since the embedded controller 41 periodically acquires the power value, it is sufficient to up / down the virtual counter each time. The initial value of the difference counter, the throttling period, and the throttling ratio are determined in advance in consideration of OCP.

  FIG. 10 is a flowchart illustrating an example of the power balance method. First, the embedded controller 41 acquires battery information such as OCP information from the battery pack 52 via the SM bus (step 401). Thereafter, initialization is performed by resetting the respective parameters, and the CPU 11 is brought into a state in which throttling is not performed (step 402). After that, the embedded controller 41 calculates power from the current value obtained from the current measurement circuit 53 and the measured voltage value, and uses the average of a plurality of samples at regular intervals of the power as the power consumption of the unit period (step 403). ). Here, a certain time (unit period) elapses. At this time, the embedded controller 41 determines whether or not the power consumption is higher than a high (Hi) threshold (High Threshold) (step 404). If the power consumption is higher than the Hi threshold value, the process proceeds to step 405 and subsequent steps. If the power consumption is lower than the Hi threshold value, the process proceeds to step 410 and subsequent steps.

  If the power consumption is higher than the Hi threshold, the counter value is first decremented by one (step 405). Then, it is determined whether or not the counter is 0 (step 406). If the counter is 0, the interrupt (SMI) is raised from the embedded controller 41 and the CPU 11 is throttled (step 407). When the predetermined time tlo elapses, the throttling is canceled again (step 408), the counter value is returned to the initial value tmax (step 409), and the process returns to step 403.

If the power consumption is not higher than the Hi threshold in step 404, it is determined whether the power consumption is lower than a low (Lo) threshold (Low Threshold) (step 410). If it is not lower than the Lo threshold value, the process returns to Step 403. If it is lower than the Lo threshold value, it is determined whether or not the counter value is the initial value tmax (Step 411). If tmax, the process returns to step 403. If not tmax, the counter value is incremented by one (step 412), and the process returns to step 403.
This power balance method makes it easy to bring the power average close to the target value, is capable of OCP, and can be expected to have a high performance improvement effect with a small amount of calculation.

When the discharge capacity of the battery (battery) is limited by each control method as described above, control should be performed so that the `` average power value '', not the `` maximum power value '' of the system, does not exceed the battery discharge capacity. Can do.
FIG. 11 is a diagram showing the results of confirming the performance improvement effect using a certain benchmark in the method of (1) using the simple delay method and supplying the peak power for 2 seconds. In this benchmark, the higher the number, the higher the performance. In FIG. 11, in the case where the CPU 11 has 3.0 GHz, 2.8 GHz, 2.6 GHz, 2.4 GHz, and 2.0 GHz, in terms of performance, battery life (minutes), and average power consumption (W), The conventional method (method for preventing the maximum power of the system from exceeding the rated power) and (1) the simple delay method are compared. In the conventional method, when the battery is driven, the CPU 11 is reduced to 50% / 37.5% / 25% by throttling. In the simple delay system to which this embodiment is applied, the CPU 11 is driven at 100% / 62.5% / 25%.

  As is apparent from FIG. 11, according to this embodiment, the performance of each CPU 11 is greatly improved. On the other hand, it has been found that the average power consumption (battery capacity × 60 / battery life (min)) calculated from the battery life hardly deteriorates from the prior art. This is because the processing time of the CPU 11 is shortened if throttling is not performed.

  As described above in detail, according to the present embodiment, even if the battery is limited, the performance of the system can be greatly improved by controlling with the power average. On the other hand, if a battery with a small discharge capacity can be used, it can contribute to weight reduction and cost reduction of a computer apparatus. Furthermore, if the system and the battery can be emphasized by obtaining overcurrent information from the battery and controlling it, simple and efficient control is possible.

  It should be noted that the control method in the present embodiment can be developed as a program executed on a computer of a device that is configured to be connectable with a battery pack 52 that discharges and supplies power to the system. In particular, the program is provided as a program for causing the embedded controller 41 to execute the various processes described above. When these programs are provided to a computer, for example, in a case where the programs are provided in a state where they are installed in a notebook PC, a program that is executed by a computer such as a notebook PC is stored in a storage medium in which the computer is readable. Can be provided. As this storage medium, for example, a DVD or a CD-ROM medium or the like corresponds, and the program is read by a DVD or CD-ROM reader or the like, and this program is stored in a flash ROM or the like and executed. These programs may be provided via a network by a program transmission device, for example.

  Here, if this case is regarded as the invention of the storage medium as described above, it is as follows. That is, “as a means for observing the power discharged from the battery to the computer connected to the battery that supplies power to the system main body, and as a means for controlling the average of the observed power not to exceed the discharging capacity of the battery. A storage medium storing a program to be functioned. "

  As an application example of the present invention, the present invention can be applied to various computer devices equipped with a battery and a CPU, such as a notebook PC, a PDA (Personal Digital Assistant), and various mobile devices. In addition, a program executed by these computer apparatuses can be cited as an application example.

It is the figure which showed the hardware constitutions of computer apparatuses, such as a notebook PC. It is the figure which showed the block configuration of the electric power supply system to which this Embodiment is applied. It is a figure for demonstrating the concept of an area average system. It is the flowchart which showed an example of the process of the area average system. It is the figure which showed the example of a moving average of 10 samples at the time of employ | adopting a moving average system. It is the flowchart which showed an example of the process of a moving average system. It is the figure which showed the example of control of the fixed period system. It is the flowchart which showed an example of the process of a fixed period system. It is a figure for demonstrating the concept of an electric power balance system. It is the flowchart which showed an example of the process of an electric power balance system. It is the figure which showed the result of having confirmed the performance effect by the system which supplies a peak electric power for 2 seconds using a simple delay system. (a), (b) is the figure which showed the state diagram of OCP.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... CPU, 11a ... TCC (Thermal Control Circuitry), 41 ... Embedded controller, 50 ... Power supply circuit, 52 ... Battery pack, 53 ... Current measuring circuit, 55 ... DC / DC converter

Claims (6)

A computer device configured to allow connection of a battery that discharges after charging and supplies power to the system body,
When receiving power supply from the battery, a CPU that temporarily operates with high performance exceeding the rating of the battery;
After operating the CPU with high performance, the difference between the time when the observed power consumption is above a predetermined high threshold and the time when the observed power consumption is below a predetermined low threshold And a controller that controls the CPU to operate at a low performance when a predetermined time has elapsed.   The computer apparatus according to claim 1, wherein the high threshold is a value determined from a rated power of the battery.   The computer apparatus according to claim 1, wherein the controller measures the predetermined time by counting the number of occurrences of a unit period.   The computer apparatus according to claim 1, wherein the low-performance operation of the CPU is throttling that operates intermittently to reduce output. A method of controlling power in a computer device connected to a battery for supplying power to a system body on which a CPU is mounted,
Measuring the power consumption discharged from the battery;
When receiving power supply from the battery, temporarily operating the CPU at a high performance exceeding the rated power of the battery ;
The CPU is reduced when the subtraction between the time during which the measured power consumption exceeds a predetermined high threshold and the time during which the measured power consumption is below a predetermined low threshold reaches a predetermined time. And a power control method including a step of operating at a performance. To a computer connected to a battery that supplies power to the system body equipped with a CPU,
A function of observing power consumption discharged from the battery;
When receiving power from the battery, the CPU temporarily operates with high performance exceeding the rated power of the battery ; and
Wherein in the case where the time the observed power consumption is above the high threshold value predetermined subtraction of the time the power consumption observed is below the low predetermined threshold becomes a predetermined time CPU A program that realizes the function of operating with low performance.

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