JP4021956B2 - IC card - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an IC card capable of encrypting or decrypting data given from the outside or data held therein.
[0002]
[Prior art]
The IC card has recently attracted attention as a new information storage medium replacing the magnetic card. In particular, an IC card with a built-in CPU is expected to be used in various fields of an advanced information society because it can realize a high level of security.
In general, an IC card includes three types of memories, ROM, RAM, and EEPROM, and a CPU that accesses these memories. The EEPROM is a rewritable nonvolatile memory and stores data such as personal information related to the IC card user. The RAM is a volatile memory used as a work area when the CPU executes a program. The ROM is a read-only memory and stores a program indicating processing to be executed by the CPU. In addition, an I / O terminal for communication with the outside is provided.
[0003]
When using an IC card, the IC card is connected to a reader / writer, and a command is transmitted from the reader / writer to the IC card via an I / O terminal. In the IC card that has received the command, the CPU executes a portion corresponding to the command in the program stored in the ROM. As a result, command processing is performed, and processing such as writing new data to the EEPROM is performed.
[0004]
In general, an IC card transmits and receives data encrypted with a reader / writer. This is to prevent a third party from illegally acquiring a communication signal between the reader / writer and the IC card and stealing the data contents. As a data encryption method, for example, there is RSA.
RSA is a kind of encryption method based on an asymmetric key (asymmetric key) method. A “public key” that is publicly disclosed to a plurality of communication partners, and a “secret key” dedicated to an IC card that is different from the public key. The data is encrypted or decrypted using the. In other words, in RSA encryption, for example, data is encrypted with a public key that anyone can know, and the data is decrypted using a private key that is unique to the card.
[0005]
In this respect, RSA is different from a symmetric key encryption method such as DES. In the symmetric key encryption method, the IC card and the communication partner must share a common encryption key in advance. For this reason, when performing cryptographic communication with an unspecified number of partners, it is necessary to manage the delivery of a large number of keys by the number of communication partners, and the management becomes very complicated. On the other hand, RSA does not share key data necessary for encrypted communication in advance, but generates or decrypts ciphertext using only a public key disclosed by a third party. It is possible. That is, RSA does not require key delivery management and is suitable for encrypted communication in which there are a large number of unspecified communication partners.
[0006]
FIG. 11 is a conceptual diagram showing a case where an external device such as a reader / writer encrypts data by RSA and transmits the obtained ciphertext to the IC card. FIG. 12 is a flowchart showing a processing procedure of plaintext encryption or decryption of ciphertext by RSA.
As shown in FIG. 11, the external device encrypts the plaintext X of the data to be transmitted to the IC card using the encryption keys e and N. That is, as shown in FIG. 12A, the plaintext X and the encryption keys e and N are first input to the external device (S1202). Next, for the plaintext X, the calculation of the following formula (1) is executed.
C = X ^ e mod N (1)
Here, “X ^ e” means X to the e power. As a result of the processing of S1202, ciphertext C is acquired and output (S1206).
[0007]
The acquired ciphertext C is transmitted to the IC card (see FIG. 11). The IC card decrypts the received ciphertext C by calculating equation (2) using the secret key d and the public key N (FIG. 12B, S1212, S1214).
X = C ^ d mod N (2)
As a result of executing the above calculation, the IC card acquires the plain text X, and writes and stores it in, for example, an EEPROM.
[0008]
[Problems to be solved by the invention]
However, the conventional IC card described above has a small memory capacity such as a RAM, a ROM, and an EEPROM, and the data processing speed of the CPU is also low. To deal with these problems, it is possible to improve the data processing speed by installing a high-speed arithmetic coprocessor on the IC card. In this case, however, the operating speed of the IC card is comparable to that of a general-purpose computer. And very slow.
On the other hand, the calculations of Expressions (1) and (2) performed in S1204 and S1214 of FIG. 12 require a great deal of time because they include the calculation of a power residue. In particular, since each variable of X, C, d, e, and N is generally composed of 512 bits, the calculation burden is large. In order to calculate the equation (1) and the like, usually, a calculation algorithm such as the Mongomery method shown in FIG. 13 is used to speed up the calculation. However, there is a limit to speeding up the calculation, and there is a problem that data cannot be encrypted or decrypted in the IC card quickly.
[0009]
Accordingly, an object of the present invention is to provide an IC card capable of quickly executing data encryption and decryption.
[0010]
[Means for Solving the Problems]
  In order to solve the above-described problem, the invention according to claim 1 includes a CPU, a memory that stores a program that can be executed by the CPU, and data that can be accessed by the CPU, and a key stored in the memory. IC card having a data conversion program for encrypting or decrypting data acquired from the outside or data stored in the memory using information, and encrypting or decrypting the data according to an external command The data conversion program includes a preprocessing unit that performs processing independent of the content of the data to be encrypted or decrypted, and a main processing unit that performs processing dependent on the content of the data. When storing information in the memory, the preprocessing unit is executed, and the preprocess value acquired as a result is stored in the memory in association with the key information.When storing the key information in the memory, it is possible to select whether or not to store the preprocess value by an instruction from the outside, and storing the preprocess value together with the key information in the memory Whether or not to save the preprocess value by selecting one of a first command for commanding and a second command for commanding to save only the key information in the memory Is selectableIt is characterized by that.
[0012]
  Claim2The invention according to claim1In the IC card according to claim 1, the preprocessed value is stored in the memory by changing the content of an argument included in the external command.OrWhether or not can be selected.
  Claim3The invention according to claim 1OrClaim2In the IC card described in (1), when the preprocess value is stored, identification information indicating that the preprocess value is stored is stored in the memory.
  Claim4The invention according to claim 1 to claim 13In the IC card according to any one of the above, when the data is encrypted or decrypted, the preprocessing value stored in the memory is used to set a main processing unit of the data conversion program. It is characterized by performing.
[0013]
  Claim5The invention according to claim4In the IC card according to claim 1, the dataconversionWhen the program is executed, it is confirmed in advance whether or not the preprocess value associated with the key information to be used is stored in the memory.
  Claim6The invention according to claim5If it is not confirmed that the preprocess value associated with the key information to be used is stored in the memory, the preprocessing unit and the main processing unit of the data conversion program The data is encrypted or decrypted by executing both of the above.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments according to the present invention will be described below with reference to the drawings.
(First embodiment)
The first embodiment of the present invention is an IC card capable of encrypting plaintext data or decrypting encrypted data based on RSA, which is an asymmetric key encryption method. The execution of RSA is performed using a calculation algorithm (hereinafter referred to as “RSA calculation algorithm”) based on the Monogomer method shown in FIG.
[0015]
In the present embodiment, the RSA calculation algorithm shown in FIG. 13 can execute the calculation without depending on the plaintext X to be encrypted (or the ciphertext C to be decrypted) (hereinafter referred to as “preprocessing unit”). ) And the calculation that depends on the plaintext X, and the part after the third line (hereinafter referred to as “main processing unit”), the speed of encryption or decryption processing in the IC card is improved. It is intended. That is, in this embodiment, the preprocessing unit is calculated once in advance, and a value obtained as a result (hereinafter referred to as “preprocessing value”) is stored in the EEPROM. After that, when actually decrypting the ciphertext, the preprocessing values stored in the EEPROM are used, and only the calculation of the main processing unit is performed. Thereby, in this embodiment, the waste of repeating the calculation of the preprocessing unit every time encryption / decryption processing is eliminated, and rapid processing is realized.
[0016]
FIG. 1 is a diagram showing a configuration of an IC card according to the first embodiment of the present invention. As shown in FIG. 1, the IC card 10 includes a ROM 12 that is a read-only memory, a RAM 14 that is a volatile memory, an EEPROM 16 that is a rewritable nonvolatile memory, and a CPU 18 that accesses these memories. . The IC card 10 also includes an I / O interface 20 for communicating with the reader / writer 22.
[0017]
All accesses to the memories (12, 14, 16) in the IC card 10 are performed via the CPU 18, and these memories cannot be directly accessed from the outside. That is, when a predetermined “command” is given from the reader / writer 22 to the CPU 18, the CPU 18 interprets and executes this “command”, and returns the result as a “response” to the reader / writer 22. The “command” is information sent from the reader / writer to the IC card and is used for causing the IC card to perform a predetermined operation.
[0018]
For example, when writing to a predetermined file in the EEPROM 16, the data to be written is given to the CPU 18 together with the “write command”, and the writing process is executed in the form of execution of the “write command” by the CPU 18. Will be done. Conversely, when reading data from a predetermined file in the EEPROM 16, a predetermined “read command” is given to the CPU 18, and the read process is performed in the form of execution of the “read command” by the CPU 18. As described above, when the execution of the “command” is completed in the IC card 10, a “response” for the executed “command” is returned to the outside. For example, when a “write command” is given, a “response” indicating whether or not the write process has been executed without any trouble is returned, and when a “read command” is given, it becomes a read target. Data will be returned in the form of responses. However, the access to the EEPROM 16 is not unconditionally performed, and it is assumed that a predetermined access condition is satisfied. This access condition is set for each individual file, for example.
[0019]
FIG. 2 is a block diagram showing a hierarchical structure in the EEPROM 16 shown in FIG. The EEPROM of this embodiment is composed of four layers. That is, the first layer MF (Master File), the second layer DF (Dedicated File), the third layer EF (Elementary File), and the fourth layer are a record structure (not shown).
MF is a file of the entire data memory. The MF is a file for storing data common to each application (service). For example, information such as the name, address, and telephone number of the owner of the IC card 10 is recorded.
The DF is a dedicated file, and is generally set for each application.
The EF is a basic file, and there are two types: IEF that stores key data and WEF that stores data used by an application.
The record structure is the smallest unit of access.
[0020]
The MF and each DF each independently have one or more IEFs and WEFs. As described above, the original data to be recorded in the IC card 10 is recorded in the WEF, whereas the keys necessary for accessing each area are stored in the IEF. For example, in the IEF provided in DF1, a key to be collated is recorded when accessing the WEF in DF1.
[0021]
Each file described above is managed by a directory file.
FIG. 3 is a diagram showing the structure of a directory file for managing WEF as an example. The WEF directory file 60 is provided with an access condition information area 65 for storing an access condition in addition to an area for storing a head address 62, a total capacity 63, and the like. Here, the access condition is a condition that must be satisfied when accessing the WEF, and specifies the type of key that must be in a verified state.
[0022]
FIG. 4 is a diagram illustrating access conditions stored in the access condition information area 65. The access condition is defined for each mode of access to the file, that is, for each of “reading”, “writing”, or “update” of data. Each access condition is composed of eight keys. In each key, “1” means that the key must be in a verified state in order to access the file. Further, “0” indicates that collation is unnecessary. In the example of FIG. 4, for “reading” data, at least K1 is in a verified state, for “writing”, at least K1 and K4 are in a verified state, and for “update”, It is defined as a condition that at least K1 and K5 are in a verified state.
[0023]
FIG. 5 is a diagram showing a format of a SELECT command, a WRITE_N & CONST command (hereinafter abbreviated as “WRITE” command), and an RSA_CALCULATE command (hereinafter abbreviated as “CALCULATE command”) among commands used in the present embodiment.
The SELECT command is a command for selecting an EF under the current DF. The SELECT command is composed of five pieces of information (CLA to LC) each consisting of 1 byte and subsequent data. The first 5 bytes are CLA indicating the command class, INS indicating the type, command parameters P1 and P2, and LC indicating the length (number of bytes) of the following DATA. DATA is information on the EF to be selected, such as a file name.
[0024]
The WRITE command newly writes the divisor part N of the RSA encryption key to the IEF selected by the SELECT command, executes the preprocessing part of the RSA calculation algorithm, and writes the preprocessed value obtained as a result to the IEF. Command. The first 5 bytes of the WRITE command are the same CLA as the SELECT command. The subsequent DATA is the divisor part N of the public key.
[0025]
The CALCULATE command is a command for causing the IC card 10 to decrypt (encrypt) the encrypted (decrypted) data received from the external device 22. The first 5 bytes of the CALCULATE command are the same CLA as the SELECT command. DATA after the sixth byte is plaintext X to be encrypted or ciphertext C to be decrypted. Further, LE which is 1-byte data following DATA is an expected response value. In the present embodiment, the LE value is set so that all encrypted or decrypted data is returned as a response up to a maximum of 256 bytes.
[0026]
FIG. 6 is a flowchart showing the operation of the IC card when a SELECT command for selecting an EF is transmitted from the reader / writer 22 to the IC card 10.
When receiving the SELECT command, the IC card 10 first sequentially searches for EFs created after the current DF, and checks whether there is an EF specified by the DATA of the SELECT command (S602). If the corresponding EF does not exist (S602: NO), an error status is transmitted to the reader / writer 22 (S608), and the process is terminated. On the other hand, if the corresponding EF exists in S602, the directory address of the file is stored in a predetermined area of the RAM 14 (S604). Finally, a response to the effect that the command processing has been completed normally is transmitted to the reader / writer 22, and the IC card 10 ends the SELECT command processing.
[0027]
FIG. 7 is a flowchart showing the operation of the IC card when the WRITE command is transmitted from the reader / writer 22 to the IC card 10.
When the IC card 10 receives the WRITE command, the CPU 18 first reads the information stored in the predetermined area of the RAM 14 in S604 of FIG. 6, that is, the directory address of the selected IEF (S702). Next, the CPU 18 acquires, from the directory, a pointer indicating the address of an area that can be written in the IEF (S704). The CPU 18 that has acquired the pointer adds a tag having the value “01” designated by the command to the record starting from the address indicated by the pointer, and writes the divisor part N of the public key (S706).
[0028]
Next, the CPU 18 pre-processes the RSA calculation algorithm, that is, “R ^ 2
“mod N” is calculated, and the preprocess value is acquired (S708). When the calculation in S708 ends, the CPU 18 automatically attaches a tag having a value “02” to the record next to the record in which the divisor part N of the public key is written, and further, the preprocess value obtained in S708 Is written (S710).
Finally, the CPU 18 transmits a response indicating that the processing of the command has been completed normally to the reader / writer 22 (S712), and ends the execution of the command.
[0029]
FIG. 8 is a flowchart showing the operation of the IC card when the reader / writer 22 sends a CALCULATE command to the IC card 10.
When the IC card 10 receives the CALCULATE command, the CPU 18 refers to the directory of the IEF selected in advance by executing the SELECT command, and acquires the head address of the IEF (S802). Next, the CPU 18 searches for a record by referring to the tag of each record after the acquired address (S804, S808, S814, S822).
[0030]
Specifically, first, a tag having a value “01” is searched (S804). As a result, when the tag “01” cannot be found, the error status is transmitted as a response to the reader / writer 22 (S830), and the command processing is terminated. If the tag “01” is found, the divisor part N of the public key is obtained by reading the contents of the record (S806).
Next, a tag having the value “02” is searched (S808). As a result, when the tag “02” is found, it means that the preprocess value used in the RSA calculation algorithm is stored in the IEF. Therefore, when executing the RSA calculation algorithm, the CPU 18 sets a flag FLG, which means that the calculation of the preprocessing unit is unnecessary, to ON (S810). On the other hand, if the tag “02” is not found, it means that the preprocess value is not stored in the IEF, and therefore FLG is set to OFF (S812).
[0031]
Next, a tag having the value “03” is searched (S814). The tag “03” is a tag attached to the record in which the exponent part e of the public key is stored. If the tag “03” is found as a result of the search, the plaintext X encryption processing in DATA of the CALCULATE command is performed. Specifically, the CPU 18 obtains the exponent part e of the public key from the record with the tag “03” (S816). Next, the CPU 18 specifies the start address of the memory area in which the key exponent part e, the key divisor part N, the plaintext X, and the flag FLG are stored, and calls the RSA cryptographic module (S818). The RSA cryptographic module is a subroutine for executing an RSA calculation algorithm.
When the execution of the RSA cryptographic module is completed, the CPU 18 transmits response information including the result to the reader / writer 22 (S820), and ends the processing of the CALCULATE command.
[0032]
On the other hand, if the tag “03” is not found in S814, the tag “04” is searched for next (S822). The record with the tag “04” is a record in which the exponent part d of the secret key is stored. If the tag “04” is found as a result of the search, the decryption process of the ciphertext C in the DATA of the CALCULATE command is executed. Specifically, first, a tag having a value “02” is searched (S823). As a result, when the tag “02” is found, when executing the RSA calculation algorithm, the CPU 18 sets a flag FLG indicating that the calculation of the pre-processing unit is unnecessary (S824). On the other hand, if the tag “02” is not found, the FLG is set to OFF (S825).
[0033]
Next, the CPU 18 obtains the exponent part d of the secret key from the record with the tag “04” (S826). Further, the CPU 18 designates the start address of the memory area in which each of the exponent part d of the key, the divisor part N of the key, the ciphertext C, and the FLG is stored, and calls the RSA cryptographic module (S828). When the execution of the RSA cryptographic module is completed, the CPU 18 transmits response information including the result to the reader / writer 22 (S829), and ends the processing of the CALCULATE command.
On the other hand, if the tag “04” is not found in S822, the CPU 18 transmits an error status (S832) and ends the command processing.
[0034]
Next, processing performed by the RSA module in S818 and S828 of FIG. 8 will be described. FIG. 9 is a flowchart showing the processing contents of the RSA module.
As described above, the RSA module is a subroutine that executes the RSA calculation algorithm and performs encryption of plaintext X or decryption of ciphertext C. In the RSA module, first, it is confirmed whether or not FLG is set to ON (S902). If FLG is set to ON, it means that the preprocessed value is stored in the selected IEF, so the CPU 18 searches for a record with the tag “02” in the IEF. Then, the preprocess value stored in the record is read (S910).
[0035]
On the other hand, if FLG is set to OFF in S902, it means that the preprocess value is not stored in the selected IEF. Therefore, the CPU 18 executes the preprocessing unit of the RSA calculation algorithm and acquires the preprocess value (S904). When the processing of S904 or S910 ends, the CPU 18 executes the main processing unit of the RSA calculation algorithm, and encrypts plaintext X or decrypts ciphertext C (S906). When the calculation of S906 ends, the calculation result is returned as a return value to S818 or S828 of FIG. 8 (S908), and the processing of the RSA module ends.
[0036]
As described above, in this embodiment, the RSA calculation algorithm is divided into a preprocessing unit and a main processing unit, and when the divisor part N of the public key is stored in the IC card 10, the key N is used. The calculation of the preprocessing unit is executed, and the preprocessing value acquired as a result is stored in the same IEF as the IEF in which the key N is stored. As described above, the calculation content of the preprocessing unit does not depend on the plaintext X to be encrypted or the ciphertext C to be decrypted, and the same calculation is performed each time encryption / decryption is performed. The same calculation result (preprocess value) is acquired. Therefore, in the present embodiment, the preprocess value acquired once is stored in the EEPROM, which is a nonvolatile memory, so that the preprocess value can be effectively used thereafter. In this embodiment, since the preprocess value is stored in the same IEF as the key N, if a plurality of different IEFs are prepared, a plurality of public keys can be stored in the EEPROM 16 together with the respective preprocess values. ing.
[0037]
In this embodiment, when a preprocess value is written in an IEF record, a tag having a value “02” is attached to the record. This tag “02” functions as identification information indicating whether or not the preprocess value is stored in the IEF. That is, when it is necessary to determine whether or not the preprocess value is stored in the IEF, it is sufficient to search whether or not the tag “02” exists in the IEF. That is, in the present embodiment, it is not necessary to refer to all information of the IEF in order to confirm the presence / absence of the preprocess value, and it is possible to make a quick determination.
[0038]
Further, in the present embodiment, when data is decrypted inside the IC card 10, it is performed by executing the main processing unit of the RSA calculation algorithm using the preprocess value stored in the IEF. That is, in this embodiment, it is possible to avoid the necessity of executing the pre-processing unit of the RSA calculation algorithm in each encryption / decryption process, thereby shortening the time required for the encryption / decryption process. In particular, in the present embodiment, since the preprocessing unit of the RSA calculation algorithm includes the calculation of the power residue, the efficiency of the encryption / decryption processing can be significantly improved by avoiding the calculation of the preprocessing unit.
[0039]
In this embodiment, when data encryption / decryption processing is executed, it is checked in advance whether or not the preprocess value associated with the public key N to be used is stored in the IEF. Accordingly, even if the preprocess value is not stored in the IEF due to an unexpected situation or other circumstances, inappropriate information in the IEF is referred to instead of the preprocess value, and the encryption / decryption process is performed. Is prevented from being implemented.
Furthermore, in this embodiment, when it is not confirmed that the preprocessing value associated with the public key N to be used is stored in the IEF, both the preprocessing unit and the main processing unit of the RSA calculation algorithm are By executing, data encryption / decryption processing is executed. That is, in the present embodiment, the data encryption / decryption process is reliably performed regardless of whether the preprocess value is stored in the IEF.
[0040]
(Second Embodiment)
Next, a second embodiment of the present invention will be described. The IC card of the present embodiment is different from the IC card of the first embodiment in that it has a function of processing a WRITE_RSAKEY command having a function similar to the WRITE command.
FIG. 14 is a diagram showing the format of the WRITE_RSAKEY command. As shown in the figure, the format of WRITE_RSAKEY is the same as the WRITE command of the first embodiment, and only the actual contents such as CLA and INS are different.
FIG. 10 is a flowchart showing the contents of processing performed by the IC card 10 when the WRITE_RSAKEY command is received. 10, S1002 to S1006 are the same as the processes from S702 to S706 in FIG. 7, and S1008 is the same as the process of S712. That is, the WRITE_RSAKEY command is a command for writing only the divisor part N of the public key into the selected IEF, and is different from the WRITE command in that the preprocess value of the RSA calculation algorithm is not saved in the IEF.
[0041]
In the present embodiment, by appropriately selecting and using the above two commands, it is possible to select whether or not to save the preprocess value of the RSA calculation algorithm when the public key N is saved in the IEF. Is possible. The two commands are selectively used according to the capability of the card issuing machine at the stage of issuing an IC card, for example.
For example, when an IC card is issued by a dedicated card issuing machine at an IC card production factory, the public key N is stored in the EEPROM of the IC card using a WRITE_RSKEY command. Card issuing machines generally have higher processing power than IC cards, and the number of cards to be issued is enormous. Therefore, the pre-processing unit for RSA, which has a high calculation load, performs calculations at high speed on the card issuing machine. This is because the preprocess value is written in the EEPROM separately from the public key. As a result, it is possible to reduce the issuing time per card as compared with the case where the IC card performs the preprocessing calculation, and it is possible to issue a large number of IC cards in a short time.
[0042]
On the other hand, when issuing an IC card to a customer using a personal computer or the like at a retail store or the like, the public key N is written into the EEPROM of the IC card using a WRITE command. Since there are relatively few card issuances at retail stores, etc., there are few requests for shortening the card issuance time, and the arithmetic processing capability of personal computers and the like is not as high as that of the above-mentioned card issuance machine. This is because there are few advantages of processing the pre-processing unit outside the IC card. Therefore, in such a case, in order to effectively use the function of the IC card, the IC card is caused to obtain a preprocess value using a WRITE command.
[0043]
If a large number of public keys N need to be stored in the EEPROM, only the public key N is stored using the WRITE_RSAKEY command. This is because the memory capacity of the EEPROM 16 is relatively small, thereby avoiding the consumption of memory resources due to storing a large number of preprocess values. In this case, the preprocess value is calculated and obtained each time a decryption process or the like is performed. In other words, in the present embodiment, whether or not to store the preprocess value together with the encryption key is appropriately selected according to the relationship between the memory capacity of the EEPROM and the number of encryption keys stored therein, and the limitation of the IC card. It is possible to effectively use the allocated memory resources.
[0044]
(Other embodiments)
The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.
[0045]
1) In the first embodiment, an IC card using an asymmetric key encryption method has been described as an example, but this is not meant to limit the scope of application of the present invention. The technical idea of the present invention is also applicable to an IC card using a symmetric key type encryption method such as DES.
2) In the second embodiment, two types of independent commands are prepared, and one of them is selected and given to the IC card, so that when the public key N is written to the EEPROM, the preprocessing value is also stored. Whether or not to write can be selected, but by using one command and changing the value of the parameter of that command, it is possible to select whether or not to write the preprocess value. There may be. As described above, when the functions of the two commands are combined into one command, the program to be stored in the ROM of the IC card is made simpler and the limited memory resources of the IC card are effectively used. The effect of being able to be obtained.
[0046]
【The invention's effect】
  As detailed above,BookAccording to the invention,There are the following effects.
  (1)When storing key information in memory, the pre-processing unit is executed, and the pre-processing values obtained as a result are stored in the memory in association with the key information, so that the pre-processing values once acquired can be used effectively thereafter. Is possible.
  (2)When storing key information in the memory, it is possible to select whether or not to store a preprocessed value by an external command.Possession ofEffective utilization is possible.
[0047]
  (3)When the preprocess value is stored, the identification information indicating that the preprocess value is stored is stored in the memory, so that the presence or absence of the preprocess value can be easily and quickly confirmed.
  (4)When encrypting or decrypting data, the main processing part of the data conversion program is executed using the preprocessed value stored in the memory, so that the encryption / decryption process can be performed quickly. It is possible to do.
  (5)dataconversionWhen executing the program, since it is determined in advance whether or not the preprocess value associated with the key information to be used is stored in the memory, even if the preprocess value is not stored, Incorrect processing is never performed.
[0048]
  (6)If it is not confirmed that the preprocess value associated with the key information to be used is stored in the memory, the data encryption is performed by executing both the preprocessing unit and the main processing unit of the data conversion program. Therefore, the encryption / decryption process can always be executed regardless of whether the preprocess value is stored or not.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of an IC card according to a first embodiment of the present invention.
FIG. 2 is a block diagram showing a hierarchical structure in the EEPROM 16 shown in FIG. 1;
FIG. 3 is a diagram showing a structure of a directory file for managing WEF.
FIG. 4 is a diagram illustrating an access condition to an EF.
FIG. 5 is a diagram showing a command format used in the first embodiment of the present invention;
FIG. 6 is a flowchart showing the operation of an IC card that executes a SELECT command.
FIG. 7 is a flowchart showing an operation of the IC card when an RSA_WRITE command is executed.
FIG. 8 is a flowchart showing the operation of an IC card that executes an RSA_CALCULATE command.
FIG. 9 is a flowchart showing processing contents of an RSA module.
FIG. 10 is a flowchart showing an operation of the IC card 10 when processing a WRITE_RSAKEY command.
FIG. 11 is a conceptual diagram showing a case where data is encrypted by RSA with an external device and the obtained ciphertext is transmitted to an IC card.
FIG. 12 is a flowchart showing a processing procedure of plaintext encryption by RSA or decryption of an encrypted part.
FIG. 13 is a diagram showing a calculation algorithm of the Mongomery method
FIG. 14 is a diagram illustrating a format of a WRITE_RSAKEY command.
[Explanation of symbols]
10 IC card
12 ROM
14 RAM
16 EEPROM
18 CPU

Claims (6)

CPU,
A memory for storing a program executable by the CPU and data accessible by the CPU;
Using key information stored in the memory, it has a data conversion program for encrypting or decrypting data acquired from the outside or data stored in the memory, and in accordance with an instruction from the outside, the data In IC card to encrypt or decrypt,
The data conversion program has a preprocessing unit that performs processing independent of the content of the data to be encrypted or decrypted, and a main processing unit that performs processing dependent on the content of the data,
When storing the key information in the memory,
Executing the pre-processing unit, storing the pre-process value acquired as a result in the memory in association with the key information ;
When storing the key information in the memory,
Whether to save the preprocess value can be selected by an instruction from the outside,
Select one of a first instruction that orders to save the preprocessed value together with the key information in the memory, and a second instruction that orders to save only the key information in the memory. By giving more, it is possible to select whether or not to save the preprocess value . In the IC card according to claim 1 ,
IC card, wherein said by changing the content of the argument instruction has from the outside, whether to save the pre-treatment values in the memory can be selected. In the IC card according to claim 1 or 2 ,
In the case of storing the preprocess value, identification information indicating that the preprocess value is stored is stored in the memory. In the IC card according to any one of claims 1 to 3 ,
When encrypting or decrypting the data,
An IC card, wherein a main processing unit of the data conversion program is executed using the preprocess value stored in the memory. In the IC card according to claim 4 ,
When executing the data conversion program, it is confirmed in advance whether or not the preprocess value associated with the key information to be used is stored in the memory. The IC card according to claim 5 ,
When it is not confirmed that the preprocessing value associated with the key information to be used is stored in the memory, by executing both the preprocessing unit and the main processing unit of the data conversion program An IC card that encrypts or decrypts the data.

Images