JP4000701B2 - Multilayer capacitor - Google Patents

Description

【００４５】
表１から、中央の引出電極の幅方向寸法Ａが大きくなるほど、ＥＳＬが低くなる傾向が一般的に現れているが、試料２〜５のように、Ａ：Ｂが６：４〜９：１に選ばれること、すなわち幅方向寸法Ａが幅方向寸法Ｂの３／２倍ないし９倍に選ばれることが、低ＥＳＬ化にとって好ましい。また、さらなる低ＥＳＬ化のためには、試料３および４のように、Ａ：Ｂが７：３〜８：２、すなわち幅方向寸法Ａが幅方向寸法Ｂの７／３倍ないし４倍に選ばれることがより好ましい。
【００４６】
なお、試料６のように、幅方向寸法Ａが０．９５ｍｍというように大きくされても、幅方向寸法Ｂが０．０５ｍｍというように小さくされた場合には、幅方向寸法ＡとＢとが互いに等しい試料１に比べて、ＥＳＬがむしろ高くなっているので、端の引出電極の幅方向寸法Ｂは、０．１ｍｍ以上であることが好ましい。
【００４７】
図３は、この発明の他の実施形態による積層コンデンサ６１を示す、図１に相当する図である。
【００４８】
積層コンデンサ６１は、４つの側面６２、６３、６４および６５を有するコンデンサ本体６６を備えている。コンデンサ本体６６は、複数の誘電体層６７、ならびにコンデンサユニットを形成するように特定の誘電体層６７を介して互いに対向する少なくとも１対の第１および第２の内部電極６８および６９を備えている。
【００４９】
コンデンサ本体６６の長手方向に延びる側面６２上には、３つの外部端子電極７０、７１および７２が並んで形成され、側面６２に対向する側面６４上には、３つの外部端子電極７３、７４および７５が並んで形成されている。
【００５０】
第１の内部電極６８は、外部端子電極７１、７３および７５にそれぞれ電気的に接続される第１の引出電極７６、７７および７８を形成している。第２の内部電極６９は、残りの外部端子電極７０、７２および７４にそれぞれ電気的に接続される第２の引出電極７９、８０および８１を形成している。
【００５１】
このようにして、側面６２上では、第１の引出電極７６に接続される外部端子電極７１と第２の引出電極７９および８０に接続される外部端子電極７０および７２とが交互に配置され、側面６４上では、第１の引出電極７７および７８に接続される外部端子電極７３および７５と第２の引出電極８１に接続される外部端子電極７４とが交互に配置されるようになる。
【００５２】
このような実施形態において、前述した実施形態と同様、中央の引出電極７６および８１の各々の幅方向寸法Ａは、端の引出電極７７〜８０の各々の幅方向寸法Ｂより大きくされている。
【００５３】
このように、中央の引出電極７６および８１の幅方向寸法Ａを大きくすることにより、前述した実施形態の場合と同様の効果が奏される。これに関連して、各側面上に並んで形成される外部端子電極の数およびそれに接続される引出電極の数は、３以上であれば、どのような実施形態についても、同様の効果が奏される。
【００５４】
また、少なくとも３つの外部端子電極が並んで形成されるのは、コンデンサ本体の単に１つの側面上だけであってもよく、あるいは、３つまたは４つの側面上であってもよい。
【００５５】
また、端の引出電極の幅方向寸法より大きくされるのは、中央の引出電極のすべてでなくてもよく、中央の引出電極の一部のみであってもよい。これに関連して、たとえ中央の引出電極のすべての幅方向寸法が大きくされる場合であっても、各中央の引出電極の幅方向寸法は必ずしも互いに同じでなくてもよい。
【００５６】
【発明の効果】
以上のように、この発明によれば、第１の内部電極に第１の引出電極を介して接続される外部端子電極と、第１の内部電極に対向する第２の内部電極に第２の引出電極を介して接続される外部端子電極とが、コンデンサ本体の側面上で交互に配置されているので、磁束の相殺に基づく低ＥＳＬ化を図ることができるばかりでなく、コンデンサ本体の側面上で両端に位置する端の外部端子電極に接続される端の引出電極を除く中央の少なくとも１つの引出電極の幅方向寸法が、端の引出電極の幅方向寸法より大きくされているので、この幅方向寸法が大きくされた中央の引出電極とその両側に位置する引出電極との間での電流の経路が短くなり、このことによっても低ＥＳＬ化を図ることができる。
【００５７】
したがって、積層コンデンサの共振周波数を高周波化することができる。このことは、コンデンサとして機能する周波数域が高周波化することを意味し、そのため、この発明に係る積層コンデンサは、電子回路の高周波化に十分対応することができ、たとえば、高周波回路におけるバイパスコンデンサやデカップリングコンデンサとして有利に用いることができる。
【００５８】
また、ＭＰＵ（マイクロプロッセシングユニット）に関連して使用されるデカップリングコンデンサにあっては、クイックパワーサプライとしての機能（立ち上がり時の電力が急に必要な時に、コンデンサに充電された電気量から電力を供給する機能）が要求されるが、この発明に係る積層コンデンサは、低ＥＳＬ化が図られているので、このような用途に向けられたとき、高速動作に十分対応することができる。
【００５９】
上述したような低ＥＳＬ化の効果は、この発明に係る積層コンデンサが次のように構成されたとき、より向上され、あるいはより確実に達成される。
【００６０】
すなわち、前述のように大きくされた中央の引出電極の幅方向寸法が、端の引出電極の幅方向寸法の３／２倍ないし９倍に選ばれ、より好ましくは、７／３倍ないし４倍に選ばれるとき、また、端の引出電極の幅方向寸法が、０．１ｍｍ以上に選ばれるとき、また、中央の引出電極のすべての幅方向寸法が、端の引出電極の幅方向寸法より大きくされるとき、この発明による低ＥＳＬ化の効果がより向上され、あるいはより確実に達成される。
【図面の簡単な説明】
【図１】この発明の一実施形態による積層コンデンサ３１を示すもので、（１）は積層コンデンサ３１の内部構造を第１の内部電極４０が通る断面をもって示す平面図であり、（２）は積層コンデンサ３１の内部構造を第２の内部電極４１が通る断面をもって示す平面図である。
【図２】図１に示した積層コンデンサ３１の外観を示す斜視図である。
【図３】この発明の他の実施形態による積層コンデンサ６１を示すもので、（１）は積層コンデンサ６１の内部構造を第１の内部電極６８が通る断面をもって示す平面図であり、（２）は積層コンデンサ６１の内部構造を第２の内部電極６９が通る断面をもって示す平面図である。
【図４】この発明にとって興味ある従来の積層コンデンサ１を示すもので、（１）は積層コンデンサ１の内部構造を第１の内部電極８が通る断面をもって示す平面図であり、（２）は積層コンデンサ１の内部構造を第２の内部電極９が通る断面をもって示す平面図である。
【符号の説明】
３１，６１ 積層コンデンサ
３２，３３ 主面
３４〜３７，６２〜６５ 側面
３８，６６ コンデンサ本体
３９，６７ 誘電体層
４０，６８ 第１の内部電極
４１，６９ 第２の内部電極
４２〜４９，７０〜７５ 外部端子電極
５０〜５７，７６〜８１ 引出電極
Ａ 中央の引出電極の幅方向寸法
Ｂ 端の引出電極の幅方向寸法[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer capacitor, and more particularly to a multilayer capacitor that can be advantageously applied in a high-frequency circuit.
[0002]
[Prior art]
An example of a conventional multilayer capacitor that is of interest to the present invention is described in Japanese Patent Laid-Open No. 2-256216. Here, a multilayer capacitor 1 as shown in FIG. 4 is disclosed. 4A is a plan view showing the internal structure of the multilayer capacitor 1 with a first cross section, and FIG. 4B is a second cross section of the internal structure of the multilayer capacitor 1 different from the first cross section. FIG.
[0003]
The multilayer capacitor 1 includes a capacitor body 6 having two main surfaces each forming a quadrilateral and facing each other, and four side surfaces 2, 3, 4, and 5 connecting the main surfaces. Capacitor body 6 has a plurality of dielectric layers 7 made of, for example, ceramic dielectrics extending in the direction in which the main surface extends, as well as facing each other through a specific dielectric layer 7 so as to form a capacitor unit and each quadrilateral. At least one pair of first and second internal electrodes 8 and 9 is provided. Here, the capacitor unit is a minimum unit in which a capacitance is formed by the pair of internal electrodes 8 and 9.
[0004]
4 (1) shows a cross section through which the first internal electrode 8 passes, as the first internal electrode 8 is shown in FIG. 4 (1). Further, as the second internal electrode 9 is shown in FIG. 4 (2), FIG. 4 (2) shows a section through which the second internal electrode 9 passes.
[0005]
In the multilayer capacitor 1, the equivalent series inductance (ESL) is reduced so as to be suitable for use in a high frequency region.
[0006]
Therefore, the first internal electrode 8 forms four first extraction electrodes 10, 11, 12, and 13 that are extracted to the respective two side surfaces 2 and 4 that face each other. More specifically, the extraction electrodes 10 and 11 are extracted to the side surface 2, and the extraction electrodes 12 and 13 are extracted to the side surface 4.
[0007]
Further, on each of the side surfaces 2 and 4 from which the first extraction electrodes 10 to 13 are extracted, a first external terminal electrode 14 that is electrically connected to the first extraction electrodes 10 to 13, 15, 16 and 17 are provided, respectively. That is, the external terminal electrodes 14 and 15 are connected to the extraction electrodes 10 and 11 on the side surface 2, respectively, and the external terminal electrodes 16 and 17 are connected to the extraction electrodes 12 and 13 on the side surface 4, respectively.
[0008]
On the other hand, the second internal electrode 9 forms four second extraction electrodes 18, 19, 20, and 21 that are extracted to the respective two side surfaces 2 and 4 that face each other. More specifically, the extraction electrodes 18 and 19 are extracted to a position on the side surface 2 that is different from the position where the first extraction electrodes 10 and 11 are extracted, and the extraction electrodes 20 and 21 are Further, it is pulled out to a position on the side surface 4 which is different from the position where the first extraction electrodes 12 and 13 are pulled out.
[0009]
Further, on each of the side surfaces 2 and 4 from which the second extraction electrodes 18 to 21 are extracted, a second external terminal electrode 22 electrically connected to the second extraction electrodes 18 to 21, 23, 24 and 25 are provided, respectively. That is, the external terminal electrodes 22 and 23 are respectively connected to the extraction electrodes 18 and 19 on the side surface 2 at positions different from the positions where the first external terminal electrodes 14 and 15 described above are provided. 25 is connected to the extraction electrodes 20 and 21 on the side surface 4 at a position different from the position where the first external terminal electrodes 16 and 17 are provided.
[0010]
Thus, on the two side surfaces 2 and 4, the plurality of first external terminal electrodes 14 to 17 and the plurality of second external terminal electrodes 22 to 25 are alternately arranged. .
[0011]
FIG. 4A schematically shows typical paths and directions of current flowing in the multilayer capacitor 1 with arrows.
[0012]
In FIG. 4A, current is assumed to flow from each of the first external terminal electrodes 14 to 17 toward each of the second external terminal electrodes 22 to 25 in the illustrated state or time point. Of course, in the case of alternating current, there are times when it flows in reverse.
[0013]
When a current flows in this way, a magnetic flux whose direction is determined by the direction of the current is induced, so that a self-inductance component is generated.
[0014]
Referring to FIG. 4 (1), the current differs with a spread of about 180 degrees in the vicinity of the central portions of the internal electrodes 8 and 9 and the extraction electrodes 11, 13, 18 and 20 located relatively on the central side. Since the magnetic flux flows in a plurality of directions, the magnetic flux is canceled out and contributes to a reduction in ESL.
[0015]
[Problems to be solved by the invention]
As described above, the configuration shown in FIG. 4 is effective in reducing the ESL.
[0016]
However, there is an increasing demand for low ESL, and there is an urgent need for multilayer capacitor manufacturers to find measures that can further reduce ESL.
[0017]
As a means for lowering ESL, it may be possible to further increase the number of extraction electrodes and external terminal electrodes, but the number of external terminal electrodes should be increased within the dimensional constraints of the multilayer capacitor. This may not always be possible because it may be difficult or impossible. Further, as a problem in mounting the multilayer capacitor, when the number of external terminal electrodes is further increased, it may be impossible to form a large number of lands for connection of such external terminal electrodes on the wiring board.
[0018]
SUMMARY OF THE INVENTION An object of the present invention is to provide an improved multilayer capacitor that can achieve low ESL more effectively without encountering mounting problems.
[0019]
[Means for Solving the Problems]
A multilayer capacitor in accordance with the present invention includes a capacitor body having two principal surfaces each forming a quadrilateral and facing each other, and four side surfaces connecting the principal surfaces, and on at least one side surface of the capacitor body. At least three external terminal electrodes formed side by side.
[0020]
The capacitor body includes a plurality of dielectric layers extending in a direction in which a main surface thereof extends, and at least one pair of first and second interiors facing each other through a specific dielectric layer so as to form a capacitor unit. It has an electrode.
[0021]
The first internal electrode forms a first extraction electrode that is electrically connected to one of the external terminal electrodes, and the second internal electrode is connected to the remaining external terminal electrode. A second lead electrode that is electrically connected is formed, and an external terminal electrode connected to the first lead electrode and an external terminal electrode connected to the second lead electrode are alternately arranged on the side surface. Has been placed.
[0022]
In such a multilayer capacitor, in order to solve the technical problem described above, the present invention provides at least one central electrode excluding the lead electrode at the end connected to the external terminal electrode at the end located at both ends on the side surface of the capacitor body. The width direction dimension of one extraction electrode is characterized by being made larger than the width direction dimension of the end extraction electrode.
[0023]
In the present invention, preferably, the width direction dimension of the center extraction electrode is selected to be 3/2 to 9 times the width direction dimension of the end extraction electrode, and more preferably the width direction dimension of the end extraction electrode. It is selected from 7/3 to 4 times.
[0024]
In the present invention, preferably, the width direction dimension of the lead electrode at the end is selected to be 0.1 mm or more.
[0025]
In the present invention, it is preferable that all width direction dimensions of the center extraction electrode are larger than the width direction dimension of the end extraction electrode.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
1 and 2 show a multilayer capacitor 31 according to an embodiment of the present invention. Here, FIG. 1A is a plan view showing the internal structure of the multilayer capacitor 31 with a first cross section, and FIG. 1B is a plan view showing the internal structure of the multilayer capacitor 31 different from the first cross section. FIG. 2 is a perspective view showing an appearance of the multilayer capacitor 31. FIG.
[0027]
The multilayer capacitor 31 includes a capacitor body 38 having two main surfaces 32 and 33 facing each other and four side surfaces 34, 35, 36 and 37 connecting the main surfaces 32 and 33. Capacitor body 38 is opposed to each other through a plurality of dielectric layers 39 made of, for example, ceramic dielectric, extending in the direction in which main surfaces 32 and 33 extend, and a specific dielectric layer 39 so as to form a capacitor unit and At least one pair of first and second inner electrodes 40 and 41 each having a quadrilateral shape is provided.
[0028]
FIG. 1 (1) shows a cross section through which the first internal electrode 40 passes, and FIG. 1 (2) shows a cross section through which the second internal electrode 41 passes.
[0029]
For example, four external terminal electrodes 42, 43, 44, and 45 are formed side by side on the side surface 34 that extends in the longitudinal direction of the capacitor main body 38, and four external terminals are similarly formed on the side surface 36 that faces the side surface 34. Terminal electrodes 46, 47, 48 and 49 are formed side by side.
[0030]
As shown in FIG. 1A, the first internal electrode 40 forms first extraction electrodes 50, 51, 52, and 53 that are electrically connected to the external terminal electrodes 42, 44, 46, and 48, respectively. is doing.
[0031]
Further, as shown in FIG. 1 (2), the second internal electrode 41 is connected to the remaining external terminal electrodes 43, 45, 47, and 49, respectively, and the second extraction electrodes 54, 55, and 56 are electrically connected. And 57 are formed.
[0032]
Thus, on the side surface 34, the external terminal electrodes 42 and 44 connected to the first extraction electrodes 50 and 51 and the external terminal electrodes 43 and 45 connected to the second extraction electrodes 54 and 55 are alternately arranged. The external terminal electrodes 46 and 48 connected to the first extraction electrodes 52 and 53 and the external terminal electrodes 47 connected to the second extraction electrodes 56 and 57 and 49 are alternately arranged.
[0033]
In such a multilayer capacitor 31, the configuration that characterizes the present invention is realized as follows.
[0034]
The width direction dimension A of the central extraction electrodes 51 and 54 excluding the extraction electrodes 50 and 55 at the ends connected to the external terminal electrodes 42 and 45 at the ends located on both sides on the side surface 34 of the capacitor body 38 is determined by It is larger than the width direction dimension B of the electrodes 50 and 55. The width direction dimension A of the central extraction electrodes 53 and 56 excluding the end extraction electrodes 52 and 57 connected to the end external terminal electrodes 46 and 49 located at both ends on the side surface 36 is the same as the end extraction electrode 52. And 57 in the width direction B.
[0035]
FIG. 1A schematically shows typical paths and directions of current flowing in the multilayer capacitor 31 with arrows.
[0036]
In FIG. 1A, the current is the external terminal connected to the second internal electrode 41 from the external terminal electrodes 42, 44, 46 and 48 connected to the first internal electrode 40 in the illustrated state or time point. It is assumed that it flows toward the electrodes 43, 45, 47 and 49.
[0037]
As can be seen from FIG. 1 (1), current flows in a plurality of different directions with a spread of approximately 180 degrees in the central portion of the internal electrodes 40 and 41 and in the vicinity of the central extraction electrodes 51, 53, 54 and 56. Therefore, the magnetic flux is canceled out, contributing to the reduction in ESL. This is substantially the same as the case of the multilayer capacitor 1 shown in FIG.
[0038]
In the multilayer capacitor 31 according to this embodiment, as described above, the width direction dimension A of each of the center extraction electrodes 51, 53, 54, and 56 is equal to the width direction of each of the end extraction electrodes 50, 52, 55, and 57. Since it is larger than the dimension B, the current path indicated by the arrow C in FIG. 1 (1) has the center extraction electrodes 11, 13, 18 and 19 at the end of the extraction electrode 10 as shown in FIG. , 12, 19 and 21 can be made shorter, which also has an effect on low ESL.
[0039]
In this embodiment, all the width direction dimensions A of the center extraction electrodes 51, 53, 54 and 56 are made larger than the width direction dimension B of the end extraction electrodes 50, 52, 55 and 57. The path of the current indicated by the arrow D flowing between the extraction electrodes 51 and 54 and between the central extraction electrodes 53 and 56 can also be shortened, which is also effective for lowering ESL. Become.
[0040]
In addition, as described above, the width direction dimension was widened not at the end extraction electrodes 50, 52, 55 and 57 but at the center extraction electrodes 51, 53, 54 and 56 as follows. Depending on the reason. That is, the central extraction electrodes 51, 53, 54 and 56 always have the extraction electrodes positioned on both sides thereof. Therefore, if the dimension in the width direction is increased, both the extraction electrodes on both sides of each of the extraction electrodes 51, 53, 54 and 56 are located. This is because the current path can be shortened, and the increase in the width-direction dimension works more effectively.
[0041]
In connection with the embodiment described above, in order to confirm the effect of low ESL, samples in which the ratio of the width direction dimension A to the width direction dimension B was variously changed were prepared, and ESL was evaluated for each sample. .
[0042]
Here, as a sample, the outer diameter plane dimension is 3.2 mm × 1.6 mm, the relative dielectric constant of the dielectric constituting the dielectric layer is 3300, and the thickness of each dielectric layer is 0.1 mm. A total of six internal electrodes laminated was prepared. In each sample, the external terminal electrodes were formed in the same manner.
[0043]
In such a sample, as shown in Table 1 below, the width direction dimension A of the center lead electrode and the width direction dimension B of the end lead electrode are variously changed, and as a result, the width direction dimensions A and B are changed. The ratio of A and B, that is, A: B, was varied, and the resonance frequency and capacitance of each sample were measured. From these resonance frequency and capacitance, ESL was determined by the resonance method. In the resonance method, the frequency characteristic of impedance is measured for a multilayer capacitor as a sample, and the frequency f _o at the local minimum point (series resonance point between the capacitance C and ESL of the capacitor) is calculated.
_{ESL = 1 / [(2πf o} ) 2 × C]
This is a method for obtaining ESL.
[0044]
[Table 1]

[0045]
As shown in Table 1, the ESL tends to decrease as the width-direction dimension A of the center extraction electrode increases. As in Samples 2 to 5, A: B is 6: 4 to 9: 1. In other words, it is preferable for the ESL reduction that the width direction dimension A is selected to be 3/2 times to 9 times the width direction dimension B. In order to further reduce the ESL, as in Samples 3 and 4, A: B is 7: 3 to 8: 2, that is, the width direction dimension A is 7/3 times to 4 times the width direction dimension B. More preferably, it is selected.
[0046]
In addition, even if the width direction dimension A is increased to 0.95 mm as in the sample 6, when the width direction dimension B is decreased to 0.05 mm, the width direction dimensions A and B are Since the ESL is rather higher than that of the sample 1 which is equal to each other, the width direction dimension B of the end extraction electrode is preferably 0.1 mm or more.
[0047]
FIG. 3 is a view corresponding to FIG. 1 and showing a multilayer capacitor 61 according to another embodiment of the present invention.
[0048]
The multilayer capacitor 61 includes a capacitor body 66 having four side surfaces 62, 63, 64 and 65. The capacitor body 66 includes a plurality of dielectric layers 67 and at least one pair of first and second internal electrodes 68 and 69 facing each other through a specific dielectric layer 67 so as to form a capacitor unit. Yes.
[0049]
Three external terminal electrodes 70, 71, and 72 are formed side by side on the side surface 62 that extends in the longitudinal direction of the capacitor body 66, and the three external terminal electrodes 73, 74, and 74 are formed on the side surface 64 that faces the side surface 62. 75 are formed side by side.
[0050]
The first internal electrode 68 forms first extraction electrodes 76, 77, and 78 that are electrically connected to the external terminal electrodes 71, 73, and 75, respectively. The second internal electrode 69 forms second lead electrodes 79, 80, and 81 that are electrically connected to the remaining external terminal electrodes 70, 72, and 74, respectively.
[0051]
Thus, on the side surface 62, the external terminal electrodes 71 connected to the first extraction electrode 76 and the external terminal electrodes 70 and 72 connected to the second extraction electrodes 79 and 80 are alternately arranged, On the side surface 64, the external terminal electrodes 73 and 75 connected to the first extraction electrodes 77 and 78 and the external terminal electrodes 74 connected to the second extraction electrode 81 are alternately arranged.
[0052]
In such an embodiment, the width direction dimension A of each of the center extraction electrodes 76 and 81 is made larger than the width direction dimension B of each of the end extraction electrodes 77 to 80, as in the above-described embodiment.
[0053]
As described above, by increasing the width-direction dimension A of the center extraction electrodes 76 and 81, the same effect as that of the above-described embodiment can be obtained. In this regard, if the number of external terminal electrodes formed side by side on each side surface and the number of lead electrodes connected thereto are three or more, the same effect can be obtained in any embodiment. Is done.
[0054]
The at least three external terminal electrodes may be formed side by side on only one side of the capacitor body, or on three or four side surfaces.
[0055]
Also, it is not necessary to make all of the center extraction electrodes larger than the width direction dimension of the end extraction electrode, and only a part of the center extraction electrode may be used. In this connection, even if all the widthwise dimensions of the central extraction electrode are increased, the widthwise dimensions of each central extraction electrode need not necessarily be the same.
[0056]
【The invention's effect】
As described above, according to the present invention, the external terminal electrode connected to the first internal electrode via the first extraction electrode and the second internal electrode opposite to the first internal electrode are connected to the second internal electrode. Since the external terminal electrodes connected via the lead electrodes are alternately arranged on the side surface of the capacitor body, not only can the ESL be reduced based on the cancellation of the magnetic flux, but also on the side surface of the capacitor body. The width direction dimension of at least one extraction electrode in the center excluding the extraction electrode at the end connected to the external terminal electrode at the end located at both ends is larger than the width direction dimension of the extraction electrode at the end. The current path between the central extraction electrode whose direction dimension is increased and the extraction electrodes located on both sides of the central extraction electrode is shortened, and this can also reduce the ESL.
[0057]
Therefore, the resonance frequency of the multilayer capacitor can be increased. This means that the frequency region that functions as a capacitor is increased in frequency, and therefore the multilayer capacitor according to the present invention can sufficiently cope with the increase in the frequency of electronic circuits. It can be advantageously used as a decoupling capacitor.
[0058]
In addition, in a decoupling capacitor used in connection with an MPU (microprocessing unit), the function as a quick power supply (from the amount of electricity charged in the capacitor when the power at the time of start-up is suddenly needed) However, since the multilayer capacitor according to the present invention has a low ESL, the multilayer capacitor according to the present invention can sufficiently cope with high-speed operation when it is directed to such an application.
[0059]
The effect of reducing the ESL as described above can be improved or more reliably achieved when the multilayer capacitor according to the present invention is configured as follows.
[0060]
That is, the width direction dimension of the central extraction electrode enlarged as described above is selected to be 3/2 to 9 times, more preferably 7/3 to 4 times the width direction dimension of the end extraction electrode. When the width direction dimension of the end extraction electrode is selected to be 0.1 mm or more, and all the width direction dimensions of the center extraction electrode are larger than the width direction dimension of the end extraction electrode. When this is done, the effect of lowering ESL according to the present invention is further improved or more reliably achieved.
[Brief description of the drawings]
FIG. 1 shows a multilayer capacitor 31 according to an embodiment of the present invention, wherein (1) is a plan view showing the internal structure of the multilayer capacitor 31 with a cross section through which a first internal electrode 40 passes, and (2). 3 is a plan view showing the internal structure of the multilayer capacitor 31 with a cross section through which a second internal electrode 41 passes. FIG.
2 is a perspective view showing an appearance of the multilayer capacitor 31 shown in FIG. 1; FIG.
FIG. 3 shows a multilayer capacitor 61 according to another embodiment of the present invention, wherein (1) is a plan view showing the internal structure of the multilayer capacitor 61 with a cross section through which a first internal electrode 68 passes, (2) FIG. 3 is a plan view showing the internal structure of the multilayer capacitor 61 with a cross section through which a second internal electrode 69 passes.
4 shows a conventional multilayer capacitor 1 of interest to the present invention, wherein (1) is a plan view showing the internal structure of the multilayer capacitor 1 with a cross section through which a first internal electrode 8 passes, and (2) is a plan view. 2 is a plan view showing the internal structure of the multilayer capacitor 1 with a cross section through which a second internal electrode 9 passes. FIG.
[Explanation of symbols]
31, 61 Multilayer capacitors 32, 33 Main surfaces 34-37, 62-65 Side surfaces 38, 66 Capacitor main bodies 39, 67 Dielectric layers 40, 68 First inner electrodes 41, 69 Second inner electrodes 42-49, 70 ˜75 External terminal electrodes 50 to 57, 76 to 81 Lead electrode A Width direction dimension of the center lead electrode B Width dimension of the lead electrode at the end

Claims (5)

A capacitor body having two main faces each forming a quadrilateral and facing each other, and four side faces connecting the main faces;
And at least three external terminal electrodes formed side by side on at least one side surface of the capacitor body,
The capacitor body includes a plurality of dielectric layers extending in a direction in which the main surface extends, and at least one pair of first and second interiors facing each other via the specific dielectric layer so as to form a capacitor unit. With electrodes,
The first internal electrode forms a first extraction electrode electrically connected to any of the external terminal electrodes; and
The second internal electrode forms a second extraction electrode that is electrically connected to the remainder of the external terminal electrode;
The external terminal electrode connected to the first extraction electrode and the external terminal electrode connected to the second extraction electrode are alternately arranged on the side surface,
The width direction dimension of at least one extraction electrode in the center excluding the extraction electrode at the end connected to the external terminal electrode at both ends on the side surface is larger than the width direction dimension of the extraction electrode at the end. Being
Multilayer capacitor. 2. The multilayer capacitor according to claim 1, wherein a width direction dimension of the center extraction electrode is selected to be 3/2 to 9 times a width direction dimension of the end extraction electrode. 2. The multilayer capacitor according to claim 1, wherein a width direction dimension of the central extraction electrode is selected to be 7/3 to 4 times a width direction dimension of the end extraction electrode. The multilayer capacitor according to any one of claims 1 to 3, wherein a dimension in a width direction of the lead electrode at the end is selected to be 0.1 mm or more. 5. The multilayer capacitor according to claim 1, wherein all width-direction dimensions of the central extraction electrode are larger than width-direction dimensions of the end extraction electrode. 6.

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