JP3988886B2 - Color solid-state imaging device - Google Patents

Description

  The present invention relates to a color solid-state imaging device, and more particularly to a technique for obtaining high color resolution when used for progressive scan readout.

  In recent years, the demand for two-dimensional solid-state imaging devices has increased for image input devices and electronic still cameras for personal computers. Conventionally, a two-dimensional solid-state imaging device has been developed mainly for a video camera, and such a two-dimensional solid-state imaging device is based on an interlace readout method that reads out every other pixel in the vertical scanning direction. However, when the two-dimensional solid-state imaging device is used for a personal computer or a still camera, it is necessary to perform all-pixel readout (progressive scan readout) for sequentially reading all pixels at once, unlike the case of using for a video camera or the like. Become. Such progressive scan reading has an advantage that the vertical resolution of an image obtained by one reading can be higher than that of interlace reading.

  In progressive scan readout, various single-plate colorization systems that perform color display using a single two-dimensional solid-state imaging device have been proposed. Various methods have been proposed for color filter arrangements corresponding thereto. In particular, when emphasizing color reproducibility, it is desirable to use primary colors for the color filter.

  FIG. 17A shows, as an example, a color filter array 500 that uses a progressive scan CCD as a two-dimensional solid-state imaging device and adopts three primary colors of green (G), red (R), and blue (B). . Such a color filter array 500 is known as a Bayer array. For example, Nakagawa et al .: “1/3 inch 330,000 pixel all-pixel readout system CCD”, Television Society Technical Report, September 22, 1995, And Bayer: “Color imaging device” (Non-patent Document 1), Japanese Patent Application Laid-Open No. 51-112228 (Patent Document 1), and the like.

  As shown in FIG. 17A, in the color filter array 500, twice as many pixels as the other two colors (R, B) are assigned to G, and G is arranged in a checkered pattern. R and B are arranged on an orthogonal lattice (horizontal and vertical lattices) with a period of two pixels in both the horizontal and vertical directions. Since the luminance signal requires high resolution, the resolution of the luminance signal can be increased by arranging green, which has high sensitivity to the human eye, in half of all pixels.

  FIG. 17B shows the spatial resolution characteristics (resolvable regions in each direction in a two-dimensional space) of the G, R, and B signals by the color filter array 500. By arranging G having a large proportion of the luminance signal in a checkered pattern, the luminance signal can have a relatively high resolution in the horizontal and vertical directions, as shown in FIG. However, sufficient resolution cannot be obtained in an oblique direction.

  FIG. 18A shows another example of a color filter array 510 in which a CCD that operates in the same manner as the progressive scan system is used as a two-dimensional solid-state imaging device and G, R, and B3 primary colors are adopted. Yes. Such a color filter array 510 is described in, for example, Soga et al .: “Digital Card Camera”, Television Society Technical Report (March 4, 1993) (Non-Patent Document 2). Also in the color filter array 510, as in the color filter array 500 shown in FIG. 17A, twice as many pixels as the other two colors (R, B) are allocated to G, which has a large proportion of luminance signals. However, it is different from the color filter array 500 in that G is arranged in a stripe shape. In the color filter 510, R and B are arranged on a rhombus lattice (diagonal lattice) with a period of two pixels in the horizontal direction and a period of one pixel in the vertical direction. FIG. 18B shows the spatial resolution characteristics of the G, R, and B signals by the color filter array 510. As shown in FIG. 18B, the luminance signal has a relatively high resolution in the vertical and oblique directions, but a sufficient resolution cannot be obtained in the horizontal direction.

  Both the above-described two-dimensional solid-state imaging devices 500 and 510 are progressive scan type CCDs or equivalent CCDs, and the pixels are arranged in a horizontal and vertical grid pattern. For this reason, even if the arrangement of the color filters is devised, there are restrictions on the obtained spatial resolution characteristics.

On the other hand, when the XY scanning method is adopted as the two-dimensional solid-state imaging device instead of the CCD, the degree of freedom of pixel arrangement becomes larger. For example, FIG. 19A shows a color filter array 520 of a progressive scan type amplification type two-dimensional solid-state imaging device adopting an XY scanning method. Such a color filter array 520 is, for example, J. Hynesek “BCMD-An Improved Photosite Structure for High-Density Image Sensors”, IEEE Trans.on Electron Devices, Vol. 38, No. 5, May, 1991 (Non-patent Document 3). It is described in.
Japanese Patent Laid-Open No. 51-112228 Nakagawa et al .: “1/3 inch 330,000-pixel all-pixel readout CCD”, Television Society Technical Report, September 22, 1995, and Bayer: “Color Image Sensor” Soga et al: "Digital Card Camera", Television Society Technical Report (March 4, 1993) J. Hynesek "BCMD-An Improved Photosite Structure for High-DensityImage Sensors", IEEE Trans.on Electron Devices, Vol.38, No5, May, 1991

  As shown in FIG. 19A, in the color filter 520, the horizontal direction is a row, and each row is shifted in the horizontal direction by a ½ pixel pitch between the odd-numbered row and the even-numbered row. Are arranged as follows. Each color filter of G, R, and B is repeated in the order of R-GB-B in each row in a cycle of 3 pixels, and the filters of the same color are shifted by 3/2 pixel pitch between the odd-numbered row and the even-numbered row. Are arranged as follows. Accordingly, as shown in FIG. 19B, the spatial resolution characteristics of the respective colors coincide. Although G, R, and B provide relatively well-balanced resolution, the horizontal resolution is still insufficient.

  Furthermore, when a color image obtained by a two-dimensional solid-state imaging device is taken into a personal computer, luminance signal pixels or G pixels may be arranged on a square lattice (when the horizontal pitch and the vertical pitch are equal in an orthogonal lattice). desirable. However, the color filter arrays 510 and 520 shown in FIGS. 18A and 19A cannot satisfy this requirement. In the case of the color filter array 510 in FIG. 18A, the above requirement can be satisfied if the horizontal pixel pitch L is ½ of the vertical pixel pitch M (ie, L = M / 2). . However, drastically reducing the horizontal pixel pitch L tends to cause a decrease in performance of the two-dimensional solid-state imaging device. For example, in the case of a CCD type two-dimensional solid-state imaging device, it is difficult to ensure a dynamic range because the amount of signal charge that can be transferred is reduced.

  In the case of an XY scanning type solid-state imaging device, as in the example of the color filter 520 shown in FIG. 19A, generally, the closer the pixel shape is to a square or circular shape, the easier it is to secure the performance.

  The present invention has been made in view of the above problems, and is capable of obtaining a high color reproducibility and a high spatial resolution when a progressive scan type solid-state imaging device is colorized with a single plate. An object is to provide a solid-state imaging device.

A color solid-state imaging device according to the present invention is a solid-state imaging device including a plurality of pixels that perform photoelectric conversion arranged in a matrix, and a color filter that is arranged corresponding to the plurality of pixels. Are arranged at a pitch L along a first direction to form a row, and each row is arranged at a pitch L / 2 along a second direction orthogonal to the first direction. And the second row are alternately arranged in the second direction, and each pixel of the second row has a ratio of L / 2 to the corresponding pixel of the first row. The color filters are arranged shifted in the first direction, and the color filters are arranged in correspondence with the pixels arranged in the first row and every other pixel arranged in the second row. A second filter disposed corresponding to the second filter and the remaining pixels in the second row. Third and a filter, the second filter and the third filter, unlike spectrum characteristics from each other, yet are arranged alternately in the second direction, said first filter The second filter and the third filter have different spectral characteristics and are filters for obtaining a luminance signal.

The second filter is a red filter, the third filter is a blue filter.

  Video signals are alternately switched along the first direction from all pixels in the second row and all pixels in the first row adjacent to the second row in the second direction. The image signals of all the pixels are read out by repeating the reading operation in the second direction in order.

  Video signals are alternately switched along the first direction from all pixels in the first row and all pixels in the second row adjacent to the first row in the second direction. Read from the second row, all pixels in the first row adjacent to the second row in the second direction, and all pixels in the second row along the first direction. Then, the video signals of all the pixels are read by repeating the operation of alternately reading the video signals in the second direction in order.

  Each pixel in the first row and each pixel shifted in the second direction with respect to each pixel in a second row adjacent to the first row in the second direction The first drive lines are alternately connected to one first drive line, each first drive line is scanned in turn by the first scanning circuit, and one pixel along the second direction is one. The second driving lines are respectively scanned in order by the second scanning circuit.

  Each pixel in each row along the first direction is connected to one first drive line, and each first drive line is sequentially scanned by the first scanning circuit, and the second Each pixel along the direction is connected to one second drive line, each memory element is connected to each second drive line, and each memory element is sequentially scanned by the second scanning circuit. Then, the same video signal of one pixel held in each memory element is read out at least twice by the first and second scanning circuits.

  Timing at which video signals of different pixels are output from the memory elements connected to the first row, and timing at which video signals of different pixels are output from the memory elements connected to the second row Is different.

  The operation will be described below.

  By adopting the color filter arrangement as described above, G pixels (first color filter) that occupy a large percentage of the luminance signal have a lattice shape with a constant interval in both the first direction and the second direction. When the first direction is the horizontal direction and the second direction is the vertical direction, high resolution can be obtained in the horizontal direction, the vertical direction, and the oblique direction. In addition, for R and B pixels (second and third color filters), a spatial resolution that is ½ that of G pixels can be obtained, so that a well-balanced color resolution can be obtained. Further, when L = M, the G pixel has a square lattice, and a luminance signal having a square pixel arrangement can be obtained. Therefore, the arrangement is extremely suitable for taking a color image into a personal computer.

  As described above in detail, according to the color solid-state imaging device of the present invention, in the progressive scan type solid-state imaging device, G pixels having a large proportion of luminance signals are spaced at regular intervals in both the first direction and the second direction. Arranged in a grid. Accordingly, when the first direction is the horizontal direction and the second direction is the vertical direction, high resolution can be obtained in the horizontal direction, the vertical direction, and the oblique direction.

  In addition, each of the R pixel and the B pixel can obtain a spatial resolution that is ½ of that of the G pixel, and can achieve a well-balanced color resolution. Furthermore, when the pixel pitch L in the horizontal direction and the pixel pitch M in the vertical direction are set to L = M, the G pixel becomes a square lattice and the luminance signal is arranged in a square pixel, so that a color image is taken into the personal computer. In this case, a very suitable arrangement is obtained. In addition, by applying the present invention to an XY address type solid-state imaging device in which the first direction and the second direction are scanning directions, the effect can be better realized.

  In addition, by providing two or more memory elements per video signal line and correspondingly providing a plurality of horizontal signal lines, signal processing of a plurality of pixels continuous in the vertical direction is facilitated, and color signal processing and image compression are performed. A two-dimensional solid-state imaging device useful for processing and the like can be realized.

  Hereinafter, the present invention will be described in detail with reference to the drawings.

  1A, 1B, and 1C show color filter arrays 100, 110, and 120 in a two-dimensional solid-state imaging device according to the present invention, respectively. In these drawings, I represents the first direction and II represents the second direction. L represents a certain dimension, and corresponds to the pixel pitch in the first direction. Assuming that the pixel columns arranged in the first direction are rows, in any of the color filter arrays 100, 110, and 120, odd-numbered rows (2n-1: indicated by 100a, 110a, and 120a in the drawing, respectively). Only G pixels are arranged, and in even-numbered rows (2n: indicated by 100b, 110b, and 120b, respectively), R pixels and B pixels are alternately arranged every other pixel. Has been. However, n is a natural number.

  As shown in FIGS. 1A, 1B, and 1C, in each of the color filter arrays 100, 110, and 120, in each even-numbered row, the 2nth and 2 (n + 1) th rows In this case, the arrangement of the R pixel and the B pixel is reversed. The pixel pitch in the first direction is L, and the pixel pitch in the second direction is L / 2. In FIGS. 1A and 1C, the first direction corresponds to the horizontal direction and the second direction corresponds to the vertical direction. In FIG. 1B, the first direction is the vertical direction and the second direction is the vertical direction. It corresponds to the horizontal direction. However, the spatial arrangement of each color is the same in the color filter arrangements 100, 110, and 120.

  In particular, the G pixel is a square array in which the pitch is L in both the horizontal and vertical directions in any of the color filter arrays 100, 110, and 120. For this reason, a square lattice arrangement can be realized for the luminance signal, which is extremely useful for image input to a personal computer.

The color filter arrays 100, 110, and 120 have the same spatial arrangement of the respective colors, and both provide the resolution shown in FIG. That is, the color filter arrays 100, 110, and 120 have similar spatial resolution characteristics. In FIG. 2, f _H denotes a horizontal spatial frequency, f _v is the spatial frequency in the vertical direction, respectively. As can be seen from FIG. 2, in any of the color filter arrays 100, 110, and 120, G is resolved to 1 / (2L) in both the horizontal and vertical directions, and up to √2 / (2L) at 45 ° obliquely. I understand that I can do it. R and B have half the resolution of G in the entire space, but a high resolution of 1 / (2L) can be obtained particularly in both the horizontal and vertical directions. That is, it is possible to obtain a well-balanced high resolution for both the luminance signal and the color signal.

  The color filter array 130 shown in FIG. 3A is an example in which only the arrangement of R pixels and B pixels of the color filter array 100 in FIG. In the color filter array 130, only G pixels are arranged in odd-numbered rows (2n-1: indicated by 130a in the figure), and even-numbered rows (2n: indicated by 130b in the figure). R) and B pixels are alternately arranged every other pixel. In each even-numbered row, the arrangement of R pixels and B pixels is equal. The pixel pitch in the first direction is L, and the pixel pitch in the second direction is L / 2.

  Therefore, as shown in FIG. 3B, in the color filter array 130, the spatial resolutions of R and B are high in the vertical direction but low in the horizontal direction.

  A color filter array 140 shown in FIG. 4A is still another example in which only the arrangement of R pixels and B pixels in the color filter array 100 of FIG. In the color filter array 140, only R pixels (n = 2n′−1) or only B pixels (n = 2n ′) are arranged in even-numbered rows (2n: indicated by 140b in the drawing). Yes. However, n 'is a natural number. The pixel pitch in the first direction is L, and the pixel pitch in the second direction is L / 2.

  Therefore, as shown in FIG. 4B, in the color filter array 140, the spatial resolution of R and B is high in the horizontal direction but low in the vertical direction.

  In the above example, the horizontal pitch and the vertical pitch of the G pixels are set equal. The color filter arrays 200, 210, and 220 shown in FIGS. 5 (a), (b), and (c) are respectively the color filter array 100, FIG. 1 (a), (b), and (c). In 110 and 120, the horizontal pitch and the vertical pitch of G pixels are not equal. That is, in the color filter arrays 200 and 220 in FIGS. 5A and 5C, the pixel pitch in the first direction is L, the pixel pitch in the second direction is M / 2, and L> M. In the color filter array 210 of FIG. 5B, the pixel pitch in the first direction is M, the pixel pitch in the second direction is L / 2, and L> M.

5A and 5C, the first direction I is the horizontal direction and the second direction II is the vertical direction. In FIG. 5B, the first direction I is the vertical direction, and the second direction II is the second direction II. Direction II is the horizontal direction. However, the spatial arrangement of each color in the color filter arrays 200, 210, and 220 is the same. In any color filter array, the G pixel has a non-square array in which the horizontal pitch is L, the vertical pitch is M, and L> M.
Example 1
FIG. 6 shows the spatial resolution of each color in the color filter arrays 200, 210, and 220. As shown in FIG. 6, in any of the color filter arrays 200, 210, and 220, G resolves to 1 / (2L) in the horizontal direction and 1 / (2M) in both vertical directions, but L> M Therefore, the horizontal resolution is lower than the vertical resolution. Regarding R and B, the resolution is ½ of G in the entire space, but the same resolution as G can be obtained in both the horizontal and vertical directions.

  When the two-dimensional solid-state imaging device is used for a personal computer or the like, it is desirable that the horizontal resolution is equal to the vertical resolution, but this is not always necessary when used for a video camera or the like. The optimal resolution in the horizontal and vertical directions depends on the configuration method of the entire camera system, and the color filter arrays 200 to 220 shown in FIGS. 5A to 5C or the pixel pitches in the horizontal and vertical directions are reversed to L. It may be advantageous that <M and the horizontal resolution be higher than the vertical resolution.

  In the two-dimensional solid-state imaging device according to the present invention, the pixel array is shifted by ½ pixel in the first direction between the odd-numbered row (2n−1) and the even-numbered row (2n). Yes. Such a pixel arrangement is more easily realized with an XY address type solid-state image pickup device than with a normal CCD type image pickup device.

  FIG. 7 shows an XY address type image pickup device 300 employing the color filter array 100 shown in FIG. As shown in FIG. 7, the image sensor 300 includes a plurality of pixels 1, a vertical drive line 2, a video signal line 3, a vertical scanning circuit 4, a horizontal scanning circuit 5, a selection switch 6, a horizontal signal line 7, an amplifier circuit 8, An output line 9 and a drive signal line 10 are provided.

  Each pixel 1 is labeled g, r, and b corresponding to G, R, and B of the color filter array 100, respectively. A drive signal is applied to the vertical drive line 2 from the vertical scanning circuit 4, and corresponding pixel columns are sequentially driven in the vertical direction via the vertical drive line 2. The video signal of each pixel connected to the vertical drive line 2 to which the drive signal is applied is read out on the corresponding video signal line 3. Each video signal line 3 is connected to a corresponding selection switch 6. The selection switch 6 is driven by a horizontal drive signal supplied from the horizontal scanning circuit 5 via the drive signal line 10, whereby each video signal line 3 is sequentially selected in the horizontal direction, and the selected video signal line 3 is selected. The upper video signal is sequentially guided to the horizontal signal line 7. The video signal on the horizontal signal line 7 is amplified by the amplifier circuit 8 and output through the output line 9.

In the configuration of the image sensor 300 shown in FIG. 7, two pixel columns (g pixel column and rb pixel column) are driven by one vertical drive line 2 and the horizontal drive line 3 is sequentially selected. The video signal on each pixel is sequentially read out in the horizontal direction. That is, as shown in FIG. 8, the video signal of each pixel is read out at a time in a zigzag manner from the two rows of pixel columns 301a and 301b connected to one vertical drive line 2 (read column (FIG. 8)). 1)). Similarly, when a drive signal is given to the next vertical drive line 2, the video signal of each pixel is read out in a zigzag manner from the two pixel columns 301 a ′ and 301 b ′ connected to the vertical drive line 2. (Read column (2) in FIG. 8). In the case of an XY address type image sensor, such a video signal readout method can be handled only by devising signal wiring.
(Example 2)
FIG. 9 shows another XY address image sensor 310 that employs the color filter array 100 shown in FIG. Components similar to those of the image sensor 300 of FIG. 7 are denoted by the same reference numerals. As shown in FIG. 9, the image sensor 310 includes a plurality of pixels 1, a vertical drive line 2, a video signal line 3, a vertical scanning circuit 4, a horizontal scanning circuit 5, a selection switch 6, and a pair of horizontal signal lines 7 (G The signal horizontal signal line 7a and the R / B signal horizontal signal line 7b are collectively referred to as 7). A pair of amplifier circuits 8 (8a for the horizontal signal line 7a and 8b for the horizontal signal line 7b) 8), an output line 9 (G signal output line 9a and R / B signal output line 9b are collectively 9), a drive signal line 10, and a memory element 11. ing. The memory element 11 is provided for each video signal line 3, and a video signal on the video signal line 3 is written in accordance with the sampling pulses φ _A (for G signal) and φ _B (for R / B signal).

Each pixel 1 is labeled g, r, and b corresponding to G, R, and B of the color filter array 100, respectively. One vertical drive line 2 is provided for each pixel column (i to i + 7 are shown in the figure). A drive signal is applied to the vertical drive line 2 from the vertical scanning circuit 4, and corresponding pixel columns are sequentially driven in the vertical direction via the vertical drive line 2. The video signal of each pixel connected to the vertical drive line 2 to which the drive signal is applied is read out on the corresponding video signal line 3. The video signal on the video signal 3 is written into the memory element 11 in accordance with the sampling pulse signals φ _A and φ _B.

  Each memory element 11 is connected to a corresponding horizontal signal line 7 via a selection switch 6. A horizontal drive signal is given to the signal drive line 10 from the horizontal scanning circuit 5. Each signal drive line 10 is connected to two selection switches 6. By driving the selection switches 6 two at a time, the video signals of the pair of memory elements 11 are sequentially read onto the corresponding horizontal signal lines 7a and 7b. The video signals on the horizontal signal lines 7a and 7b are amplified by the corresponding amplifier circuits 8a and 8b, and output as G signals and R / B signals from the corresponding output lines 9a and 9b, respectively.

FIG. 10A shows that data read from the pixel 1 shown in FIG. 9 is output to the output line 9 via the video signal line 3, the memory element 11, the selection switch 6, the horizontal signal line 7, and the amplifier circuit 8. The path to be read is shown. A load MOS transistor 101 for reading is connected to the horizontal signal line 7. As shown in FIG. 10A, the memory element 11 can be constituted by a combination of a sampling element (MOS transistor 12) and a buffer amplifier element (MOS transistor 13), for example. In the memory element 11, a sampling signal (sample clock) φ _S is applied to the gate of the MOS transistor 12, and a DC power supply V _DD is applied to the drain of the MOS transistor 13. Here, the sampling signal φ _S indicates one of the sampling signals φ _A and φ _B.

The data of the pixel 1 is read out to the horizontal signal line 7 through the memory element 11 and the selection switch 6 as follows. As shown in FIGS. 10A and 10B, when a drive signal (S 102) is applied to the vertical drive line 2, a video signal (data) S 103 is read from the pixel 1 onto the video signal line 3. By applying the sampling signal φ _S to the gate of the MOS transistor 12, the video signal S 103 on the video signal line 3 is sampled and applied to the gate of the MOS transistor 13. Since the gate of the MOS transistor 13 is purely a capacitive load, the voltage signal on the signal line 3 ′ is held as it is even after the MOS transistor 12 is turned off (signal S103 ′). The signal S103 ′ is maintained as it is until the next time the MOS transistor 12 becomes conductive (that is, until the next pulse of the sampling signal φ _S is applied). Therefore, the conduction state of the MOS transistor 13 is maintained as it is, and the output from the memory element 11 (signal S103 ″ on the signal line 3 ″) is a direct current from the drain of the MOS transistor 13 as shown in FIG. The voltage V _DD is maintained. In this way, the data read from the pixel 1 is stored in the memory element 11.

  The signal S103 ″ on the signal line 3 ″ (that is, the signal S103 ′ stored in the gate of the MOS transistor 13) is read onto the horizontal signal line 7 when the selection switch 6 is turned on by the horizontal drive signal (S106). . The load MOS transistor 101 (not shown in FIG. 9) is temporarily turned on before the selection switch 6 is turned on, and the potential of the horizontal signal line 7 is cleared (to the ground potential). When the selection switch 6 is turned on after the load MOS transistor 101 is turned off, a signal (S103 ″) corresponding to the data stored in the gate of the MOS transistor 13 is always on the horizontal signal line 4. This is read out as a video signal (S107) In this way, a source follower circuit is formed by the MOS transistor 12 and the load MOS transistor 101.

  As described above, the data stored in the gate of the MOS transistor 13 can be read any number of times by making the selection switch 6 conductive by the drive signal (S106) of the signal drive line 10.

Next, the operation of the image sensor 310 will be described in more detail. FIG. 11 shows the drive timing of the image sensor 310. As shown in FIG. 11, each of the sampling pulse signals φ _A and φ _B has a sampling pulse of 2H cycles (where H represents one horizontal scanning period), and each sampling pulse is Any one of the sampling pulses is output every 1H. Accordingly, the video signal of the pixel 1 connected to the corresponding video signal line is written into the memory element 11 every 2H (that is, rewritten to a new video signal). The video signal written in the memory element 11 is held for 2H until the next video signal is written.

Drive pulse signals S _i , S _{i + 1} , S _{i + 2} ,... Are sequentially output from the vertical scanning circuit 4 onto the corresponding vertical drive lines 2 at intervals of 1H and connected to the respective vertical drive lines. A video signal is read from the pixel 1. The read video signal is written into the corresponding memory element 11 at a predetermined timing according to the corresponding sampling pulse signals φ _A and φ _B.

  The horizontal scanning circuit 5 sequentially scans all the drive signal lines 10 with the horizontal drive signal h within a period of 1H. When one drive signal line 10 is scanned, a corresponding pair of selection switches 6 are simultaneously selected, and video signals held in the corresponding two memory elements 11 are converted into corresponding horizontal signal lines 7a and 7b. Are read simultaneously.

More specifically, the read operation is performed as follows, for example. First, the video signal (i) is written from the pixel 1 on the vertical scanning line 2 (i) to the memory element 11a by the drive pulse signal S _i and the sampling signal φ _A. By sequentially scanning the drive signal line 10 with the horizontal drive signal h during the 1H period, the video data (i) is sequentially read from the memory elements 11a onto the horizontal signal line 7a and output as a G signal. . At the same time, the video signal (i-1) is sequentially read from each memory element 11b onto the horizontal signal line 7b and output as an R / B signal. Here, the video signal (i−1) is a video signal written by the previous drive pulse signal S _i−1 and the sampling signal φ _A.

Next, the video signal (i + 1) is written from the pixel 1 on the vertical scanning line 2 (i + 1) to the memory element 11b by the drive pulse signal S _{i + 1} and the sampling signal φ _B. By sequentially scanning the drive signal line 10 with the horizontal drive signal h during the 1H period, the previous video data (i) is read out again from the respective memory elements 11a onto the horizontal signal line 7a and output as a G signal. Is done. At the same time, the video signal (i + 1) read this time is sequentially read from each memory element 11b onto the horizontal signal line 7b and output as an R / B signal.

  Therefore, the same video signal is repeatedly output as the G signal during the 2H period. That is, the same video signal is output twice each as in (i), (i), (i + 2), (i + 2)..., And the data of the G signal changes in a 2H cycle. Similarly, for the R / B signal, the same video signal is repeatedly output during the 2H period. That is, the same video signal is output twice, such as (i + 1), (i + 1), (i + 3), (i + 3)... And the data of the R / G signal changes in a 2H cycle. The repetition period of the G signal and the R / B signal is shifted by 1H, and the readout columns (1), (1) ′, (2), (2) ′, FIG. As indicated by (3), (3) ′,..., Signals for two adjacent lines are shifted and output by one line every 1H period.

FIG. 12 schematically shows how a video signal is read from the image sensor 310. In FIG. 12, the video signal is read out from the pixel rows of two rows at a time in a zigzag manner at the same time as in the case of reading from the image sensor 300 shown in FIG. However, in the case of the imaging device 310, compared with the imaging device 300, the readout signal sequence (1) ′, between the readout sequences (1), (2), (3), (4),. Since (2) ′, (3) ′,... Are obtained, there is an advantage that the number of vertical scanning lines is substantially doubled. That is, there is an effect of increasing the vertical resolution twice. This is because the same pixel signal is read out twice, which enhances the advantage of the color filter array 100 of FIG. In the above description, the color filter array 100 has been described. However, the same applies to the color filter arrays 110 and 120 shown in FIGS.
(Example 3)
FIG. 13 shows another XY address type image sensor 320 that employs the color filter array 100 shown in FIG. Components similar to those of the image sensor 300 in FIG. 7 and the image sensor 310 in FIG. 9 are denoted by the same reference numerals. As shown in FIG. 13, the imaging device 320 includes a plurality of pixels 1, a vertical drive line 2, a video signal line 3, a vertical scanning circuit 4, a horizontal scanning circuit 5, a selection switch 6, and a pair of horizontal signal lines 7 (G The signal horizontal signal line 7a and the R / B signal horizontal signal line 7b are collectively referred to as 7). A pair of amplifier circuits 8 (8a for horizontal signal line 7a and 8b for horizontal signal line 7b) Output line 9 (G signal output line 9a and R / B signal output line 9b together 9), drive signal line 10, memory element 11, and 1H delay It has a line 14. Memory device 11 is provided for each video signal line 3, the video signal on the video signal line 3 is written in accordance with the sampling pulse phi _A. The 1H delay line 14 is inserted between the amplifier circuit 8b and the output line 9b.

Each pixel 1 is labeled g, r, and b corresponding to G, R, and B of the color filter array 100, respectively. One vertical drive line 2 is provided for two adjacent pixel columns (for example, i and i + 1). A drive signal is applied to the vertical drive line 2 from the vertical scanning circuit 4, and corresponding pixel columns are sequentially driven in the vertical direction by two rows via the vertical drive line 2. The video signal of each pixel connected to the vertical drive line 2 to which the drive signal is applied is read out on the corresponding video signal line 3. The video signal on the video signal signal 3 is written into the memory element 11 in accordance with the sampling pulse signal φ _A.

  Each memory element 11 is connected to one of the corresponding horizontal signal lines 7 a and 7 b via the selection switch 6. A horizontal drive signal is given to the signal drive line 10 from the horizontal scanning circuit 5. Each signal drive line 10 is connected to two selection switches 6. By driving the selection switches 6 two at a time, the video signals of the pair of memory elements 11 are sequentially read onto the corresponding horizontal signal lines 7a and 7b. The video signal on the horizontal signal line 7a is amplified by the amplifier circuit 8a and output as a G signal from the output lines 9a and 9b. The video signal on the horizontal signal line 7b is amplified by the amplifier circuit 8b, delayed by one horizontal period by the 1H delay line, and output as an R / B signal from the output line 9b.

Next, the operation of the image sensor 320 will be described in more detail. FIG. 14 shows the drive timing of the image sensor 320. As shown in FIG. 14, the sampling pulse signal φ _A has a sampling pulse of 2H period. Therefore, the video signal of the pixel 1 connected to the corresponding video signal line 3 is written into the memory element 11 every 2H (that is, rewritten to a new video signal). The video signal written in the memory element 11 is held for 2H until the next video signal is written.

From the vertical scanning circuit 4, a driving pulse signal is given to the vertical driving line 2 every 2H period. With one vertical drive line 2, video signals are simultaneously read out from the pair of pixel columns (that is, odd-numbered G pixel columns and even-numbered R / B pixel columns) onto the corresponding video signal lines 3. The read video signal is written into the corresponding memory element 11 in a 2H cycle according to the sampling pulse signal φ _A.

  The horizontal scanning circuit 5 sequentially scans all the drive signal lines 10 with the horizontal drive signal h within a period of 1H. When one drive signal line 10 is scanned, a corresponding pair of selection switches 6 are simultaneously selected, and video signals held in the corresponding two memory elements 11 are converted into corresponding horizontal signal lines 7a and 7b. Are read simultaneously. At this time, video data (i) is sequentially read out from each memory element 11 corresponding to the G pixel column onto the horizontal signal line 7a (G signal). At the same time, the video signal (i + 1) is sequentially read onto the horizontal signal line 7b from each memory element 11 corresponding to the R / B pixel.

  As described above, the same video signal is repeatedly read from each pixel 1 during the 2H period. That is, the same video signal is output twice on the horizontal signal line 7a like (i), (i), (i + 2), (i + 2)..., And the data changes in a 2H cycle. The signal on the horizontal signal line 7a is amplified by the amplifier circuit 8a and output from the output line 9a as a G signal.

  Similarly, the same video signal is repeatedly output on the horizontal signal line 7b during the 2H period, and the same video as (i + 1), (i + 1), (i + 3), (i + 3). The signal is output twice, and the data changes in a 2H cycle. The R / B signal is amplified by the amplifier circuit 8b and then delayed by 1H by the delay line 14 and output.

  Accordingly, from the two output terminals 9a and 9b, as shown in FIG. 14 by readout columns (1), (1) ′, (2), (2) ′, (3), (3) ′,. In addition, signals of two adjacent lines are output with a shift of one line every 1H period. As described above, the output signals G, R, and B similar to those of the image sensor 310 can be obtained also by the image sensor 320.

  The readout of the video signal from the image sensor 320 is schematically shown in FIG. Also by the image sensor 320, the video signal is read out in a zigzag manner from the two pixel columns at a time. As in the case of the image sensor 310, in the image sensor 320, the read signal sequence (1) ′, (2), between the read sequences (1), (2), (3), (4),. 2) ', (3)', ... are obtained, the number of vertical scanning lines is substantially doubled (that is, the vertical resolution is doubled). This is because the same pixel signal is read out twice, which enhances the advantage of the color filter array 100 in FIG.

In the above description, the color filter array 100 has been described. However, the same applies to the color filter arrays 110 and 120 shown in FIGS. The memory element 11 can be configured in the same manner as described in the second embodiment (FIG. 10A).
(Example 4)
FIG. 15 shows another XY address type image pickup device 330 that employs the color filter array 100 shown in FIG. Components similar to those of the image sensor 310 illustrated in FIG. 9 are denoted by the same reference numerals. As shown in FIG. 15, the image sensor 330 includes a plurality of pixels 1, a vertical drive line 2, a video signal line 3, a vertical scanning circuit 4, a horizontal scanning circuit 5, a selection switch 6, and a plurality of horizontal signal lines 7 (FIG. 15). Is the case of four, 7a-7d are shown), amplifier circuit 8 (8a-8d) and load MOS transistor 101 (101a-101d) provided in each horizontal signal line 7 (7a-7d) In addition, an output line 9 for outputting a signal from each amplifier circuit 8, a drive signal line 10, and memory elements 11 (11a to 11d) are provided. Two memory elements 11 are provided in parallel to each video signal line 3. That is, as shown in FIG. 15, the memory elements 11a and 11c are provided for the video signal line 3 from which the G signal is read, and the memory elements 11b and 11c are provided for the video signal line 3 from which the R and B signals are read. 11d is provided.

Each pixel 1 is labeled g, r, and b corresponding to G, R, and B of the color filter array 100, respectively. One vertical drive line 2 is provided for each pixel column (i to i + 7 are shown in the figure). A drive signal is applied to the vertical drive line 2 from the vertical scanning circuit 4, and corresponding pixel columns are sequentially driven in the vertical direction via the vertical drive line 2. The video signal of each pixel connected to the vertical drive line 2 to which the drive signal is applied is read out on the corresponding video signal line 3. Among the video signals read out on the video signal 3, the G signal is in accordance with the sampling pulse signals [phi] _A and [phi] _C , and the R and B signals are in accordance with the sampling pulse signals [phi] _B and [phi] _D. Written.

Each of the memory elements 11a to 11d is connected to a corresponding horizontal signal line 7a to 7d via a selection switch 6. A horizontal drive signal is given to the signal drive line 10 from the horizontal scanning circuit 5. Each signal drive line 10 is connected to four selection switches 6. By driving the selection switches 6 four by four at the same time, the video signals of the four memory elements 11a to 11d are sequentially read onto the corresponding horizontal signal lines 7a to 7d. The video signals on the horizontal signal lines 7a to 7d are amplified by corresponding amplifier circuits 8a to 8d, and G signals (G ₀ and G ₁ ) and R / B signals ((R / B ) ₁ and (R / B) ₂ ) are output.

FIG. 16 is a timing chart showing a read operation of the XY address type image sensor 330. As shown in FIG. 16, each of the sampling pulse signals φ _{A to} φ _D has a sampling pulse having a 4H cycle (where H represents one horizontal scanning period), and is any one every 1H. Sampling pulses are output. Accordingly, the video signal of the pixel 1 connected to the corresponding video signal line is written to the memory element 11 every 4H, and is rewritten to a new video signal. That is, the video signal written in each memory element 11 is held for 4H until the next video signal is written.

From the vertical scanning circuit 4, drive pulse signals S _i , S _{i + 1} , S _{i + 2} , S _{i + 3} ... Are sequentially applied on the vertical drive lines 2 (i, i + 1, i + 2,. (i + 3,...) and a video signal is read out from each pixel 1 connected to each vertical drive line 2 onto the video signal line 3. The read video signals are written to the corresponding memory elements 11a to 11d at a predetermined timing according to the corresponding sampling pulse signals φ _{A to} φ _D.

  The horizontal scanning circuit 5 sequentially scans all the drive signal lines 10 with the horizontal drive signal h within a period of 1H. When one drive signal line 10 is scanned, the corresponding four selection switches 6 are simultaneously selected, and the video signals held in the corresponding four memory elements 11a to 11d are converted into the corresponding horizontal signal lines 7a to 7a. 7d is read simultaneously.

More specifically, the read operation is performed as follows, for example. As shown in FIG. 16, first, the video signal (i) is written from the pixel 1 on the vertical scanning line 2 (i) to the memory element 11a by the drive pulse signal S _i and the sampling signal φ _A. At this time, the memory element 11b holds the video signal (i-3) written by the driving pulse signal S _i-3 and the sampling signal φ _A before 3H.
Similarly, the video signal (i-2) written 2H before is held in the memory element 11c, and the video signal (i-1) written 1H before is held in the memory element 11d. .

By sequentially scanning the drive signal line 10 with the horizontal drive signal h in the 1H period, video data is simultaneously read from the corresponding memory elements 11 a to 11 d by the selection switch 6 connected to each drive signal line 10. That is, from the memory device 11a is output as G ₀ signal video data (i) is read out onto the horizontal signal line 7a, read out the video signal (i-3) is on the horizontal signal line 7b from the memory element 11b is (R / B) is outputted as a _zero signal, from the memory device 11c is outputted as a G ₁ signal video data (i-2) are read out onto the horizontal signal line 7c, the video signal from the memory device 11d (i -1) is read out on the horizontal signal line 7d and output as (R / B) ₁ signal.

Next, the video signal (i + 1) is written from the pixel 1 on the vertical scanning line 2 (i + 1) to the memory element 11b by the drive pulse signal S _{i + 1} and the sampling signal φ _B. By sequentially scanning the drive signal line 10 with the horizontal drive signal h during this 1H period, the previous video data (i) is read again from the memory element 11a onto the horizontal signal line 7a and output as a _G0 signal. Then, the video signal (i + 1) read this time is sequentially read out from the memory element 11b onto the horizontal signal line 7b and output as the (R / B) ₀ signal. At the same time, from the memory device 11c the previous image data (i-2) is output as subsequently G ₁ signal is read on the horizontal signal line 7c, the video signal from the memory device 11d (i-1) horizontal signal lines 7d is read out and subsequently output as (R / B) ₁ signal.

Therefore, the same video signal is repeatedly output as the G ₀ signal during the 4H period. That is, the same video signal is output four times like (i), (i), (i), (i), (i + 4), (i + 4), (i + 4), (i + 4). The data of the G ₀ signal changes in a 4H cycle. Similarly, the same video signal is repeatedly output during the 4H period for the G ₁ signal, the (R / B) ₀ signal, and the (R / B) ₁ signal. The repetition periods of the G ₀ signal, the G ₁ signal, the (R / B) ₀ signal, and the (R / B) ₁ signal are 4H and shifted by 1H, respectively. Accordingly, as shown in FIG. 16, signals from four adjacent lines are shifted from the four output terminals 9a to 9d by one line every 1H period and output. This facilitates signal processing between the upper and lower four pixels, and is useful for color signal processing, image compression processing, and the like.

  The memory element 11 can be configured in the same manner as described in the second embodiment (FIG. 10A).

(A)-(c) is a figure which shows the example of the color filter arrangement | sequence of the two-dimensional solid-state imaging device by this invention, respectively, and shows the case where the pitch of G pixel is equal in the 1st direction and the 2nd direction. FIG. It is a figure which shows the spatial resolution characteristic by the color filter arrangement | sequence shown by Fig.1 (a)-(c). (A) is a figure which shows an example of the color filter arrangement | sequence of the two-dimensional solid-state imaging device by this invention, (b) is a figure which shows the spatial resolution characteristic by the color filter arrangement | sequence shown to (a). (A) is a figure which shows another example of the color filter arrangement | sequence of the two-dimensional solid-state imaging device by this invention, (b) is a figure which shows the spatial resolution characteristic by the color filter arrangement | sequence shown to (a). . (A)-(c) is a figure which shows another example of the color filter arrangement | sequence of the two-dimensional solid-state imaging device by this invention, respectively, and the pitch of G pixel of a 1st direction and a 2nd direction differs Shows the case. It is a figure which shows the spatial resolution characteristic by the color filter arrangement | sequence shown by Fig.5 (a)-(c). It is a figure which shows typically an example of the circuit structure of the two-dimensional solid-state imaging device by this invention. It is a figure which illustrates typically signal reading in the two-dimensional solid-state imaging device shown in FIG. It is a figure which shows typically another example of the circuit structure of the two-dimensional solid-state imaging device by this invention. (A) is a figure which shows the structural example of a memory element, (b) is a timing chart which shows the read-out operation from a memory element. 10 is a timing chart for explaining a reading operation of the two-dimensional solid-state imaging device shown in FIG. 9. It is a figure which illustrates typically signal reading in the two-dimensional solid-state imaging device shown in FIG. It is a figure which shows typically another example of the circuit structure of the two-dimensional solid-state imaging device by this invention. It is a timing chart explaining the read-out operation | movement of the two-dimensional solid-state imaging device shown in FIG. It is a figure which shows typically another example of the circuit structure of the two-dimensional solid-state image sensor by this invention. 16 is a timing chart for explaining a reading operation of the two-dimensional solid-state imaging device shown in FIG. It is a figure which shows an example of the color filter arrangement | sequence of the conventional two-dimensional solid-state imaging device. It is a figure which shows another example of the color filter arrangement | sequence of the conventional two-dimensional solid-state imaging device. It is a figure which shows another example of the color filter arrangement | sequence of the conventional two-dimensional solid-state imaging device.

Explanation of symbols

Reference Signs List 1 pixel 2 vertical drive line 3 video signal line 4 vertical scanning circuit 5 horizontal scanning circuit 6 selection switch 7 horizontal signal line 8 amplifier circuit 9 output signal line 100 color filter array 300 two-dimensional solid-state imaging device

Claims (7)

A solid-state imaging device having a plurality of pixels that perform photoelectric conversion arranged in a matrix and a color filter that is arranged corresponding to the plurality of pixels,
The plurality of pixels are arranged at a pitch L along a first direction to form a row, and each row is arranged at a pitch L / 2 along a second direction orthogonal to the first direction;
The first row and the second row are alternately arranged in the second direction;
Each pixel in each second row is arranged shifted in the first direction by L / 2 with respect to each corresponding pixel in the first row,
The color filter includes a first filter arranged corresponding to the pixels arranged in the first row, and a second filter arranged corresponding to every other pixel arranged in the second row. A third filter arranged corresponding to the remaining pixels in the second row,
The second filter and the third filter have different spectral characteristics, and are alternately arranged in the second direction,
The color solid-state imaging device, wherein the first filter is different from the second filter and the third filter in spectral spectral characteristics and is a filter for obtaining a luminance signal. The second filter is a red filter, the third filter is a blue filter, a color solid-state imaging device according to claim 1.   Video signals are alternately switched along the first direction from all pixels in the second row and all pixels in the first row adjacent to the second row in the second direction. 3. The color solid-state imaging device according to claim 1, wherein video signals of all pixels are read out by repeating the reading operation in the second direction in order.   Video signals are alternately switched along the first direction from all pixels in the first row and all pixels in the second row adjacent to the first row in the second direction. Read from the second row, all pixels in the first row adjacent to the second row in the second direction, and all pixels in the second row along the first direction. The color solid-state imaging device according to claim 1, wherein the video signals of all the pixels are read by sequentially repeating the operation of alternately reading the video signals in the second direction. Each pixel in the first row and each pixel shifted in the second direction with respect to each pixel in a second row adjacent to the first row in the second direction The first driving lines are alternately connected to one first driving line, and each first driving line is sequentially scanned by the first scanning circuit,
4. The pixel according to claim 3, wherein each pixel along the second direction is connected to one second drive line, and each second drive line is sequentially scanned by the second scanning circuit. Color solid-state imaging device. Each pixel in each row along the first direction is connected to one first drive line, and each first drive line is sequentially scanned by the first scanning circuit,
Each pixel along the second direction is connected to one second drive line, a memory element is connected to each second drive line, and each memory element is a second scanning circuit. Are scanned in order by
The color solid-state imaging device according to claim 4, wherein the same video signal of one pixel held in each memory element is read at least twice by the first and second scanning circuits. Timing at which video signals of different pixels are output from the memory elements connected to the first row, and timing at which video signals of different pixels are output from the memory elements connected to the second row And the color solid-state imaging device according to claim 6.

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