JP3983521B2 - Semiconductor device and IC card - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and an IC card having a mechanism capable of storing data therein and preventing leakage of the internal data.
[0002]
[Prior art]
A semiconductor device having a storage means capable of storing data therein can incorporate an encryption device such as a CPU, and at the same time the encryption key itself can be stored inside, so that it is difficult to read secret information from the outside. It is possible to make a storage device with high security.
[0003]
IC cards using such high-security semiconductor devices are expanding the range of practical use to authentication and electronic money.
[0004]
However, as one of the unauthorized use (tamper) to illegally extract data from such a device, the semiconductor device from outside, such as high voltage, low voltage, high frequency, low frequency, high temperature, low temperature, etc. out of specification There is a cryptographic analysis technique in which encrypted information is inferred by causing a circuit to malfunction by giving a physical condition deviating from the conditions normally used, and accumulating and analyzing the output obtained as a result of the malfunction. . In order to store highly confidential data such as authentication data with high confidentiality inside, it is a big problem to protect the internal data from this cryptographic analysis technology.
[0005]
In order to solve this problem, Japanese Patent Laid-Open No. 10-154976 proposes a method for detecting a malfunction of a cryptographic device. In other words, the same processing as the data conversion processing accompanying encryption is performed, whether the obtained results match each other, or whether the data conversion processing is subjected to the reverse conversion processing to match the data before conversion If a malfunction is detected, the data conversion process result is regulated so that data reflecting internal information is not output to the outside. By doing so, the internal data is protected from the cryptographic analysis technique based on the malfunction result.
[0006]
[Problems to be solved by the invention]
Conventionally, the protection technology from cryptanalysis has been mainly aimed at preventing data eavesdropping during communication, and the data itself is protected, but the data storage device itself has not been protected.
[0007]
In other words, the storage device itself malfunctions, and the output obtained as a result of the malfunction is stored and analyzed, so that it is vulnerable to cryptographic analysis technology that estimates confidential information.
[0008]
In the technique described in Japanese Patent Laid-Open No. 10-154976, which is a countermeasure technique against such a cryptographic analysis technique, a data conversion process is executed a plurality of times for detecting a malfunction, or a processing time required for performing a plurality of times is shortened. Pipelined parallel operation is performed. However, if processing is performed a plurality of times, the processing time becomes long, and there is a disadvantage that the circuit scale must be increased in order to perform parallel operation.
[0009]
  The present invention has been made in view of the above problems, and its purpose is as follows.An object of the present invention is to provide a semiconductor device and an IC card that can simplify a detection circuit while ensuring high security. Also,A simple circuit that not only decrypts but also causes the circuit to malfunction by giving physical conditions that deviate from normal use conditions such as high voltage, low voltage, high frequency, low frequency, high temperature, low temperature, etc. An object of the present invention is to provide a semiconductor device and an IC card that can prevent internal data leakage and tampering.
[0010]
[Means for Solving the Problems]
  In order to solve the above problems, the semiconductor device of the present invention has a storage means capable of holding data therein.When,Input the output result of the non-specification physical condition detection circuit that detects that the physical condition given to the device exceeds the predetermined specification range, and the output result of the physical specification detection circuit outside the above specification, and output the data inside the device. Semiconductor device having protection control circuit for outputting control signal to be prohibitedBecauseThe physical condition detection circuit outside the above specifications isPhysical conditions aboveIs within a predetermined range, a phase synchronization circuit that outputs a clock signal of a predetermined frequency, a seventh counter that counts the output of the phase synchronization circuit, and a clock used for circuit operation An eighth counter for counting signals and a comparison circuit for comparing the outputs of the seventh and eighth countersWhenThe comparison circuit includes the seventh and eighth counters.If you are out of rangeIt is characterized by outputting a detection signal.
[0011]
  The above configurationAs described above, by using the PLL, it is possible to realize detection of three conditions of frequency, voltage, and temperature out of specification with one circuit. Therefore, it is possible to provide a semiconductor device and an IC card that can simplify the detection circuit while ensuring high security. Also,When it is detected that a physical condition given to the semiconductor device exceeds a predetermined specification range, a control signal for prohibiting the output of data inside the semiconductor device is output. Therefore, the result of malfunction caused by malfunction of the internal circuit given the condition outside the specification (for example, high voltage, low voltage, high frequency, low frequency, high temperature, low temperature) for the purpose of internal data leakage or falsification By accumulating and analyzing the resulting output, it is possible to prevent internal data leakage and tampering by stopping the circuit operation against unauthorized use using cryptographic analysis technology that infers encrypted information. it can.
[0012]
Further, in the semiconductor device of the present invention, in addition to the above configuration, the non-specification physical condition detection circuit detects that the frequency of the input clock signal is out of a predetermined frequency range. It is characterized by.
[0013]
With the above configuration, it is detected that the frequency of the input clock signal is out of the predetermined frequency range (specification range). Therefore, it is possible to detect an attempt to move at a frequency outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0014]
In the semiconductor device of the present invention, in addition to the above configuration, the non-specification physical condition detection circuit counts a first oscillation circuit that outputs a clock signal having a reference frequency and an output of the first oscillation circuit. A first counter that counts a clock signal used for circuit operation, and a first comparison circuit that compares the outputs of the first and second counters. The comparison circuit outputs a detection signal when the difference between the count values of the outputs of the first and second counters is out of a predetermined range.
[0015]
With the above-described configuration, an oscillation circuit that generates a reference clock (reference clock) having a frequency defined in the specification is provided inside. Furthermore, by comparing the frequency of the clock signal input from the outside (or the clock signal generated from an RF (Radio Frequency) circuit, etc. when receiving power and signals without contact by electromagnetic waves) and this reference clock, Whether the input clock signal is within the specification or not is determined. Therefore, it is possible to detect an attempt to move at a frequency outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0016]
In addition to the above configuration, the semiconductor device of the present invention is characterized in that the out-of-specification physical condition detection circuit detects that an input power supply voltage is out of a predetermined voltage range. It is said.
[0017]
With the above configuration, it is detected that the input power supply voltage is out of a predetermined voltage range (specification range). Therefore, it is possible to detect an attempt to operate with a power supply voltage outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0018]
In addition to the above configuration, the non-specification physical condition detection circuit includes a second oscillation circuit whose frequency changes depending on a voltage value, and an output of the second oscillation circuit. A third counter that counts a clock signal used for circuit operation, and a second comparison circuit that compares the outputs of the third and fourth counters. The second comparison circuit outputs a detection signal when the difference between the count values of the outputs of the third and fourth counters is out of a predetermined range.
[0019]
With the above-described configuration, a voltage detection oscillation circuit that generates a reference clock having a frequency determined by the specification when the voltage is determined by the specification is included. The oscillation frequency of the oscillation circuit varies depending on the applied voltage. This oscillation circuit can be realized by a simple circuit such as a VCO (Voltage Controlled Oscillator). And a clock signal input from the outside with a predetermined frequency defined in the specification (or a clock signal generated from an RF (Radio Frequency) circuit or the like when receiving power and signals in a non-contact manner by electromagnetic waves) And the voltage detection reference clock, it is determined whether the voltage applied to the circuit is within the specification or not. Therefore, it is possible to detect an attempt to operate with a power supply voltage outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0020]
In addition to the above configuration, the semiconductor device of the present invention is characterized in that the out-of-specification physical condition detection circuit detects that the temperature of the semiconductor device is out of a predetermined temperature range. Yes.
[0021]
With the above configuration, it is detected that the temperature of the semiconductor device is outside a predetermined temperature range (specification range). Therefore, it is possible to detect that an attempt is made to move at a temperature outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0022]
In addition to the above-described configuration, the semiconductor device according to the present invention includes a non-specification physical condition detection circuit that outputs a third oscillation circuit whose frequency changes depending on temperature and an output of the third oscillation circuit. A fifth counter for counting, a sixth counter for counting clock signals used for circuit operation, and a third comparison circuit for comparing the outputs of the fifth and sixth counters. The comparison circuit 3 outputs a detection signal when the difference between the count values of the outputs of the fifth and sixth counters deviates from a predetermined range.
[0023]
With the above-described configuration, a temperature detection oscillation circuit that generates a reference clock having a frequency determined by the specification at a temperature determined by the specification is provided. The oscillation frequency of the oscillation circuit varies depending on the ambient temperature of the semiconductor device. This oscillation circuit can be realized by a simple circuit such as a VCO (Voltage Controlled Oscillator). And a clock signal input from the outside with a predetermined frequency defined in the specification (or a clock signal generated from an RF (Radio Frequency) circuit or the like when receiving power and signals in a non-contact manner by electromagnetic waves) And the temperature detection reference clock are used to determine whether the ambient temperature around the semiconductor device is within the specification or not. Therefore, it is possible to detect that an attempt is made to move at a temperature outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0024]
In addition to the above-described configuration, the semiconductor device according to the present invention may be configured such that the non-specification physical condition detection circuit includes any two or more of a frequency of an input clock signal, a given power supply voltage, or its own temperature. A value is compared with each of the predetermined ranges described above, and it is detected that at least one is outside the predetermined range.
[0025]
With the configuration described above, the values of any two or more of the frequency of the input clock signal, the applied power supply voltage, or the temperature of the semiconductor device itself are compared with the respective predetermined ranges (specification ranges), and at least one Is detected to be outside its predetermined range. Therefore, it is possible to detect an attempt to move at a frequency, power supply voltage or temperature outside the specification. Therefore, in addition to the effects of the above-described configuration, data leakage due to malfunction can be prevented with a simple configuration.
[0026]
In addition to the above configuration, the semiconductor device according to the present invention may be configured such that the out-of-specification physical condition detection circuit is outside a predetermined range for any two or more of the frequency, power supply voltage, and temperature of the clock signal. It is characterized by the fact that it is detected by the same circuit.
[0027]
With the above configuration, any two or more of the detection means for detecting the frequency, power supply voltage, or temperature of the clock signal are shared by the same circuit. Therefore, by realizing two or more functions of voltage detection, frequency detection, and temperature detection with one circuit, the scale of the circuit for fraud detection can be reduced. Therefore, in addition to the effects of the above configuration, fraud can be detected with the minimum necessary circuit.
[0028]
In addition to the above-described configuration, the semiconductor device according to the present invention has a non-specification physical condition detection circuit that outputs a clock signal having a predetermined frequency if the voltage and temperature are within a predetermined range. A phase synchronization circuit for outputting, a seventh counter for counting the output of the phase synchronization circuit, an eighth counter for counting a clock signal used for circuit operation, and each of the seventh and eighth counters It comprises a fourth comparison circuit for comparing outputs, wherein the fourth comparison circuit outputs a detection signal when the phase difference between the outputs of the seventh and eighth counters exceeds a predetermined value. Yes.
[0029]
With the above configuration, a phase synchronization circuit (PLL) is provided as a detection circuit for physical conditions out of specification. The PLL has a function of locking an external clock signal input. The range in which the PLL can be locked depends on voltage and temperature. Therefore, in addition to the effect of the above configuration, it is possible to accurately detect a voltage and temperature outside the specification.
[0030]
Furthermore, it is possible to detect out-of-specification frequencies by utilizing the property of locking only to a certain frequency. That is, by using the PLL, it is possible to realize three condition detections of frequency, voltage, and temperature out of specification with one circuit. Therefore, in addition to the effects of the above configuration, the detection circuit can be simplified while ensuring high security.
[0031]
In addition to the above configuration, the semiconductor device of the present invention is characterized in that the protection control circuit cuts off the power supply by the input of a detection signal from the non-specific physical condition detection circuit.
[0032]
With the above configuration, the protection control circuit cuts off the power supply by the input of the detection signal from the non-specification physical condition detection circuit. Therefore, when a physical condition outside the specification is detected, the circuit operation is stopped by shutting off the power supply. Therefore, in addition to the effects of the above configuration, by shutting down the power supply, it is possible to prevent destruction of internal data and access to illegal internal data due to malfunction.
[0033]
In addition to the above-described configuration, the semiconductor device of the present invention is characterized in that the protection control circuit blocks a clock signal input from the outside in response to an input of a detection signal from the non-specific physical condition detection circuit. It is said.
[0034]
With the above configuration, the protection control circuit blocks the clock signal input from the outside in response to the input of the detection signal from the non-specification physical condition detection circuit. Therefore, when a physical condition outside the specification is detected, the operation of the circuit can be stopped by cutting off the clock. Therefore, in addition to the effects of the above-described configuration, the operation of the semiconductor circuit is controlled by the clock. Therefore, the interruption of the clock can prevent destruction of internal data due to malfunction and access to illegal internal data.
[0035]
The semiconductor device of the present invention is characterized in that, in addition to the above configuration, the protection control circuit fixes the semiconductor device to a specific state by inputting a detection signal from the non-specific physical condition detection circuit. Yes.
[0036]
With the above configuration, the protection control circuit fixes the semiconductor device in a reset state or the like to a specific state by inputting a detection signal from the non-specification physical condition detection circuit. Therefore, when a physical condition outside the specification is detected, the inside can be fixed to a certain state such as a reset state. Therefore, in addition to the effects of the above configuration, by fixing the internal state and preventing it from moving, it is possible to prevent destruction of internal data and access to illegal internal data due to malfunction.
[0037]
In addition to the above-described configuration, the semiconductor device of the present invention stores a nonvolatile history storing information indicating a history in which a physical condition exceeding the specification range is given by an output of the non-specification physical condition detection circuit. It has a memory means.
[0038]
With the technology described in the above-mentioned Japanese Patent Application Laid-Open No. 10-154976, even if data is leaked by an illegal method, there is no clue to know it, and no countermeasures against data leak can be taken.
[0039]
On the other hand, according to the configuration of the present invention, in addition to preventing leakage and falsification of internal data due to a malfunction, when the internal data is further analyzed, a history of the analysis action can be left. Therefore, in addition to the effects of the above configuration, by referring to this history, it is considered that there is a possibility that information to be protected has been analyzed and information has been leaked. It is possible to cope with changes.
[0040]
In addition to the above configuration, the semiconductor device of the present invention is characterized in that the history storage means is provided in the storage means for holding data incorporated in the semiconductor device.
[0041]
With the above configuration, the history storage means is provided in the storage means for holding data incorporated in the semiconductor device. Therefore, since history information indicating that the data to be protected has been analyzed is provided in the storage means for data retention, data is leaked by unauthorized means by analysis and a counterfeit product is created based on the data Even if this is done, the history information is also leaked, so that it becomes clear that the data is illegal. Therefore, in addition to the effects of the above-described configuration, it can be used as a means for preventing unauthorized use by imitations, and higher security can be realized.
[0042]
In addition to the above configuration, the semiconductor device of the present invention is characterized in that the history storage means is irreversible in changing the stored contents.
[0043]
With the above configuration, the history storage means is irreversible for changing the stored contents. As the history storage means, for example, cutting of a fused fuse, physical damage to an insulating film, etc. can be employed. Therefore, by using irreversible history storage means, once the history is recorded, it becomes impossible to delete the information. Therefore, it becomes impossible to perform data analysis without leaving a trace that the act has been performed. Therefore, in addition to the effects of the above-described configuration, it is possible to obtain a deterrent effect against an illegal data analysis act and to surely discover the act.
[0044]
The IC card of the present invention is characterized by using the semiconductor device having the above-described configuration.
[0045]
With the above configuration, an IC card incorporating a function for protecting physical data outside the specification and protecting internal data at the time of detection can be obtained. Therefore, by applying physical conditions that deviate from normal use conditions such as high voltage, low voltage, high frequency, low frequency, high temperature, low temperature, etc. that are out of specification, the circuit malfunctions and the output obtained as a result of malfunction is accumulated. By analyzing, it has high tamper resistance against the analysis technology of secret data. Therefore, even if confidential data is leaked by an unauthorized analysis means, it is possible to keep a history of the data, so that unauthorized use can be prevented, and an extremely high security IC card can be provided. .
[0046]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described with reference to FIGS. 1 to 17 as follows. FIG. 1 shows a configuration example of a semiconductor device according to this embodiment. The semiconductor device 100 includes an internal circuit 110, an out-of-spec physical condition detection circuit 120, a protection control circuit 130, an external communication terminal group 140, and other terminal groups 150. Preferably, the internal circuit 110 includes a communication circuit 112, a CPU (central control unit) 114, an encryption circuit 116, and a memory 118.
[0047]
The semiconductor device 100 exchanges data with an external device using the external communication terminal group 140 or the like. In order to prevent eavesdropping, this data is preferably encrypted, and the encrypted data received by the communication circuit 112 is decrypted by the encryption circuit 116. The CPU 114 performs processing along the decrypted data. The memory 118 may store a program executed by the CPU 114, or may be used as a storage area for encryption key information or confidential data using a nonvolatile memory or the like. The non-specification physical condition detection circuit 120 monitors physical conditions such as power supply voltage, clock input frequency, and ambient temperature. If these physical conditions deviate from the range defined in the specification, the protection control circuit A signal is sent to 130. When the protection control circuit 130 receives a signal out of the physical condition specification from the out-of-specification physical condition detection circuit 120, the protection control circuit 130 determines that normal operation cannot be guaranteed, and sends a control signal L10 to the internal circuit 110. The control signal L10 is used for control for protecting data in the memory 118 and stopping the operation of the internal circuit 110.
[0048]
As shown in FIG. 2, the out-of-specification physical condition detection circuit 120 includes one or more of a frequency detection circuit 202, a voltage detection circuit 204, and a temperature detection circuit 206. The frequency detection circuit 202 detects whether the frequency of the input clock is within a range defined in the specification. The voltage detection circuit 204 monitors the input voltage and detects whether it is within a range defined in the specification. The temperature detection circuit 206 monitors the ambient temperature of the semiconductor device and detects whether it is within a range defined in the specification.
[0049]
FIG. 3 shows a circuit configuration example of the frequency detection circuit 202. The frequency detection comparison frequency generation circuit (first oscillation circuit) 308 is designed to the frequency specification value of this semiconductor device. A counter A (second counter) 302 and a counter B (first counter) 304 respectively count an external clock input and a clock oscillated by the frequency detection comparison frequency generation circuit 308, and the value of the counter Is evaluated by a comparison circuit (first comparison circuit) 306. This comparison circuit can be constituted by a known circuit including the comparison circuits in FIG. 3 and later-described FIG. 4, FIG. 5, FIG. 6, and FIG. If the externally input clock has the same frequency as the specification, the difference between the value of counter A and the value of counter B is constant. Even if there is some jitter, the difference between the values of the counter A and the counter B is constant on average.
[0050]
The comparison circuit 306 issues a detection signal on the assumption that a frequency outside the specification has been input when the variation in the difference between the count values greatly changes. Specifically, the counters A and B are 4 bits. The initial values of the counter A and the counter B are set so that the absolute value of the difference is, for example, 8. During normal operation, even if there is some jitter, the absolute value of the difference between the counter values converges to 8. However, if the frequency is significantly different, the difference does not converge to a constant value, but takes a random value. Eventually, the difference may be 4 or less. At this time, it is detected that a frequency outside the specification is input.
[0051]
Here, as described above, the absolute value of the difference between the initial values is set to 8, and it is detected when it is 4 or less. However, the present invention is not limited to this, and whether or not a predetermined range (specification range) has been deviated. What is necessary is just to detect. For example, the absolute value of the difference between the initial values may be set to 0, and it may be detected when the difference is 3 or more. The same applies to detection based on voltage and detection based on temperature, which will be described later.
[0052]
FIG. 4 shows a circuit configuration example of the voltage detection circuit 204. The voltage detection comparison frequency generation circuit (second oscillation circuit) 408 has voltage characteristics, and is designed to oscillate at the same frequency as the externally input clock defined in the specification with a voltage within the specification range. ing. A counter A (fourth counter) 402 and a counter B (third counter) 404 respectively count the external clock input and the clock oscillated by the voltage detection comparison frequency generation circuit 408, and the value of this counter Is evaluated by a comparison circuit (second comparison circuit) 406. If a voltage outside the specification is applied as the clock signal, a phase difference from the clock input from the outside occurs due to the voltage characteristics of the voltage detection comparison frequency generation circuit 408. As a result, the difference between the count values of the counter outputs deviates from a predetermined range (specification range).
[0053]
The comparison circuit 406 generates a detection signal on the assumption that a voltage outside the specification is applied when the variation in the difference between the count values changes greatly. Specifically, the counters A and B are 4 bits. The initial values of the counter A and the counter B are set so that the absolute value of the difference is, for example, 8. During normal operation, even if there is some jitter, the absolute value of the difference between the counter values converges to 8. However, if the frequency is significantly different, the difference does not converge to a constant value, but takes a random value. Eventually, the difference may be 4 or less. At this time, it is detected that a voltage outside the specification is applied.
[0054]
FIG. 5 shows a circuit configuration example of the temperature detection circuit 206. The temperature detection comparison frequency generation circuit (third oscillation circuit) 508 has temperature characteristics and is designed to oscillate at the same frequency as the externally input clock defined in the specification at a temperature within the specification range. ing. The counter A (sixth counter) 502 and the counter B (fifth counter) 504 respectively count the external clock input and the clock oscillated by the temperature detection comparison frequency generation circuit 508, and the value of this counter Is evaluated by a comparison circuit (third comparison circuit) 506. If it is operated at a temperature outside the specification, a phase difference from the clock input from the outside occurs due to the temperature characteristics of the temperature detection comparison frequency generation circuit 508. As a result, the difference between the count values of the counter outputs deviates from a predetermined range (specification range).
[0055]
The comparison circuit 506 issues a detection signal that the temperature is out of specification when the variation in the difference between the count values changes greatly. Specifically, the counters A and B are 4 bits. The initial values of the counter A and the counter B are set so that the absolute value of the difference is, for example, 8. During normal operation, even if there is some jitter, the absolute value of the difference between the counter values converges to 8. However, if the frequency is significantly different, the difference does not converge to a constant value, but takes a random value. Eventually, the difference may be 4 or less. This time is detected as a temperature outside the specification.
[0056]
FIG. 6 shows an example of a circuit configuration of a composite non-specification physical condition detection circuit that can perform frequency detection, voltage detection, and temperature detection with a single circuit. The frequency generated by the physical condition detection frequency generation circuit 608 has voltage characteristics and temperature characteristics, and oscillates at the same frequency as the externally input clock specified in the specifications at the voltage and temperature within the specification range. Designed to. The counter A (eighth counter) 602 and the counter B (seventh counter) 604 respectively count the clock input from the outside and the clock oscillated by the physical condition detection frequency generation circuit 608, and the value of this counter Is evaluated by a comparison circuit (fourth comparison circuit) 606. If it is operated at a frequency, power supply voltage, or temperature outside the specifications, there is a difference in the phase from the clock input from the outside due to the voltage characteristics and temperature characteristics of the frequency generated by the physical condition detection frequency generation circuit 608. Arise. As a result, the difference between the count values of the counter outputs deviates from a predetermined range (specification range).
[0057]
The comparison circuit 606 issues a detection signal that the physical condition is out of specification when the variation in the difference in the count value changes greatly. Specifically, the counters A and B are 4 bits. The initial values of the counter A and the counter B are set so that the absolute value of the difference is, for example, 8. During normal operation, even if there is some jitter, the absolute value of the difference between the counter values converges to 8. However, if the frequency is significantly different, the difference does not converge to a constant value, but takes a random value. Eventually, the difference may be 4 or less. This time is detected as a physical condition out of specification.
[0058]
FIG. 7 shows a desirable voltage characteristic of the physical condition detection frequency generation circuit 608. It oscillates at a fixed period when the voltage is within the specification range, and oscillates at a period depending on the voltage when the voltage is outside the specification range. For example, as shown in the figure, the frequency maintains a constant value fosc from the voltage Vmin to Vmax (specification range).
[0059]
FIG. 8 shows desirable temperature characteristics of the physical condition detection frequency generation circuit 608. It oscillates at a fixed period at temperatures within the specified range, and oscillates at a temperature-dependent period at temperatures outside the specification range. For example, as shown in the figure, the frequency maintains a constant value fosc from the temperature Tmin to Tmax (specification range).
[0060]
FIG. 9 shows an internal circuit example of the physical condition detection frequency generation circuit 608 having such characteristics. In other words, the phase comparator 702, the LPF (low-pass filter) 704, the frequency divider 706, and the VCO (voltage controlled oscillation circuit) 708 are configured. The VCO 708 has voltage characteristics and temperature characteristics. If the voltage and temperature are within the specification range, a clock having a frequency defined in the specifications oscillates. The circuit configuration of the physical condition detection frequency generation circuit 608 shown in the figure is generally known as a PLL (Phase Locked Loop). A clock for comparison is generated by locking an external clock with a PLL.
[0061]
FIG. 10 shows a range in which the PLL can be locked. If the input clock is designed within a lockable range, when a frequency outside the specification is input, the lock is released and the input frequency outside the specification can be detected with high accuracy. Moreover, since the lockable range of the PLL shifts even when the input voltage changes, it is possible to accurately detect that a voltage shifted to a range outside the specification is applied. Similarly, when the temperature changes, the lockable range fluctuates. Therefore, when the temperature deviates outside the specification, it can be accurately detected that the temperature is out of the specification range.
[0062]
Only by providing the same or only one physical condition detection frequency generating circuit 608 as shown in FIG. 9, the non-specification physical condition detection circuit 120 can detect the frequency of the input clock signal, the supplied power supply voltage, and the semiconductor device. It is possible to detect whether or not the temperature is outside a predetermined specification range.
[0063]
Next, FIG. 11 shows one circuit example of the protection control circuit 130. By controlling the power supply with the detection signal output from the non-specification physical condition detection circuit 120, if it is detected that the specification is out of specification, the power supply to the internal circuit 110 is shut off. By shutting off the power supply, countermeasures against tampering such as malfunction and output signal observation can be taken.
[0064]
FIG. 12 shows another circuit example of the protection control circuit 130. By controlling the clock with a detection signal output from the non-specification physical condition detection circuit 120, if it is detected that the specification is out of specification, the operation clock of the internal circuit 110 is stopped. By stopping the clock, countermeasures against tampering such as malfunction and output signal observation can be taken.
[0065]
FIG. 13 shows another circuit example of the protection control circuit 130. By fixing the internal operation mode by the detection signal output from the non-specification physical condition detection circuit 120 (for example, resetting), the operation of the internal circuit 110 is stopped if it is detected that the specification is out of specification. . By fixing the operation in a reset state such as a reset state, countermeasures against tampering such as malfunction and output signal observation can be taken.
[0066]
As described above, the means for detecting a physical condition out of the specification range and the preventive means for the analysis when it is detected have been described in detail. However, the non-volatile memory that leaves a history that the physical condition as described above is given. By further providing means (history storage means), it becomes possible to know the possibility of leakage of data to be protected, and it is possible to take measures against data leakage such as changing secret information that can be changed such as password data. It becomes possible.
[0067]
FIG. 14 shows a circuit example for realizing the history function of the protection control circuit 130. By recording the detection signal output from the non-specification physical condition detection circuit 120 in the non-volatile storage element (history storage unit), it is possible to leave a history that the non-specification physical condition is given. When a flash memory is used as an example of the nonvolatile memory element, data is usually 1 because nothing is written. When a physical condition outside the specification is detected, 0 is written. By giving the value of this storage element to the external communication terminal group 140, it is possible to easily know the possibility of unauthorized use. This memory element can be made to have no means for erasing or writing from the CPU 114. By doing so, even if the CPU 114 malfunctions, the history is not destroyed.
[0068]
In the example of FIG. 14, history information indicating that a physical condition outside the specification is given is provided in the protection control circuit 130. However, a storage area (history storage means) of this history information may be provided in the built-in memory 118. . In this case, for example, in response to the detection signal output from the non-specification physical condition detection circuit 120, the protection control circuit 130 writes the data of a specific bit pattern to an area not used for normal data holding in the memory 118. Should be generated. Thereby, even if data is leaked by an unauthorized means, the history information is also leaked at the same time. Therefore, if a counterfeit product is created and used using illegally acquired data, it is possible to determine that it is unauthorized use. As a result, it is possible to provide a means for preventing unauthorized use.
[0069]
In FIG. 14, the flash memory is used as the nonvolatile memory element that retains the history. However, as this nonvolatile memory element, irreversible storage means that information cannot be erased once information is recorded. By using (history storage means), it becomes possible to know the possibility of data leakage more reliably, and it also becomes a deterrent against illegal data analysis acts. For example, as the nonvolatile memory element in FIG. 14, a melt fuse that generates a high resistance bus or a capacitor that generates a direct current path by breaking an insulating film when a high electric field is applied is provided in the semiconductor device. It is conceivable to detect a change in the current value or to visually inspect the peeled semiconductor chip.
[0070]
Note that the flash memory, the fused fuse, the capacitor, and the like shown here are merely examples, and are not limited to these means and methods as long as they meet the above-described purpose. Alternatively, the detection signal may be branched to provide all of the configurations shown in FIGS.
[0071]
FIG. 15 shows another configuration example of the frequency detection circuit 202. The clock signal is input to the band-pass filter 804 and then output as a detection signal that becomes “always high” via the rectifier diode 806. By passing this output signal through an inverter (not shown), an “always low” signal can be output. Therefore, if the frequency range that the band-pass filter 804 passes is adjusted to a frequency within the specification range, a detection signal “always low” is output while a clock signal with a frequency within the specification range is being input. On the other hand, if a clock signal having a frequency outside the specification range is input, the detection signal “always high” is output because the signal does not pass through the band-pass filter 804.
[0072]
FIG. 16 shows another configuration example of the out-of-specification physical condition detection circuit 120. The non-specification physical condition detection circuit 120 shown in the figure has the function of the voltage detection circuit 204 or the temperature detection circuit 206. The counter A 902, the counter B 904, and the comparison circuit 906 are the same as those in FIG. 4 (counter A 402, counter B 404, comparison circuit 406) and FIG. 5 (counter A 502, counter B 504, comparison circuit 506). As shown in the figure, the voltage / temperature detection comparison frequency generation circuit 908 can have an odd number (in this case, one) of inverters 908a and an LPF (low pass filter) 908b connected to the output. . This generates a comparison frequency for voltage / temperature detection. Counter A 902 counts external clock inputs, and counter B 904 counts signals generated by voltage / temperature detection comparison frequency generation circuit 908.
[0073]
By appropriately adjusting the characteristics of elements such as transistors, resistors, and capacitors that constitute the voltage / temperature detection comparison frequency generation circuit 908, for example, characteristics that are flat with respect to the power supply voltage within the specification range of the semiconductor device That is, the power source voltage value within the specification range can be designed such that the oscillation frequency of the voltage / temperature detection comparison frequency generation circuit 908 becomes a predetermined constant value. In this case, as in the case of FIG. 4, if a power supply voltage out of the specification is applied, the oscillation frequency of the voltage / temperature detection comparison frequency generation circuit 908 is the predetermined constant. Since it deviates from the value, there is a difference in the phase between the externally input clock and the output signal of the voltage / temperature detection comparison frequency generation circuit 908. The comparison circuit 906 generates a detection signal on the assumption that an out-of-specification power supply voltage is applied when the variation of the difference changes greatly.
[0074]
Similarly, by appropriately adjusting the characteristics of elements such as transistors, resistors, and capacitors constituting the voltage / temperature detection comparison frequency generation circuit 908, for example, with respect to the ambient temperature within the specification range of the semiconductor device. For flat characteristics, that is, for an ambient temperature value within a specification range, the oscillation frequency of the voltage / temperature detection comparison frequency generation circuit 908 can be designed to be a predetermined constant value. In this case, as in the case of FIG. 4, if the ambient temperature is outside the specification, the oscillation frequency of the voltage / temperature detection comparison frequency generation circuit 908 is the predetermined constant value. Therefore, there is a difference in the phase between the clock input from the outside and the output signal of the voltage / temperature detection comparison frequency generation circuit 908. The comparison circuit 906 issues a detection signal that the ambient temperature is outside the specification when the variation of the difference changes greatly.
[0075]
Further, by appropriately adjusting the characteristics of elements such as transistors, resistors, capacitors, etc. constituting the voltage / temperature detection comparison frequency generation circuit 908, for example, it is flat against the power supply voltage within the specification range of the semiconductor device. Characteristics, that is, for the power supply voltage value within the specification range, the oscillation frequency of the voltage / temperature detection comparison frequency generation circuit 908 is set to a predetermined constant value and is within the specification range of the semiconductor device. It can be designed so that the frequency oscillated by the voltage / temperature detection comparison frequency generation circuit 908 becomes a predetermined constant value for the flat characteristic with respect to the ambient temperature, that is, for the ambient temperature value within the specification range. . In this way, the same out-of-specification physical condition detection circuit 120 can detect that the power supply voltage and the temperature of the semiconductor device are out of the predetermined specification range.
[0076]
FIG. 17 shows another configuration example of the voltage detection circuit 204. A power supply voltage is input to the comparator 850, and a comparison result between this and the reference voltage is output as a detection signal. If a power supply voltage outside the specification is applied, the power supply voltage deviates from the reference voltage, so that a detection signal indicating that fact is output. For example, the reference voltage is set to the upper limit value of the power supply voltage value within the specification range, and the detection signal is normally set to, for example, low. When the input power supply voltage increases beyond the specification range, a comparison result different from the normal result is obtained. At this time, if a power supply voltage outside the specification is applied, a detection signal (high in this example) indicating that fact is issued.
[0077]
The circuit configurations as shown in FIG. 15 to FIG. 17 can be provided by selecting any one of the out-of-specification physical condition detection circuits 120, or any two or more configurations can be provided. If any two or more of these configurations are provided in a single semiconductor device, the non-specification physical condition detection circuit 120 can detect the frequency of the input clock signal, the supplied power supply voltage, or the semiconductor according to the provided configuration. It is possible to detect whether any two or more of the temperatures of the apparatus are out of a predetermined specification range.
[0078]
According to the configuration of the present embodiment, it is possible to realize a mechanism for preventing internal data leakage and tampering in a configuration having a storage unit capable of storing data therein. That is, as described above, in this embodiment, a voltage detection circuit, a frequency detection circuit, and a temperature detection circuit are provided inside, and it is detected that a physical condition outside the specification is given. When physical conditions outside the specifications are given, it is determined that normal operation cannot be guaranteed or unauthorized use, and the circuit operation is stopped. Accordingly, it is possible to provide a semiconductor device in which internal information cannot be estimated against unauthorized access in which internal information is estimated by applying a physical condition out of specification from the outside to cause the circuit to malfunction and observing its output. it can.
[0079]
Furthermore, by applying the semiconductor device detailed above to an IC card, it becomes possible to prevent leakage of internal data due to intentional malfunction result analysis, even if data is leaked by unauthorized means. Since it is possible to determine that the data has been obtained illegally, it is possible to realize an IC card that can be used for a wide range of applications that store data that requires high confidentiality, such as personal data and authentication data. .
[0080]
The semiconductor device according to the present invention has a physical condition detection for detecting that a physical condition given to the semiconductor device exceeds a predetermined specification range in a semiconductor device having a storage means capable of holding data therein. A protection control circuit that inputs a circuit and an output result of the physical condition detection circuit and outputs a control signal for limiting or prohibiting the operation of the semiconductor device may be provided.
[0081]
In the semiconductor device according to the present invention, in the above configuration, the physical condition detection circuit is configured to detect that the frequency of the input clock signal is out of a predetermined frequency range. Also good.
[0082]
The semiconductor device according to the present invention may be configured such that, in the above configuration, the physical condition detection circuit detects that the input power supply voltage is out of a predetermined voltage range. .
[0083]
Moreover, the semiconductor device according to the present invention may be configured such that, in the above configuration, the physical condition detection circuit detects that its own temperature is outside a predetermined temperature range.
[0084]
In the semiconductor device according to the present invention having the above-described configuration, the physical condition detection circuit may be configured so that any two or more conditions of a frequency of an input clock signal, a given power supply voltage, or its own temperature are set in advance. You may comprise so that it may detect that it is out of the defined predetermined range.
[0085]
In the semiconductor device according to the present invention, the physical condition detection circuit having any two or more detection means among the detection means for the frequency, power supply voltage, or temperature of the clock signal is the same in the configuration described above. You may comprise so that it may detect with a circuit.
[0086]
In the semiconductor device according to the present invention, in the configuration described above, the means for detecting that the frequency of the clock signal is outside a predetermined frequency range is a first frequency signal that outputs a clock signal having a reference frequency. An oscillation circuit, a first counter that counts the output of the first oscillation circuit, a second counter that counts clock signals used for circuit operation, and outputs of the first and second counters The first comparator circuit is configured to output a detection signal when the difference between the count values of the outputs of the first and second counters exceeds a predetermined value. May be.
[0087]
In the semiconductor device according to the present invention, in the above configuration, the means for detecting that the power supply voltage is out of a predetermined voltage range is a second frequency whose frequency changes depending on the voltage value. An oscillation circuit, a third counter that counts the output of the second oscillation circuit, a fourth counter that counts a clock signal used for circuit operation, and outputs of each of the third and fourth counters The second comparator circuit is configured to output a detection signal when the phase difference between the outputs of the third and fourth counters exceeds a predetermined value. Also good.
[0088]
Further, in the semiconductor device according to the present invention, in the above configuration, the means for detecting that the temperature is outside a predetermined temperature range is a third oscillation circuit whose frequency changes depending on the temperature. The fifth counter for counting the output of the third oscillation circuit, the sixth counter for counting the clock signal used for circuit operation, and the outputs of the fifth and sixth counters. The third comparator circuit may be configured to output a detection signal when the phase difference between the outputs of the fifth and sixth counters exceeds a predetermined value. .
[0089]
Further, in the semiconductor device according to the present invention, in the above configuration, the means for detecting that the power supply voltage is outside a predetermined voltage range and the temperature are outside the predetermined temperature range. If the voltage and temperature are within a predetermined range, a means for detecting the presence is a PLL (Phase Locked Loop) that outputs a clock signal having a predetermined frequency, and an output of the PLL. A seventh counter that counts a clock signal used for circuit operation, and a fourth comparison circuit that compares the outputs of the seventh and eighth counters. The fourth comparison circuit may be configured to output a detection signal when the phase difference between the outputs of the seventh and eighth counters exceeds a predetermined value.
[0090]
The semiconductor device according to the present invention may be configured such that, in the above configuration, the protection control circuit cuts off power supply in response to input of a detection signal from the physical condition detection circuit.
[0091]
The semiconductor device according to the present invention may be configured such that, in the above configuration, the protection control circuit blocks a clock signal input from the outside in response to an input of a detection signal from the physical condition detection circuit. .
[0092]
Further, the semiconductor device according to the present invention is configured such that, in the above configuration, the protection control circuit fixes the semiconductor device in a reset state or the like to a specific state by inputting a detection signal from the physical condition detection circuit. May be.
[0093]
Further, the semiconductor device according to the present invention has a non-volatile storage means for storing information indicating a history in which a physical condition exceeding a specification range is given by an output of the physical condition detection circuit in the above configuration. You may comprise.
[0094]
Further, in the semiconductor device according to the present invention, in the above configuration, the nonvolatile storage means for storing information indicating the history given the physical condition exceeding the range of the specification is for data retention built in the semiconductor device. You may comprise so that it may be provided in a memory | storage means.
[0095]
Further, in the semiconductor device according to the present invention, in the above configuration, the non-volatile storage means for storing information indicating the history given the physical condition exceeding the range of the specification includes cutting the fused fuse, You may comprise so that the change of storage contents, such as a physical damage, may be an irreversible storage means.
[0096]
According to the above configuration, the specified physical conditions are predetermined for unauthorized access in which internal information is inferred by causing the circuit to malfunction by observing the output by giving physical conditions outside the specifications. By providing means for detecting that the range has been exceeded, it is possible to reliably protect internal information from tampering attacks that attempt to guess internal information, and to prevent tampering and leakage of internal information. In particular, when a PLL is used as a detection circuit for physical conditions outside the specification range, the specification range can be set with high accuracy, and the physical conditions of frequency, voltage, and temperature can be detected by a single PLL circuit. The detection circuit can be greatly simplified while ensuring high security by detection.
[0097]
Furthermore, even if data is leaked by an unauthorized means, information that is acquired by an unauthorized means is also leaked at the same time, so that unauthorized use of leaked data can be prevented.
[0098]
Further, the IC card according to the present invention may be configured using the semiconductor device having the above configuration.
[0099]
By applying the semiconductor device according to the present invention to an IC card, it is possible to realize an IC card that can be used for a wide range of applications requiring extremely high security.
[0100]
【The invention's effect】
  As described above, the semiconductor device of the present invention has storage means capable of holding data therein.When,Input the output result of the non-specification physical condition detection circuit that detects that the physical condition given to the device exceeds the predetermined specification range, and the output result of the physical specification detection circuit outside the above specification, and output the data inside the device. Semiconductor device having protection control circuit for outputting control signal to be prohibitedBecauseThe physical condition detection circuit outside the above specifications isPhysical conditions aboveIs within a predetermined range, a phase synchronization circuit that outputs a clock signal of a predetermined frequency, a seventh counter that counts the output of the phase synchronization circuit, and a clock used for circuit operation An eighth counter for counting signals and a comparison circuit for comparing the outputs of the seventh and eighth countersWhenAnd the comparator circuit includes the counters of the seventh and eighth counters.If you are out of rangeOutput detection signalIs.
[0101]
  ThisThere is an effect that it is possible to provide a semiconductor device and an IC card that can simplify the detection circuit while ensuring high security. Also,Output that is obtained as a result of malfunction caused by malfunction of internal circuit by giving out-of-specification conditions (for example, high voltage, low voltage, high frequency, low frequency, high temperature, low temperature) for the purpose of internal data leakage or tampering The effect of preventing leakage and tampering of internal data by stopping the circuit operation against unauthorized use using cryptographic analysis technology that estimates encrypted information by storing and analyzing Play.
[0102]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the non-specification physical condition detection circuit detects that the frequency of the input clock signal is out of a predetermined frequency range. It is.
[0103]
Thereby, it is possible to detect an attempt to move at a frequency outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0104]
In the semiconductor device of the present invention, in addition to the above configuration, the non-specification physical condition detection circuit counts a first oscillation circuit that outputs a clock signal having a reference frequency and an output of the first oscillation circuit. A first counter that counts a clock signal used for circuit operation, and a first comparison circuit that compares the outputs of the first and second counters. The comparison circuit is configured to output a detection signal when the difference between the count values of the outputs of the first and second counters is out of a predetermined range.
[0105]
Thereby, it is possible to detect an attempt to move at a frequency outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0106]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the non-specific physical condition detection circuit detects that the input power supply voltage is outside a predetermined voltage range. .
[0107]
As a result, it is possible to detect an attempt to move with a power supply voltage outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0108]
In addition to the above configuration, the non-specification physical condition detection circuit includes a second oscillation circuit whose frequency changes depending on a voltage value, and an output of the second oscillation circuit. A third counter that counts a clock signal used for circuit operation, and a second comparison circuit that compares the outputs of the third and fourth counters. The second comparison circuit is configured to output a detection signal when the difference between the count values of the outputs of the third and fourth counters is out of a predetermined range.
[0109]
As a result, it is possible to detect an attempt to move with a power supply voltage outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0110]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the non-specification physical condition detection circuit detects that the temperature of the semiconductor device is out of a predetermined temperature range.
[0111]
As a result, it is possible to detect an attempt to move at a temperature outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0112]
In addition to the above-described configuration, the semiconductor device according to the present invention includes a non-specification physical condition detection circuit that outputs a third oscillation circuit whose frequency changes depending on temperature and an output of the third oscillation circuit. A fifth counter for counting, a sixth counter for counting clock signals used for circuit operation, and a third comparison circuit for comparing the outputs of the fifth and sixth counters. The comparison circuit 3 outputs a detection signal when the difference between the count values of the outputs of the fifth and sixth counters deviates from a predetermined range.
[0113]
As a result, it is possible to detect an attempt to move at a temperature outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0114]
In the semiconductor device of the present invention, in addition to the above configuration, the non-specification physical condition detection circuit may be any one of a frequency of an input clock signal, a given power supply voltage, or a temperature of the semiconductor device. In this configuration, the values of one or more are compared with each of the predetermined ranges, and at least one is detected to be outside the predetermined range.
[0115]
As a result, it is possible to detect an attempt to move at a frequency, power supply voltage or temperature outside the specification. Therefore, in addition to the effect of the above configuration, there is an effect that data leakage due to malfunction can be prevented with a simple configuration.
[0116]
In addition to the above configuration, the semiconductor device according to the present invention may be configured such that the out-of-specification physical condition detection circuit is outside a predetermined range for any two or more of the frequency, power supply voltage, and temperature of the clock signal. It is the structure which detects that there exists in the same circuit.
[0117]
Thus, by realizing two or more functions of voltage detection, frequency detection, and temperature detection with one circuit, the scale of the circuit for fraud detection can be reduced. Therefore, in addition to the effects of the above-described configuration, there is an effect that fraud can be detected with a minimum necessary circuit.
[0118]
In addition to the above-described configuration, the semiconductor device according to the present invention outputs a clock signal having a predetermined frequency when the voltage and temperature are within a predetermined range. A phase synchronizing circuit, a seventh counter for counting the output of the phase synchronizing circuit, an eighth counter for counting a clock signal used for circuit operation, and outputs of the seventh and eighth counters The fourth comparator circuit is configured to output a detection signal when the phase difference between the outputs of the seventh and eighth counters exceeds a predetermined value.
[0119]
As a result, the range in which the PLL can be locked depends on the voltage and temperature. Therefore, in addition to the effect of the above configuration, there is an effect that it is possible to accurately detect a voltage and temperature outside the specification.
[0120]
Furthermore, it is possible to detect out-of-specification frequencies by utilizing the property of locking only to a certain frequency. Therefore, in addition to the effect of the above configuration, the detection circuit can be simplified while ensuring high security.
[0121]
In addition to the above configuration, the semiconductor device of the present invention has a configuration in which the protection control circuit cuts off the power supply in response to the input of a detection signal from the non-specific physical condition detection circuit.
[0122]
As a result, when a physical condition outside the specification is detected, the operation of the circuit is stopped by shutting off the power. Therefore, in addition to the effect of the above configuration, by stopping the power supply, it is possible to prevent the destruction of internal data and the access to illegal internal data due to malfunction.
[0123]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the protection control circuit blocks a clock signal input from the outside in response to an input of a detection signal from the non-specification physical condition detection circuit. .
[0124]
As a result, when a physical condition outside the specification is detected, the operation of the circuit can be stopped by cutting off the clock. Therefore, in addition to the effects of the above configuration, the operation of the semiconductor circuit is controlled by the clock, so that the interruption of the clock can prevent destruction of internal data due to malfunction and access to illegal internal data. There is an effect.
[0125]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the protection control circuit fixes the semiconductor device to a specific state by inputting a detection signal from the non-specification physical condition detection circuit.
[0126]
Thereby, when a physical condition outside the specification is detected, the inside can be fixed to a certain state such as a reset state. Therefore, in addition to the effect of the above configuration, by fixing the internal state and preventing it from moving, there is an effect that it is possible to prevent destruction of internal data and access to illegal internal data due to malfunction.
[0127]
In addition to the above-described configuration, the semiconductor device of the present invention stores a nonvolatile history storing information indicating a history in which a physical condition exceeding the specification range is given by an output of the non-specification physical condition detection circuit. This is a configuration having storage means.
[0128]
Thereby, when analysis of internal data is performed, the history of the analysis action can be left. Therefore, in addition to the effect of the above configuration, there is an effect that it is possible to cope with changing secret information that can be changed such as password data.
[0129]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the history storage unit is provided in the storage unit for holding data incorporated in the semiconductor device.
[0130]
As a result, the history information indicating that the data to be protected has been analyzed is provided in the storage means for holding data, so that if the data is leaked by an illegal means of analysis and the imitation product is based on the data. Even if it is created, the history information is also leaked, so that it becomes clear that the data is illegal. Therefore, in addition to the effects of the above-described configuration, it can be used as a means for preventing unauthorized use by a counterfeit product, and there is an effect that higher security can be realized.
[0131]
In addition to the above-described configuration, the semiconductor device of the present invention has a configuration in which the history storage means is irreversible to change the stored contents.
[0132]
Thereby, by using irreversible history storage means, once the history is recorded, it becomes impossible to delete the information. Therefore, it becomes impossible to perform data analysis without leaving a trace that the act has been performed. Therefore, in addition to the effects of the above-described configuration, it is possible to obtain a deterrent effect against an illegal data analysis act and to surely discover the act.
[0133]
The IC card of the present invention has a configuration using the semiconductor device having the above configuration.
[0134]
As a result, the circuit malfunctions by applying physical conditions that deviate from normal use conditions such as high voltage, low voltage, high frequency, low frequency, high temperature, low temperature, etc., which are out of specification, and the output obtained as a result of malfunction is stored. However, by analyzing, it has high tamper resistance against the analysis technique of secret data. Therefore, even if confidential data is leaked by an unauthorized analysis means, it is possible to leave a history of the confidential data, so that unauthorized use can be prevented, and an extremely high security IC card can be provided. There is an effect.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an outline of a configuration of a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a block diagram showing an outline of a configuration of a non-specification physical condition detection circuit.
FIG. 3 is a block diagram showing an outline of a configuration of a frequency detection circuit.
FIG. 4 is a block diagram showing an outline of a configuration of a voltage detection circuit.
FIG. 5 is a block diagram showing an outline of a configuration of a temperature detection circuit.
FIG. 6 is a block diagram showing an outline of the configuration of a circuit that performs frequency, voltage, and temperature detection by one circuit.
FIG. 7 is a graph showing voltage characteristics of a frequency generation circuit for detecting a physical condition.
FIG. 8 is a graph showing temperature characteristics of a frequency generation circuit for detecting physical conditions.
FIG. 9 is a block diagram showing an outline of a configuration of a physical condition detection frequency generation circuit.
FIG. 10 is a graph showing a PLL lockable range.
FIG. 11 is a block diagram showing an outline of a configuration example of a protection control circuit.
FIG. 12 is a block diagram showing an outline of a configuration example of a protection control circuit.
FIG. 13 is a block diagram showing an outline of a configuration example of a protection control circuit.
FIG. 14 is a block diagram showing an outline of a configuration example of a protection control circuit having means for leaving a history given a physical condition out of specification.
FIG. 15 is a circuit diagram showing an outline of a configuration of a frequency detection circuit.
FIG. 16 is a block diagram showing an outline of a configuration of a non-specification physical condition detection circuit.
FIG. 17 is a block diagram showing an outline of a configuration of a voltage detection circuit.
[Explanation of symbols]
100 Semiconductor device
110 Internal circuit
112 Communication circuit
114 CPU
116 Encryption circuit
118 memory
120 Non-specification physical condition detection circuit
130 Protection control circuit
140 Terminal group for external communication
150 Other terminals
202 Frequency detection circuit
204 Voltage detection circuit
206 Temperature detection circuit
302 Counter A (second counter)
304 Counter B (first counter)
306 Comparison circuit (first comparison circuit)
308 Comparison frequency generation circuit for frequency detection (first oscillation circuit)
402 Counter A (fourth counter)
404 Counter B (third counter)
406 Comparison circuit (second comparison circuit)
408 Voltage detection comparison frequency generation circuit (second oscillation circuit)
502 Counter A (sixth counter)
504 Counter B (fifth counter)
506 Comparison circuit (third comparison circuit)
508 Comparison frequency generation circuit for temperature detection (third oscillation circuit)
602 Counter A (8th counter)
604 Counter B (seventh counter)
606 comparison circuit (fourth comparison circuit)
608 Frequency generation circuit for detecting physical conditions
702 Phase comparator
704 LPF
706 divider
708 VCO
804 Bandpass filter
806 Rectifier diode
850 comparator
902 Counter A
904 Counter B
906 Comparison circuit
908 Comparative frequency generator for voltage / temperature detection
908a Inverter
908b LPF
L10 control signal

Claims (16)

Storage means capable of holding data internally ;
A non-specification physical condition detection circuit for detecting that a physical condition given to the device exceeds a predetermined specification range;
A semiconductor device including a protection control circuit that inputs an output result of the physical condition detection circuit outside the specification and outputs a control signal that prohibits output of data inside the device ,
The physical condition detection circuit outside the above specifications is
If the physical condition is within a predetermined range, a phase synchronization circuit that outputs a clock signal of a predetermined frequency;
A seventh counter for counting the output of the phase synchronization circuit;
An eighth counter for counting clock signals used for circuit operation;
Consists of a comparator circuit for comparing the output of each counter of the seventh and eighth,
The semiconductor device, wherein the comparison circuit outputs a detection signal when the seventh and eighth counters are out of a predetermined range .   2. The semiconductor device according to claim 1, wherein the out-of-specification physical condition detection circuit detects that the frequency of the input clock signal is out of a predetermined frequency range. The phase synchronization circuit is
3. The semiconductor device according to claim 2, wherein a clock signal having a reference frequency is output.   2. The semiconductor device according to claim 1, wherein the out-of-specification physical condition detection circuit detects that the input power supply voltage is out of a predetermined voltage range. The phase synchronization circuit is
The semiconductor device according to claim 4, wherein the frequency varies depending on the voltage value.   2. The semiconductor device according to claim 1, wherein the out-of-specification physical condition detection circuit detects that the temperature of the semiconductor device is out of a predetermined temperature range. The phase synchronization circuit is
The semiconductor device according to claim 6, wherein the frequency changes depending on temperature.   The out-of-specification physical condition detection circuit compares at least one of the values of any two or more of the frequency of the input clock signal, the applied power supply voltage, or the temperature of the semiconductor device with the predetermined range. 2. The semiconductor device according to claim 1, wherein one of the two is detected outside the predetermined range.   The non-specification physical condition detection circuit detects that two or more of the frequency, power supply voltage, and temperature of the clock signal are out of a predetermined range by the same circuit. Item 9. The semiconductor device according to Item 8. The protective control circuit, the input of the detection signal from the spec physical condition detection circuit, a semiconductor device according to any one of claims 1, characterized in that cuts off the power supply 9. 11. The semiconductor device according to claim 1, wherein the protection control circuit blocks a clock signal input from the outside in response to an input of a detection signal from the non-specific physical condition detection circuit. The protective control circuit, the input of the detection signal from the spec physical condition detection circuit, claims 1, characterized in that to fix the semiconductor device to a specific state according to one of 11. The output of the spec physical condition detection circuit, any claims 1, characterized in that it has a history storage means for non-volatile storing information indicating a history of physical condition is given that exceeds the specification range 12 A semiconductor device according to claim 1. 14. The semiconductor device according to claim 13 , wherein the history storage means is provided in the storage means for holding data incorporated in the semiconductor device. 14. The semiconductor device according to claim 13 , wherein the history storage means is irreversible in changing stored contents . An IC card using the semiconductor device according to claim 1.

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