JP3969895B2 - データ型によるコプロセッサの操作コードの分割 - Google Patents
データ型によるコプロセッサの操作コードの分割 Download PDFInfo
- Publication number
- JP3969895B2 JP3969895B2 JP14725799A JP14725799A JP3969895B2 JP 3969895 B2 JP3969895 B2 JP 3969895B2 JP 14725799 A JP14725799 A JP 14725799A JP 14725799 A JP14725799 A JP 14725799A JP 3969895 B2 JP3969895 B2 JP 3969895B2
- Authority
- JP
- Japan
- Prior art keywords
- coprocessor
- data
- register
- instruction
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- YREOLPGEVLLKMB-UHFFFAOYSA-N 3-methylpyridin-1-ium-2-amine bromide hydrate Chemical compound O.[Br-].Cc1ccc[nH+]c1N YREOLPGEVLLKMB-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/084,386 US6247113B1 (en) | 1998-05-27 | 1998-05-27 | Coprocessor opcode division by data type |
US084386 | 1998-05-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000029704A JP2000029704A (ja) | 2000-01-28 |
JP3969895B2 true JP3969895B2 (ja) | 2007-09-05 |
Family
ID=22184646
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14725799A Expired - Lifetime JP3969895B2 (ja) | 1998-05-27 | 1999-05-26 | データ型によるコプロセッサの操作コードの分割 |
Country Status (3)
Country | Link |
---|---|
US (1) | US6247113B1 (US06247113-20010612-C00014.png) |
JP (1) | JP3969895B2 (US06247113-20010612-C00014.png) |
GB (1) | GB2338095B (US06247113-20010612-C00014.png) |
Families Citing this family (76)
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US6732203B2 (en) | 2000-01-31 | 2004-05-04 | Intel Corporation | Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus |
US6588008B1 (en) * | 2000-04-11 | 2003-07-01 | International Business Machines Corporation | Assembler tool for processor-coprocessor computer systems |
US6671793B1 (en) * | 2000-10-02 | 2003-12-30 | International Business Machines Corporation | Method and system for managing the result from a translator co-processor in a pipelined processor |
US6658444B1 (en) * | 2000-11-09 | 2003-12-02 | Sun Microsystems, Inc. | Method and apparatus for performing a mask-driven interval division operation |
US6675376B2 (en) * | 2000-12-29 | 2004-01-06 | Intel Corporation | System and method for fusing instructions |
MY136087A (en) * | 2001-10-22 | 2008-08-29 | Shell Int Research | Process to reduce the temperature of a hydrogen and carbon monoxide containing gas and heat exchanger for use in said process |
US7073048B2 (en) * | 2002-02-04 | 2006-07-04 | Silicon Lease, L.L.C. | Cascaded microcomputer array and method |
US7523455B2 (en) * | 2002-05-03 | 2009-04-21 | Hewlett-Packard Development Company, L.P. | Method and system for application managed context switching |
AU2003256870A1 (en) * | 2002-08-09 | 2004-02-25 | Intel Corporation | Multimedia coprocessor control mechanism including alignment or broadcast instructions |
US7392368B2 (en) * | 2002-08-09 | 2008-06-24 | Marvell International Ltd. | Cross multiply and add instruction and multiply and subtract instruction SIMD execution on real and imaginary components of a plurality of complex data elements |
US6986023B2 (en) | 2002-08-09 | 2006-01-10 | Intel Corporation | Conditional execution of coprocessor instruction based on main processor arithmetic flags |
US20050071609A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus to autonomically take an exception on specified instructions |
US20050071816A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus to autonomically count instruction execution for applications |
US7937691B2 (en) * | 2003-09-30 | 2011-05-03 | International Business Machines Corporation | Method and apparatus for counting execution of specific instructions and accesses to specific data locations |
US7373637B2 (en) * | 2003-09-30 | 2008-05-13 | International Business Machines Corporation | Method and apparatus for counting instruction and memory location ranges |
US7395527B2 (en) * | 2003-09-30 | 2008-07-01 | International Business Machines Corporation | Method and apparatus for counting instruction execution and data accesses |
US20050071611A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus for counting data accesses and instruction executions that exceed a threshold |
US20050071821A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus to autonomically select instructions for selective counting |
US20050071516A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus to autonomically profile applications |
US20050071610A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus for debug support for individual instructions and memory locations |
US20050071612A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Method and apparatus for generating interrupts upon execution of marked instructions and upon access to marked memory locations |
US8381037B2 (en) | 2003-10-09 | 2013-02-19 | International Business Machines Corporation | Method and system for autonomic execution path selection in an application |
US7421681B2 (en) * | 2003-10-09 | 2008-09-02 | International Business Machines Corporation | Method and system for autonomic monitoring of semaphore operation in an application |
US7053901B2 (en) * | 2003-12-11 | 2006-05-30 | Nvidia Corporation | System and method for accelerating a special purpose processor |
US7450120B1 (en) | 2003-12-19 | 2008-11-11 | Nvidia Corporation | Apparatus, system, and method for Z-culling |
US7496908B2 (en) * | 2004-01-14 | 2009-02-24 | International Business Machines Corporation | Method and apparatus for optimizing code execution using annotated trace information having performance indicator and counter information |
US7415705B2 (en) * | 2004-01-14 | 2008-08-19 | International Business Machines Corporation | Autonomic method and apparatus for hardware assist for patching code |
US7895382B2 (en) * | 2004-01-14 | 2011-02-22 | International Business Machines Corporation | Method and apparatus for qualifying collection of performance monitoring events by types of interrupt when interrupt occurs |
US7197586B2 (en) * | 2004-01-14 | 2007-03-27 | International Business Machines Corporation | Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler |
US7114036B2 (en) * | 2004-01-14 | 2006-09-26 | International Business Machines Corporation | Method and apparatus for autonomically moving cache entries to dedicated storage when false cache line sharing is detected |
US7526757B2 (en) * | 2004-01-14 | 2009-04-28 | International Business Machines Corporation | Method and apparatus for maintaining performance monitoring structures in a page table for use in monitoring performance of a computer program |
US7987453B2 (en) * | 2004-03-18 | 2011-07-26 | International Business Machines Corporation | Method and apparatus for determining computer program flows autonomically using hardware assisted thread stack tracking and cataloged symbolic data |
US7421684B2 (en) | 2004-03-22 | 2008-09-02 | International Business Machines Corporation | Method and apparatus for autonomic test case feedback using hardware assistance for data coverage |
US7895473B2 (en) * | 2004-04-29 | 2011-02-22 | International Business Machines Corporation | Method and apparatus for identifying access states for variables |
US20050251706A1 (en) * | 2004-04-29 | 2005-11-10 | International Business Machines Corporation | Method and apparatus for data-aware hardware operations |
US7386690B2 (en) * | 2004-04-29 | 2008-06-10 | International Business Machines Corporation | Method and apparatus for hardware awareness of data types |
US7269718B2 (en) * | 2004-04-29 | 2007-09-11 | International Business Machines Corporation | Method and apparatus for verifying data types to be used for instructions and casting data types if needed |
US7328374B2 (en) * | 2004-04-29 | 2008-02-05 | International Business Machines Corporation | Method and apparatus for implementing assertions in hardware |
US7395410B2 (en) * | 2004-07-06 | 2008-07-01 | Matsushita Electric Industrial Co., Ltd. | Processor system with an improved instruction decode control unit that controls data transfer between processor and coprocessor |
US7546441B1 (en) | 2004-08-06 | 2009-06-09 | Xilinx, Inc. | Coprocessor interface controller |
US7346759B1 (en) | 2004-08-06 | 2008-03-18 | Xilinx, Inc. | Decoder interface |
US7590822B1 (en) | 2004-08-06 | 2009-09-15 | Xilinx, Inc. | Tracking an instruction through a processor pipeline |
US7590823B1 (en) * | 2004-08-06 | 2009-09-15 | Xilinx, Inc. | Method and system for handling an instruction not supported in a coprocessor formed using configurable logic |
JP3938580B2 (ja) * | 2004-12-21 | 2007-06-27 | 株式会社ソニー・コンピュータエンタテインメント | 情報処理装置、情報処理方法、半導体装置、コンピュータプログラム |
JP3867804B2 (ja) * | 2005-03-22 | 2007-01-17 | セイコーエプソン株式会社 | 集積回路装置 |
US8302082B2 (en) * | 2006-06-07 | 2012-10-30 | Intel Corporation | Methods and apparatus to provide a managed runtime environment in a sequestered partition |
US7496893B2 (en) * | 2006-06-15 | 2009-02-24 | International Business Machines Corporation | Method for no-demand composition and teardown of service infrastructure |
US7865882B2 (en) * | 2006-08-18 | 2011-01-04 | International Business Machines Corporation | Fast correctly rounding floating point conversion and identifying exceptional conversion |
US20080126747A1 (en) * | 2006-11-28 | 2008-05-29 | Griffen Jeffrey L | Methods and apparatus to implement high-performance computing |
US8224884B2 (en) * | 2007-07-06 | 2012-07-17 | XMOS Ltd. | Processor communication tokens |
US7865698B1 (en) * | 2008-03-27 | 2011-01-04 | Xilinix, Inc. | Decode mode for an auxiliary processor unit controller in which an opcode is partially masked such that a configuration register defines a plurality of user defined instructions |
US9690591B2 (en) * | 2008-10-30 | 2017-06-27 | Intel Corporation | System and method for fusing instructions queued during a time window defined by a delay counter |
US8281075B2 (en) * | 2009-04-14 | 2012-10-02 | International Business Machines Corporation | Processor system and methods of triggering a block move using a system bus write command initiated by user code |
JP2012252374A (ja) * | 2011-05-31 | 2012-12-20 | Renesas Electronics Corp | 情報処理装置 |
US10534606B2 (en) | 2011-12-08 | 2020-01-14 | Oracle International Corporation | Run-length encoding decompression |
CN103257885A (zh) * | 2013-05-20 | 2013-08-21 | 深圳市京华科讯科技有限公司 | 媒体虚拟化处理方法 |
CN103309725A (zh) * | 2013-05-20 | 2013-09-18 | 深圳市京华科讯科技有限公司 | 网络虚拟化处理方法 |
CN103257884A (zh) * | 2013-05-20 | 2013-08-21 | 深圳市京华科讯科技有限公司 | 设备虚拟化处理方法 |
US11768689B2 (en) | 2013-08-08 | 2023-09-26 | Movidius Limited | Apparatus, systems, and methods for low power computational imaging |
US10001993B2 (en) | 2013-08-08 | 2018-06-19 | Linear Algebra Technologies Limited | Variable-length instruction buffer management |
US11113054B2 (en) | 2013-09-10 | 2021-09-07 | Oracle International Corporation | Efficient hardware instructions for single instruction multiple data processors: fast fixed-length value compression |
EP4116819A1 (en) * | 2014-07-30 | 2023-01-11 | Movidius Limited | Vector processor |
US10733199B2 (en) | 2014-11-05 | 2020-08-04 | International Business Machines Corporation | Optimizing data conversion using pattern frequency |
US10599488B2 (en) * | 2016-06-29 | 2020-03-24 | Oracle International Corporation | Multi-purpose events for notification and sequence control in multi-core processor systems |
US10380058B2 (en) | 2016-09-06 | 2019-08-13 | Oracle International Corporation | Processor core to coprocessor interface with FIFO semantics |
US10783102B2 (en) | 2016-10-11 | 2020-09-22 | Oracle International Corporation | Dynamically configurable high performance database-aware hash engine |
US10725947B2 (en) | 2016-11-29 | 2020-07-28 | Oracle International Corporation | Bit vector gather row count calculation and handling in direct memory access engine |
US11263014B2 (en) * | 2019-08-05 | 2022-03-01 | Arm Limited | Sharing instruction encoding space between a coprocessor and auxiliary execution circuitry |
US11829187B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Microprocessor with time counter for statically dispatching instructions |
US11954491B2 (en) | 2022-01-30 | 2024-04-09 | Simplex Micro, Inc. | Multi-threading microprocessor with a time counter for statically dispatching instructions |
US11829762B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Time-resource matrix for a microprocessor with time counter for statically dispatching instructions |
US11829767B2 (en) | 2022-01-30 | 2023-11-28 | Simplex Micro, Inc. | Register scoreboard for a microprocessor with a time counter for statically dispatching instructions |
US20230393852A1 (en) * | 2022-06-01 | 2023-12-07 | Simplex Micro, Inc. | Vector coprocessor with time counter for statically dispatching instructions |
Family Cites Families (10)
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DE3486465D1 (de) | 1983-04-18 | 1998-04-02 | Motorola Inc | Verfahren und Vorrichtung zum Koordinieren einer Instruktionsausführung durch eine Zusatzdatenverarbeitungseinheit |
US5021991A (en) * | 1983-04-18 | 1991-06-04 | Motorola, Inc. | Coprocessor instruction format |
JPS63143660A (ja) | 1986-12-08 | 1988-06-15 | Fanuc Ltd | コ・プロセツサを有する演算処理装置 |
JPS63261449A (ja) | 1987-04-20 | 1988-10-28 | Hitachi Ltd | デ−タ処理装置 |
US5093908A (en) * | 1989-04-17 | 1992-03-03 | International Business Machines Corporation | Method and apparatus for executing instructions in a single sequential instruction stream in a main processor and a coprocessor |
US5673407A (en) | 1994-03-08 | 1997-09-30 | Texas Instruments Incorporated | Data processor having capability to perform both floating point operations and memory access in response to a single instruction |
US5857096A (en) * | 1995-12-19 | 1999-01-05 | Intel Corporation | Microarchitecture for implementing an instruction to clear the tags of a stack reference register file |
US5778247A (en) * | 1996-03-06 | 1998-07-07 | Sun Microsystems, Inc. | Multi-pipeline microprocessor with data precision mode indicator |
US5923893A (en) * | 1997-09-05 | 1999-07-13 | Motorola, Inc. | Method and apparatus for interfacing a processor to a coprocessor |
US5983338A (en) * | 1997-09-05 | 1999-11-09 | Motorola, Inc. | Method and apparatus for interfacing a processor to a coprocessor for communicating register write information |
-
1998
- 1998-05-27 US US09/084,386 patent/US6247113B1/en not_active Expired - Lifetime
-
1999
- 1999-03-08 GB GB9905297A patent/GB2338095B/en not_active Expired - Lifetime
- 1999-05-26 JP JP14725799A patent/JP3969895B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6247113B1 (en) | 2001-06-12 |
GB2338095A (en) | 1999-12-08 |
GB9905297D0 (en) | 1999-04-28 |
JP2000029704A (ja) | 2000-01-28 |
GB2338095B (en) | 2002-11-13 |
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