JP3930697B2 - Data protection processing equipment - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention encodes and decodes data in order to prevent eavesdropping (snooping) by an unauthorized person or the like. For data protection processing equipment Related.
[0002]
[Prior art]
Currently, as a data encoding / decoding technique for safely performing communication between a sender and a receiver, (a) a common secret key scheme in which both the sender and the receiver hold the same key (B) Prepare two keys to be paired, one is a private key and the other is a public key. It is widely known.
[0003]
[Problems to be solved by the invention]
However, the above-described conventional encoding / decoding has problems such as complicated processing and load on the apparatus, processing takes time, and encoding increases the overall data size. . In addition, in order to perform encoding / decoding according to the above-described prior art, it is necessary to pass a necessary key from the encoding side to the decoding side in advance. There was a problem of requiring complicated procedures.
[0004]
The present invention has been made in view of the above, and performs encoding / decoding of data by simple and high-speed processing, and information necessary for decoding of encoded data can be safely and easily performed. Can be delivered to Data protection processing equipment The purpose is to provide.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, the data protection processing device according to claim 1 sequentially reads continuous digital data in a predetermined reading direction, and whether the read digital data matches a predetermined bit pattern. Determination processing means for determining whether or not, and digital data in a predetermined range existing on the tail side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means , An arithmetic processing means for calculating an exclusive OR with a predetermined arithmetic value, and continuous digital data (hereinafter referred to as “process data”) calculated by the arithmetic processing means are sequentially read and read in the reading direction. Processing data determination processing means for determining whether the processing data matches a predetermined bit pattern, and the processing Data embedding processing means for embedding the predetermined operation value by a predetermined number of bits in the processing data at a predetermined distance from the processing data determined to match the predetermined bit pattern by the data determination processing means. And
[0006]
According to a second aspect of the present invention, there is provided the data protection processing device according to the first aspect of the invention, further comprising adding or multiplying a predetermined change value to the calculated value, or adding the calculated value to the predetermined value. A first change processing unit that divides by a change value; an operation value obtained by adding or multiplying a predetermined change value by the first change processing unit; or a division by a predetermined change value by the first change processing unit. Second change processing means for calculating a new calculated value based on the calculated value, wherein the calculation processing means is based on the digital data determined by the determination processing means to match the predetermined bit pattern. Exclusively with a new calculation value calculated by the second change processing means for a predetermined range of digital data existing at the end in the predetermined reading direction by a predetermined distance Characterized by calculating the physical sum.
[0007]
According to a third aspect of the present invention, there is provided a data protection processing device for sequentially reading continuous digital data in a predetermined reading direction and determining whether or not the read digital data matches a predetermined bit pattern. And a predetermined range of digital data existing at the end in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means, by a predetermined rotation value. Rotating rotation processing means and continuous digital data rotated by the rotation processing means (hereinafter referred to as “processing data”) are sequentially read in the reading direction, and whether the read processing data matches a predetermined bit pattern The processing data determination processing means for determining whether or not the predetermined bit pass is determined by the processing data determination processing means. Wherein the embedding means embeds a predetermined rotation value from the determined processed data to the processing data of a predetermined distance between matching over down by a predetermined number of bits, further comprising: a.
[0008]
According to a fourth aspect of the present invention, in the data protection processing device according to the third aspect of the present invention, the rotation value is further added or multiplied by a predetermined change value, or the rotation value is set to a predetermined value. A first change processing unit that divides by a change value; a rotation value obtained by adding or multiplying a predetermined change value by the first change processing unit; or a division value by a predetermined change value by the first change processing unit. Second change processing means for calculating a new rotation value based on the rotation value, wherein the rotation processing means is based on the digital data determined to match the predetermined bit pattern by the determination processing means. Rotating a predetermined range of digital data existing at the end in the predetermined reading direction by a new rotation value calculated by the second change processing means by a predetermined distance And features.
[0009]
According to a fifth aspect of the present invention, there is provided a data protection processing device that sequentially reads continuous digital data in a predetermined reading direction and determines whether or not the read digital data matches a predetermined bit pattern. And digital data existing on the tail side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means by a predetermined numerical value from the digital data. Digital data existing at the tail end in the predetermined reading direction, a replacement processing means for replacing the length indicated by the numerical value, and continuous digital data replaced by the replacement processing means (hereinafter referred to as “processing”). Data ”) sequentially in the reading direction, Processing data determination processing means for determining whether or not the data matches a predetermined bit pattern, and processing data determined to match the predetermined bit pattern by the processing data determination processing means to processing data at a predetermined distance Embedding processing means for embedding the predetermined numerical value by a predetermined number of bits.
[0010]
According to a sixth aspect of the present invention, in the data protection processing device according to the fifth aspect of the invention, the numerical value is further added to or multiplied by a predetermined change value, or the numerical value is changed to a predetermined change value. To a numerical value obtained by adding or multiplying a predetermined change value by the first change processing means, or a numerical value divided by the predetermined change value by the first change processing means. And a second change processing means for calculating a new numerical value. The arithmetic processing means is a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means. The digital data existing at the end in the predetermined reading direction is the predetermined reading direction by a distance indicated by the new numerical value calculated by the second change processing means. A digital data present in the definitive end side, and wherein the replacing by the length indicated by the number.
[0011]
According to a seventh aspect of the present invention, there is provided the data protection processing device according to any one of the first to sixth aspects, wherein the embedding unit is configured to perform the predetermined processing by the processing data determination processing unit. The predetermined bit of the processing data existing on the tail side in the predetermined reading direction is replaced with the predetermined bit of the predetermined digital data by a predetermined distance from the processing data determined to match the bit pattern of .
[0012]
According to an eighth aspect of the present invention, there is provided the data protection processing device according to any one of the first to sixth aspects, wherein the embedding unit is configured to perform the predetermined processing by the processing data determination processing unit. Exclusive OR of a predetermined bit of the processing data existing on the tail side in the predetermined reading direction and a predetermined bit of the predetermined digital data by a predetermined distance from the processing data determined to match the bit pattern of Is calculated.
[0013]
According to a ninth aspect of the present invention, in the data protection processing device according to the ninth aspect of the present invention, in the invention according to any one of the first to sixth aspects, the embedding unit is configured to perform the predetermined processing by the processing data determination processing unit. Rotate by a predetermined rotation value after inserting a predetermined bit of predetermined digital data into the processing data existing on the tail side in the predetermined reading direction by a predetermined distance from the processing data determined to match the bit pattern of It is characterized by that.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Preferred embodiments of a data protection processing apparatus and a data protection processing method according to the present invention will be described below in detail with reference to the accompanying drawings. The present invention is not limited to the following embodiments.
[0015]
Before going into the description of the individual embodiments, the outline of the present invention will be briefly described first. The present invention can be summarized as follows:
(1) When the bit data for 1 byte sequentially read from the encoding / decoding target data matches a predetermined bit pattern,
(2) A range in which 1 byte of bit data after a predetermined distance from the 1 byte of bit data is a start position, and 1 byte of bit data after a predetermined distance from the start position is an end position For the bit data in
(3) Encoding and decoding by performing a predetermined process using a predetermined value as a parameter;
It is characterized by.
[0016]
In the following, the distance (specifically, the number of bytes) from the bit data matching the predetermined bit pattern to the bit data at the start position is referred to as a “warp value”. The distance (also the number of bytes) from the bit data at the start position to the bit data at the end position is referred to as a “processing range”.
[0017]
Further, various processing parameters performed on the bit data within the processing range are referred to as “protection key values”. An example of these processes and the meaning of the protection key value in each process are shown below.
[0018]
(A) In the case of four arithmetic operations, for example, addition, it is a value to be added in 1-byte units to bit data within the processing range.
(B) In the case of a logical operation, for example, an exclusive OR (XOR), it is a value that is XORed with the bit data within the processing range in units of 1 byte.
(C) In the case of rotation (ROTATE), it is the number of bits for rotating bit data within the processing range.
(D) In the case of replacement (SWAP), the size (number of bytes) of the bit data to be replaced and the distance (number of bytes) from the bit data to the bit data at the replacement destination.
[0019]
For example, if the predetermined bit pattern is 5D, the warp value is 1 byte, the processing range is 4 bytes, the protection key value is 1E (all in hexadecimal notation), and the processing is addition, “3F 5D 9B 11 40 A9 DD” The bit data meaning “3F 5D B9 2F 5E C7 DD” is encoded into bit data meaning “3F 5D B9 2F 5E C7 DD” as described later. (1) From 9B after 1 byte of 5D that matches a predetermined bit pattern, (3) 1E is added to each of 9B, 11, 40, and A9 for 4 bytes. I know (for example, 9B + 1E = B9).
[0020]
Hereinafter, the configurations of (1) to (3) will be described with reference to the first embodiment while showing specific examples of the processes (a) to (d). Further, the protection key value can be changed during the encoding / decoding, and this configuration will be described in the second embodiment.
[0021]
Furthermore, the transmission source of the data that has been encoded according to the above (1) to (3), the protection key value used for the encoding, etc. to the reception destination in some form so that the reception destination can decode it. Must be notified. In the present invention, the protection key value is not directly transmitted such as being transmitted separately from the data or transferred off-line, but directly embedded in the data encoded by the protection key value. . This configuration will be described in Embodiment 3.
[0022]
(Embodiment 1)
First, a data protection processing device and a data protection processing method according to the first embodiment will be described. FIG. 1 is a block diagram of a schematic configuration of the data protection processing apparatus according to the first embodiment.
[0023]
The data protection processing device according to the first embodiment transmits data to be transmitted to an encoding / decoding condition storage unit 100 that holds various conditions for encoding / decoding such as the above-described bit pattern, a communication line, and a communication device. A coding processing unit 101 that performs coding processing on data based on the above conditions, and a decoding processing that performs decoding processing based on the above conditions on reception data received from a communication line or a communication device. Part 102.
[0024]
First, the encoding / decoding condition storage unit 100 stores the above-described bit pattern, warp value, processing range, and protection key value that define encoding or decoding conditions. These can be rewritten from the outside by a keyboard (not shown) or the like, and data encoded under an arbitrary encoding condition written in the encoding / decoding condition storage unit 100 is encoded on the transmitting side. Is transmitted to the decoding side (reception side) together with the above conditions, and the decoding side decodes the received data by writing the corresponding decoding conditions in the encoding / decoding condition storage unit 100. .
[0025]
As described above, since data encoded under a specific condition can be decrypted only by a specific communication partner who is informed of the condition, the confidentiality of the data can be improved. At this time, it is meaningless if the above condition itself is wiretapped (spotted), so a common conversion table (encryption table) is held on both sides, and the encoding side uses the condition used when encoding the data. The table may be converted and transmitted to the decoding side, and the decoding side may convert the received conditions into the encoding / decoding condition storage unit 100 after converting the received conditions.
[0026]
Regardless of the intention of each operator, the conditions in each device can be changed simultaneously in synchronism with, for example, a time server on the network or an atomic clock of a GPS (Global Pointing System) satellite.
[0027]
Next, the encoding processing unit 101 includes a first transmission buffer 101a, an encoding position determination unit 101b, an encoding processing unit 101c (in a narrow sense), a temporary storage area 101d, and a second transmission buffer 101e.
[0028]
First, the first transmission buffer 101a is a storage unit that accumulates data received from the outside, particularly serial bit data. Alternatively, it may be said that transmission data to be encoded by the encoding processing unit 101c described later is accumulated. Further, the first transmission buffer 101a and a second transmission buffer 101e to be described later serve as a FIFO (First In First Out) memory capable of serial-parallel conversion of digital data.
[0029]
The encoding position determination unit 101b reads the bit data stored in the first transmission buffer 101a one byte at a time in the storage order, and determines whether the read bit data matches the above bit pattern. If the two match, the position counter held thereby identifies the bit data to be encoded by the encoding processing unit 101c at the next stage.
[0030]
When the 1-byte bit data read from the first transmission buffer 101a matches the bit pattern described above, the encoding processing unit 101c has bit data within the processing range indicated by the relative position from the bit data. On the other hand, encoding processing is performed by either (a) addition (b) XOR (c) rotation or (d) replacement using the protection key value as a parameter. The temporary storage area 101d is a work area used by the encoding position determination unit 101b and the encoding processing unit 101c for the encoding process.
[0031]
The second transmission buffer 101e is a storage unit that accumulates the bit data that has been subjected to the above processing in the encoding processing unit 101c and the bit data that has not been subjected to the above processing (through bit data). Alternatively, transmission data after encoding by the encoding processing unit 101c may be stored.
[0032]
Next, the decoding processing unit 102 includes a first reception buffer 102a, a decoding position determination unit 102b, a (narrowly defined) decoding processing unit 102c, a temporary storage area 102d, and a second reception buffer 102e. The processing opposite to that of the processing unit 101 is performed.
[0033]
First, the first reception buffer 102a is a storage unit for accumulating data received from the outside, particularly serial bit data. Alternatively, it may be said that reception data to be decoded by a decoding processing unit 102c described later is accumulated. Further, the first reception buffer 102a and a second reception buffer 102e, which will be described later, function as a FIFO (First In First Out) memory that enables serial-parallel conversion of digital data.
[0034]
The decoding position determination unit 102b reads the bit data stored in the first reception buffer 102a one byte at a time in the storage order, and determines whether the read bit data matches the above bit pattern. If the two match, the position counter held thereby identifies the bit data to be decoded by the decoding processing unit 102c at the next stage.
[0035]
When the 1-byte bit data read from the first reception buffer 102a matches the above bit pattern, the decoding processing unit 102c has bit data within the processing range indicated by the relative position from the bit data. On the other hand, decryption processing is performed by either (a) subtraction (b) XOR (c) rotation or (d) replacement using the protection key value as a parameter. Which process is performed depends on the above-described (a) addition (b) XOR (c) rotation or (d) replacement performed on the data to be decoded by the encoding processing unit 101c at the time of encoding. It is determined by which one. The temporary storage area 102d is a work area used by the decoding position determination unit 102b and the decoding processing unit 102c for the decoding process.
[0036]
The second reception buffer 102e is a storage unit that accumulates the bit data that has been subjected to the above processing in the decoding processing unit 102c and the bit data that has not been subjected to the above processing (through bit data). Alternatively, it may be said that the received data after decoding by the decoding processing unit 102c is accumulated.
[0037]
Note that the encoding position determination unit 101b and the decoding position determination unit 102b are functionally identical to each other, and in practice, one determination unit is shared by the encoding processing unit 101 and the decoding processing unit 102. You may do it. Also, the encoding processing unit 101c and the decoding processing unit 102c have the same processing outline as will be described later, and thus can actually share the overlapping portion. Each of the above units may be realized by hardware using a dedicated circuit or the like. Here, however, a program recorded on various media such as HD, CD-ROM, and MO is read out to a RAM or the like, and is read by a CPU. By executing the above, each of the above-described units is realized by software.
[0038]
The first transmission buffer 101a of the encoding processing unit 101 and the first reception buffer 102a of the decoding processing unit 102, the temporary storage areas 101d and 102d, and the second transmission buffer 101e and the second reception buffer 102e are also stored. Since the functions are the same except for the difference, one buffer or the like may serve as both. Actually, both of these are realized by a RAM.
[0039]
The encoded position determination unit 101b and the decoding position determination unit 102b correspond to the “determination processing unit” in the claims, and the processing performed by the encoding position determination unit 101b and the decoding position determination unit 102b correspond to the “determination processing step” in the claims. In addition, the encoding processing unit 101c and the decoding processing unit 102c also serve as “arithmetic processing means”, “rotation processing means”, and “replacement processing means” in the claims. Process, “Rotation process” and “Replacement process” are included.
[0040]
Next, the operation of the data protection processing apparatus according to the first embodiment, specifically, (a) addition / subtraction (b) XOR (c) rotation (d) exchange in each case of encoding processing and decoding processing Details will be described. In the following description, the warp value is always 1 for the sake of simplicity. This means that the processing range always starts from one byte after the bit data that matches the predetermined bit pattern. In other words, the encoding / decoding is always performed immediately after the bit data that matches the predetermined bit pattern. Means that.
[0041]
(A) Encoding and decoding by four arithmetic operations
FIG. 2 is a flowchart of a procedure of an encoding process by addition and a decoding process by subtraction in the data protection processing apparatus according to the first embodiment. The difference between the encoding process and the decoding process is that the process in step S204, which will be described later, is only the addition of the protection key value in the former, and the subtraction of the protection key value in the latter. It shows. Hereinafter, the procedure of the encoding process will be described first, and then the procedure of the decoding process will be described focusing on the difference from the procedure.
[0042]
It is assumed that the value of the position counter held by the encoded position determination unit 101b is initialized to 0 prior to the start of the processing according to this flowchart. First, in step S201, the encoding position determination unit 101b reads 1-byte bit data in the accumulation order from the encoding target transmission data accumulated in the first transmission buffer 101a.
[0043]
Next, in step S202, the encoding position determination unit 101b determines whether the value of the position counter held by the encoding position determination unit 101b is greater than zero. If the position counter is 0 (step S202: No), it is not necessary to perform encoding processing on the read bit data. In other words, it is determined that the read bit data is not at the position to be encoded. To do. In step S203, it is determined whether or not the bit data matches the above bit pattern.
[0044]
If the read bit data does not match the predetermined bit pattern (step S203: No), the encoding position determination unit 101b passes the read bit data to the encoding processing unit 101c at the next stage in step S208, The encoding processing unit 101c writes the bit data as it is in the second transmission buffer 101e.
[0045]
If the read bit data matches the predetermined bit pattern (step S203: Yes), the encoded position determination unit 101b increments the held position counter in step S206, and proceeds to step S208. Bit data is written in the second transmission buffer 101e as it is.
[0046]
If the value of the position counter is greater than 0 in step S202 (step S202: Yes), the encoded position determination unit 101b needs to perform encoding processing on the read bit data, in other words, the read value is read. It is determined that the bit data is at a position to be encoded, and the bit data is transferred to the encoding processing unit 101c at the next stage and requested to be encoded. In step S204, the encoding processing unit 101c that has received the request adds the protection key value read from the encoding / decoding condition storage unit 100 to the bit data.
[0047]
Next, in step S205, the encoding position determination unit 101b determines whether or not the value of the position counter held is smaller than the processing range read from the encoding / decoding condition storage unit 100. If the value of the position counter is smaller than the processing range (step S205: Yes), the value of the position counter is incremented in step S206, and conversely if the processing range is reached (step S205: No), step After the position counter value is initialized to 0 in S207, the process proceeds to step S208, and the bit data after addition of the protection key value is written to the second transmission buffer 101e.
[0048]
FIG. 3 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 2 as a specific example. As shown in the figure, it is assumed that the encoding conditions are a bit pattern of 5D, a warp value of 1, a processing range of 4, and a protection key value of 1E.
[0049]
In step S201, 3F, which is the first one byte, is read out from the pre-encoding data in the first transmission buffer 101a. Since the value of the position counter is 0 at this time (step S202: No), step S203 Migrate to Since 3F does not match 5D (step S203: No), 3F is stored in the second transmission buffer 101e as it is in step S208.
[0050]
Next, 5D immediately after that is read again in step S201, and since the value of the position counter is 0 at this time (step S202: No), the process proceeds to step S203. Since 5D matches a predetermined bit pattern (step S203: Yes), the value of the position counter is incremented in step S206, and then 5D is stored as it is in the second transmission buffer 101e in step S208.
[0051]
Next, 9B immediately after is read again in step S201, and since the value of the position counter is 1 at this time (step S202: Yes), 1E which is a protection key value is added to 9B in step S204. When the value after addition exceeds a value that can be expressed by 1 byte, only the excess is set as the value after addition.
[0052]
Then, the position counter 1 is compared with the processing range 4 in step S205, and the former is still smaller than the latter (step S205: Yes). After the position counter is incremented in step S206, the value is added in step S208. Value B9 (= 9B + 1E) is stored in the second transmission buffer 101e.
[0053]
Next, 11 immediately after is read again in step S201, and since the value of the position counter is 2 at this time (step S202: Yes), similarly, the addition of the protective key value in step S204 and the position counter in step S206 are performed. After the increment, the added value 2F (= 11 + 1E) is accumulated in the second transmission buffer 101e in step S208.
[0054]
Next, 40 immediately after is read again in step S201, and the value of the position counter is 3 at this point (step S202: Yes). Similarly, the addition of the protective key value in step S204 and the position counter in step S206 are performed. In step S208, the added value 5E (= 40 + 1E) is accumulated in the second transmission buffer 101e.
[0055]
Next, A9 immediately after is read again in step S201, and since the value of the position counter is 4 at this point (step S202: Yes), the protection key value is similarly added in step S204. Since the value of the position counter reaches the processing range at this point (step S205: No), the value C7 (= A9 + 1E) after the addition in step S208 is initialized after the position counter is initialized to 0 in step S207. Accumulated in the second transmission buffer 101e.
[0056]
Next, the last DD is read again in step S201, and the value of the position counter is 0 at this time (step S202: No), so that the DD is determined in step S208 after matching with the bit pattern in step S203. It is stored in the second transmission buffer 101e as it is.
[0057]
Note that the decoding of the data encoded as described above is similarly performed according to the procedure of the flowchart shown in FIG. However, in this case, the processing in step S204 is not addition but subtraction, and each unit of the encoding processing unit 101 in the above description is replaced with a corresponding unit of the decoding processing unit 102, respectively. For example, in the case of the encoded data shown in FIG. 3, the protection key value 1E is subtracted from the numerical values B9 to C7 to which the protection key value 1E is added at the time of decoding. It can be seen that the data after decoding returns to the original data before encoding.
[0058]
(B) Encoding and decoding by logical operation
Next, FIG. 4 is a flowchart showing the procedure of the XOR encoding / decoding process in the data protection processing apparatus according to the first embodiment. In the case of XOR, the encoding and decoding procedures are completely the same as will be described later. The essential difference from the encoding / decoding processing by the four arithmetic operations shown in FIG. 2 is only that the processing in step S404 is XOR (exclusive OR) of logical operation, not addition or subtraction. These steps are the same as those in FIG.
[0059]
FIG. 5 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 4 as a specific example. As shown in the figure, it is assumed that the encoding conditions are a bit pattern of 5D, a warp value of 1, a processing range of 4, and a protection key value of 1E.
[0060]
In step S401, 3F is first read from the pre-encoding data in the first transmission buffer 101a. Since the value of the position counter is 0 at this time (step S402: No), the process proceeds to step S403. Since 3F does not match 5D (step S403: No), 3F is stored in the second transmission buffer 101e as it is in step S408.
[0061]
Next, 5D is read again in step S401, and since the value of the position counter is 0 at this time (step S402: No), the process proceeds to step S403. Since 5D matches a predetermined bit pattern (step S403: Yes), the value of the position counter is incremented in step S406, and then 5D is stored in the second transmission buffer 101e as it is in step S408.
[0062]
Next, 9B is read again in step S401, and since the value of the position counter is 1 at this time (step S402: Yes), XOR between this 9B and the protection key value 1E is calculated in step S404. . 9B is binary notation, and 10011011, 1E is also 0111110, and its XOR is 10000101, that is, 85. Then, the position counter 1 is compared with the processing range 4 in step S405, and the former is still smaller than the latter (step S405: Yes). After the position counter is incremented in step S406, XOR is performed in step S408. Is stored in the second transmission buffer 101e.
[0063]
Next, 11 is read again in step S401, and the value of the position counter is 2 at this time (step S402: Yes). Similarly, XOR with the protection key value in step S404, and the position counter in step S406. In step S408, the value 0F after XOR is stored in the second transmission buffer 101e.
[0064]
Next, 40 is read again in step S401, and the value of the position counter is 3 at this time (step S402: Yes). Similarly, XOR with the protection key value in step S404, and the position counter in step S406. After the increment, the value 5E after XOR is stored in the second transmission buffer 101e in step S408.
[0065]
Next, A9 is read again in step S401, and the value of the position counter is 4 at this time (step S402: Yes). Similarly, in step S404, XOR with the protection key value is calculated. At this time, the value of the position counter reaches the processing range (step S405: No). After the position counter is initialized to 0 in step S407, the value B7 after XOR is set to the second transmission buffer in step S408. 101e is accumulated.
[0066]
Next, the last DD is read again in step S401, and since the value of the position counter is 0 at this time (step S402: No), after the match with the bit pattern in step S403 is determined, the DD is determined in step S408. Are stored in the second transmission buffer 101e as they are.
[0067]
If the same encoding is further repeated for the encoded data, the data after the second encoding returns to the data before the first encoding. In the encoded data shown in FIG. 5, the XOR is applied again from 85 after 1 byte of 5D (= after the warp value) to B7 for 4 bytes (= within the processing range). For example, 85 is 10000101 in binary notation, and the protection key value 1E is also 0111110, and their XOR is 10011011, that is, the original 9B.
[0068]
Thus, in the case of XOR, the encoding procedure and the decoding procedure are completely the same. However, each part of the encoding processing unit 101 in the above description is read as a corresponding part of the decoding processing unit 102 in the case of decoding.
[0069]
(C) Coding and decoding by rotation (ROTATE)
Next, FIG. 6 is a flowchart showing a procedure of encoding / decoding processing by rotation (ROTATE) in the data protection processing apparatus according to the first embodiment. The difference between the encoding process and the decoding process is that the rotation in step S609, which will be described later, is only the protection key value left in the former and the protection key value right in the latter. It shows.
[0070]
FIG. 7 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 6 as a specific example. As shown in the figure, it is assumed that the encoding conditions are a bit pattern of 5D, a warp value of 1, a processing range of 4, and a protection key value of 1E.
[0071]
In step S601, first, 3F is read from the pre-encoding data in the first transmission buffer 101a. Since the value of the position counter is 0 at this point (step S602: No), the process proceeds to step S603. Since 3F does not match 5D (step S603: No), 3F is stored in the second transmission buffer 101e as it is in step S610.
[0072]
Next, 5D is read again in step S601, and the value of the position counter is 0 even at this time (step S602: No), so the process proceeds to step S603. Since 5D matches a predetermined bit pattern (step S603: Yes), after the position counter value is incremented in step S604, 5D is stored in the second transmission buffer 101e as it is in step S610.
[0073]
Next, 9B is read again in step S601, and since the value of the position counter is 1 at this time (step S602: Yes), in step S605, the 9B is stored in the temporary storage area 101d by the encoded position determination unit 101b. Evacuated. Then, the position counter 1 is compared with the processing range 4 in step S606, and the former is still smaller than the latter (step S606: Yes). After the position counter is incremented in step S607, the next in step S601. 11 is read out.
[0074]
Since the value of the position counter is 2 at this time (step S602: Yes), similarly, the process proceeds to step S601 again after saving to the temporary storage area 101d in step S605 and incrementing the position counter in step S607. .
[0075]
Thereafter, 40 and A9 are similarly read out and sequentially saved in the temporary storage area 101d. After the value of the position counter becomes 4 at the time of reading A9 (step S606: No), the process proceeds to step S608. Initialize the counter to zero. In step S609, the encoding processing unit 101c reads all the data saved in the temporary storage area 101d up to this point as one numerical value, and rotates it to the left by 1E bit which is a protection key value.
[0076]
At this time, bit data (10011011 00010001 01000000 10101001) meaning “9B 11 40 A9” is saved in the temporary storage area 101d. Rotating this 4-byte bit data by 1E bit to the left is the same as rotating 2 bits to the right, and the value after rotation is “66 C4 50 2A” (01100110 11000100 01010000 00101010) It becomes. In step S610, these values are stored in the second transmission buffer 101e.
[0077]
However, the above is the result when a CPU generally called “big endian” such as Motorola or Sun SPARC is used, and the result is different when a CPU generally called “little endian” such as Intel or DEC Alpha is adopted. Come.
[0078]
That is, when “9B 11 40 A9” sequentially saved in the temporary storage area 101d = stack by the encoding position determination unit 101b is taken into the register of the encoding processing unit 101c = CPU for rotation, the order is “little endian”. Since it is replaced in units of bytes such as “A9 40 11 9B”, the result of rotating this by 1 E bits to the left is “EA 50 04 66”. Further, when the data is written in the second transmission buffer 101e, the order is similarly changed, so that the encoded data has the order of “66 04 50 EA”. However, the above-mentioned difference is exclusively formal due to the byte order adopted by the CPU, and the essence of the processing is the same even though the result is different.
[0079]
Next, the last DD is read again in step S601. At this time, the value of the position counter is 0 (step S602: No), so that a match with the bit pattern in step S603 is performed, and then DD in step S610. Are stored in the second transmission buffer 101e as they are.
[0080]
Note that the decoding of the data encoded as described above is similarly performed according to the procedure of the flowchart shown in FIG. However, in this case, the rotation in step S609 is performed only for the protection key value in the right direction opposite to that at the time of encoding. In addition, each unit of the encoding processing unit 101 in the above description is read as a corresponding unit of the decoding processing unit 102 in the case of decoding.
[0081]
(D) Encoding and decoding by replacement (SWAP)
Next, FIG. 8 is a flowchart showing a procedure of encoding / decoding processing by replacement (SWAP) in the data protection processing device according to the first exemplary embodiment. In the case of replacement, the encoding and decoding procedures are completely the same as will be described later.
[0082]
FIG. 9 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 8 as a specific example. As shown in the figure, the encoding conditions are a bit pattern of 5D, a warp value of 1, and a protection key value of 32. In the case of replacement, the lower 4 bits of the protection key value indicate the size (number of bytes) of the bit data to be replaced, and the upper 4 bits indicate the distance (number of bytes) from the bit data to the bit data to be replaced. Therefore, the above condition generally means that 2 bytes immediately after 5D (warp value = 1 byte later) are replaced with 2 bytes 3 bytes ahead.
[0083]
In step S801, 3F is first read from the pre-encoding data in the first transmission buffer 101a. Since the value of the position counter is 0 at this point (step S802: No), the process proceeds to step S803. Since 3F does not match 5D (step S803: No), 3F is stored in the second transmission buffer 101e as it is in step S809.
[0084]
Next, 5D is read again in step S801, and the value of the position counter is also 0 at this time (step S802: No), so the process proceeds to step S803. Since 5D matches a predetermined bit pattern (step S803: Yes), the value of the position counter is incremented in step S804, and then 5D is stored in the second transmission buffer 101e as it is in step S809.
[0085]
Next, 9B is read again in step S801, and since the value of the position counter is 1 at this time (step S802: Yes), in step S805, the 9B is stored in the temporary storage area 101d by the encoded position determination unit 101b. Evacuated. In step S806, the position counter 1 is compared with the size of the bit data to be exchanged + the distance to the exchange destination, here 2 + 3 = 5, and the former is still smaller than the latter (step S806: Yes), so in step S807. After the position counter is incremented, the next 11 is read in step S801.
[0086]
Since the value of the position counter is 2 at this time (step S802: Yes), similarly, the process proceeds to step S801 again after saving to the temporary storage area 101d in step S805 and incrementing the position counter in step S807. .
[0087]
Thereafter, 40, A9, and DD are similarly read and sequentially saved in the temporary storage area 101d. After the value of the position counter becomes 5 at the time of reading the DD (step S806: No), the position in step S808 is read. After the counter is initialized to 0, in step S809, the encoding processing unit 101c sequentially extracts data in the temporary storage area 101d and stores it in the second transmission buffer 101e.
[0088]
At this time, first, the replacement size = 2 bytes, A9 and DD are extracted from the data with the later saved order. Next, from the data saved earlier, the data saved after that is taken out, 40 bytes are taken out so that the replacement size = 2 bytes, here 9B and 11 are left. Finally, by removing the remaining data, here 9B and 11, 9B and 11 can be exchanged with A9 and DD.
[0089]
Next, the last E7 is read again in step S801, and the value of the position counter is 0 at this time (step S802: No), so that a match with the bit pattern is determined in step S803, and E7 is determined in step S809. Are stored in the second transmission buffer 101e as they are.
[0090]
Note that if the same replacement is repeated for the replaced data, the data after the second replacement will naturally return to the data before the first replacement. Thus, in the case of replacement, the encoding procedure and the decoding procedure are completely the same. However, each part of the encoding processing unit 101 in the above description is read as a corresponding part of the decoding processing unit 102 in the case of decoding.
[0091]
As described above, according to the data protection processing device and the data protection processing method according to the first embodiment, encoding without changing the data size is possible. In addition, sequential processing such as encoding while transmitting data or decoding while receiving data is possible, and each processing is extremely simple such as four arithmetic operations and logical operations, so it is fast and can be transferred to the device. The load of can be reduced.
[0092]
In the first embodiment described above, the warp value is assumed to be 1 for the sake of convenience of explanation, but other values may of course be used. For example, when the warp value is 2 in the example shown in FIG. 3, the protection key value is added to 11, 40, A9, and DD after 2 bytes from 5D. Further, the warp value can be a negative value, for example, -1, and in this case, the protection key value is added to 3F immediately before 5D.
[0093]
In the first embodiment described above, the entire bit pattern is designated as “010110101” (5D). For example, “100 ******” (* indicates that 0 may be 0 or 1). You may make it designate only a part like. Specifically, the latter bit pattern coincides with “10000000” (80), “10000001” (81),..., “100001111” (8F), “10010000” (90), “10010001”. (91), ..., 32 of "10011111" (9F) (= 2 to the 5th power).
[0094]
In this way, if only a part of bits match, it is determined that there is a match, so that more data can be encoded, and the difficulty of decoding by an unauthorized person can be further increased. . For example, in Shift-JIS, which is one of the Japanese character codes, double-byte characters are concentrated in the range of 8140-9FF0 and E040-EEFC. Therefore, by devising a bit pattern that can cover more characters in this range (the above-mentioned “100 ***” is a typical example), the above-mentioned characters can be obtained without leaving the original characters as much as possible. Can be encoded.
[0095]
FIG. 10 shows an encoding process (encoding process by adding a protection key) with the flowchart of FIG. 2, assuming that the bit pattern is “100 ***”, the warp value is 1, the processing range is 1, and the protection key value is 35. It is explanatory drawing which shows an example of the data before and after performing. The Japanese text data shown in the figure is encoded almost without being preserved. However, since the first byte of “numb” is “11100001” (E1) and does not match the above pattern, the protection key value is not added to the second byte. As a result, only this character remains in the encoded data. Remaining.
[0096]
The coincidence with the bit pattern is technically determined by using a predetermined mask. One of the 32 values, for example, the first “10000000” (80) is selected in advance as a representative value. Of these values, the bit position to be noted in the match determination (which may be said to be a bit position where there is a match if at least this is the same), here, 1 is set to the third bit from the left. The set mask value “11100000” (E0) is prepared.
[0097]
In step S203, S403, S603, or S803 described above, the encoding position determination unit 101b or the decoding position determination unit 102b first calculates a logical sum (AND) of the determination target value and the mask value. Then, when this completely coincides with the logical sum of the representative value and the mask value calculated in advance, it is determined that the target value matches a predetermined bit pattern. For example, the AND result of “10011111” (9F) and the mask value is “10000000”, which completely matches the AND result “10000000” of the representative value and the mask value. Will match.
[0098]
Note that the above is effective when the encoding target is text data centered on Japanese, but when the target is a program, by setting conditions such that the most significant bit after encoding is set to 1, More effective encoding can be performed. The program is basically expressed as an array of 8-bit codes, but the source code uses only 7 bits out of 8 bits. Thus, if the source code is encoded in such a manner that the most significant bit is set to 1, it becomes a code that cannot be executed by a computer, and can be applied to applications such as prevention of illegal copying.
[0099]
(Embodiment 2)
In the first embodiment described above, the protection key value used for encoding / decoding is a constant (it does not change during at least one encoding / decoding), but will be described below. As in Embodiment 2, the protection key value may be regularly changed during one encoding / decoding.
[0100]
FIG. 11 is a block diagram of a schematic configuration of the data protection processing apparatus according to the second embodiment. This is a configuration in which protection key value changing units 1101f and 1102f are added to the encoding processing unit 101 and the decoding processing unit 102 of the first embodiment shown in FIG.
[0101]
The protection key value changing unit 1101f performs (a) a predetermined value for the protection key value read from the encoding / decoding condition storage unit 1100, respectively, at the time of data encoding, and the protection key value changing unit 1102f, at the time of data decoding. These values are sequentially changed by adding (b) multiplying a predetermined value or (c) dividing by a predetermined value. Hereinafter, a predetermined value to be added / multiplied or divided to the protection key value is referred to as “change value”, and the type of addition / multiplication or division is referred to as “change method”. The change value and the change method are stored in advance in the encoding / decoding condition storage unit 1100, and the protection key value changing units 1101f and 1102f read out and use them.
[0102]
Note that the above shows processing for the protection key value itself, which is different in dimension from the encoding / decoding processing using the protection key value described in the first embodiment. For example, even with the same addition, “addition (encoding by)” in the first embodiment means adding a predetermined protection key value “to” to the encoding target data. In the second embodiment, “addition (change of protection key value)” means that a predetermined change value is added to the protection key value “.”
[0103]
Accordingly, (a) addition / subtraction (b) XOR (c) rotation (d) exchange / encoding described in the first embodiment and (a) addition (b) multiplication described in the second embodiment. (C) The protection key value change by division can be arbitrarily combined, and the number of combinations is 4 × 3 = 12.
[0104]
For example, a combination in which the encoding / decoding method is addition / subtraction and the protection key value changing method is addition is “protection key value obtained by sequentially adding a predetermined change value to encoding / decoding target data. In the following (a), the change process of the protection key value by addition will be described using this example. Further, in the following (b), the encoding / decoding method is addition / subtraction and the protection key value changing method is multiplication, and in the following (c), the encoding / decoding method is addition / subtraction, and the protection key value is changed. The protection key value changing process by multiplication or division will be described in order using a combination in which the changing method is multiplication.
[0105]
(A) Change of protection key value by addition
FIG. 12 is a flowchart of an encoding / decoding process procedure involving a change of the protection key value by addition in the data protection processing apparatus according to the second embodiment. This figure is obtained by inserting steps S1208 and S1209 into the encoding / subtraction decoding process shown in FIG. The difference is that the encoding processing unit 1101c / decoding processing unit 1102c is held in the protection key value changing unit 1101f / 1102f instead of the encoding / decoding condition storage unit 1100 at the time of encoding / decoding in step S1204. The only point is that the changed protection key value is used in the previous steps S1208 and S1209.
[0106]
FIG. 13 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 12 with a specific example. As shown in the figure, the encoding conditions are as follows: the bit pattern is 83, the warp value is 1, the processing range is 1, and the (initial) protection key value is 25. The change value of the protection key value is 3B, and the change method is addition.
[0107]
It is assumed that the value of the position counter held by the encoded position determination unit 1101b is initialized to 0 prior to the start of the processing according to this flowchart. Further, it is assumed that the protection key value change unit 1101f holds the protection key value, the change value, and the change method read from the encoding / decoding condition storage unit 1100.
[0108]
The first 5B, BE, and C2 of the pre-encoding data shown in the figure are read from the first transmission buffer 1101a in step S1201, and then passed to steps S1202 and S1203, and then to the second transmission buffer 1101e in step S1210. Accumulated as it is.
[0109]
Since the next 83 (indicated by a symbol with an underline (1) in the pre-encoding data in FIG. 13) matches a predetermined bit pattern (step S1203: Yes), the process proceeds from step S1203 to step S1206. After branching and incrementing the position counter to 1, it is stored in the second transmission buffer 1101e as it is in step S1210.
[0110]
In the next 5D, since the value of the position counter is 1 at this time (step S1202: Yes), the process branches from step S1202 to step S1204, and the encoding process refers to the protection key value in the protection key value changing unit 1101f. The unit 1101c adds 25 to 82. At this time, since the value of the position counter reaches 1 in the processing range (step S1205: No), the process branches to step S1207 and the position counter is initialized to 0.
[0111]
Further, in step S1208, the protection key value changing unit 1101f adds 3B, which is the change value, to the conventional protection key value 25 to be 60. At this point, there is no problem because the protection key value after addition is within the range of values (00 to FF) that can be expressed in 1 byte. However, since the value will be exceeded as the addition is repeated, the protection key value after change in step S1209. Adjust so that does not exceed FF. Specifically, the logical sum of the value after addition and 00FF, that is, only the portion of the value after addition exceeding FF is held in the protection key value changing unit 1101f as a new protection key value.
[0112]
Then, the value 82 after adding the protection key value is accumulated in the second transmission buffer 1101e in step S1210, and the subsequent 18 bytes from 82 to 48 are sequentially transferred to the second in step S1210 through steps S1201 to S1202 and S1203. Accumulated in the transmission buffer 1101e. Since the next 83 (indicated by a symbol with (2) in the underline in FIG. 13) matches a predetermined bit pattern (step S1203: Yes), the process branches from step S1203 to step S1206, and the position counter After incrementing to 1, it is stored in the second transmission buffer 1101e as it is in step S1210.
[0113]
In the next 43, since the value of the position counter is 1 at this time (step S1202: Yes), the process branches from step S1202 to step S1204, and the encoding process refers to the protection key value in the protection key value changing unit 1101f. The unit 1101c adds 60 to A3. At this time, since the value of the position counter reaches 1 in the processing range (step S1205: No), the process branches to step S1207 and the position counter is initialized to 0.
[0114]
Further, in step S1208, the protection key value changing unit 1101f adds 3B, which is the change value, to the conventional protection key value 60, and further becomes 9B after adjustment in step S1209. In step S1210, the value A3 after adding the protection key value is stored in the second transmission buffer 1101e. Thereafter, the same processing is repeated, and 49 immediately after the next 83 (indicated by a symbol with (3) underlined in FIG. 13) is added with the protection key value 9B to become E4, and then 5D immediately after 83 ((4)) is added to the protection key value D6 (= 9B + 3B) to become 33. The encoded data is as shown in FIG.
[0115]
(B) Change of protection key value by multiplication
FIG. 14 is a flowchart of an encoding / decoding process procedure involving a change of the protection key value by multiplication in the data protection processing apparatus according to the second embodiment. The only difference from FIG. 12 is that in step S1408, the protection key value is multiplied, not added, by the change value.
[0116]
FIG. 15 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 14 with a specific example. The various encoding conditions are the same as in FIG. 13 and the change value of the protection key value is 3B, but the change method is not addition but multiplication. When the protection key value is changed by multiplication, the least significant bit of the change value must be 1 (in other words, the change value must be an odd number). Otherwise, the protection key value will always be zero after several changes to several tens of changes.
[0117]
The first 5B, BE, and C2 of the pre-encoding data shown in FIG. 15 are read from the first transmission buffer 1101a in step S1401, then passed through steps S1402 and S1403, and then sent to the second transmission buffer 1101e in step S1410. Accumulated as it is.
[0118]
Since the next 83 (indicated by a symbol with (1) underlined in the pre-encoding data in FIG. 15) matches a predetermined bit pattern (step S1403: Yes), the process proceeds from step S1403 to step S1406. After branching and incrementing the position counter to 1, it is stored in the second transmission buffer 1101e as it is in step S1410.
[0119]
In the next 5D, since the value of the position counter is 1 at this time (step S1402: Yes), the process branches from step S1402 to step S1404, and the encoding process refers to the protection key value in the protection key value changing unit 1101f. The unit 1101c adds 25 to 82. At this time, since the value of the position counter reaches 1 in the processing range (step S1405: No), the process branches to step S1407 and the position counter is initialized to 0.
[0120]
In step S1408, the protection key value changing unit 1101f multiplies the conventional protection key value 25 by 3B, which is the change value, to obtain 887. However, in step S1409, the part exceeding FF is ignored by the logical sum with 00FF, and the last two digits 87 are held in the protection key value changing unit 1101f as a new protection key value.
[0121]
Then, the value 82 after adding the protection key value is accumulated in the second transmission buffer 1101e in step S1410, and the subsequent 18 bytes from 82 to 48 are sequentially transferred to the second in step S1410 through steps S1401 to S1402 and S1403. Accumulated in the transmission buffer 1101e. Then, the next 83 (indicated by a symbol with (2) underlined in FIG. 15) matches the predetermined bit pattern (step S1403: Yes), so the process branches from step S1403 to step S1406, and the position counter After incrementing to 1, it is stored in the second transmission buffer 1101e as it is in step S1410.
[0122]
In the next 43, since the value of the position counter is 1 at this time (step S1402: Yes), the process branches from step S1402 to step S1404, and the encoding process refers to the protection key value in the protection key value changing unit 1101f. The unit 1101c adds 87 to CA. At this time, since the value of the position counter reaches 1 in the processing range (step S1405: No), the process branches to step S1407 and the position counter is initialized to 0.
[0123]
Further, in step S1408, the protection key value changing unit 1101f multiplies the conventional protection key value 87 by the change value 3B to obtain 1F1D, but in step S1409, the portion exceeding FF is ignored and becomes 1D. In step S1410, the value CA after the addition of the protection key value is accumulated in the second transmission buffer 1101e. Thereafter, the same processing is repeated, and the encoded data is as shown in FIG.
[0124]
(C) Protection key value change by division
FIG. 16 is a flowchart of a procedure of an encoding / decoding process involving a change of the protection key value by division in the data protection processing apparatus according to the second embodiment.
[0125]
FIG. 17 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 16 as a specific example. As shown in the figure, the encoding conditions are as follows: the bit pattern is 83, the warp value is 1, the processing range is 2, and the (initial) protection key value is 1325. The change value of the protection key value is 19 and the change method is division. When the protection key value is changed by division, the changed value must be sufficiently smaller than the original protection key value in order to avoid that the changed value becomes a small value of 0 or 10 or less. .
[0126]
The first 5B, BE and C2 of the pre-encoding data shown in the figure are read from the first transmission buffer 1101a in step S1601, and then passed through steps S1602 and S1603, and then sent to the second transmission buffer 1101e in step S1612. Accumulated as it is.
[0127]
Since the next 83 (indicated by a symbol with (1) underlined in the pre-encoding data in FIG. 17) matches the predetermined bit pattern (step S1603: Yes), the process proceeds from step S1603 to step S1604. After branching and incrementing the position counter to 1, it is stored in the second transmission buffer 1101e as it is in step S1612.
[0128]
In the next 5D, since the value of the position counter is 1 at this time (step S1602: Yes), the process branches from step S1602 to step S1605, and is saved in the temporary storage area 1101d by the encoded position determination unit 1101b. Since the value of the position counter is smaller than the processing range at this time (step S1606: Yes), the process branches from step S1606 to step S1607. After incrementing the position counter to 2, the next 82 is read in step S1601. It is.
[0129]
Then, after step S1602, in step S1605, this 82 is also saved in the temporary storage area 1101d. At this point, the value of the position counter reaches 2 in the processing range (step S1606: No), and the process branches to step S1608. The counter is initialized to zero. In step S1609, the encoding processing unit 1101c, which refers to the protection key value in the protection key value changing unit 1101f, adds the protection key value 1325 to 825D read from the temporary storage area 1101d to become 9582 ( When a little endian CPU is used).
[0130]
Further, in step S1610, the protection key value changing unit 1101f divides the conventional protection key value 1325 by the change value 19 to obtain 00C4 (00000000111000100). However, in order to avoid that the protection key value becomes too small as the processing is repeated, the division result is shifted to the left until the most significant bit becomes 1 in step S1611 to be C400 (1100010000000). Thus, the value is adjusted to a sufficiently large value (note that “→” in FIG. 17 represents a left shift until the most significant bit becomes 1). Then, this adjusted value C400 is held in the protection key value changing unit 1101f as a new protection key value.
[0131]
Then, 9582 of the value after addition of the protection key value is accumulated in the second transmission buffer 1101e in step S1612, and the subsequent 18 bytes from 82 to 48 are sequentially transferred to the second in step S1612 through steps S1601 to S1602 and S1603. Accumulated in the transmission buffer 1101e. Then, the next 83 (indicated by a symbol with (2) underlined in FIG. 17) matches the predetermined bit pattern (step S1603: Yes), so the process branches from step S1603 to step S1604, and the position counter After incrementing to 1, it is stored in the second transmission buffer 1101e as it is in step S1612.
[0132]
Similarly, the next 43 and 9E are saved in the temporary storage area 1101d in step S1605, and the changed protection key value C400 is added to 6243 in step S1608, and then stored in the second transmission buffer 1101e in step S1612. Is done. At this time, the protection key value is also changed to FAE0 through the division in step S1610 and the adjustment in step S1611. Thereafter, the same processing is repeated, and the encoded data is as shown in FIG.
[0133]
As is clear from the above description, the data protection processing device according to the second embodiment changes the protection key value every time a predetermined bit pattern is found in the encoding target data, or in other words, applies it for each processing range. Since the protection key value is changed, it becomes more difficult to decrypt the encoded data by an unauthorized person.
[0134]
(Embodiment 3)
As is apparent from the above, the data after encoding according to the first and second embodiments described above is the bit pattern, warp value, processing range, protection key value, encoding method, or protection used for the encoding. If there is no information such as the change value and change method of the key value, it cannot be decrypted normally. Therefore, when data is encoded and sent to the other party, the above information necessary for the decoding must be notified to the other party in some form, and the notification is eavesdropped (stolen) by a third party. It must not be.
[0135]
Therefore, in the third embodiment described below, the encoded data itself is embedded with the above information necessary for decoding. However, it is not always necessary to change all of the above information. For example, if only the protection key value is changed at the time of communication or depending on the communication partner, other bit patterns, warp values, processing range, encoding method, protection Even if the change value and the change method of the key value are the same, sufficiently safe encoding is possible. Therefore, in the following, it is assumed that other conditions are fixed, and only the protection key value used for encoding is made variable, and the protection key value is embedded in the encoded data.
[0136]
FIG. 18 is a block diagram of a schematic configuration of the data protection processing apparatus according to the third embodiment. This is obtained by adding an embedded information setting unit 1803 to that of the first embodiment shown in FIG. The embedded information setting unit 1803 accepts input of embedded information to be described later from the operator and stores it in the encoding / decoding condition storage unit 1800. The encoding / decoding condition storage unit 1800 according to the third embodiment holds the embedded information set by the embedded information setting unit 1803 in addition to the bit pattern and warp value similar to those in the first and second embodiments. ing.
[0137]
FIG. 19 is a flowchart of an encoding process performed by the data protection processing apparatus according to the third embodiment. FIG. 20 is an explanatory diagram for explaining the processing according to the flowchart of FIG. 19 as a specific example. Hereinafter, the procedure shown in FIG. 19 will be sequentially described along this example.
[0138]
Actually, the pre-encoding data shown in FIG. 20 is data after the encoding process according to any one of the flowcharts described in the first or second embodiment is performed in advance. In the flowchart of FIG. 19, after this first encoding, the protection key value used for the first encoding is embedded in the data after the first encoding. The encoding process is performed.
[0139]
Prior to the start of the processing according to the flowchart, the encoding / decoding condition storage unit 1800 stores a bit pattern (3F in the example of FIG. 20) and a warp value (01), as well as embedded information necessary for encoding. Is previously set by the embedded information setting unit 1803. The embedded information is specifically as follows.
[0140]
(A) Embedded data
The data is embedded in the data to be encoded, and the operator actually sets an arbitrary protective key value used for the first encoding. The initial value is the value set by the operator in this way, which is 75 (01110101) in the example of FIG. 20, but is sequentially changed every time it is embedded as described later. The value of the embedded data at the completion of encoding (which may be referred to as a final change result) is particularly called “surplus value”.
[0141]
(B) Embedded bit
Among the embedded data, it is the highest bit among n (one in the example of FIG. 20 as will be described later) consecutive bits embedded in the encoding target data. The initial value is 7, that is, the most significant bit, but is moved down by n bits each time embedding as described later. However, after the least significant bit, it jumps to the most significant bit.
[0142]
(C) Embedded bits
The bit position where the embedded bit is embedded in the data to be encoded is represented by a numerical value (hereinafter referred to as “process value”) in which the bit is set at the position. In the example of FIG. 20, it is 20 (00100000), and the third bit from the left having a value of 1 is the position where the embedded bit is embedded. The number n of bits that is 1 (1 in this example) represents the number of embedded bits. Since the embedded bits and the embedded bits correspond one-to-one as described later, the number of embedded bits at the same time. n will also be expressed. This embedded bit is not changed in the middle of one encoding like the above embedded bit, but when a processing value is not specified (when 00H is specified), The embedded bit may be the same bit as the embedded bit. At this time, the embedded bits are also moved downward by 1 bit each time embedded.
[0143]
(D) Embedding start position and embedding end position
Of the data to be encoded, the start position and the end position of the range in which the embedded data is embedded. By arbitrarily setting the embedding start / end position, encoding by embedding can be performed on a part of data in the first transmission buffer 1801a (for example, only a credit card number portion in the transmission document). However, unless otherwise specified, the embedding start position indicates the head position of all data in the first transmission buffer 1801, and the embedding end position indicates the end position. In the example of FIG. 20, neither designation is made, and embedding of embedded data is performed over all data in the first transmission buffer 1801a.
[0144]
(E) Embedding method
SWAP / XOR / ROTATE, and SWAP is designated in the example of FIG. Details of each process will be described later.
(F) Embedding direction
It is assumed that either the forward direction or the reverse direction is specified, and the forward direction is designated in the example of FIG.
[0145]
Prior to the start of the processing according to the flowchart of FIG. 19, the value of the position counter held by the encoding position determination unit 1801b is 0, and the processing pointer indicating which data in the first transmission buffer 1801a is focused on It is assumed that each has been initialized at the embedding start position.
[0146]
In step S1901, the encoding position determination unit 1801b performs bit data for one byte at the position indicated by the processing pointer from the data before encoding (data in the first transmission buffer 1801a) illustrated in FIG. That is, the top 2D of the data is read.
[0147]
Next, in step S1902, the encoding position determination unit 1801b determines whether the data read above matches a predetermined bit pattern read from the encoding / decoding condition storage unit 1800, in this example, 3F. Since the read data is not 3F here (step S1902: No), the process branches to step S1903, and the read 2D is saved in the temporary storage area 1801d.
[0148]
After that, in step S1904, the encoding position determination unit 1801b increments the value of the position counter that is held, and in step S1905, the incremented position counter value is read from the encoding / decoding condition storage unit 1800. Determine if it is larger. Since the value of the position counter at this point is 1, and the warp value of 1 has not yet been exceeded (step S1905: No), steps S1906 and S1907 are skipped and the process proceeds to step S1908.
[0149]
In step S1908, the encoding position determination unit 1801b adds 1 byte to the value of the processing pointer held, and in step S1909, the address after the addition is an embedded end position, in this case, the end of the data in the first transmission buffer 1801a. Judge whether or not. At this time, the processing pointer indicates the next 3F address of 2D (step S1909: No), so the process returns to step S1901 to read 3F at the position indicated by the processing pointer. Since it is determined in step S1902 that it matches the predetermined bit pattern (step S1902: Yes), the process branches to step S1910.
[0150]
In step S1910, the encoding processing unit 1801c reads out the first 1 byte of the data saved in the temporary storage area 1801d, that is, only 2D is saved here, and reads the 2D. Then, the embedded bit of the embedded data 75, here the leftmost bit indicated by the initial value 7, is embedded in this 2D embedded bit, here the third bit from the left indicated by the processing value 20 (00100000).
[0151]
Specifically, the term “embedding” here refers to replacement (SWAP) designated as an embedding method. That is, the third bit “1” (indicated by an underline in FIG. 20) from the left of 2D (00101101), which is the embedding target value, and the leftmost bit “0” (character in FIG. 20) of embedded data 75 (01110101) The former is set to 0D (000001101) and the latter is set to F5 (11110101).
[0152]
In step S1911, the encoding processing unit 1801c displays the embedded data (here, 0D), the remaining data in the temporary storage area 1801d (here, there is nothing since 2D is extracted), and the encoding position. The data (in this case, 3F) read out in the immediately preceding step S1902 delivered from the determination unit 1801b is sent to the second transmission buffer 1801e in this order.
[0153]
In step S1912, the encoding processing unit 1801c moves the embedded bits by n bits in the lower direction. Since the embedded bit at this point is the initial value 7 (the leftmost bit) and n is 1 as described above, the embedded bit is changed to the second bit from the left instead of the leftmost bit. Will be changed.
[0154]
In step S1913, the encoding position determination unit 1801b initializes the position counter held therein to zero. After that, in step S1901, the encoding position determination unit 1801b reads 24 at the position of the processed pointer after the addition of the processing pointer in steps S1908 and S1909 and the comparison with the embedding end position. Then, 24 is saved in the temporary storage area 1801d in step S1903 through step S1902.
[0155]
Thereafter, the position counter incremented to 1 in step S1904 is determined not to exceed the warp value yet in step S1905 (step S1905: No), so the addition of the processing pointer and the embedding end position in steps S1908 and S1909 After the comparison, the next 6C is read in step S1901.
[0156]
This 6C is also saved in the temporary storage area 1801d in step S1903 via step S1902, but it is determined in step S1904 that the incremented position counter 2 has exceeded the warp value 1 in step S1905 (step S1905). : Yes), the process branches to step S1906.
[0157]
In step S1906, the encoding processing unit 1801c reads out the first one byte saved in the temporary storage area 1801d, which is the first one of the saved data, because only 24 is saved here. The data is sent to the second transmission buffer 1801e. Thereafter, in step S1907, the encoding position determination unit 1801b decrements the value of the position counter held from 2 to 1. Then, after the addition of the processing pointer in steps S1908 and S1909 and the comparison with the embedding end position, the next 68 is read out in step S1901.
[0158]
This 68 is also saved in the temporary storage area 1801d in step S1903 through step S1902, but it is determined in step S1904 that the incremented position counter 2 has exceeded the warp value 1 in step S1905 (step S1905: Yes). ), 6C saved earlier in step S1906 is sent to the second transmission buffer 1801e as it is. Thereafter, similarly, after the position counter is decremented in step S1907, the addition of the processing pointer is compared with the embedding end position in steps S1908 and S1909, and the next 75 is read out in step S1901.
[0159]
Thereafter, 2D, B0, 04, and 75 are read in the same manner and sequentially stored in the second transmission buffer 1801e via the temporary storage area 1801d. However, since 3F to be read next matches a predetermined bit pattern ( Step S1902: Yes) The process branches to step S1910.
[0160]
At that time, the 75 (01110101) embedded bits immediately before being saved in the temporary storage area 1801d, that is, the third bit “1” from the left, and this time of the embedded data F5 (11110101) at this time The embedding bit at, ie, the second bit “1” from the left is replaced. However, since the replacement values are the same, both values do not change even after embedding.
[0161]
Thereafter, 75 and 3F (after embedding) are sequentially sent to the second transmission buffer 1801e in step S1911. In step S1912, the embedded bit is moved down by one bit, that is, changed to the third bit from the left, and then the position counter is initialized to 0 in step S1913.
[0162]
Thereafter, the same processing is repeated until the processing pointer exceeds the embedding end position. When the next 3F is found, the third bit “0” from the left of 98 (10011000) at the warp value = 1 byte before is set. The third bit “1” from the left of the embedded data F5 (11110101) is replaced, and B8 (10111000) after the embedding is stored in the second transmission buffer 1801e. The embedded data is changed to D5 (11010101), and the embedded bit is changed to the fourth from the left, and embedded in the AB immediately before the next 3F. The details of the subsequent processing and the encoded data are shown in FIG.
[0163]
Next, FIG. 21 is a flowchart showing a procedure of the decrypting process in the data protection processing apparatus according to the third embodiment. FIG. 22 is an explanatory diagram for explaining the processing according to the flowchart of FIG. 21 as a specific example. Hereinafter, the procedure shown in FIG. 21 will be sequentially described along this example. Note that FIG. 22 performs decoding exactly the reverse of the encoding of FIG. 20, and the encoded data shown in FIG. 20 is the data before decoding shown in FIG.
[0164]
Prior to the start of the processing of FIG. 21, the encoding / decoding condition storage unit 1800 stores a bit pattern (3F in the example of FIG. 22) and a warp value (01), as well as embedded information necessary for decoding. Is previously set by the embedded information setting unit 1803. The embedded information is specifically as follows.
[0165]
(A) Embedded data
The data is embedded in the decoding target data, and the initial value is uniquely determined from the embedded data used at the time of encoding the target data. Specifically, it is the value of the embedded data at the completion of encoding, that is, the surplus value. When decoding the encoded data shown in FIG. 20 = the data before decoding shown in FIG. 22, the right in the table of FIG. The final embedded data CE (11001110) at the lower corner is the initial value.
[0166]
(B) Embedded bit
Among the embedded data, it is the highest bit among n consecutive bits embedded in the data to be decoded. The initial value is the value of the embedded bit at the completion of encoding, and is the fifth bit from the left when decoding the encoded data shown in FIG. 20 = the decoded data shown in FIG.
[0167]
(C) Embedded bits
This is a bit position in the decoding target data where the embedded bit is embedded, and is the same position set when the target data is encoded.
[0168]
(D) Embedding start position and embedding end position
Among the decoding target data, the start position and the end position of the range in which the embedded data is embedded, which are the same as the embedded start position and the embedded end position set when the target data is encoded.
[0169]
(E) Embedding method
SWAP / XOR / ROTATE, which is the same as the embedding method set when encoding the decoding target data.
[0170]
(F) Embedding direction
This is either the forward direction or the reverse direction, and is the direction opposite to the direction set when the decoding target data is encoded.
[0171]
The initial values for (a) and (b) and the values themselves for (c) to (f) are provided from the data encoding side to the decoding side together with the encoded data. However, here, for convenience of explanation, it is assumed that only (a) is attached to the encoded data, and (c) to (f) are fixed.
[0172]
Note that (b) can be calculated on the decoding side based on how many predetermined bit patterns are included in the data to be decoded. Every time a predetermined bit pattern is found, the embedded bits at the time of encoding are shifted downward by n from the most significant bit. Therefore, if there are a bit patterns in the data before and after encoding, the final Is a position shifted to the right by the “remainder of a * n / 8” from the leftmost end of the initial value. For example, the encoded data shown in FIG. 20 includes 12 3Fs (a = 12) and n = 1, so that the embedded bits at the end of encoding are a remainder of 12 * 1/8 from the leftmost end. It is shifted by 4 and is fifth from the left. This is the initial value of the embedded bit at the time of decoding.
[0173]
Prior to the start of the processing shown in FIG. 21, the value of the position counter held by the decoding position determination unit 1802b is 0, and the processing pointer indicating which data in the first reception buffer 1802a is focused is embedded. It is assumed that each is initialized at the end position.
[0174]
In step S2101, the decoding position determination unit 1802b performs bit data for one byte at the position indicated by the processing pointer from the data before decoding (data in the first reception buffer 1802a) illustrated in FIG. That is, the last 34 of the data is read.
[0175]
Next, in step S2102, the decoding position determination unit 1802b determines whether or not the data read above matches a predetermined bit pattern read from the encoding / decoding condition storage unit 1800, in this example, 3F. Since the read data is not 3F here (step S2102: No), the process branches to step S2103, and the value of the position counter held by itself is greater than or equal to the warp value read from the encoding / decoding condition storage unit 1800. Determine whether or not.
[0176]
At this time, the value of the position counter is 0 (step S2103: No). In step S2104, the decoding position determination unit 1802b transfers the read 34 to the decoding processing unit 1802c, and the decoding processing unit 1802c uses it as it is. The data is sent to the second reception buffer 1802e.
[0177]
Next, in step S2105, the decoding position determination unit 1802b subtracts 1 byte from the held processing pointer value, and in step S2106, the address after the subtraction is an embedding start position, here, in the first transmission buffer 1801a. Determine whether the data is below the beginning. At this time, since the process pointer indicates 12 addresses before 34 (step S2106: No), the process returns to step S2101 to read 12 at the position indicated by the process pointer.
[0178]
Since 12 is not 3F, the process branches from step S2102 to step S2103. At this time, the position counter is 0 and the warp value 1 is not reached, so the process branches to step S2104. As a result, 12 remains as it is in the second reception buffer 1802e. Is sent out. Thereafter, after subtraction of the processing pointer in steps S2105 and S2106 and comparison with the embedding start position, the previous 3F is read out in step S2101.
[0179]
Since it is determined in step S2102 that this 3F matches the predetermined bit pattern (step S2102: Yes), the process branches to step S2107, and is handed over from the decoding position determination unit 1802b to the decoding processing unit 1802c. 2 is sent to the reception buffer 1802e. In step S2108, the decoding position determination unit 1802b increments a position counter held by itself.
[0180]
Thereafter, after subtraction of the processing pointer in steps S2105 and S2106 and comparison with the embedding start position, D1 before that is further read out in step S2101. Although this does not coincide with 3F (step S2102: No), since the position counter value 1 at this time has reached the warp value 1 (step S2103: Yes), the process branches to step S2109.
[0181]
In step S2109, the decoding processing unit 1802c adds the embedded data CE to the embedded bit of D1 (11010001) read above, the third bit “0” from the left indicated by the processing value 20 (00100000) here. The embedded bit of (11001110), here, the fifth bit “1” from the left is embedded. The embedding here is specifically bit replacement (SWAP).
[0182]
In step S2110, the decoding processing unit 1802c moves the embedded bits by n bits, in this case, by 1 bit. In step S2111, the decoding position determination unit 1802b initializes the position counter held therein to zero. Thereafter, in step S2104, the decoding processing unit 1802c sends D1 after embedding, that is, F1 (11110001) to the second transmission buffer 1801e.
[0183]
Thereafter, the same processing is repeated until the processing pointer exceeds the embedding start position, and when the next 3F is found, the warp value = the third bit from the left of the data after 1 byte, and the change in step S2109 In the subsequent embedded data C6 (11000110), the embedded bit after the change in step S2110, that is, the fourth “0” from the left is replaced.
[0184]
Details of the subsequent processing and the data after decoding are shown in FIG. The data after decoding shown in FIG. 22 is the same as the data before encoding shown in FIG. 20, and the data once encoded by the procedure shown in FIG. 19 is decoded by the procedure shown in FIG. I understand.
[0185]
Further, the value of embedded data at the time of completion of decoding according to FIG. 21 is finally 75, which matches the value 75 of embedded data at the start of encoding according to FIG. That is, by embedding a surplus value at the completion of encoding in the data to be decoded, the initial value at the start of encoding, that is, the protection key value used for the first encoding described above can be extracted. Then, the data can be returned to the plaintext before the first encoding by performing any of the above-described decoding in the first and second embodiments using this protection key value.
[0186]
As described above, in the third embodiment, after the first encoding is performed on the data to be encoded according to the procedure of either the first or second embodiment, the protection key value used for the encoding is encoded. The second encoding is performed by embedding in the later data. However, the protection key value is embedded as it is only at the beginning of the second encoding, and thereafter, the value is sequentially changed by exchanging bit units with the data to be encoded.
[0187]
Then, from the data encoding side to the decoding side, not the protection key value itself used for the first encoding, but only the protection key value (the surplus value) at the completion of the second encoding is sent. Is done. The decryption side first performs the first decryption using the surplus value, and then performs the second decryption using the protection key value extracted when the decryption is completed. As described above, in the third embodiment, double encoding / decoding is performed, and since the protection key value itself is not passed from the encoding side to the decoding side, unauthorized decoding by an unauthorized person or the like is extremely difficult. It becomes difficult.
[0188]
Although the above is an example in which the embedding is replaced (SWAP), the embedding method is not limited to this, and for example, exclusive OR (XOR), rotation (ROTATE), or the like may be considered.
[0189]
The embedding by exclusive OR is performed by, for example, calculating the XOR between the embedded bits of the encoding target data and the embedded bits of the embedded data, and replacing the result with the embedded bits of the embedded data. In the example of FIG. 20, the XOR between the third bit “1” from the left of the first 2D (00101101) and the leftmost bit “0” of the embedded data 75 (01110101) is “1”. As a result of being backfilled to the leftmost bit of 75, the embedded data is changed to F5 (11110101).
[0190]
There is no change in 2D on the target data side. As described above, the embedding is meaningful in that the embedded data is sequentially changed from the initial value, and the object data is not changed. On the decoding side, the above-described 75 that is the initial value of the embedded data can be obtained by similarly embedding the XOR result with the decoding target data in the received surplus value.
[0191]
In the case of embedding by rotation, for example, an embedding bit of embedding data is set in a carry flag of data to be encoded, and a value rotated to the left by the above processing value is set as a value after encoding. Further, the value of the carry flag after rotation is back-filled in the embedded bit of the embedded data.
[0192]
In the example of FIG. 20, the first 2D (00101101) is set in the register, and the leftmost bit “0” of the embedded data 75 (01110101) is set in the carry flag. The flag “0” enters the 2D least significant bit and the 2D most significant bit is pushed out to the carry flag. As a result, the value of the register after rotation is 5A (01011010), and the value of the carry flag is 0. In this way, by setting the embedded bit in the carry flag and rotating the value in the register, the value of the embedded bit can be inserted into the value in the register.
[0193]
When the processing value is rotated to the left by 20 bits (32 bits in decimal notation), the register value is A2 (10110000), and instead of 2D read from the first transmission buffer 1801a, this A2 is It is accumulated in the second transmission buffer 1801e. Further, the value of the carry flag at this point is 1, and as a result of being backfilled in the embedded bits of the embedded data, the embedded data is changed from 75 (01110101) to F5 (11110101).
[0194]
On the decoding side, the embedded bit of the received surplus value is set in the carry flag, the data to be decoded is read into the register, rotated to the right by the processing value, and the carry flag value at that time is embedded in the embedded data By filling back to bits, the initial value of 75 can be obtained.
[0195]
The data protection processing method according to the first to third embodiments can also be provided by recording it as a computer program on a recording medium such as a ROM, a hard disk, a CD-R drive or the like. The computer program can also be provided via a network.
[0196]
Also, since the encoding / decoding process according to the present invention requires a very simple circuit to be realized in hardware, it is easy to give the above functions to a peripheral device such as a modem. In this case, the data sent through the encoding modem can only be decoded by a decoding modem equipped with the corresponding function. Therefore, by restricting the distribution of the decoding modem, the specifics connected to the encoding modem can be specified. Access to the computer can be limited to the owner of the decryption modem.
[0197]
Also, for example, even if a hard disk or the like has a password for activation, the contents are easily referred to or tampered with when it is connected to another computer and activated from another hard disk. If the IDE controller is provided with the encoding / decoding function described above, and encoding is performed at the time of writing and decoding is performed at the time of reading, the hard disk can be used only from a computer equipped with a specific motherboard. It is possible to configure such that writing / reading cannot be performed.
[0198]
The problem of illegal copying of program CDs and pirated copies has become serious due to the widespread use of CD-R and CD-RW, and the encoding / decoding described above can also be applied to solve this problem.
[0199]
In the case of a CD compliant with ISO9660, about 350 KB (about 2 seconds) between the lead-in area and the program area is not copied to the copy destination disk by a CD-R or CD-RW. Write the protection key value in. If the program in the CD encoded with the protection key value is decrypted at the time of installation, the protection key value cannot be read from the copy CD (it is not recorded in the first place). Installation is impossible. In other words, the program can be installed only from the original CD.
[0200]
【The invention's effect】
As described above, according to the present invention For data protection processing equipment Therefore, encoding / decoding with high confidentiality can be realized by a very simple bit calculation, and sequential processing can be performed while transmitting or receiving data. The effect is that it can be performed at a higher speed.
[0201]
In addition, the size of data does not change before and after encoding / decoding. Furthermore, in the prior art, a complicated procedure was required to ensure safety. The key, that is, the information necessary for decryption can be delivered to the decryption side very easily in the form of attachment to data. There is an effect that can be done.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of a data protection processing apparatus according to a first embodiment;
FIG. 2 is a flowchart illustrating a procedure of an encoding process by addition and a decoding process by subtraction in the data protection processing apparatus according to the first embodiment;
FIG. 3 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 2 as a specific example;
FIG. 4 is a flowchart showing a procedure of encoding / decoding processing by XOR in the data protection processing device according to the first exemplary embodiment;
FIG. 5 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 4 with a specific example;
6 is a flowchart showing a procedure of encoding / decoding processing by rotation (ROTATE) in the data protection processing apparatus according to the first embodiment; FIG.
FIG. 7 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 6 with a specific example;
FIG. 8 is a flowchart showing a procedure of encoding / decoding processing by replacement (SWAP) in the data protection processing device according to the first exemplary embodiment;
FIG. 9 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 8 with a specific example;
10 is an explanatory diagram showing an example of data before and after performing the encoding process according to the flowchart of FIG. 2 with a bit pattern “100 ***”. FIG.
FIG. 11 is a block diagram of a schematic configuration of a data protection processing apparatus according to a second embodiment;
FIG. 12 is a flowchart showing a procedure of an encoding / decoding process involving a change of a protection key value by addition in the data protection processing apparatus according to the second embodiment;
FIG. 13 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 12 with a specific example;
FIG. 14 is a flowchart showing a procedure of an encoding / decoding process involving a change of a protection key value by multiplication in the data protection processing apparatus according to the second embodiment;
FIG. 15 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 14 with a specific example;
FIG. 16 is a flowchart showing a procedure of an encoding / decoding process involving a change of a protection key value by division in the data protection processing apparatus according to the second embodiment;
FIG. 17 is an explanatory diagram for describing the encoding process according to the flowchart of FIG. 16 with a specific example;
FIG. 18 is a block diagram of a schematic configuration of a data protection processing apparatus according to a third embodiment;
FIG. 19 is a flowchart of an encoding process procedure in the data protection processing apparatus according to the third embodiment;
FIG. 20 is an explanatory diagram for explaining the processing according to the flowchart of FIG. 19 with a specific example;
FIG. 21 is a flowchart of a decrypting process procedure in the data protection processing apparatus according to the third embodiment;
FIG. 22 is an explanatory diagram for describing the processing according to the flowchart of FIG. 21 with a specific example;
[Explanation of symbols]
100, 1100, 1800 Encoding / decoding condition storage unit
101, 1101, 1801 encoding processing unit
101a, 1101a, 1801a First transmission buffer
101b, 1101b, 1801b Coding position determination unit
101c, 1101c, 1801c encoding processing unit
101d, 1101d, 1801d Temporary storage area
101e, 1101e, 1801e Second transmission buffer
102, 1102, 1802 Decoding processing unit
102a, 1102a, 1802a First reception buffer
102b, 1102b, 1802b Decoding position determination unit
102c, 1102c, 1802c Decoding processing unit
102d, 1102d, 1802d Temporary storage area
102e, 1102e, 1802e Second receive buffer
1101f, 1102f Protection key value change unit
1803 Embedded information setting unit

Claims (9)

Determination processing means for sequentially reading continuous digital data in a predetermined reading direction and determining whether or not the read digital data matches a predetermined bit pattern;
The digital data in a predetermined range existing on the end side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means is exclusive of a predetermined calculation value. Arithmetic processing means for calculating a logical sum;
Processing data determination that sequentially reads digital data (hereinafter referred to as “processing data”) calculated by the arithmetic processing means in the reading direction, and determines whether the read processing data matches a predetermined bit pattern. Processing means;
Embedding processing means for embedding the predetermined operation value by a predetermined number of bits into processing data at a predetermined distance from processing data determined to match the predetermined bit pattern by the processing data determination processing means;
A data protection processing apparatus comprising: Furthermore, a first change processing means for adding or multiplying a predetermined change value to the calculated value, or dividing the calculated value by a predetermined change value;
A new calculation value is calculated based on the calculation value obtained by adding or multiplying the predetermined change value by the first change processing means or the calculation value divided by the predetermined change value by the first change processing means. Second change processing means for
With
The arithmetic processing means is configured to process the digital data in a predetermined range existing on the end side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means. 2. The data protection processing apparatus according to claim 1, wherein an exclusive OR with a new calculation value calculated by the two change processing means is calculated. Determination processing means for sequentially reading continuous digital data in a predetermined reading direction and determining whether or not the read digital data matches a predetermined bit pattern;
Rotation of rotating a predetermined range of digital data existing at the end in the predetermined reading direction by a predetermined rotation value by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means Processing means;
Processing data determination for sequentially reading continuous digital data rotated by the rotation processing means (hereinafter referred to as “processing data”) in a reading direction and determining whether the read processing data matches a predetermined bit pattern. Processing means;
Embedding processing means for embedding the predetermined rotation value by a predetermined number of bits into processing data at a predetermined distance from processing data determined to match the predetermined bit pattern by the processing data determination processing means;
A data protection processing apparatus comprising: A first change processing means for adding or multiplying a predetermined change value to the rotation value, or dividing the rotation value by a predetermined change value;
A new rotation value is calculated based on the rotation value obtained by adding or multiplying the predetermined change value by the first change processing means or the rotation value divided by the predetermined change value by the first change processing means. Second change processing means for
The rotation processing means converts the digital data within a predetermined range existing on the tail side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means. 4. The data protection processing device according to claim 3, wherein the data protection processing device rotates by a new rotation value calculated by the second change processing means. Determination processing means for sequentially reading continuous digital data in a predetermined reading direction and determining whether or not the read digital data matches a predetermined bit pattern;
The digital data existing on the tail side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means is the distance indicated by the predetermined numerical value from the digital data. Digital data present on the tail side in the predetermined reading direction, and replacement processing means for replacing only the length indicated by the numerical value;
Processing data determination for sequentially reading the continuous digital data (hereinafter referred to as “processing data”) replaced by the replacement processing means in the reading direction, and determining whether or not the read processing data matches a predetermined bit pattern Processing means;
Embedding processing means for embedding the predetermined numerical value by a predetermined number of bits into processing data at a predetermined distance from the processing data determined to match the predetermined bit pattern by the processing data determination processing means;
A data protection processing apparatus comprising: A first change processing means for adding or multiplying the numerical value by a predetermined change value, or dividing the numerical value by a predetermined change value;
A second value for calculating a new numerical value based on the numerical value obtained by adding or multiplying the predetermined change value by the first change processing means or the numerical value divided by the predetermined change value by the first change processing means. Change processing means, and
The arithmetic processing means converts the digital data present on the tail side in the predetermined reading direction by a predetermined distance from the digital data determined to match the predetermined bit pattern by the determination processing means to the second changing process. 6. The digital data existing on the tail side in the predetermined reading direction by a distance indicated by a new numerical value calculated by the means and the length indicated by the numerical value are replaced with each other. Data protection processing equipment. The embedding means is
A predetermined bit of the processing data existing on the tail side in the predetermined reading direction by a predetermined distance from the processing data determined to match the predetermined bit pattern by the processing data determination processing means The data protection processing device according to claim 1, wherein the data protection processing device is replaced with a bit. The embedding means is
A predetermined bit of the processing data existing on the tail side in the predetermined reading direction by a predetermined distance from the processing data determined to match the predetermined bit pattern by the processing data determination processing means, and a predetermined digital data The data protection processing device according to any one of claims 1 to 6, wherein an exclusive OR with the other bits is calculated. The embedding means is
A predetermined bit of predetermined digital data is inserted into the processing data existing at the end in the predetermined reading direction by a predetermined distance from the processing data determined to match the predetermined bit pattern by the processing data determination processing means. Further, the data protection processing device according to any one of claims 1 to 6, wherein the data protection processing device rotates by a predetermined rotation value.

Images