JP3928598B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor device Download PDFInfo
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- JP3928598B2 JP3928598B2 JP2003200104A JP2003200104A JP3928598B2 JP 3928598 B2 JP3928598 B2 JP 3928598B2 JP 2003200104 A JP2003200104 A JP 2003200104A JP 2003200104 A JP2003200104 A JP 2003200104A JP 3928598 B2 JP3928598 B2 JP 3928598B2
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- dimension
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Description
【0001】
【発明の属する技術分野】
本発明は、半導体の製造方法に関し、特に、寸法測定パターンを用いて製造する半導体製造方法に関する。
【0002】
【従来の技術】
半導体装置の製造工程において、リソグラフィーにおける寸法測定は微細化によって、ますます重要な位置を占めるようになりつつある。
【0003】
従来の寸法測定は、レティクル(マスク)内の任意の場所に形成された寸法測定パターン(通常1ヶ所)を測長SEM等の寸法測長装置を用いて測定し、所定の寸法規格値内または工程管理値内であることを確認した後、工程に流動させていた。
【0004】
しかし、近年の高周波増幅回路を含む集積回路、いわゆるアナログ回路においては単純なOK、NG判定では、回路の性能の低下を招き、歩留まりの低下にもつながりつつある。
【0005】
また、従来技術として以下のような先行技術がある。
リソグラフィ工程における露光条件の補正方法を最適化することにより、半導体ウェハ面内の加工精度を向上させることを目的とし、半導体ウェハの面内または面外に設定した原点から等距離に位置する半導体チップ上に、同一の補正を加えた露光条件でレジストパターンを形成し、補正されたレジストパターンをマスクにして半導体ウェハ上に形成された膜を加工することによって、加工された膜の仕上がり寸法の均一性を向上させている(特許文献1参照)。
【0006】
【特許文献1】
特開2000−49076号公報
【0007】
【発明が解決しようとする課題】
しかし従来の発明では、回路パターンを精度良く形成するために、レティクルショットの4隅に所定の寸法測定パターンを形成したレティクル(マスク)を作成し、露光ショット4隅の部分の寸法測定パターンを測定した場合、露光装置のレンズの歪みから測長値がばらつき目標とする寸法値から外れる場合も出てくる。
本発明は、係る問題に鑑みてなされたものであり、予め露光量と寸法測定値をプロットした検量線を作成し、上記のショット4隅の寸法値の平均値を検量線と対比させ、その差分を露光量に加減すれば、精度良く目標とする寸法値を得ることができる。
また、露光装置毎に上記の検量線を作成した場合は、更に精度良く所定の寸法値を得ることが可能となる。
【0008】
【課題を解決するための手段】
上記目的を達成するために、請求項1記載の半導体装置の製造方法は、寸法測定パターンを含む半導体装置の製造方法において、レティクルショットの4隅の寸法測定パターンについて複数の露光量で寸法測定値を測定する測定工程と、測定工程によって測定された寸法測定値を平均化して平均値を求め、該平均値から導き出した、寸法値=傾き×露光量+切片により表される方程式で表示した直線である検量線の傾きを求める平均化工程と、所定の初期露光量で寸法測定パターンを測定した場合に得られた寸法測定値の平均値である初期平均値を算出する算出工程とを有し、{ターゲット寸法値−初期平均値+(傾き×初期露光量)}÷傾きにより表される数式から設定露光量を求め、基板に露光することを特徴とする。
【0013】
【発明の実施の形態】
次に添付された図面を参照して、本発明の実施形態を説明する。
図1は、露光量と寸法値をプロットした図である。
POINT−1から4がショットの4隅の寸法測定パターンを表し、Medianが平均値を表す。線形(Median)は平均値から導き出した方程式で表示した直線を表す。
上記の方程式は、以下のように表示される。
寸法値=−0.0006×露光量+0.6711
ここで、−0.0006は検量線の傾き、0.6711は切片を表す。実際の作業は、所定の露光量(この場合は400msec)で寸法パターンを測定した場合に得られた平均値、例えば0.437μmの場合、ターゲットとする寸法値が0.450μmでは、設定露光量378msecとなる。
【0014】
より具体的に詳細を説明すると、以下の式のようになる。
設定露光量={ターゲット寸法値−測定値+(傾き×初期露光量)}÷傾き
上記の例として挙げた数値を記載すると以下のようになる。
378={0.45−0.437+(‐0.0006×400)}/‐0.0006
で表せる。
【0015】
【発明の効果】
以上の説明から明らかなように、本発明の半導体装置の製造方法及びそれを用いて製造された半導体装置は、ショット4隅の寸法を測定することができる構造を有し、ショット4隅の寸法測定パターンを測定した結果を検量線と比較して最適な露光量を決定することができる。
【図面の簡単な説明】
【図1】本発明の実施形態における露光量と寸法値をプロットした図である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor manufacturing method, and more particularly to a semiconductor manufacturing method manufactured using a dimension measurement pattern.
[0002]
[Prior art]
In the manufacturing process of semiconductor devices, dimension measurement in lithography is becoming an increasingly important position due to miniaturization.
[0003]
In the conventional dimension measurement, a dimension measurement pattern (usually one place) formed at an arbitrary position in a reticle (mask) is measured using a dimension measuring device such as a length measuring SEM, and within a predetermined dimension standard value or After confirming that the value was within the process control value, the process flowed.
[0004]
However, in a recent integrated circuit including a high-frequency amplifier circuit, that is, an analog circuit, simple OK / NG determination causes a reduction in circuit performance and a decrease in yield.
[0005]
Further, there are the following prior arts as conventional techniques.
A semiconductor chip located at an equal distance from the origin set in or out of the surface of the semiconductor wafer for the purpose of improving the processing accuracy in the surface of the semiconductor wafer by optimizing the exposure condition correction method in the lithography process On top of this, a resist pattern is formed under exposure conditions with the same correction, and the film formed on the semiconductor wafer is processed using the corrected resist pattern as a mask, so that the finished dimension of the processed film is uniform. (See Patent Document 1).
[0006]
[Patent Document 1]
Japanese Patent Laid-Open No. 2000-49076
[Problems to be solved by the invention]
However, in the conventional invention, in order to form a circuit pattern with high accuracy, a reticle (mask) in which predetermined dimension measurement patterns are formed at the four corners of the reticle shot is created, and the dimension measurement pattern at the four corners of the exposure shot is measured. In such a case, the length measurement value may vary due to the distortion of the lens of the exposure apparatus, and may deviate from the target dimension value.
The present invention has been made in view of the problem, and previously created a calibration curve in which the exposure amount and the dimension measurement value are plotted, and the average value of the dimension values of the four corners of the shot is compared with the calibration curve. If the difference is adjusted to the exposure amount, the target dimension value can be obtained with high accuracy.
In addition, when the calibration curve is created for each exposure apparatus, it is possible to obtain a predetermined dimension value with higher accuracy.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, a method of manufacturing a semiconductor device according to claim 1 is the method of manufacturing a semiconductor device including a dimension measurement pattern , wherein the dimension measurement values are measured at a plurality of exposure amounts for the dimension measurement patterns at the four corners of the reticle shot. The average value is obtained by averaging the measurement process measured by the measurement process and the dimension measurement value measured by the measurement process , and is expressed by an equation represented by dimension value = slope × exposure amount + intercept derived from the average value. There is an averaging process for calculating the slope of the calibration curve that is a straight line, and a calculation process for calculating an initial average value that is an average value of the dimension measurement values obtained when the dimension measurement pattern is measured at a predetermined initial exposure amount. {Target dimension value-initial average value + (slope × initial exposure amount)} / a set exposure amount is obtained from a mathematical expression represented by a slope, and the substrate is exposed.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will now be described with reference to the accompanying drawings.
FIG. 1 is a diagram in which the exposure amount and the dimension value are plotted.
POINT-1 to POINT4 represent dimension measurement patterns at the four corners of the shot, and Median represents an average value. Linear (Median) represents a straight line represented by an equation derived from an average value.
The above equation is displayed as follows:
Dimension value = -0.0006 x exposure amount + 0.6711
Here, -0.0006 represents the slope of the calibration curve, and 0.6711 represents the intercept. The actual work is to calculate the average exposure value obtained by measuring the dimension pattern at a predetermined exposure dose (in this case, 400 msec). For example, when the target dimension value is 0.450 μm, the set exposure dose is 0.437 μm. 378 msec.
[0014]
More specifically, the details are as follows.
Set exposure amount = {target dimension value−measured value + ( inclination × initial exposure amount)} ÷ inclination The numerical values given as examples above are described as follows.
378 = {0.45−0.437 + (− 0.0006 × 400)} / − 0.0006
It can be expressed as
[0015]
【The invention's effect】
As apparent from the above description, the semiconductor device manufacturing method of the present invention and the semiconductor device manufactured using the semiconductor device have a structure capable of measuring the dimensions of the four shot corners, and the dimensions of the four shot corners. The optimum exposure amount can be determined by comparing the measurement pattern measurement result with a calibration curve.
[Brief description of the drawings]
FIG. 1 is a plot of exposure amounts and dimension values in an embodiment of the present invention.
Claims (1)
レティクルショットの4隅の寸法測定パターンについて複数の露光量で寸法測定値を測定する測定工程と、
前記測定工程によって測定された寸法測定値を平均化して平均値を求め、前記平均値から導き出した、寸法値=傾き×露光量+切片により表される方程式で表示した直線である検量線の傾きを求める平均化工程と、
所定の初期露光量で前記寸法測定パターンを測定した場合に得られた寸法測定値の平均値である初期平均値を算出する算出工程とを有し、
{ターゲット寸法値−初期平均値+(傾き×初期露光量)}÷傾きにより表される数式から設定露光量を求め、基板に露光することを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device including a dimension measurement pattern,
A measurement process for measuring a dimension measurement value at a plurality of exposure amounts for a dimension measurement pattern at four corners of a reticle shot;
An average value is obtained by averaging the dimension measurement values measured in the measurement step, and the calibration curve is a straight line represented by an equation represented by dimension value = slope × exposure amount + intercept derived from the average value. An averaging process to determine the slope ;
And a calculation step of calculating an initial average value is an average value of the resulting dimension measurement when measuring the dimension measurement pattern at a predetermined initial exposure,
{Target dimension value-initial average value + (inclination x initial exposure amount)} / A method of manufacturing a semiconductor device, wherein a set exposure amount is obtained from a mathematical expression represented by an inclination and the substrate is exposed.
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JP2003200104A JP3928598B2 (en) | 2003-07-22 | 2003-07-22 | Manufacturing method of semiconductor device |
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JP2003200104A JP3928598B2 (en) | 2003-07-22 | 2003-07-22 | Manufacturing method of semiconductor device |
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JP3928598B2 true JP3928598B2 (en) | 2007-06-13 |
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JP2003200104A Expired - Fee Related JP3928598B2 (en) | 2003-07-22 | 2003-07-22 | Manufacturing method of semiconductor device |
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JP4278645B2 (en) | 2005-09-30 | 2009-06-17 | 株式会社リコー | Semiconductor wafer, layout setting method thereof, and reticle layout setting method |
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