JP3906619B2 - Image forming apparatus - Google Patents

Description

【０１２５】
表１に示すように、１コンバータ方式、ケーブルレス方式、及びシールド化方式の各従来技術では、電源出力の独立制御性、電源出力の高周波化、電源出力の矩形波化、装置の小型化、レイアウト上の制約の回避、コスト、の何れかにおいて不利であり、本発明では何れの面についても有利であることが分かる。
【０１２６】
なお、上記基本構成及び実施形態の各々では、本発明の電源装置を昇圧回路による電源を備えた電源装置に適用した場合について説明したが、本発明はこれに限定されるものではなく、降圧回路による電源を備えた電源装置に適用する形態とすることもできる。
【０１２７】
図１６には、この場合の降圧回路を備えた電源の構成例が示されている。同図に示す電源では、入力電圧Ｖｃｃを用いて高周波のＤＣ−ＤＣコンバータで負荷容量（現像器の容量）を充電し、クロック受信回路を介して入力されたクロック信号ＣＬＫに基づくタイミングで高耐圧のスイッチング素子Ｔｒ１をスイッチングして負荷容量を放電することで高圧の矩形波を発生させている。また、一定の電圧に達した後、その電圧をしばらく維持するために、その電圧を電圧検出回路（上記基本構成及び実施形態の各々における出力検知回路に相当）で検知し、一定電圧以上の場合にはＤＣ−ＤＣコンバータの駆動を停止させている。
【０１２８】
なお、同図に示す電源では、オン／オフ信号及びコントロール信号が省略されているが、オン／オフ信号がオフを示す状態である場合にトランスの１次巻線への入力電圧の印加／非印加を制御するスイッチング素子Ｔｒ２をオフ状態とすることによりオン／オフ信号による制御が可能となり、また、コントロール信号に応じてトランスの１次巻線に印加する電圧を加減することによりコントロール信号による制御が可能となる。
【０１２９】
このような降圧回路による電源を備えた電源装置に本発明の電源装置を適用した場合でも、上記基本構成及び実施形態の各々と同様の効果を奏することができる。
【０１３０】
また、上記基本構成及び実施形態の各々では、電源装置に備えられた全ての電源の交流出力の同期をとる場合について説明したが、本発明はこれに限定されるものではなく、電源装置に備えられた電源のうちの複数に対して同期をとる形態とすることもできる。
【０１３１】
例えば、図３に示す構成において、電源６０ａと電源６０ｂとを略同一の位置に配置し、電源６０ｃと電源６０ｄとを電源６０ａ及び電源６０ｂの配置位置とは異なる略同一の位置に配置した場合、電源６０ａ及び電源６０ｂからの高圧ケーブルと、電源６０ｃ及び電源６０ｄからの高圧ケーブルとは引き回し経路が異なるため、全ての電源について同期をとる必要はなく、電源６０ａ及び電源６０ｂの同期をとると共に、電源６０ｃ及び電源６０ｄの同期をとることによって、上記基本構成及び実施形態の各々と同様の効果を奏することができる。
【０１３２】
また、例えば、図３に示す構成において、全ての電源の配置位置が略同一である場合においても、各電源のうちの複数に対して同期をとることによって、ある程度のバンディングの抑制効果は期待でき、従って、画像品質をある程度は向上することができる。
【０１３３】
また、上記基本構成及び実施形態の各々では、ＡＳＩＣにより各種信号を生成する場合について説明したが、本発明はこれに限定されるものではなく、例えば、同様の機能を有する回路を電子部品の組合せによって構成する形態とすることもできることは言うまでもない。この場合は、該機能のための占有面積が広くなってしまうものの、ＡＳＩＣ製作のためのコストを削減することができる。
【０１３４】
また、上記基本構成及び実施形態の各々では、電源毎の電力出力のオン／オフを設定するための信号（オン／オフ信号）と交流出力の振幅を設定するための信号（コントロール信号）を別個に備えた場合について説明したが、本発明はこれに限定されるものではなく、各信号の機能を１つの信号によって実現する形態とすることもできる。この形態の信号の一例としては、交流出力の振幅に対応するパルス幅とされたＰＷＭ（Pulse Width Modulation、パルス幅変調）信号が挙げられる。この場合、ＰＷＭ信号のデューティが０％である場合が電力出力をオフすることを示す。この形態では、２つの信号による設定を１つの信号で行うことができるので、信号供給のためのケーブルを削減することができ、装置を低コスト化及び小型化することができる。
【０１３５】
【発明の効果】
請求項１記載の画像形成装置によれば、単一の基準クロック信号を逓倍して異なる周波数の変換クロック信号を少なくとも１つ生成し、各々交流成分を有する電力を生成して同一機能を有する複数の被供給体に供給する複数の電源のうちの少なくとも２つの電源に前記基準クロック信号及び前記変換クロック信号の何れかを前記交流成分の周波数及びデューティを設定するための信号として供給することによって当該少なくとも２つの電源により生成される電力の前記交流成分の同期をとっているので、出力電力の交流成分の歪みを防止することができる、という効果が得られる。
【０１３６】
また、請求項１記載の画像形成装置によれば、前記交流成分の同期がとられた電力によって複数の感光体に対する現像及び帯電の少なくとも一方の動作が行われるので、バンディングの発生を抑制することができ、この結果として高品質な画像を形成することができる、という効果が得られる。
【図面の簡単な説明】
【図１】 本発明の基本構成に係る画像形成装置の好適な構成例を示すブロック図である。
【図２】 基本構成に係るカラー画像形成装置の概略構成を示すブロック図である。
【図３】 基本構成に係るカラー画像形成装置における電源装置及びＭＣＵの概略構成を示すブロック図である。
【図４】 基本構成に係るカラー画像形成装置における電源の概略構成を示すブロック図である。
【図５】 図４に示す電源の動作の説明に供するタイムチャートである。
【図６】 基本構成に係る電源装置における２つの電源の交流出力の実測結果を示す波形図である。
【図７】 実施形態に係るカラー画像形成装置における電源装置及びＭＣＵの概略構成を示すブロック図である。
【図８】 実施形態に係る各電源からの交流出力の状態を示すタイムチャートである。
【図９】 実施形態の変形例の構成を示すブロック図である。
【図１０】 参考例１に係るカラー画像形成装置における電源装置及びＭＣＵの概略構成を示すブロック図である。
【図１１】 参考例１に係るカラー画像形成装置における電源６０ａ’の概略構成を示すブロック図である。
【図１２】 参考例２に係るカラー画像形成装置における電源装置及びＭＣＵの概略構成を示すブロック図である。
【図１３】 参考例２に係るリセット回路の概略構成を示すブロック図（一部回路図）である。
【図１４】 参考例２に係る電源６０ｄ’の各部の波形状態を示すタイムチャートである。
【図１５】 参考例２の変形例の構成を示すブロック図である。
【図１６】 降圧回路を備えた電源の構成例を示すブロック図（一部回路部）である。
【図１７】 複数の現像器に対する駆動電力の入力のタイミングの一例を示す波形図である。
【図１８】 従来技術の問題点の説明に供する波形図であり、（Ａ）は電源の交流出力の歪みの状態を示す波形図、（Ｂ）は交流出力の歪みに起因する低周波の発生の状態を示す波形図、（Ｃ）は（Ｂ）の実測結果例を示す波形図である。
【図１９】 電源からの出力電力の周波数が５ｋＨｚ、９ｋＨｚ及び１５ｋＨｚである場合の、電力供給用のケーブル間の距離に対する電位差の状態の一例を示すグラフである。
【符号の説明】
１０Ｂ カラー画像形成装置（画像形成装置）
２６ａ、２８ａ、３０ａ、３２ａ 感光体ドラム（感光体）
２６ｂ、２８ｂ、３０ｂ、３２ｂ 画像書き込み部（走査光学系）
２６ｃ、２８ｃ、３０ｃ、３２ｃ 帯電器
２６ｄ、２８ｄ、３０ｄ、３２ｄ 現像器
６０Ａ、６０Ｂ、６０Ｃ、６０Ｄ 電源装置
６０ａ、６０ｂ、６０ｃ、６０ｄ 電源
６１ 昇圧回路
６３ 制御回路
６４ 出力検知回路
６６ クロック受信回路
６７ クロック生成回路
６８ リセット回路
８０Ｂ マシン・コントロール・ユニット（電源装置）
８２ ＣＰＵ
８４’ ＡＳＩＣ（基準クロック信号生成手段、同期手段）
８６Ａ、８６Ｂ 分周器 [0001]
BACKGROUND OF THE INVENTION
  The present invention, PaintingMore particularly, the power supply device includes a plurality of power supplies that generate electric power each having an AC component.PlaceThe present invention relates to an image forming apparatus used as a power source.
[0002]
[Prior art]
With the spread of color image forming devices (color copiers, color printers, etc.) in recent years, the market demands higher image quality and higher speed. There was technology to use.
[0003]
On the other hand, as a color image forming apparatus corresponding to speeding up, each photoconductor has a plurality of photoconductors corresponding to different colors, and an image (toner image) of the corresponding color is formed on each photoconductor in parallel. So-called tandem type color image formation that obtains a color image by sequentially transferring the toner images of the respective colors formed thereon onto a single transfer body moving at a predetermined speed in a predetermined direction (sub-scanning direction) There was a device.
[0004]
In general, in this type of color image forming apparatus, in order to form a toner image on a photoconductor, a charger for charging the photoconductor, a developing device for attaching toner to the charged photoconductor, and the like are provided in the vicinity of each photoconductor. In many cases, each photoconductor is provided with a high-voltage power supply provided as a power source for each of these chargers and developing units. This is mainly due to the following two reasons.
[0005]
The first reason is that in the tandem type image forming apparatus, as described above, a color image is formed by sequentially transferring the toner image formed for each color for each photoconductor to a transfer body moving in the sub-scanning direction. This is because it is necessary to turn on / off (drive / stop driving) charging units, developing units, and the like provided for the respective photoconductors at different timings for each photoconductor.
[0006]
That is, in order to form a single color image by transferring toner images from a plurality of photoconductors arranged at different positions to a transfer body moving in the sub-scanning direction, it corresponds to the same pixel. The toner image on each photosensitive member must be transferred to the same position on the transfer member. For this purpose, as shown in FIG. 17, as an example, as shown in FIG. It is necessary to shift the timing of supply of electric power (DC) and alternating-current power (AC) by a time corresponding to the distance between the photosensitive members and the moving speed of the transfer member. Note that the operation signal in FIG. 17 is a signal indicating the period of the image forming operation for one sheet. In addition, this figure illustrates the case of a color image forming apparatus provided with four developing units, that is, four photoconductors.
[0007]
The second reason is to suppress deterioration of the photoreceptor. Since the photoconductor generally deteriorates due to charging, it is necessary to shorten the charging period for the photoconductor as much as possible. By making it possible to control power supply / cutoff at different timings for each photoconductor, the photoconductor is unnecessarily removed. Charging can be prevented, thereby suppressing deterioration of the photoreceptor.
[0008]
On the other hand, in the color image forming apparatus as described above, there is a high demand for downsizing in addition to the above-described high image quality and high speed, and a tandem type color image provided with a high-voltage power source different for each photoconductor as described above. The forming apparatus has the following problems.
[0009]
Each high-voltage power supply is often placed at a position away from the developing device, charging device, etc. provided in the vicinity of the corresponding photoconductor due to layout restrictions in realizing downsizing of the device. In many cases, a plurality of high-voltage cables that connect each high-voltage power source and the corresponding developing device, charging device, etc. are routed through substantially the same route.
[0010]
On the other hand, the conventional high-voltage power supply has a clock signal generating means such as an oscillator for generating a clock signal for setting the frequency and duty of the AC output for each high-voltage power supply. The output is difficult to synchronize.
[0011]
In general, when AC outputs that are not synchronized are close to each other with cables, mutual induction occurs due to stray capacitance between the cables, and due to this effect, a potential difference occurs due to a phase shift between the cables, A distortion as shown in FIG. 18A occurs in the AC output waveform. If this state continues, the output waveform changes at a frequency (several tens of Hz to several hundreds of Hz) lower than the frequency of the AC output (generally several kHz to several tens of kHz) as shown in FIG.
[0012]
FIG. 18C shows an example of an actual measurement result of such a change in output waveform. In the example shown in the figure, the frequency of the AC output was 9 kHz, and the generated low frequency was 560 Hz.
[0013]
From the relationship between this low frequency and the process speed of image formation, there arises a problem that the uniformity of development and charging is deteriorated, resulting in so-called banding (stripe fringe) and an image quality defect.
[0014]
By the way, this problem is caused by increasing the frequency of the AC power for driving the charger, the developing device, etc. in order to cope with high speed and high image quality. FIG. 19 shows the state of the potential difference with respect to the distance between the high-voltage cables when the AC output frequency is 5 kHz, 9 kHz, or 15 kHz. As shown in the figure, as the frequency of the AC output increases, a larger potential difference occurs even if the distance between the high-voltage cables is increased. Therefore, banding is more likely to occur as the frequency of the AC output increases.
[0015]
A technique that can be applied to prevent such banding is to use a shielded cable as a high-voltage cable that connects the high-voltage power supply to the developing device, charger, etc. Eliminating technology (hereinafter referred to as a shield system), a technology that suppresses the phase shift of each power by using a single high-voltage power supply and supplying output power from the high-voltage power supply to all developing devices, chargers, etc. There are three techniques, namely, a single converter system, and a technique for directly connecting a high-voltage power supply to a developing device, a charger, and the like (hereinafter referred to as a cableless system).
[0016]
[Problems to be solved by the invention]
However, the above-described technology based on the shield method has a problem in that since the distribution capacity of the cable increases, it is necessary to increase the power of the high-voltage power supply, and the cost and power consumption increase. In addition, according to this technique, it is necessary to perform a shield process for the cable when assembling the apparatus or manufacturing the cable, which also increases the cost.
[0017]
Further, in the technology based on the above-mentioned single converter system, it is necessary to independently control on / off of the power output corresponding to each photoconductor, and a high voltage relay or the like is specially required for the output switching circuit or the output terminal, which is costly. There was a problem that it would increase. In particular, in the case of a high-voltage relay, noise is generated at the time of opening and closing, causing a malfunction of the CPU or the like. In addition, this technique has a problem that, when a high-voltage power supply is equipped with a transformer, thermal design becomes difficult and reliability may be lowered.
[0018]
Further, the above-described cableless technique has a problem that it is difficult to actually introduce the device due to restrictions on the layout of the apparatus. Even when the cableless system can be introduced, the distance between the photoconductors tends to be shortened in order to cope with the downsizing of the apparatus. There is a problem in that banding occurs because it acts in the same way as coupling.
[0019]
  The present invention has been made to solve the above problems, and can prevent distortion of the AC component of the output power.WhenBoth aims to provide an image forming apparatus capable of forming a high-quality image.
[0020]
[Means for Solving the Problems]
  In order to achieve the above object, an image forming apparatus according to claim 1 is an image forming apparatus that forms an image based on multi-valued image data.Reference clock signal generation means for generating a single reference clock signal, conversion means for multiplying the reference clock signal to generate at least one converted clock signal of a different frequency,A plurality of power supplies each generating an alternating current component and supplying it to a plurality of supplies having the same function; andEither the reference clock signal or the converted clock signal is used as a signal for setting the frequency and duty of the AC component.Of the plurality of power suppliesBy supplying at least two power sourcesA power supply device including a synchronization unit that synchronizes the AC component of power generated by at least two power sources, and at least one of development and charging operations by the power synchronized with the AC component by the synchronization unit A plurality of photoconductors to be performed, and a plurality of scanning optical systems that scan the plurality of photoconductors with a light beam based on the multi-valued image data are provided.
[0021]
  According to the image forming apparatus of claim 1,A single reference clock signal is generated by the reference clock signal generating means, and the reference clock signal is multiplied by the converting means to generate at least one converted clock signal having a different frequency. The reference clock signal generation means includes a crystal oscillator, an LC oscillator, a multivibrator, and the like. The conversion means includes a multiplier and the like.
Here, according to the image forming apparatus of claim 1,Of a plurality of power supplies that generate electric power each having an AC component and supply it to a plurality of supplies having the same functionAny of the reference clock signal and the converted clock signal is supplied to at least two power supplies as a signal for setting the frequency and duty of the AC component.The AC component of the power generated by at least two power sources is synchronized by the synchronizing means. Note that the supply target includes a charger, a developing unit, and the like in the image forming apparatus.
  In the image forming apparatus according to the first aspect, at least one of development and charging is performed by the electric power in which the AC component is synchronized by the synchronization unit.
  In this case, in the image forming apparatus according to the first aspect, the plurality of photosensitive members are scanned by the light beam based on the multi-value image data by the plurality of scanning optical systems. As a result, an image latent image based on the multi-value image data is formed on each photoconductor.
[0022]
  Thus, according to the image forming apparatus of claim 1,Multiplying a single reference clock signal to generate at least one converted clock signal of a different frequency;Of a plurality of power supplies that generate electric power each having an AC component and supply it to a plurality of supplies having the same functionBy supplying either of the reference clock signal and the converted clock signal to at least two power supplies as a signal for setting the frequency and duty of the AC componentSince the AC component of the power generated by at least two power supplies is synchronized, distortion of the AC component of the output power can be prevented.
  According to the image forming apparatus of the first aspect, at least one of the development and charging operations for the plurality of photosensitive members is performed by the electric power in which the AC component is synchronized by the synchronization unit. Occurrence can be suppressed, and as a result, a high-quality image can be formed.
In addition, according to the image forming apparatus of the first aspect, the distortion of the AC component of the output power can be prevented in a low cost and in a small space as compared with a case where a means for generating a clock signal is provided for each power source. be able to.
Furthermore, according to the image forming apparatus of the first aspect, it is possible to cope with a case where a plurality of power sources that generate electric power having different frequencies of AC components coexist.
[0043]
  In FIG. 1, as an exampleAccording to the basic configuration of the present inventionA preferred configuration example of the image forming apparatus is shown. In the figure, the machine control unit controls the operation of the image forming apparatus, and the power source # 1 to power source # 4 are either a developing unit for developing the corresponding photosensitive member or a charging unit for charging. The AC power for driving is supplied to either of them, the ON / OFF signal is a signal for individually setting the output / output stop of the AC power from each power source, and the control signal is generated by each power source. This is a signal for individually setting the amplitude of the AC component of the AC power.
[0044]
In this configuration example, a reference clock signal for setting the frequency and duty of the AC output from each power supply is generated by the reference clock signal generation means, and the reference clock signal is branched and supplied to each power supply.
[0046]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a power supply apparatus and an image forming apparatus according to the present invention will be described below in detail with reference to the drawings.
[0047]
  [Basic configuration]
  Figure 2 shows the bookBasic configurationA schematic configuration of a color image forming apparatus 10A according to FIG. As shown in the figure, in the color image forming apparatus 10A, an intermediate transfer belt 12 composed of an endless belt is provided with a predetermined roll by a drive roll 14, a steering roll 16, a secondary transfer roll 18 and driven rolls 20, 22, 24. It is supported with tension. In addition, on the intermediate transfer belt 12, image forming units 26, 28, 30 corresponding to the respective colors of yellow (Y), magenta (M), cyan (C), and black (K) in accordance with the belt running direction Y. 32 are arranged in order.
[0048]
Each of the image forming units 26, 28, 30, and 32 includes a photosensitive drum 26 a, 28 a, 30 a, and 32 a that is rotatably supported by an apparatus main body frame (not shown), and each of the photosensitive drums 26 a, 28 a, and 30 a. , 32a have image writing units 26b, 28b, 30b, and 32b that scan and expose the surface of the surface with a light beam such as a laser beam. Further, around each of the photosensitive drums 26a, 28a, 30a, and 32a, the chargers 26c, 28c, 30c, and 32c, the developing devices 26d, 28d, and 30d, according to the drum rotation direction (clockwise direction in FIG. 2). 32d, primary transfer rolls 26e, 28e, 30e, and 32e and cleaners 26f, 28f, 30f, and 32f are sequentially disposed.
[0049]
  BookBasic configurationThe color image forming apparatus 10A according to the present invention includes a power supply device that supplies driving power to devices around the photosensitive drum such as the chargers 26c, 28c, 30c, and 32c, and the developing devices 26d, 28d, 30d, and 32d. 60A and a machine control unit (hereinafter referred to as MCU) 80A that controls the operation of the color image forming apparatus 10A are provided. Details thereof will be described later.
[0050]
On the other hand, a belt home sensor 34 and an edge sensor 36 are disposed on the travel path of the intermediate transfer belt 12.
[0051]
Among them, the belt home sensor 34 detects a mark or the like provided at one place in the circumferential direction of the intermediate transfer belt 12 and is arranged upstream of the yellow (Y) image forming unit 26 in the belt traveling direction Y. Has been. A detection signal such as a mark output from the belt home sensor 34 is also used to determine the image formation timing so that the image does not overlap the belt seam.
[0052]
The edge sensor 36 detects the edge position of the intermediate transfer belt 12 and is disposed downstream of the black (K) image forming unit 32 in the belt running direction Y (before the steering roll 16). .
[0053]
Further, the paper 38 to be image-formed is stored in a paper feeding cassette (not shown) and fed out one by one by a pickup roll 40 provided on the paper feeding side of the paper feeding cassette. The fed paper 38 is conveyed by a predetermined number of roll pairs 42 along a path indicated by a broken line in the drawing, and is sent to the pressure contact position of the secondary transfer roll 18, where the color image on the intermediate transfer belt 12 is conveyed. Are collectively transferred (secondary transfer). The paper 38 to which the color image has been transferred is transported to a fixing device 50 by a paper transport system 48 and subjected to image fixing processing, and then discharged to a tray (not shown).
[0054]
  Figure 3 shows the bookBasic configurationThe schematic configuration of the power supply device 60A and MCU 80A of the color image forming apparatus 10A according to FIG. In order to avoid the complication of the explanation, FIG. 3 shows only a part for supplying driving power (AC power) to the developing devices 26d, 28d, 30d, and 32d in the power supply device 60A, and related to the power supply device 60A in MCU 80A. In the following, only this portion will be described, and only this portion will be described below. However, the actual power supply device 60A includes a portion for supplying driving power to devices other than the developing devices 26d, 28d, 30d, and 32d. The MCU 80A includes parts other than those related to the power supply device 60.
[0055]
  As shown in FIG.Basic configurationThe power supply device 60A includes power supplies 60a, 60b, 60c, and 60d each including a booster circuit 61, a control circuit 63, an output detection circuit 64, a clock reception circuit 66, and the like. , 60b, 60c, and 60d are connected to the developing units 26d, 28d, 30d, and 32d by high-voltage cables 70a, 70b, 70c, and 70d, respectively, and supply driving power to the corresponding developing units.
[0056]
On the other hand, the MCU 80A is provided with a CPU (Central Processing Unit) 82 that controls the operation of each part of the color image forming apparatus 10A. Under the control of the CPU 82, the output power of each of the power supplies 60a, 60b, 60c, 60d is controlled. On / off signals OS1, OS2, OS3, OS4 for setting the clock signal CLK for setting the frequency and duty of the AC component, and the output / stop of power from each of the power supplies 60a, 60b, 60c, 60d, And an ASIC (Application Specific Integrated Circuit) 84 configured to be able to generate control signals CS1, CS2, CS3, CS4 for setting the amplitude of the AC component of the output power from each of the power supplies 60a, 60b, 60c, 60d. It has been.
[0057]
  BookBasic configurationThe duty of the AC component due to the clock signal CLK is set within a range of 25% to 75%, and the amplitude of the AC component due to each control signal CS is set within a range of 500 Vp-p to 2 kVp-p.
[0058]
Here, the output terminal for outputting the clock signal CLK of the ASIC 84 is branched into four and connected to the input terminals of the clock receiving circuit 66 of the power supplies 60a, 60b, 60c and 60d, respectively. Therefore, the same clock signal CLK is input to each power source 60a, 60b, 60c, 60d.
[0059]
On the other hand, an output terminal for outputting the on / off signals OS1, OS2, OS3, OS4 of the ASIC 84 and an output terminal for outputting the control signals CS1, CS2, CS3, CS4 are predetermined input terminals of the power supplies 60a, 60b, 60c, 60d, respectively. Are connected individually. Accordingly, the intermittent output of each of the power supplies 60a, 60b, 60c, and 60d and the amplitude of the AC component can be set for each power supply.
[0060]
  As shown in FIG. 4, the power supply 60a includes an inductance and a step-up transformer that are connected to a capacitive developing device 26d and that form an LC series resonance circuit together with the capacitive developing device 26d to regenerate series resonance energy. And a first switching means, a second switching means, and a diode for regenerating series resonance energy connected to the primary winding side of the boosting transformer included in the boosting circuit 61. The constructed push-pull drive circuit 62, a control circuit 63 connected to the input side of the push-pull drive circuit 62 and controlling the push-pull drive circuit 62, and the secondary winding side of the boost transformer included in the boost circuit 61 Connected to the control circuit 63, the magnitude of the output to the developing device 26d is detected, and a signal indicating the detection result is fed to the control circuit 63. Output detection circuit 64 that is connected, a DC bias power supply 65 that is connected to the secondary winding side of the step-up transformer included in the step-up circuit 61 and applies a DC bias voltage to the developing device 26d, and a clock signal input from the ASIC 84 And a clock receiving circuit 66 for receiving CLK..
[0061]
On the other hand, the control circuit 63 includes a trigger generation circuit 70, a monostable multivibrator 75, two 2-input AND circuits 76 and 77, an on / off switching circuit 78, and an output setting circuit 79. Further, the trigger generation circuit 70 includes two differentiation circuits 71 and 72, an inverting circuit 73, and a two-input OR circuit 74.
[0062]
The input terminal of the differentiation circuit 71 is directly connected to the output terminal of the clock reception circuit 66, and the input terminal of the differentiation circuit 72 is connected to the output terminal of the clock reception circuit 66 via the inverting circuit 73. Each output terminal of 72 is connected to one input terminal and the other input terminal of OR circuit 74. The output terminal of OR circuit 74 is connected to the input terminal of monostable multivibrator 75, and further, monostable multivibrator. The output terminal 75 is connected to one input terminal of the AND circuit 76 and the AND circuit 77.
[0063]
The other input terminal of the AND circuit 76 is directly connected to the output terminal of the clock receiving circuit 66, and the other input terminal of the AND circuit 77 is connected to the output terminal of the clock receiving circuit 66 via the inverting circuit 73. The output terminals of the AND circuits 76 and 77 are connected to the control input terminals of the first switching means and the second switching means included in the push-pull drive circuit 62, respectively.
[0064]
On the other hand, the input terminal of the on / off switching circuit 78 is connected to the output terminal for outputting the on / off signal OS1 of the ASIC 84, and the output terminal of the on / off switching circuit 78 is connected to the push-pull drive circuit 62. The input terminal of the output setting circuit 79 is connected to the output terminal for outputting the control signal CS1 of the ASIC 84, and the output terminal of the output setting circuit 79 is connected to the push-pull drive circuit 62.
[0065]
Since the power supplies 60b, 60c, and 60d have the same configuration as the power supply 60a, description thereof is omitted here.
[0066]
FeelingThe optical drums 26a, 28a, 30a, and 32a are the photosensitive member of the present invention, and the image writing units 26b, 28b, 30b, and 32b are the scanning optical system of the present invention.,eachEquivalent to each other.
[0067]
Next, the operation of the power supply 60a will be described with reference to the timing chart of each part shown in FIG.
[0068]
When the clock signal CLK is input from the ASIC 84 to the trigger generation circuit 70 via the clock reception circuit 66, the differentiation circuit 71 generates a one-shot pulse corresponding to the rising edge of the input signal a, that is, the rising edge of the clock signal CLK. The one-shot pulse corresponding to the rising edge of the signal b that is output as the trigger signal c to one input terminal of the OR circuit 74 and inverted by the inverting circuit 73, that is, the falling edge of the clock signal CLK, is differentiated. And is output to the other input terminal of the OR circuit 74 as a trigger signal d.
[0069]
In the OR circuit 74, a trigger signal composed of a one-shot pulse corresponding to both rising and falling of the clock signal CLK is obtained by ORing the two trigger signals c and d inputted from the differentiating circuit 71 and the differentiating circuit 72. e is generated.
[0070]
When the trigger signal e is input from the trigger generation circuit 70 to the monostable multivibrator 75, the monostable multivibrator 75 performs a pulse according to the signal input from the output detection circuit 64 for each one-shot pulse of the trigger signal e. A pulse signal f having a set width is generated and output to one input terminal of the two AND circuits 76 and 77.
[0071]
In the AND circuit 76, the logical product of the signal a and the pulse signal f is obtained, and the resulting pulse signal g is output to the control input terminal of the first switching means of the push-pull drive circuit 62, and the AND circuit. In 77, the logical product of the signal b and the pulse signal f is obtained, and the resulting pulse signal h is output to the control input terminal of the second switching means of the push-pull drive circuit 62.
[0072]
In this manner, the push-pull drive circuit 62 is driven by distributing the pulse signal g and the pulse signal h as signals to be input to the push-pull drive circuit 62. Thus, the drive timing of the push-pull drive circuit 62 can be shifted from the half cycle position of the output cycle without changing the pulse width of each push-pull drive signal.
[0073]
The first and second switching means included in the push-pull drive circuit 62 are alternately turned on and off by the pulse signal g and the pulse signal h, and the LC series resonance circuit by the inductance included in the capacitive developer 26d and the booster circuit 61 Are in series resonance. The series resonance energy generated thereby is regenerated through a diode included in the push-pull drive circuit 62 when the first and second switching means are turned off. By this operation, an inductance current i flows according to the timing of pulse generation of the pulse signal g and the pulse signal h, and an AC rectangular wave bias j is generated at the output corresponding to the inductance current i.
[0074]
The frequency and duty of the AC rectangular wave bias j generated in this way are substantially the same as the frequency and duty of the clock signal CLK, respectively.
[0075]
On the other hand, when the operation of the power source 60a is performed as described above, the on / off switching circuit 78 performs the input / output stop of the inductance current i to the booster circuit 61 according to the on / off signal OS1. The push-pull drive circuit 62 is controlled as described above, and the push-pull drive circuit 62 is controlled by the output setting circuit 79 so that the magnitude of the inductance current i is set according to the control signal CS1. By the action of the on / off switching circuit 78 and the output setting circuit 79, it is possible to set the output / output stop of the power (AC rectangular wave bias j) and to set the amplitude of the AC component of the output power. it can.
[0076]
Since the power supplies 60b, 60c, and 60d operate in the same manner as the power supply 60a, the description thereof is omitted here.
[0077]
Next, the operation of the color image forming apparatus 10A when forming a color image will be described.
[0078]
First, when the intermediate transfer belt 12 travels in the Y direction by the rotational drive of the drive roll 14, each image formation is performed with reference to the mark detection signal (belt home signal) output from the belt home sensor 34 during the belt travel. In units 26, 28, 30, and 32, image writing is started in order.
[0079]
Here, in each of the image forming units 26, 28, 30, and 32, the surfaces of the corresponding photosensitive drums 26a, 28a, 30a, and 32a are charged to a predetermined potential by the chargers 26c, 28c, 30c, and 32c. An image (latent image) is formed on the surface of each photoconductive drum by scanning exposure of the formed portion with the light beam emitted from each of the image writing units 26b, 28b, 30b, and 32b, and then the latent image is Corresponding color toners are attached to the formed portions by the developing units 26d, 28d, 30d, and 32d, respectively, so that the photosensitive drums 26a, 28a, 30a, and 32a have yellow, magenta, cyan, and black, respectively. A toner image is formed.
[0080]
At this time, since the same clock signal CLK is supplied to the power supplies 60a, 60b, 60c, and 60d that supply driving power to the developing units 26d, 28d, 30d, and 32d, as described above, The AC output supplied to each developing device is synchronized.
[0081]
Thereafter, toner images of yellow, magenta, cyan, and black are sequentially superimposed and transferred (primary transfer) on the intermediate transfer belt 12, thereby forming one color image. As described above, in the color image forming apparatus 10A, a color image is formed by sequentially transferring the toner image formed for each color for each photosensitive drum to the intermediate transfer belt 12 moving in the sub-scanning direction (the arrow Y direction in FIG. 2). Therefore, it is necessary to turn on / off (drive / stop driving) charging units, developing units and the like provided for the respective photosensitive drums at different timings for the respective photosensitive drums.
[0082]
Thereafter, the color image is conveyed to the position where the secondary transfer roll 18 is disposed as the intermediate transfer belt 12 travels, and is transferred onto the paper 38 at once (secondary transfer). The paper 38 to which the color image has been transferred is transported to the position where the fixing device 50 is disposed by the paper transport system 48 and subjected to image fixing processing (heating, pressurization, etc.) and then discharged to a tray (not shown).
[0083]
  Figure 6 shows the bookBasic configurationAn example of an actual measurement result of the AC signal of the power supply 60a and the power supply 60b of the power supply device 60A and the clock signal CLK in the color image forming apparatus 10A according to FIG. Here, the frequency of the clock signal CLK is 9 kHz, and the duty is 55%. Control signals CS1 and CS2 are set in advance so that the amplitude of each AC output is 1 kVp-p.
[0084]
  As shown in the figure,Basic configurationThe AC outputs from the power supply 60a and the power supply 60b of the power supply device 60A according to the above are almost completely synchronized, and therefore, with respect to the AC component as shown in FIG. 18A regardless of the route of the high-voltage cable. No distortion occurs.
[0085]
  As detailed above, the bookBasic configurationIn the power supply apparatus according to the present invention, a means for generating a reference clock signal is provided, and the clock signal is supplied to all power supplies as a signal for setting the frequency and duty of the alternating current component in the output power of each power supply. Since the AC component is synchronized, distortion of the AC component of the output power can be prevented.
[0086]
  Also bookBasic configurationIn the image forming apparatus according to the present invention, since the power supply device as described above, that is, the power supply device in which the AC component of the output power is not distorted is used as the driving power source for the developing device, the occurrence of banding can be suppressed. As a result, a high-quality image can be formed.
[0087]
  [ActualForm]
  the aboveBasic configurationThen, although one form when all the frequencies of the AC output of each power supply were the same was explained,RealIn the embodiment, one mode in the case where power supplies having different frequencies of AC output are included will be described. That is, for the purpose of improving image quality, there are cases where only the K color developing device among Y, M, C, and K color developing devices is driven by AC power having a higher frequency than other colors. .RealIn the embodiment, one form of such a case will be described. Here, the case where the frequency of the AC output of the power supplies 60a, 60b and 60c is 5 kHz and the frequency of the AC output of the power supply 60d is 9 kHz will be described.
[0088]
  In FIG.RealA schematic configuration of the power supply device 60A and MCU 80B of the color image forming apparatus 10B according to the embodiment is shown. 7 that are the same as those in FIG. 3 are assigned the same reference numerals as those in FIG. 3, and descriptions thereof are omitted here.
[0089]
  As shown in FIG.RealThe color image forming apparatus 10B according to the embodimentBasic configurationIs different from the color image forming apparatus 10A according to the present invention only in that the MCU is an MCU 80B provided with frequency dividers 86A and 86B that divide the clock signal CLK output from the ASIC 84 into different frequencies. ing.
[0090]
That is, the output terminal for outputting the clock signal CLK of the ASIC 84 is branched and connected to the input terminals of the frequency dividers 86A and 86B, and the output terminal of the frequency divider 86A is branched into three power supplies 60a, 60b and The output terminal of the frequency divider 86B is connected to the input terminal of the clock receiving circuit 66 of the power supply 60d.
[0091]
Here, the frequency of the clock signal CLK generated by the ASIC 84 is set to 45 kHz, and the frequency divider 86A divides the input clock signal by a factor of 9, and the frequency divider 86B The obtained clock signal is divided by a factor of five. Therefore, the frequency divider 86A generates a clock signal with a frequency of 5 kHz, and the frequency divider 86B generates a clock signal with a frequency of 9 kHz, and the clock signals after frequency division are synchronized with each other. Become. Therefore, as shown in FIG. 8, the AC output of the power sources 60a, 60b and 60c, that is, the AC output for each color of Y, M, and C is 5 kHz, and the AC output of the power source 60d, that is, the K color AC output is 9 kHz. Thus, each AC output is synchronized with a period of 1 mS.
[0092]
Therefore, even in this embodiment, regardless of the route of the high-voltage cable, the distortion with respect to the AC component as shown in FIG. 18A does not occur.
[0093]
  It should be noted that the color image forming apparatus 10B includes an image forming apparatus according to the present invention in which a portion constituted by the power supply device 60A and the MCU 80B is included.Claim 1In the power supply device of the invention described,eachEquivalent to each other.
[0094]
  As explained in detail above,RealIn the power supply device according to the embodiment,Basic configurationAnd a frequency divider that divides the clock signal CLK to generate a divided clock signal having a different frequency, and supplies the divided clock signal to a power source. Therefore, it is possible to cope with a case where a plurality of power sources that generate electric power having different frequencies of alternating current components coexist.
[0095]
  Also,RealIn the image forming apparatus according to the embodiment, the power supply device as described above, that is, the power supply device in which the AC component of the output power is not distorted is used as the driving power source for the developing device.Basic configurationAs with the image forming apparatus according to the above, the occurrence of banding can be suppressed, and as a result, a high-quality image can be formed.
[0096]
  In addition,RealIn the embodiment, the case where the divided clock signals are supplied to all the power supplies provided in the power supply device 60A has been described. However, the present invention is not limited to this, and as shown in FIG. A frequency-divided clock signal may be supplied only for some power supplies, and a clock signal may be directly supplied from the ASIC 84 for the remaining power supplies. In this case,RealSince the number of frequency dividers can be reduced as compared with the embodiment, the cost and the space can be reduced.
[0097]
  Also,RealIn the embodiment, the case where a clock signal having a frequency different from that of the clock signal CLK is generated by dividing the clock signal CLK by a frequency divider has been described. However, the present invention is not limited to this. A clock signal having a frequency different from that of the clock signal CLK may be generated by multiplying the signal CLK by a multiplier. AgainRealThe same effect as the embodiment can be achieved.
[0098]
  [Reference example 1]
  the aboveBasic configuration andIn the embodiment, an example in which a single clock signal CLK generated outside the power supply is branched and supplied to four power supplies has been described.Reference example 1Now, an example in which a clock signal generated in one power supply is supplied to another power supply will be described.
[0099]
  In FIG.Reference example 1The schematic configuration of the power supply device 60B and MCU 80C of the color image forming apparatus 10C according to FIG. 10 that are the same as those in FIG. 3 are denoted by the same reference numerals as those in FIG. 3, and description thereof is omitted here.
[0100]
  As shown in FIG.Reference example 1The power supply device 60B according toBasic configurationCompared with the power supply device 60A according to the present embodiment, the power supply 60a is a power supply 60a 'in which the clock reception circuit 66 generates a clock signal CLK, and the clock signal CLK generated by the clock generation circuit 67 is used. Is different only in that it is branched and supplied to the clock receiving circuit 66 of each of the other power supplies 60b, 60c and 60d. Also bookReference example 1MCU80C related toBasic configurationThe only difference is that the ASIC 84 is an ASIC 84 'that does not generate the clock signal CLK.
[0101]
  In FIG.Reference example 1A schematic configuration of a power source 60a 'according to the above is shown. 11 that are the same as those in FIG. 4 are given the same reference numerals as those in FIG. 4, and description thereof is omitted here.
[0102]
  As shown in FIG.Reference example 1The power supply 60a 'according toBasic configurationThe only difference is that the clock receiving circuit 66 is a clock generating circuit 67 that generates the clock signal CLK, as compared with the power supply 60a.
[0103]
Accordingly, since the AC outputs are generated based on the same clock signal CLK in the power supplies 60a ', 60b, 60c, and 60d that supply driving power to the developing devices 26d, 28d, 30d, and 32d, The AC output supplied to each developing device is synchronized.
[0104]
Therefore, even in this embodiment, regardless of the route of the high-voltage cable, the distortion with respect to the AC component as shown in FIG. 18A does not occur.
[0106]
  Like thisReference example 1The power supply apparatus according to the present invention includes means for generating a clock signal CLK for setting the frequency and duty of the AC component in one of four power supplies included in the power supply apparatus, and the clock signal CLK is supplied to another power supply. Since the AC component is synchronized by supplying toBasic configuration andSimilarly to the power supply device according to the embodiment, distortion of the AC component of the output power can be prevented.
[0107]
  Also bookReference example 1In the image forming apparatus according to the present invention, since the power supply device as described above, that is, the power supply device in which the AC component of the output power is not distorted, is used as the power supply for driving the developing device.Basic configuration andSimilarly to the image forming apparatus according to the embodiment, the occurrence of banding can be suppressed, and as a result, a high-quality image can be formed.
[0108]
  [Reference example 2]
  the aboveBasic configuration,EmbodimentAnd Reference Example 1In the above description, the case where one clock signal CLK is branched and supplied to the power supply has been described.Reference example 2In the following, an embodiment will be described in which the AC output of each power supply is synchronized by synchronizing clock generation circuits that generate other clock signals based on one clock signal.
[0109]
  In FIG.Reference example 2The schematic configuration of the power supply device 60C and MCU 80C of the color image forming apparatus 10D according to FIG. 12 that are the same as those in FIG. 10 are assigned the same reference numerals as in FIG. 10, and descriptions thereof are omitted here.
[0110]
  As shown in FIG.Reference example 2The color image forming apparatus 10D according toReference example 1Compared to the color image forming apparatus 10C according to the present embodiment, only the power source 60d is a power source 60d 'in which a reset circuit 68 and a clock generation circuit 67' are interposed between the clock receiving circuit 66 and the control circuit 63. Is different.
[0111]
  In FIG.Reference example 2A schematic configuration from the clock receiving circuit 66 to the control circuit 63 of the power supply 60d 'is shown. Since the configuration other than the portion shown in FIG. 13 is the same as that of the power supply 60a shown in FIG. 4, the description thereof is omitted here.
[0112]
  As shown in FIG.Reference example 2The reset circuit 68 in the power supply 60d ′ according to the above configuration includes a capacitor C, two resistors R1 and R2, and a transistor Tr. One terminal of the capacitor C is connected to the output terminal of the clock receiving circuit 66, and the capacitor The other terminal of C is connected to the base of the transistor Tr via a resistor R1, and is grounded via a resistor R1 and a resistor R2. On the other hand, the collector of the transistor Tr is connected to the input terminal of the clock generation circuit 67 ', and the emitter is grounded.
[0113]
Here, the clock generation circuit 67 of the power supply 60a ′ generates a clock signal of a predetermined frequency (for example, 1 kHz), and the clock generation circuit 67 ′ of the power supply 60d ′ is different from the clock signal generated by the clock generation circuit 67. A clock signal having a frequency (for example, 10 kHz) is generated.
[0114]
In the power supply device 60C configured as described above, as shown in FIG. 14, the clock signal A generated by the clock generation circuit 67 of the power supply 60a ′ and the clock signal generated by the clock generation circuit 67 ′ of the power supply 60d ′. (Indicated as “internal clock signal” in FIG. 14) is generated by a different clock generation circuit, and is often not synchronized. However, the power supply 40 d ′ sets the transistor Tr at the rising edge of the clock signal A. The clock signal B synchronized with the clock signal A is generated by turning on and resetting the internal clock signal of the clock generation circuit 67 ′.
[0116]
  Like thisReference example 2In the power supply apparatus according to the present invention, the power supply 60a ′ includes a clock generation circuit that generates a clock signal for setting the frequency and duty of the AC component, and the power supply 60d ′ generates a clock signal having a frequency different from that of the clock signal. Since the AC component is synchronized by synchronizing the clock generation circuit of the power supply 60d ′ with the clock signal generated by the clock generation circuit of the power supply 60a ′ as a reference, the clock generation circuit is provided as a clock generation circuit. Low precision can be applied, and distortion of the AC component of the output power can be prevented at low cost.
[0117]
  In addition, bookReference example 2In the image forming apparatus according to the present invention, since the power supply device as described above, that is, the power supply device in which the AC component of the output power is not distorted, is used as the power supply for driving the developing device.Basic configuration,EmbodimentAnd Reference Example 1As with the image forming apparatus according to the above, the occurrence of banding can be suppressed, and as a result, a high-quality image can be formed.
[0118]
  BookReference example 2In the above description, the clock signal generated in one power supply is synchronized with the clock signal generated in the other power supply.ThisHowever, the present invention is not limited to this. Each power supply is provided with a clock signal generating means for generating a clock signal and a reference clock generating circuit for generating a reference clock signal serving as a reference is provided outside the power supply apparatus. The clock signal in each power supply can be synchronized.
[0119]
  FIG. 15 shows a configuration example of this form. As shown in the figure, in this color image forming apparatus 10E, all power supplies included in the power supply device 60D are connected to the main power supply 60D.Reference example 2Similarly to the power supply 60d ′ (see also FIGS. 12 and 13), the clock receiving circuit 66, the reset circuit 68, and the clock generation circuit 67 ′ are configured to generate the reference clock signal CLK by the ASIC 84. The power is supplied to the clock receiving circuit 66 of each power source.
[0120]
In this configuration, the transistor Tr provided in the reset circuit 68 is turned on at the rising edge of the reference clock signal CLK supplied from each power source, and the internal clock signal of the clock generation circuit 67 ′ is reset, thereby generating the reference clock signal CLK. A synchronized clock signal is generated.
[0121]
  Therefore, even in such a configuration, it is possible to synchronize the AC output from each power source.Reference example 2The same effect can be achieved.
[0123]
Table 1 shows the improvement effect of the present invention and the improvement effect of the prior art. In Table 1, ○ indicates advantageous, Δ indicates slightly disadvantageous, and × indicates disadvantageous.
[0124]
[Table 1]

[0125]
As shown in Table 1, in each conventional technology of 1 converter system, cableless system, and shield system, independent controllability of power output, high frequency of power output, rectangular wave of power output, downsizing of device, It is disadvantageous in either avoidance of layout restrictions and cost, and it can be seen that the present invention is advantageous in any aspect.
[0126]
  The aboveBasic configuration andEmbodimentEach ofIn the above, the case where the power supply device of the present invention is applied to a power supply device provided with a power supply by a booster circuit has been described. However, the present invention is not limited to this and is applied to a power supply device provided with a power supply by a step-down circuit. It can also be in the form.
[0127]
  FIG. 16 shows a configuration example of a power supply including the step-down circuit in this case. In the power supply shown in the figure, the load capacity (developer capacity) is charged by a high-frequency DC-DC converter using the input voltage Vcc, and a high withstand voltage is obtained at a timing based on the clock signal CLK input through the clock receiving circuit. A high-voltage rectangular wave is generated by switching the switching element Tr1 to discharge the load capacitance. In order to maintain the voltage for a while after reaching a certain voltage, the voltage is detected by a voltage detection circuit (aboveBasic configuration andEmbodimentEach ofIn the case where the voltage is equal to or higher than a certain voltage, the driving of the DC-DC converter is stopped.
[0128]
In the power supply shown in the figure, the on / off signal and the control signal are omitted. However, when the on / off signal is in the off state, the application / non-application of the input voltage to the primary winding of the transformer is not performed. The on / off signal can be controlled by turning off the switching element Tr2 that controls the application, and the control signal can be controlled by adjusting the voltage applied to the primary winding of the transformer according to the control signal. Is possible.
[0129]
  Even when the power supply device of the present invention is applied to a power supply device provided with a power supply by such a step-down circuit,Basic configuration andEmbodimentEach ofThe same effect can be achieved.
[0130]
  Also, aboveBasic configuration andEmbodimentEach ofIn the above description, the case where the AC outputs of all the power supplies provided in the power supply device are synchronized has been described, but the present invention is not limited to this, and a plurality of power supplies provided in the power supply device are provided. It can also be set as the form which takes a synchronization.
[0131]
  For example, in the configuration shown in FIG. 3, when the power supply 60a and the power supply 60b are arranged at substantially the same position, and the power supply 60c and the power supply 60d are arranged at substantially the same position different from the arrangement positions of the power supply 60a and the power supply 60b. Since the high-voltage cables from the power supply 60a and the power supply 60b and the high-voltage cables from the power supply 60c and the power supply 60d have different routing routes, it is not necessary to synchronize all the power supplies, and the power supplies 60a and 60b are synchronized. By synchronizing the power source 60c and the power source 60d,Basic configuration andEmbodimentEach ofThe same effect can be achieved.
[0132]
In addition, for example, in the configuration shown in FIG. 3, even when all the power supply positions are substantially the same, a certain degree of banding suppression effect can be expected by synchronizing with a plurality of power supplies. Therefore, the image quality can be improved to some extent.
[0133]
  Also, aboveBasic configuration andEmbodimentEach ofIn the above description, the case where various signals are generated by the ASIC has been described. However, the present invention is not limited to this. For example, a circuit having the same function may be configured by a combination of electronic components. Needless to say. In this case, although the occupied area for the function is widened, the cost for manufacturing the ASIC can be reduced.
[0134]
  Also, aboveBasic configuration andEmbodimentEach ofIn the above, a case where a signal for setting ON / OFF of the power output for each power supply (ON / OFF signal) and a signal for setting the amplitude of the AC output (control signal) are separately provided has been described. The present invention is not limited to this, and the function of each signal may be realized by one signal. An example of this form of signal is a PWM (Pulse Width Modulation) signal having a pulse width corresponding to the amplitude of the AC output. In this case, when the duty of the PWM signal is 0%, the power output is turned off. In this embodiment, since setting with two signals can be performed with one signal, a cable for supplying signals can be reduced, and the cost and size of the apparatus can be reduced.
[0135]
【The invention's effect】
  Claim1According to the described image forming apparatus,Multiplying a single reference clock signal to generate at least one converted clock signal of a different frequency;Of a plurality of power supplies that generate electric power each having an AC component and supply it to a plurality of supplies having the same functionBy supplying either of the reference clock signal and the converted clock signal to at least two power supplies as a signal for setting the frequency and duty of the AC componentSince the AC component of the electric power generated by at least two power supplies is synchronized, an effect of preventing distortion of the AC component of the output power can be obtained.
[0136]
  Claims1According to the above-described image forming apparatus, at least one of the development and charging operations for the plurality of photoconductors is performed by the electric power in which the alternating current component is synchronized, so that occurrence of banding can be suppressed. As a result, an effect that a high-quality image can be formed is obtained.
[Brief description of the drawings]
[Figure 1]According to the basic configuration of the present invention1 is a block diagram illustrating a preferred configuration example of an image forming apparatus.
[Figure 2]Basic configuration1 is a block diagram illustrating a schematic configuration of a color image forming apparatus according to FIG.
[Fig. 3]Basic configuration2 is a block diagram showing a schematic configuration of a power supply device and an MCU in the color image forming apparatus according to FIG.
[Fig. 4]Basic configuration2 is a block diagram showing a schematic configuration of a power supply in the color image forming apparatus according to FIG.
FIG. 5 is a time chart for explaining the operation of the power supply shown in FIG. 4;
[Fig. 6]Basic configurationIt is a wave form diagram which shows the measurement result of the alternating current output of two power supplies in the power supply device which concerns on.
[Fig. 7]FruitFIG. 2 is a block diagram illustrating a schematic configuration of a power supply device and an MCU in a color image forming apparatus according to an embodiment.
[Fig. 8]FruitIt is a time chart which shows the state of the alternating current output from each power supply which concerns on embodiment.
FIG. 9FruitIt is a block diagram which shows the structure of the modification of embodiment.
FIG. 10Reference example 12 is a block diagram showing a schematic configuration of a power supply device and an MCU in the color image forming apparatus according to FIG.
FIG. 11Reference example 12 is a block diagram showing a schematic configuration of a power source 60a 'in the color image forming apparatus according to FIG.
FIG.Reference example 22 is a block diagram showing a schematic configuration of a power supply device and an MCU in the color image forming apparatus according to FIG.
FIG. 13Reference example 22 is a block diagram (partial circuit diagram) showing a schematic configuration of a reset circuit according to FIG.
FIG. 14Reference example 2It is a time chart which shows the waveform state of each part of power supply 60d 'concerning.
FIG. 15Reference example 2It is a block diagram which shows the structure of this modification.
FIG. 16 is a block diagram (partial circuit portion) illustrating a configuration example of a power supply including a step-down circuit.
FIG. 17 is a waveform diagram illustrating an example of input timing of driving power to a plurality of developing devices.
FIGS. 18A and 18B are waveform diagrams for explaining the problems of the prior art, in which FIG. 18A is a waveform diagram showing a state of distortion of an AC output of a power supply, and FIG. (C) is a waveform diagram showing an example of an actual measurement result of (B).
FIG. 19 is a graph showing an example of a state of a potential difference with respect to a distance between power supply cables when the frequency of output power from a power supply is 5 kHz, 9 kHz, and 15 kHz.
[Explanation of symbols]
      10B  Color image forming device (image forming device)
        26a, 28a, 30a, 32a Photosensitive drum (photosensitive member)
        26b, 28b, 30b, 32b Image writing unit (scanning optical system)
        26c, 28c, 30c, 32c charger
        26d, 28d, 30d, 32d Developer
        60A, 60B, 60C, 60D Power supply
        60a, 60b, 60c, 60d
        61 Booster circuit
        63 Control circuit
        64 Output detection circuit
        66 Clock receiver circuit
        67 Clock generation timesRoad
        68 reset timesRoad
      80B  Machine control unit (power supply)
        82 CPU
      84 'ASIC (reference clock signal generation means, synchronization means)
        86A, 86B Dividevessel

Claims (1)

An image forming apparatus that forms an image based on multi-value image data,
Reference clock signal generating means for generating a single reference clock signal, conversion means for multiplying the reference clock signal to generate at least one converted clock signal of a different frequency, and generating the same power each having an AC component At least one of the plurality of power supplies as a signal for setting a frequency and a duty of the alternating current component. A power supply device comprising synchronization means for synchronizing the AC components of the power generated by the at least two power sources by supplying the two power sources;
A plurality of photoconductors on which at least one of development and charging operations is performed by the electric power in which the AC component is synchronized by the synchronization unit;
A plurality of scanning optical systems for scanning the plurality of photosensitive members with a light beam based on the multi-value image data;
An image forming apparatus comprising:

Images