JP3901082B2 - A / D converter controller - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a control device for an A / D converter that converts an analog signal into a digital signal.
[0002]
[Prior art]
Conventionally, electromagnetic valves and electromagnetic actuators have been provided with, for example, a linear solenoid as a power source, and when adjusting the opening of the electromagnetic valve and the displacement amount of the actuator, the displacement amount is detected, Feedback control is performed so that the detected displacement amount becomes the target displacement amount. Since this amount of displacement can be detected based on the value of the current flowing through the linear solenoid, feedback control is performed so that the energized current value of the linear solenoid is detected and the energized current value becomes the target current value corresponding to the target displacement amount. Is to be done.
[0003]
As a technique for performing feedback control of the current flowing through such an inductive load, for example, a control device disclosed in Patent Document 1 has been proposed. This control device is a linear solenoid control device incorporated in an electromagnetic valve mounted on an automobile. In this linear solenoid control device, for example, the control CPU is for duty-driving the linear solenoid based on a deviation between a target current value input from the host CPU and an actual current value (detected current value) actually flowing to the linear solenoid. A feedback calculation for calculating the duty ratio is executed. The PWM signal output circuit outputs a PWM signal corresponding to the duty ratio calculated by the control CPU at a predetermined constant period, thereby energizing the linear solenoid by driving the switching element with a duty. The voltage across the current detection resistor provided in the energization path of the linear solenoid is A / D converted by an A / D converter, and A / D data is delivered as a detected current value representing the current flowing through the linear solenoid. Is input to the RAM. The control CPU activates the A / D converter every cycle shorter than a certain cycle of the PWM signal output from the PWM signal output circuit. Then, the control CPU fetches a plurality of detected current values for m cycle time (m is an integer) of the PWM signal from the A / D data delivery RAM, and arithmetically averages the fetched detected current values to obtain m cycles. Calculate the average current value over time. Thereafter, the control CPU performs a feedback calculation based on the average current value and the target current value every predetermined period longer than the constant period of the PWM signal, and calculates the duty ratio for the PWM signal. Then, the latest duty ratio calculated in this way is reflected in each output cycle of the PWM signal output circuit, a PWM signal corresponding to the duty ratio is output, and the linear solenoid is energized and driven.
[0004]
[Patent Document 1]
Japanese Patent Laid-Open No. 11-308107
[Problems to be solved by the invention]
In the control method of Patent Document 1, in order to improve the control accuracy of the linear solenoid, it is necessary to obtain an accurate average current value. For this purpose, the A / D conversion cycle of the detected current value is made uniform. That is, it is necessary to make the start cycle of the A / D converter by the control CPU uniform. The control CPU captures the A / D converted detected current value into the A / D data delivery RAM based on the interrupt signal output from the A / D converter upon completion of the A / D conversion, and An A / D interrupt process such as an average current value calculation process based on a plurality of detected current values is executed. After the A / D interrupt process, the control CPU sets the next activation time of the A / D converter by adding the A / D conversion cycle time to the previous activation time. Here, it is assumed that the control CPU executes interrupt control with high priority other than the control of the linear solenoid. Then, for example, when an interrupt for other high priority interrupt control occurs during execution of the A / D interrupt process by the control CPU, the control CPU interrupts the A / D interrupt process halfway. . Then, the control CPU executes the interrupt process with the high priority, then re-executes the interrupted A / D interrupt process, and when it completes, sets the start time of the A / D converter . For this reason, when another interrupt process with a higher priority occurs in this way, the setting time of the start time of the A / D converter is delayed toward the end of the A / D conversion cycle. Since a predetermined time is also required for setting the start time of the A / D converter, even if the start time setting start time is earlier than the end time of the A / D conversion cycle, the setting end is completed. The timing may be later than the end timing of the A / D conversion cycle. In this case, the control CPU cannot activate A / D conversion at the next A / D conversion activation time, and cannot detect a detected current value for one A / D conversion period. As a result, there is a problem that an accurate average current value cannot be obtained and the control accuracy of the linear solenoid is lowered.
[0006]
The present invention has been made in view of these problems, and an object of the present invention is to provide an A / D converter control device capable of starting an A / D converter at a predetermined period.
[0007]
[Means for Solving the Problems]
In the following, means for achieving the above object and its effects are described.
According to the first aspect of the present invention, an A / D converter that takes in an input signal and converts it into a digital value, and when the conversion of the A / D converter is completed, the A / D converter is activated at the previous activation time. A controller for starting the A / D converter when the set start time is reached and adding the predetermined conversion cycle time to the next start time; In the A / D converter control apparatus in which the A / D converter is caused to perform A / D conversion at a predetermined conversion cycle, the control unit is configured to execute the setting process when the start time of the setting process is a time after the next activation time. The A / D converter is forcibly activated.
[0008]
In the A / D converter control device, even if an interrupt occurs upon completion of conversion of the A / D converter, if another higher priority interrupt process occurs, the higher priority interrupt process is executed. After that, the startup time setting process is executed. For this reason, when another interrupt process with a higher priority occurs in this way, the setting time of the activation time is delayed toward the end of the conversion period of the A / D conversion. If the start time of this setting process is after the next start time, the A / D converter cannot be started at the next start time, and the detected current value of A / D conversion is lost. Will be.
[0009]
According to this configuration, the A / D converter is forcibly activated when the start time of the activation time setting process upon completion of conversion of the A / D converter is a time after the next activation time. For this reason, the A / D converter can be continuously activated at substantially a predetermined conversion cycle, and the detection current value of A / D conversion can be eliminated.
[0010]
According to a second aspect of the present invention, in the A / D converter control device according to the first aspect, the control unit is configured to start the setting process at a time within a predetermined time before the next activation time. In some cases, the A / D converter is forcibly activated.
[0011]
Since a predetermined time is also required for the setting process of the start time of the A / D converter, even if the start time of the start time setting process is a time before the end time of the conversion cycle, the setting process ends. The time may be later than the end time of the conversion cycle. Also in this case, the A / D converter cannot be started at the next starting time, and the detection current value of A / D conversion is lost.
[0012]
According to this configuration, when the start time of the start time setting process upon completion of conversion of the A / D converter is within a predetermined time before the next start time, the A / D converter is forcibly forced. Start. For this reason, the A / D converter can be continuously activated at substantially a predetermined conversion cycle, and the detection current value of A / D conversion can be eliminated.
[0013]
As in the third aspect of the invention, the predetermined time may include at least the time required for the start time setting process.
According to a fourth aspect of the present invention, in the A / D converter control device according to any one of the first to third aspects, the control unit is configured to perform a forcible activation of the A / D converter continuously a predetermined number of times or more. When performed, the present time is set as the previous activation time.
[0014]
According to this configuration, when the A / D converter is forcibly activated continuously for a predetermined number of times or more, the conversion cycle of the A / D conversion may deviate greatly from the original conversion cycle. According to this configuration, when the A / D converter is forcibly activated continuously for a predetermined number of times or more, the current time is set as the previous activation time. It becomes possible to make a period.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, an embodiment of the invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing the configuration of an A / D converter control device 10 to which the present invention is applied.
[0016]
The A / D converter control device 10 of the present embodiment controls energization of the linear solenoid 24 provided in the engine and controls the A / D converter 28 in order to control the engine mounted on the automobile to the target state. Controls such as start-up control and engine fuel injection control and ignition control are also performed.
[0017]
The A / D converter control device 10 is provided with a control IC 12. The control IC 12 feedback-controls the current flowing through the linear solenoid 24 in accordance with data (target current value) representing the current to flow through the linear solenoid 24 calculated by, for example, the transmission control CPU.
[0018]
The control IC 12 includes a control CPU 14, a PWM signal output circuit 16, and a data delivery RAM 18. The control CPU 14 calculates a duty ratio as a control command value for duty driving the linear solenoid 24 with a PWM signal, and outputs the detection result to the PWM signal output circuit 16 as PWM data (drive data).
[0019]
The PWM signal output circuit 16 reads PWM data for the linear solenoid 24 from the control CPU 14, and generates a PWM signal SG1 as a control signal for duty driving the linear solenoid 24.
[0020]
On the other hand, the linear solenoid 24 to be controlled is disposed in a power supply line from the positive electrode (power supply voltage Vb) of the battery to the negative electrode (ground) of the battery. On the power supply line side of the linear solenoid 24 in the power supply line, an FET 22 as switching means is provided. The PWM signal SG1 is input to the gate terminal of the FET 22. When the PWM signal SG1 is at the H level, the FET 22 is turned on, and the energization path from the battery to the linear solenoid 24 is energized. Conversely, when the PWM signal SG1 is at the L level, the FET 22 is turned off, and the energization path of the linear solenoid 24 is interrupted.
[0021]
Further, a current detection resistor 26 is provided as a detection means on the ground side of the linear solenoid 24. That is, a linear solenoid 24 as an inductive load and an FET 22 as a switching element are connected in series in a power supply line that generates a predetermined potential difference, and a current detection resistor 26 is connected in series to this series circuit. This resistor 26 is for detecting the current flowing through the linear solenoid 24.
[0022]
Both ends of the current detection resistor 26 are connected to an A / D converter (A / D conversion means) 28. The A / D converter 28 is activated based on the activation signal KS output from the control CPU 14 at a constant A / D conversion cycle. Each time the A / D converter 28 is activated by the control CPU 14, the A / D converter 28 sequentially takes in a current detection signal (voltage) representing the current flowing through the linear solenoid 24 and converts it into a digital value. An interrupt signal WS is output to the CPU 14.
[0023]
The control CPU 14 executes A / D interrupt processing based on the interrupt signal WS input from the A / D converter 28. In this A / D interrupt process, the digital value converted by the A / D converter 28 is sequentially stored in the data delivery RAM 18 and corresponds to one cycle time of the PWM signal SG1 stored in the data delivery RAM 18. The average value of the energizing current flowing through the linear solenoid 24 is calculated by averaging the digital values to be calculated. Further, the control CPU 14 performs setting processing for the next activation time of the A / D converter 28 after the calculation processing of the average current value. Further, the control CPU 14 forcibly starts the A / D converter 28 when the current time Tp is equal to or greater than the next delay trigger set time Tn.
[0024]
Next, the operation of the A / D converter control device 10 will be described.
As shown in FIG. 1, the functional configuration of the control CPU 14 includes a feedback (hereinafter referred to as F / B) calculation unit 30, an average value calculation unit 32, and an interrupt time setting unit 34.
[0025]
The average value calculation unit 32 sequentially stores the digital value converted by the A / D converter 28 in the data delivery RAM 18 based on the interrupt signal WS accompanying the completion of the A / D conversion of the A / D converter 28. . The average value calculation unit 32 calculates an average current value flowing through the linear solenoid 24 by averaging digital values corresponding to one cycle time of the PWM signal SG1 stored in the data delivery RAM 18.
[0026]
The F / B calculation unit 30 inputs the target current value of the linear solenoid 24 and the average current value calculated by the average value calculation unit 32, and energizes the linear solenoid 24 based on the target current value and the average current value. A duty ratio for controlling the current to be a target current value is calculated.
[0027]
The interrupt time setting unit 34 sets the next activation timing of the A / D converter 28 after the average current value is calculated by the average value calculation unit 32.
Regarding the interrupt time setting process in the interrupt time setting unit 34, more specifically, as shown in FIG. 2, the control CPU 14 captures the current time Tp in step 110.
[0028]
In the next step 120, the control CPU 14 updates the next delay trigger setting time Tn by adding the A / D conversion period A to the previous delay trigger setting time To.
[0029]
Thereafter, in step 130, the control CPU 14 determines whether or not the current time Tp is greater than the previous (n times) delay trigger set time To. If it is determined that the current time Tp is less than or equal to the previous delay trigger setting time To (step 130: NO), the process proceeds to step 200.
[0030]
On the other hand, if it is determined that the current time Tp is greater than the previous delay trigger setting time To (step 130: YES), the process proceeds to step 140. In step 140, the control CPU 14 determines whether or not the current time Tp is smaller than the next (n + 1) delay trigger set time Tn. If it is determined that the current time Tp is equal to or greater than the next delay trigger setting time Tn (step 140: NO), the process proceeds to step 200.
[0031]
On the other hand, if it is determined that the current time Tp is smaller than the next delay trigger setting time Tn (step 140: YES), the process proceeds to step 150.
In step 150, the control CPU 14 sets Tn as the next delay trigger setting time Tr. Next, in step 160, the control CPU 14 sets the forced activation count M to 0, and in the subsequent step 170, updates the previous delay trigger setting time To to Tn.
[0032]
In step 180, when the time elapses and the delay trigger setting time Tr set in step 150 is reached, the control CPU 14 outputs a delay trigger to activate the A / D converter 28.
[0033]
If NO is determined in step 130 or NO in step 140, the conversion cycle is considered to be deviated from the original A / D conversion cycle. The converter 28 is forcibly activated. In step 210, the control CPU 14 increments the forced activation count M.
[0034]
In step 220 following step 210, the control CPU 14 determines whether or not the number of forced activations M is greater than 3. If it is determined that the number of forced activations M is 3 or less (step 220: NO), the process proceeds to step 230. If it is determined that the number of forced activations M is greater than 3 (step 220: YES), the process is stepped. Proceed to 240.
[0035]
In step 230, the control CPU 14 updates the previous delay trigger setting time To to Tn.
In step 240, the previous delay trigger setting time To is updated to the current time Tp.
[0036]
FIG. 3 and FIG. 4 schematically illustrate the processing of FIG. As shown in FIG. 3, in the output cycle of the PWM signal SG1 of the PWM signal output circuit 16, the A / D converter 28 is activated at a predetermined A / D conversion cycle.
[0037]
The details are shown in FIG. If the time when the interrupt signal WS input upon completion of the conversion of the A / D converter 28 is smaller than the next delay trigger setting time Tr, the next delay trigger setting time Tr is in relation to the previous delay trigger setting time To. A value obtained by adding the conversion period A is set. When the time has elapsed and the set activation time is reached, the A / D converter 28 is activated and A / D conversion of the energization current of the linear solenoid 24 is executed.
[0038]
Further, as indicated by a chain line in FIG. 4, if the time when the interrupt signal WS input upon completion of conversion of the A / D converter 28 is equal to or greater than the next delay trigger setting time Tr, the control CPU 14 performs A / D The converter 28 is forcibly activated to execute A / D conversion of the energization current of the linear solenoid 24. At this time, the previous delay trigger setting time To is updated to Tn.
[0039]
Now, this embodiment has the following effects.
The control CPU 14 forcibly activates the A / D converter when the start time of the start time setting process of the A / D converter 28 upon completion of the conversion of the A / D converter 28 is a time after the next start time. I try to start it. For this reason, the A / D converter 28 can be continuously activated substantially at a predetermined conversion period A, and the detection current value of A / D conversion can be eliminated.
[0040]
The control CPU 14 forcibly activates the A / D converter 28 when the start time of the start time setting process upon completion of conversion of the A / D converter 28 is within a predetermined time before the next start time. Start. For this reason, the A / D converter 28 can be continuously activated with a substantially predetermined conversion period, and the detection current value of the A / D conversion can be omitted.
[0041]
The control CPU 14 sets the current conversion time of the A / D conversion as the original conversion cycle because the current time is set as the previous activation time when the A / D converter 28 is continuously activated for a predetermined number of times or more. To be able to.
[0042]
The embodiment may be changed as follows.
In the above embodiment, when the A / D converter 28 is forcibly activated three or more times in succession, the current time is set as the previous activation time. It may be set.
[0043]
In the above-described embodiment, the feedback control device for the linear solenoid 24 is embodied. However, the present invention is not limited to this, and the embodiment is embodied to perform feedback control so that the operation state of the control target is detected and the target value is obtained. Can do.
[0044]
Next, other technical ideas that can be grasped from the above embodiments will be described below.
・ With the completion of conversion of the A / D converter that takes in analog input signals and converts them to digital values, a predetermined conversion cycle time is added to the previous start time of the A / D converter to set the next start time Then, the A / D converter is activated at a predetermined conversion cycle by activating the A / D converter when the set activation time is reached. In the converter control method, the A / D converter is forcibly started when the start time of the next start time setting process is a time after the next start time. D converter control method.
[Brief description of the drawings]
FIG. 1 is a functional block diagram showing a configuration of an A / D converter control device to which the present invention is applied.
FIG. 2 is a flowchart showing start-up time setting control executed by the control device.
FIG. 3 is an explanatory diagram showing execution timing of startup time setting control.
FIG. 4 is an explanatory diagram showing execution timing of startup time setting control.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... A / D converter control apparatus, 12 ... Control IC, 14 ... Control CPU as a control part, 16 ... PWM signal output circuit, 18 ... RAM for data delivery, 24 ... Linear solenoid, 26 ... Resistance for electric current detection, 28 ... A / D converter, 30 ... feedback calculation unit, 32 ... average value calculation unit, 34 ... interrupt time setting unit, A ... conversion cycle, Tp ... current time, WS ... interrupt signal.

Claims (4)

An A / D converter that takes an input signal and converts it into a digital value;
Upon completion of the conversion of the A / D converter, a predetermined conversion cycle time is added to the previous activation time of the A / D converter to perform the next activation time setting process, and the set activation time A controller that activates the A / D converter when the A / D converter is reached, and causes the A / D converter to perform A / D conversion at a predetermined conversion cycle. ,
The control unit forcibly starts the A / D converter when the start time of the setting process is a time after the next start time. The A / D converter control device according to claim 1,
The control unit forcibly activates the A / D converter when a start time of the setting process is within a predetermined time before a next activation time Control device. The A / D converter control device according to claim 2,
The A / D converter control device, wherein the predetermined time includes at least a time required for the setting process. In the A / D converter control device according to any one of claims 1 to 3,
The A / D converter control device, wherein the controller sets the current time as the previous activation timing when the A / D converter is continuously activated for a predetermined number of times or more.

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