JP3894133B2

JP3894133B2 - Metal impurity evaluation method and evaluation substrate manufacturing method

Info

Publication number: JP3894133B2
Application number: JP2003043933A
Authority: JP
Inventors: 崇史山下
Original assignee: Sumco Corp
Current assignee: Sumco Corp
Priority date: 2003-02-21
Filing date: 2003-02-21
Publication date: 2007-03-14
Anticipated expiration: 2023-02-21
Also published as: JP2004253690A

Description

【０００１】
【発明の属する技術分野】
この発明は、半導体基板の製造工程中で種々加工を施した際に、基板内部が金属不純物で汚染されるのを定量的に評価する方法に関し、ＣｕやＦｅと作用して基板内部のボロンに偏析するため前記評価が困難なｐ型低抵抗半導体基板において、金属不純物汚染の評価を可能にした半導体基板の加工工程中の金属不純物評価方法及び評価用基板の製造方法に関する。
【０００２】
【従来の技術】
半導体基板の製造工程において、加工される半導体基板が雰囲気や装置などからのＣｕやＦｅなどの金属にて汚染されることが知られている。この半導体基板製造工程での金属不純物汚染の評価方法は、従来工程で得られた製品基板自体の金属不純物を評価する方法であった。
【０００３】
例えば、加工工程を経て得られた半導体基板製品を、全反射蛍光Ｘ線分光分析装置（ＴＸＲＦ）にてその表面金属不純物濃度を評価する方法、気相分解法にて半導体基板表面上の金属不純物を酸溶液にて回収してフレームレス原子吸光光度計（ＡＡＳ）や誘導結合プラズマ質量分析計（ＩＣＰ−ＭＳ）にて金属不純物濃度を評価する方法、ＤＬＴＳ法（Ｄｅｅｐ‐ＬｅｖｅｌＴｒａｎｓｉｅｎｔＳｐｅｃｔｒｏｓｃｏｐｙ）やＳＰＶ法（ＳｕｒｆａｃｅＰｈｏｔｏＶｏｌｔａｇｅＭｅｔｈｏｄ）による電気的測定による評価方法が採用されてきた。
【０００４】
一方、近年では、半導体基板内部の金属不純物汚染防止への厳しい要求があり、半導体基板製造工程から半導体基板内部への金属不純物による汚染評価を行うことは、半導体基板の品質向上に不可避であるとされている。（特開２００２−４０００９号参照）
【０００５】
【発明が解決しようとする課題】
しかし、前記従来の方法、ＴＸＲＦや気相分解法は、半導体基板表面の金属不純物濃度しか評価できない。また、電気的測定のＤＬＴＳ法やＳＰＶ法では、１Ω・ｃｍ以下の低抵抗半導体基板内部の金属不純物分析はできなかつた。
【０００６】
ｐ型低抵抗半導体基板は、ドーバント剤としてボロンが約１×１０^１８ａｔｏｍｓ／ｃｍ^３以上の高濃度で添加されている。この高濃度ボロンはＣｕやＦｅといった半導体基板の特性に悪影響を与える金属と相互作用するため、金属不純物は容易に半導体基板内部のボロンに偏析する。従って、半導体基板は容易に金属不純物にて汚染されることになる。
【０００７】
この発明は、半導体基板の製造工程、特にｐ型低抵抗半導体基板の製造工程において、汚染される金属不純物量を正確に評価することが可能な半導体基板製造工程中の金属不純物評価方法及び評価用基板の製造方法を提供することを目的としている。
【０００８】
【課題を解決するための手段】
発明者らは、金属汚染されたｐ型低抵抗半導体基板を用いた場合、この基板の製造工程の金属不純物汚染量を定量的に評価することが困難であることに着目し、評価される基板側の金属不純物量について種々検討した結果、半導体基板内部の金属不純物量を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下すると、製造工程、例えばエッチング工程やミラーポリッシュ工程での金属不純物汚染を定量的に評価できることを知見し、この発明を完成した。
【０００９】
すなわち、この発明は、ボロンが１×１０ ^１８ａｔｏｍｓ／ｃｍ ^３以上添加されたｐ型低抵抗半導体基板を、洗浄液に浸漬又は洗浄液を噴射しながら基板温度を３００℃〜５００℃に加熱することにより基板内部の金属不純物を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にした後、前記半導体基板を加工し、前記加工により汚染された半導体基板内の金属不純物をフレームレス原子吸光光度計又は誘導結合プラズマ質量分析計により評価する金属不純物評価方法である。
【００１０】
また、この発明は、ボロンが１×１０^１８ａｔｏｍｓ／ｃｍ^３以上添加されたｐ型低抵抗半導体基板を、洗浄液に浸漬又は洗浄液を噴射しながら基板温度を３００℃〜５００℃に加熱し、基板内部の金属不純物を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にする金属不純物評価用基板の製造方法である。
【００１１】
【発明の実施の形態】
この発明は、半導体基板で基板内部に金属不純物が１×１０^１１ａｔｏｍｓ／ｃｍ^３以下の半導体基板を作製することを要旨とする。半導体基板は、いずれの抵抗値、表面性状のものも対象となるが、特に従来評価が困難であったドーバント剤としてボロンが１×１０^１８ａｔｏｍｓ／ｃｍ^３以上の高濃度で添加された１Ω・ｃｍ以下のｐ型低抵抗半導体基板が適している。また、半導体基板の表面状態は、ミラーポリッシュ仕上げの他、エッチング仕上げやラッピング仕上げなど半導体表面状態を問わない。
【００１２】
この発明において、評価対象となる半導体基板の製造工程は、スライス工程、ラッビング工程、面取り工程、エッチング工程、ミラーポリッシュ工程、洗浄工程、熱処理工程、エピタキシャル成長工程など、半導体基板の製造に関わるいずれの工程にも適用可能である。
【００１３】
この発明において、熱処理方法は、ランプやヒーターにより半導体基板温度を３００℃〜５００℃に加熱し、例えば１〜２０時間保持して、該基板内部より金属不純物を表面に拡散させ、その後、酸洗浄などで表面より除去することで基板内部の金属不純物量を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にすることができる。
【００１４】
また、熱処理方法として、硫酸などの洗浄液に浸漬してランプで加熱したり、あるいは洗浄液を噴射しながらランプで加熱して該基板温度を３００℃〜５００℃に加熱することで、基板内部の金属不純物量を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にすることが可能である。
【００１５】
この発明において、半導体基板の加熱温度は、３００℃未満では、半導体基板中のボロンに偏折している金属不純物を基板表面に拡散させる効果がなく、５００℃を超えると、基板中の金属固溶度が上昇して、１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にすることが困難となるため、３００℃〜５００℃が好ましい。また、保持時間は、１〜２０時間が好ましい。さらに、洗浄液としては、硫酸が最適である。
【００１６】
前記熱処理で基板内部の金属不純物量を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にした評価用半導体基板を、評価対象となる半導体基板の製造工程に投入した後、金属不純物の汚染を評価する方法は、半導体基板の表面にある金属不純物を酸洗浄で除去した後、当該基板を弗酸／硝酸の蒸気で分解し、分解後の該基板の残渣を酸溶液で処理し、この残渣中の金属不純物を、ＩＣＰＭ−ＭＳ、ＡＡＳなどで定量評価する方法が採用できる。
【００１７】
【実施例】
実施例１
以下に、この発明による評価用基板をミラーポリッシュ工程に投入して金属不純物汚染を評価する例について説明する。まずエッチング工程を経たｐ型低抵抗半導体基板、結晶方位（１００）、抵抗値：０．００８Ω・ｃｍ、酸素濃度：１．３×１０^１８ａｔｏｍｓ／ｃｍ^３（ＡＳＴＭＦ‐１２１１９７９）を用意した。
【００１８】
この半導体基板を硫酸中に浸漬し、赤外線にて該基板を４００℃になるよう加熱した。加熱後、純水にて該基板をリンスした。基板内部の金属不純物を除去した前記評価用基板を、弗酸／硝酸の蒸気で分解させた後、その残渣中の金属不純物をＩＣＰ‐ＭＳにて定量評価したところ、該基板内部の金属不純物Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌが１×１０^１１ａｔｏｍｓ／ｃｍ^３以下であることを確認した。
【００１９】
上記工程で得た評価用基板を、一般的な半導体基板製造工程におけるミラーポリッシュ工程で加工を行つた。ミラーポリッシュ加工後、アルカリ洗浄及び酸洗浄で半導体基板表面の金属不純物を除去し、該評価用基板を弗酸／硝酸の蒸気で分解し、その残渣中の金属不純物をＩＣＰ‐ＭＳで定量評価した。
【００２０】
金属不純物のうちＦｅ，Ｎｉ，Ｃｒ，Ａｌは、１×１０^１１ａｔｏｍｓ／ｃｍ^３以下とこのミラーポリッシュ工程での半導体基板内部への汚染が無いことを評価できた。また、Ｃｕは５×１０^１１ａｔｏｍｓ／ｃｍ^３とミラーポリッシュ工程でＣｕ汚染があることとその定量的な評価が可能であることを確認した。
【００２１】
実施例２
エッチング工程を経たｐ型高抵抗半導体基板を実施例１と同様にミラーポリッシュ工程に投入して金属不純物汚染を評価した。結晶方位（１００）、抵抗値：１０Ω・ｃｍ、酸素濃度：１．３×１０^１８ａｔｏｍｓ／ｃｍ^３（ＡＳＴＭＦ‐１２１１９７９）のｐ型高抵抗半導体基板を用意した。次に実施例１と同様に熱処理して該基板内部の金属不純物Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌが１×１０^１１ａｔｏｍｓ／ｃｍ^３以下である評価用基板を作製した。
【００２２】
この評価用基板を、一般的な半導体基板製造工程におけるミラーポリッシュ工程で加工を行つた。その後実施例１と同様に金属不純物をＩＣＰ‐ＭＳで定量評価したところ、Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌ量は、ミラーポリッシュ加工後で増加がなく、ｐ型高抵抗半導体基板内部へのミラーポリッシュ加工工程で金属不純物の汚染がないことが評価できた。
【００２３】
実施例３
以下に、この発明による評価用基板をラッピング工程に投入して金属不純物汚染を評価する例について説明する。まずスライス工程を経たｐ型低抵抗半導体基板、結晶方位（１００）、抵抗値：０．００９Ω・ｃｍ、酸素濃度：１．３×１０^１８ａｔｏｍｓ／ｃｍ^３（ＡＳＴＭＦ‐１２１１９７９）を用意した。次に実施例１と同様に熱処理して該基板内部の金属不純物Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌが１×１０^１１ａｔｏｍｓ／ｃｍ^３以下である評価用基板を作製した。
【００２４】
この評価用基板を、一般的な半導体基板製造工程におけるラッピング工程で加工を行つた。その後実施例１と同様に金属不純物をＩＣＰ‐ＭＳで定量評価したところ、Ｎｉ，Ｃｕ，Ｃｒ，Ａｌは１×１０^１１ａｔｏｍｓ／ｃｍ^３以下とこのラッピング工程での汚染がないことを確認した。Ｆｅについては５×１０^１１ａｔｏｍｓ／ｃｍ^３とラッピング工程でのＦｅ汚染を定量的に評価できた。
【００２５】
実施例４
スライス工程を経たｐ型高抵抗半導体基板を実施例１と同様にラッピング工程に投入して金属不純物汚染を評価した。結晶方位（１００）、抵抗値：１０Ω・ｃｍ、酸素濃度：１．３×１０^１８ａｔｏｍｓ／ｃｍ^３（ＡＳＴＭＦ‐１２１１９７９）のｐ型高抵抗半導体基板を用意した。次に実施例１と同様に熱処理して該基板内部の金属不純物Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌが１×１０^１１ａｔｏｍｓ／ｃｍ^３以下である評価用基板を作製した。
【００２６】
この評価用基板を、一般的な半導体基板製造工程におけるラッピング工程で加工を行った。その後実施例１と同様に金属不純物をＩＣＰ‐ＭＳで定量評価したところ、Ｆｅ，Ｎｉ，Ｃｕ，Ｃｒ，Ａｌ量は、ラッピング加工後で増加がなく、ｐ型高抵抗半導体基板内部へのラッピング加工工程で金属不純物の汚染がないことが評価できた。
【００２７】
【発明の効果】
この発明は、実施例に示すごとくラッピング工程やミラーポリッシュ工程などの半導体基板の製造工程において、特にｐ型低抵抗半導体基板であっても、汚染される金属不純物量を正確に評価することができる。
【００２８】
すなわち、この発明は、いずれの抵抗値の半導体基板であっても、加熱処理を施して基板内部の金属不純物量を１×１０^１１ａｔｏｍｓ／ｃｍ^３以下にしたこの発明による評価用基板を製造工程中に投入して他基板と同様に加工を施すことで、当該製造工程中の金属不純物の汚染量を定量的に評価可能にした。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for quantitatively evaluating that the inside of a substrate is contaminated with metal impurities when various processes are performed during the manufacturing process of a semiconductor substrate, and acts on Cu and Fe to boron inside the substrate. in difficult p-type low resistance semiconductor substrate wherein the evaluation is to segregate a process for the preparation of metallic impurities evaluation method and evaluation substrate during processing step of the semiconductor substrate that enables evaluation of the metallic impurity contamination.
[0002]
[Prior art]
In a semiconductor substrate manufacturing process, it is known that a semiconductor substrate to be processed is contaminated with a metal such as Cu or Fe from an atmosphere or an apparatus. The method for evaluating metal impurity contamination in this semiconductor substrate manufacturing process is a method for evaluating metal impurities in the product substrate itself obtained in the conventional process.
[0003]
For example, a method of evaluating the surface metal impurity concentration of a semiconductor substrate product obtained through a processing process using a total reflection X-ray fluorescence spectrometer (TXRF), a metal impurity on the surface of a semiconductor substrate by a vapor phase decomposition method Is collected in an acid solution, and a metal impurity concentration is evaluated by a flameless atomic absorption photometer (AAS) or inductively coupled plasma mass spectrometer (ICP-MS), a DLTS method (Deep-Level Transient Spectroscopy) or SPV An evaluation method based on electrical measurement using a surface photo voltage method has been adopted.
[0004]
On the other hand, in recent years, there is a strict demand for prevention of metal impurity contamination inside the semiconductor substrate, and it is inevitable to improve the quality of the semiconductor substrate to perform contamination assessment from the semiconductor substrate manufacturing process to the inside of the semiconductor substrate due to metal impurities. Has been. (See JP 2002-40009)
[0005]
[Problems to be solved by the invention]
However, the conventional method, TXRF and vapor phase decomposition method can only evaluate the metal impurity concentration on the surface of the semiconductor substrate. Moreover, the DLTS method and the SPV method for electrical measurement have failed to analyze metal impurities inside a low-resistance semiconductor substrate of 1 Ω · cm or less.
[0006]
In the p-type low resistance semiconductor substrate, boron is added at a high concentration of about 1 × 10 ¹⁸ atoms / cm ³ or more as a dopant. Since this high-concentration boron interacts with a metal that adversely affects the characteristics of the semiconductor substrate, such as Cu and Fe, the metal impurities are easily segregated into boron inside the semiconductor substrate. Therefore, the semiconductor substrate is easily contaminated with metal impurities.
[0007]
The present invention relates to a method for evaluating a metal impurity in a semiconductor substrate manufacturing process and an evaluation method capable of accurately evaluating the amount of contaminated metal impurities in a manufacturing process of a semiconductor substrate, particularly a manufacturing process of a p-type low resistance semiconductor substrate. It aims at providing the manufacturing method of a board | substrate.
[0008]
[Means for Solving the Problems]
The inventors pay attention to the fact that, when a metal-contaminated p-type low-resistance semiconductor substrate is used, it is difficult to quantitatively evaluate the amount of metal impurity contamination in the manufacturing process of this substrate, and the substrate to be evaluated As a result of various studies on the amount of metal impurities on the side, if the amount of metal impurities inside the semiconductor substrate is 1 × 10 ¹¹ atoms / cm ³ or less, the metal impurity contamination in the manufacturing process, for example, the etching process or the mirror polishing process is quantitatively evaluated. We have found out that this is possible and have completed the present invention.
[0009]
That is, according to the present invention, a p-type low resistance semiconductor substrate to which boron is added at 1 × 10 ¹⁸ atoms / cm ³ or more is heated to 300 ° C. to 500 ° C. while the substrate temperature is immersed in the cleaning solution or sprayed with the cleaning solution. after the metallic impurities inside the substrate below ^{^{1 × 10 11 atoms / cm 3}} , wherein the processing the semiconductor substrate, flameless atomic absorption photometer or an inductively coupled plasma mass of metal impurities in a semiconductor substrate which has been contaminated by the working a metallic impurities evaluation method of evaluating by the spectrometer.
[0010]
The present invention also provides a p-type low resistance semiconductor substrate to which boron is added at 1 × 10 ¹⁸ atoms / cm ³ or more, and the substrate temperature is heated to 300 ° C. to 500 ° C. while being immersed in the cleaning solution or sprayed with the cleaning solution. the interior of the metal impurities is 1 × ¹⁰ 11 atoms / cm ³ manufacturing method of metallic impurities evaluation substrate to below.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
The gist of the present invention is that a semiconductor substrate having a metal impurity of 1 × 10 ¹¹ atoms / cm ³ or less is produced inside the substrate. Semiconductor substrates of any resistance value and surface texture are targeted, but in particular, boron is added at a high concentration of 1 × 10 ¹⁸ atoms / cm ³ or more as a dopant that has been difficult to evaluate in the past. A p-type low-resistance semiconductor substrate of cm or less is suitable. Further, the surface state of the semiconductor substrate may be any semiconductor surface state such as etching finish or lapping finish in addition to mirror polish finish.
[0012]
In this invention, the manufacturing process of the semiconductor substrate to be evaluated is any process related to semiconductor substrate manufacturing, such as a slicing process, a rubbing process, a chamfering process, an etching process, a mirror polishing process, a cleaning process, a heat treatment process, and an epitaxial growth process. It is also applicable to.
[0013]
In this invention, the heat treatment method is such that the temperature of the semiconductor substrate is heated to 300 ° C. to 500 ° C. with a lamp or a heater, and held for 1 to 20 hours, for example, to diffuse metal impurities from the inside of the substrate to the surface, The amount of metal impurities inside the substrate can be reduced to 1 × 10 ¹¹ atoms / cm ³ or less by removing the surface from the surface.
[0014]
Further, as a heat treatment method, the metal inside the substrate is heated by being immersed in a cleaning solution such as sulfuric acid and heated by a lamp, or by heating with a lamp while spraying the cleaning solution and heating the substrate temperature to 300 ° C. to 500 ° C. The amount of impurities can be 1 × 10 ¹¹ atoms / cm ³ or less.
[0015]
In the present invention, when the heating temperature of the semiconductor substrate is less than 300 ° C., there is no effect of diffusing metal impurities that are bent in the boron in the semiconductor substrate to the substrate surface. Since it becomes difficult to raise the solubility to 1 × 10 ¹¹ atoms / cm ³ or less, 300 ° C. to 500 ° C. is preferable. The holding time is preferably 1 to 20 hours. Further, sulfuric acid is optimal as the cleaning liquid.
[0016]
A method for evaluating contamination of metal impurities after a semiconductor substrate for evaluation in which the amount of metal impurities inside the substrate is reduced to 1 × 10 ¹¹ atoms / cm ³ or less by the heat treatment is introduced into a manufacturing process of a semiconductor substrate to be evaluated. After removing the metal impurities on the surface of the semiconductor substrate by acid cleaning, the substrate is decomposed with hydrofluoric acid / nitric acid vapor, and the residue of the substrate after the decomposition is treated with an acid solution. It is possible to adopt a method for quantitative evaluation of ICP-MS, AAS, or the like.
[0017]
【Example】
Example 1
Hereinafter, an example in which the evaluation substrate according to the present invention is introduced into a mirror polishing process to evaluate metal impurity contamination will be described. First, a p-type low-resistance semiconductor substrate subjected to an etching process, crystal orientation (100), resistance value: 0.008 Ω · cm, oxygen concentration: 1.3 × 10 ¹⁸ atoms / cm ³ (ASTM F-121 1979) were prepared. .
[0018]
This semiconductor substrate was immersed in sulfuric acid and heated to 400 ° C. with infrared rays. After heating, the substrate was rinsed with pure water. The evaluation substrate from which the metal impurities inside the substrate had been removed was decomposed with hydrofluoric acid / nitric acid vapor, and then the metal impurities in the residue were quantitatively evaluated by ICP-MS. , Ni, Cu, Cr, Al were confirmed to be 1 × 10 ¹¹ atoms / cm ³ or less.
[0019]
The evaluation substrate obtained in the above process was processed in a mirror polishing process in a general semiconductor substrate manufacturing process. After mirror polishing, metal impurities on the surface of the semiconductor substrate were removed by alkali cleaning and acid cleaning, the substrate for evaluation was decomposed with hydrofluoric acid / nitric acid vapor, and the metal impurities in the residue were quantitatively evaluated by ICP-MS. .
[0020]
Among metal impurities, Fe, Ni, Cr, and Al were 1 × 10 ¹¹ atoms / cm ³ or less, and it was evaluated that there was no contamination inside the semiconductor substrate in this mirror polishing process. Further, it was confirmed that Cu was contaminated by 5 × 10 ¹¹ atoms / cm ³ in the mirror polishing process and quantitative evaluation thereof was possible.
[0021]
Example 2
The p-type high-resistance semiconductor substrate that had undergone the etching process was put into a mirror polishing process in the same manner as in Example 1 to evaluate metal impurity contamination. A p-type high-resistance semiconductor substrate having a crystal orientation (100), a resistance value: 10 Ω · cm, and an oxygen concentration: 1.3 × 10 ¹⁸ atoms / cm ³ (ASTM F-121 1979) was prepared. Next, heat treatment was performed in the same manner as in Example 1 to produce a substrate for evaluation in which the metal impurities Fe, Ni, Cu, Cr, and Al in the substrate were 1 × 10 ¹¹ atoms / cm ³ or less.
[0022]
This evaluation substrate was processed in a mirror polishing process in a general semiconductor substrate manufacturing process. Thereafter, the metal impurities were quantitatively evaluated by ICP-MS in the same manner as in Example 1. As a result, the amount of Fe, Ni, Cu, Cr, and Al did not increase after mirror polishing, and the mirror inside the p-type high-resistance semiconductor substrate. It was evaluated that there was no contamination of metal impurities in the polishing process.
[0023]
Example 3
Hereinafter, an example in which the evaluation substrate according to the present invention is introduced into the lapping process and metal impurity contamination is evaluated will be described. First, a p-type low-resistance semiconductor substrate subjected to a slicing process, crystal orientation (100), resistance value: 0.009 Ω · cm, oxygen concentration: 1.3 × 10 ¹⁸ atoms / cm ³ (ASTM F-121 1979) was prepared. . Next, heat treatment was performed in the same manner as in Example 1 to produce a substrate for evaluation in which the metal impurities Fe, Ni, Cu, Cr, and Al in the substrate were 1 × 10 ¹¹ atoms / cm ³ or less.
[0024]
This evaluation substrate was processed in a lapping process in a general semiconductor substrate manufacturing process. Thereafter, metal impurities were quantitatively evaluated by ICP-MS in the same manner as in Example 1. As a result, it was confirmed that Ni, Cu, Cr, and Al were 1 × 10 ¹¹ atoms / cm ³ or less and there was no contamination in this lapping step. Regarding Fe, 5 × 10 ¹¹ atoms / cm ³ and Fe contamination in the lapping process could be quantitatively evaluated.
[0025]
Example 4
The p-type high-resistance semiconductor substrate that had undergone the slicing process was put into a lapping process in the same manner as in Example 1 to evaluate metal impurity contamination. A p-type high-resistance semiconductor substrate having a crystal orientation (100), a resistance value: 10 Ω · cm, and an oxygen concentration: 1.3 × 10 ¹⁸ atoms / cm ³ (ASTM F-121 1979) was prepared. Next, heat treatment was performed in the same manner as in Example 1 to produce a substrate for evaluation in which the metal impurities Fe, Ni, Cu, Cr, and Al in the substrate were 1 × 10 ¹¹ atoms / cm ³ or less.
[0026]
This evaluation substrate was processed in a lapping process in a general semiconductor substrate manufacturing process. Thereafter, the metal impurities were quantitatively evaluated by ICP-MS in the same manner as in Example 1. As a result, the amounts of Fe, Ni, Cu, Cr, and Al did not increase after the lapping process, and the lapping process into the p-type high resistance semiconductor substrate was performed. It was evaluated that there was no contamination with metal impurities in the process.
[0027]
【The invention's effect】
As shown in the embodiments, the present invention can accurately evaluate the amount of contaminated metal impurities in a semiconductor substrate manufacturing process such as a lapping process or a mirror polish process, even in the case of a p-type low resistance semiconductor substrate. .
[0028]
That is, the present invention provides a process for producing a substrate for evaluation according to the present invention, in which a semiconductor substrate having any resistance value is subjected to heat treatment so that the amount of metal impurities inside the substrate is 1 × 10 ¹¹ atoms / cm ³ or less. The amount of contamination of metal impurities during the manufacturing process can be quantitatively evaluated by putting it in and processing it like other substrates.

Claims

A p-type low-resistance semiconductor substrate to which boron is added at 1 × 10 ¹⁸ atoms / cm ³ or more is heated in a substrate temperature at 300 ° C. to 500 ° C. while immersing or spraying the cleaning solution to remove metal impurities inside the substrate. after below ^{^{1 × 10 11 atoms / cm 3}} , wherein the processing the semiconductor substrate, a metal assessed by flameless atomic absorption photometer or an inductively coupled plasma mass spectrometer metal impurities in a semiconductor substrate which has been contaminated by the working Impurity evaluation method.

A p-type low-resistance semiconductor substrate to which boron is added at 1 × 10 ¹⁸ atoms / cm ³ or more is heated in a substrate temperature of 300 ° C. to 500 ° C. while being immersed in the cleaning solution or sprayed with the cleaning solution. The manufacturing method of the board | substrate for a metal impurity evaluation made into x10 < ¹¹ > atoms / cm < ³ > or less.