JP3879002B2 - 自己最適化演算装置 - Google Patents
自己最適化演算装置 Download PDFInfo
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- JP3879002B2 JP3879002B2 JP2003434625A JP2003434625A JP3879002B2 JP 3879002 B2 JP3879002 B2 JP 3879002B2 JP 2003434625 A JP2003434625 A JP 2003434625A JP 2003434625 A JP2003434625 A JP 2003434625A JP 3879002 B2 JP3879002 B2 JP 3879002B2
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- optimization
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- 238000012545 processing Methods 0.000 claims description 281
- 238000005457 optimization Methods 0.000 claims description 94
- 230000008859 change Effects 0.000 claims description 15
- 230000006870 function Effects 0.000 description 22
- 230000006399 behavior Effects 0.000 description 19
- 238000004891 communication Methods 0.000 description 18
- 238000010586 diagram Methods 0.000 description 18
- 238000000034 method Methods 0.000 description 16
- 230000000694 effects Effects 0.000 description 6
- 238000003860 storage Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 3
- 230000006266 hibernation Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000002250 progressing effect Effects 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
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- 230000004044 response Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
- G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
Description
200、201 ユニット制御部
300、301 プロファイル情報収集部
400、401 処理内容保持部
500、501 演算処理部
600、601 メモリ制御部
700、701 ユニット間通信部
800 制御バス
810 メモリバス
820 ユニット間通信路
900 資源管理処理ユニット群
910 最適化処理ユニット群
920 観測処理ユニット群
930 演算処理ユニット群
940 資源管理・最適化処理ユニット群
950 資源管理・最適化・観測処理ユニット群
1000 記憶装置
Claims (2)
- 複数の均質な単位処理ユニットを具える自己最適化演算装置において、
各々の単位処理ユニットが、プログラムを実行する演算処理ユニット、実行中のプログラムの挙動を観測する観測処理ユニット、観測結果に基づいて最適化処理を行う最適化処理ユニット、及び、実行内容の変更など装置全体の資源管理を行う資源管理処理ユニットのうち少なくとも1つとして動作し、
前記単位処理ユニットの各々が、前記演算処理ユニットの実行状態および実行プログラムそのものを動的に変更できる機能を有し、
前記最適化処理ユニットが、
前記観測処理ユニットによって観測されたプログラムの挙動の観測結果をもとに実時間で最適なプログラムコードを生成し、前記演算処理ユニットの実行内容を動的に変更する、
ことを特徴とする自己最適化演算装置。 - 請求項1に記載の自己最適化演算装置において、
プログラムの最適化状況に応じて、前記演算処理ユニット、観測処理ユニット、最適化処理ユニット及び資源管理処理ユニットの数の比率を変える、
ことを特徴とする自己最適化演算装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003434625A JP3879002B2 (ja) | 2003-12-26 | 2003-12-26 | 自己最適化演算装置 |
US11/020,153 US20050166207A1 (en) | 2003-12-26 | 2004-12-27 | Self-optimizing computer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003434625A JP3879002B2 (ja) | 2003-12-26 | 2003-12-26 | 自己最適化演算装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005190430A JP2005190430A (ja) | 2005-07-14 |
JP3879002B2 true JP3879002B2 (ja) | 2007-02-07 |
Family
ID=34791630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2003434625A Expired - Lifetime JP3879002B2 (ja) | 2003-12-26 | 2003-12-26 | 自己最適化演算装置 |
Country Status (2)
Country | Link |
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US (1) | US20050166207A1 (ja) |
JP (1) | JP3879002B2 (ja) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
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US7961194B2 (en) | 2003-11-19 | 2011-06-14 | Lucid Information Technology, Ltd. | Method of controlling in real time the switching of modes of parallel operation of a multi-mode parallel graphics processing subsystem embodied within a host computing system |
US7808499B2 (en) | 2003-11-19 | 2010-10-05 | Lucid Information Technology, Ltd. | PC-based computing system employing parallelized graphics processing units (GPUS) interfaced with the central processing unit (CPU) using a PC bus and a hardware graphics hub having a router |
US20090027383A1 (en) | 2003-11-19 | 2009-01-29 | Lucid Information Technology, Ltd. | Computing system parallelizing the operation of multiple graphics processing pipelines (GPPLs) and supporting depth-less based image recomposition |
WO2006117683A2 (en) * | 2005-01-25 | 2006-11-09 | Lucid Information Technology, Ltd. | Graphics processing and display system employing multiple graphics cores on a silicon chip of monolithic construction |
US20070291040A1 (en) * | 2005-01-25 | 2007-12-20 | Reuven Bakalash | Multi-mode parallel graphics rendering system supporting dynamic profiling of graphics-based applications and automatic control of parallel modes of operation |
US8497865B2 (en) * | 2006-12-31 | 2013-07-30 | Lucid Information Technology, Ltd. | Parallel graphics system employing multiple graphics processing pipelines with multiple graphics processing units (GPUS) and supporting an object division mode of parallel graphics processing using programmable pixel or vertex processing resources provided with the GPUS |
US8085273B2 (en) | 2003-11-19 | 2011-12-27 | Lucid Information Technology, Ltd | Multi-mode parallel graphics rendering system employing real-time automatic scene profiling and mode control |
US20080079737A1 (en) | 2003-11-19 | 2008-04-03 | Reuven Bakalash | Multi-mode parallel graphics rendering and display system supporting real-time detection of mode control commands (MCCS) programmed within pre-profiled scenes of the graphics-based application |
US7546588B2 (en) * | 2004-09-09 | 2009-06-09 | International Business Machines Corporation | Self-optimizable code with code path selection and efficient memory allocation |
US7398369B2 (en) * | 2004-10-28 | 2008-07-08 | International Business Machines Corporation | Memory leakage management |
US9275430B2 (en) | 2006-12-31 | 2016-03-01 | Lucidlogix Technologies, Ltd. | Computing system employing a multi-GPU graphics processing and display subsystem supporting single-GPU non-parallel (multi-threading) and multi-GPU application-division parallel modes of graphics processing operation |
US11714476B2 (en) | 2006-12-31 | 2023-08-01 | Google Llc | Apparatus and method for power management of a computing system |
US20130290688A1 (en) * | 2013-04-22 | 2013-10-31 | Stanislav Victorovich Bratanov | Method of Concurrent Instruction Execution and Parallel Work Balancing in Heterogeneous Computer Systems |
US9405531B2 (en) * | 2013-07-16 | 2016-08-02 | Software Ag | Methods for building application intelligence into event driven applications through usage learning, and systems supporting such applications |
US9756147B1 (en) | 2013-12-20 | 2017-09-05 | Open Text Corporation | Dynamic discovery and management of page fragments |
US9170786B1 (en) | 2013-12-20 | 2015-10-27 | Emc Corporation | Composable context menus |
US10466872B1 (en) | 2013-12-20 | 2019-11-05 | Open Text Corporation | Composable events for dynamic user interface composition |
US9529572B1 (en) | 2013-12-20 | 2016-12-27 | Emc Corporation | Composable application session parameters |
US9851951B1 (en) | 2013-12-20 | 2017-12-26 | Emc Corporation | Composable action flows |
US11461112B2 (en) * | 2019-02-07 | 2022-10-04 | International Business Machines Corporation | Determining feature settings for code to deploy to a system by training a machine learning module |
US11521116B2 (en) | 2019-06-25 | 2022-12-06 | Nxp Usa, Inc. | Self-optimizing multi-core integrated circuit |
US20210406693A1 (en) * | 2020-06-25 | 2021-12-30 | Nxp B.V. | Data sample analysis in a dataset for a machine learning model |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6954923B1 (en) * | 1999-01-28 | 2005-10-11 | Ati International Srl | Recording classification of instructions executed by a computer |
US6820255B2 (en) * | 1999-02-17 | 2004-11-16 | Elbrus International | Method for fast execution of translated binary code utilizing database cache for low-level code correspondence |
US6622300B1 (en) * | 1999-04-21 | 2003-09-16 | Hewlett-Packard Development Company, L.P. | Dynamic optimization of computer programs using code-rewriting kernal module |
US6567974B1 (en) * | 2000-02-25 | 2003-05-20 | Sun Microsystems, Inc. | Small memory footprint system and method for separating applications within a single virtual machine |
US6862729B1 (en) * | 2000-04-04 | 2005-03-01 | Microsoft Corporation | Profile-driven data layout optimization |
US7210129B2 (en) * | 2001-08-16 | 2007-04-24 | Pact Xpp Technologies Ag | Method for translating programs for reconfigurable architectures |
US6848099B2 (en) * | 2001-10-11 | 2005-01-25 | Intel Corporation | Method and system for bidirectional bitwise constant propogation by abstract interpretation |
US7140006B2 (en) * | 2001-10-11 | 2006-11-21 | Intel Corporation | Method and apparatus for optimizing code |
US20030117971A1 (en) * | 2001-12-21 | 2003-06-26 | Celoxica Ltd. | System, method, and article of manufacture for profiling an executable hardware model using calls to profiling functions |
US7278137B1 (en) * | 2001-12-26 | 2007-10-02 | Arc International | Methods and apparatus for compiling instructions for a data processor |
US7146607B2 (en) * | 2002-09-17 | 2006-12-05 | International Business Machines Corporation | Method and system for transparent dynamic optimization in a multiprocessing environment |
US7275242B2 (en) * | 2002-10-04 | 2007-09-25 | Hewlett-Packard Development Company, L.P. | System and method for optimizing a program |
US7203935B2 (en) * | 2002-12-05 | 2007-04-10 | Nec Corporation | Hardware/software platform for rapid prototyping of code compression technologies |
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2003
- 2003-12-26 JP JP2003434625A patent/JP3879002B2/ja not_active Expired - Lifetime
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2004
- 2004-12-27 US US11/020,153 patent/US20050166207A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
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US20050166207A1 (en) | 2005-07-28 |
JP2005190430A (ja) | 2005-07-14 |
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