JP3878353B2 - Vertical MOS semiconductor device having current detection cell - Google Patents

Vertical MOS semiconductor device having current detection cell Download PDF

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Publication number
JP3878353B2
JP3878353B2 JP06913199A JP6913199A JP3878353B2 JP 3878353 B2 JP3878353 B2 JP 3878353B2 JP 06913199 A JP06913199 A JP 06913199A JP 6913199 A JP6913199 A JP 6913199A JP 3878353 B2 JP3878353 B2 JP 3878353B2
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Prior art keywords
electrode
current detection
base region
source
region
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JP2000269489A (en
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正勝 高下
典男 川上
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Toshiba Corp
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Toshiba Corp
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Description

【0001】
【発明の属する技術分野】
本発明は電流検出機能を有する半導体装置に係り、特に電流検出セル部の構造に関する。
【0002】
【従来の技術】
MOSFETにおいて過電流保護は重要な課題であり、従来は母線に検出抵抗または電流シャントを挿入して行われていたが、近年は、電流検出用素子(セル)をオンチップ化することにより、電流検出のためのパワー損失、部品点数、検出回路の簡略化が可能となってきている。こらような電流検出セルを主電流セルと同一チップ上に形成した従来の縦型MOSFETの断面図を図9に、その断面斜視図を図10に、ストライプ状のポリシリコンゲートパターン部の平面図を図11にそれぞれ示す。
【0003】
これらの図に示すように、縦型MOS構造はN型半導体基板1上に絶縁膜5を介して設けられた複数本のストライプ状のゲート電極6と、これらのゲート電極6をマスクとして半導体基板1表面領域に形成された複数本のP導電型のベ−ス領域3と、これらのベ−ス領域3のそれぞれの領域内の前記ゲート電極6に沿って形成された2本のN導電型のソース領域4が形成されている。これらのソース領域4が形成された前記複数個のベ−ス領域3には、ベ−ス領域3およびソース領域4の両方にコンタクトするソース電極7が共通に接続され、このソース電極7からはソース電極端子Sが導出されている。このソース電極端子S、ソース電極7が共通に接続されたソース領域4と、それらを含むベ−ス領域3、ベ−ス領域3間に配設されたゲート電極6、そして前記半導体基板1表面に設けられた裏面電極9とにより、主電流セル101が構成されている。
【0004】
次に、半導体基板1上にはまた、絶縁膜5を介して、主電流セル101を構成するゲート電極6と平行にゲート電極8が配設されている。このゲート電極8には図11に示すように、その中央に長楕円状の窓9が形成されており、この窓9を介してP導電型のベ−ス領域23が形成されている。このベ−ス領域23の表面領域には、また、長楕円状の窓9に沿って、2本のソース領域24が形成されており、これらのソース領域24およびベ−ス領域23の両方にコンタクトするセンス電極27がソース電極7とは独立に形成されている。このセンス電極27が接続されたソース領域24と、このソース領域24に接続されたセンス電極端子Seと、ソース領域24を含むベ−ス領域23と、その両側に配設されたゲート電極8、そして前記半導体基板1表面に設けられた裏面電極9とにより、電流検出セル202が構成されている。
【0005】
なお、このゲート電極8の両側には、主電流セル101を構成するゲート電極6が配設されており(図11では片方のみ示されている。)、それらのゲート電極6との間にも、主電流セル101を構成するベ−ス領域3が形成されている。
【0006】
【発明が解決しようとする課題】
上記のように、従来の電流検出機能を有する半導体装置はは、ポリシリコンゲートをマスク材として二重拡散によりユニットセルを形成し、そのセルの一部を電流検出セルとして別電極で取り出している。一般に電流検出セルは主電流セルと同じ出力特性を示すように、主電流セル部と同じポリシリコンゲート幅、開口幅で電流検出セル領域を形成すると、電流検出セル領域のベース領域23の端部における、隣接する主電流セルとのベース領域間の距離dLが、ベース領域23の中央部における距離dに比べて大きくなる領域(図11)が形成される。
【0007】
このような構造のMOSFETにおいては、前記ソース電極端子Sおよび裏面電極9間、センス電極端子Seおよび裏面電極9間に逆方向の高電圧が印加されると、電流検出セル領域と主電流セル領域のベース領域間距離が大きい部分は、距離が小さい部分に比べて空乏層の広がりが十分ではなく、この部分に電界が集中するため、耐圧が低下し、MOSFET全体の耐圧劣化を招くという問題があった。
【0008】
本発明は上記問題点に鑑みてなされたもので、電流検出機能を有するMOSFETにおける耐圧の低下を防止することを目的とする。
【0009】
【課題を解決するための手段】
本発明の電流検出セルを有する縦型MOS半導体装置は、第1導電型の半導体基板の表面上に絶縁膜を介してほぼ平行に配設された複数個のストライプ状のゲート電極と、これらのゲート電極をマスクとして前記半導体基板に形成された複数の第2導電型のベ−ス領域と、これらのベ−ス領域内に形成された第1導電型のソース領域と、これらのソース領域が形成される前記複数のベ−ス領域のうち、一部を除いたベース領域内の前記ソース領域に共通に接続されるソース電極と、前記一部のベ−ス領域内のソース領域に接続されるセンス電極と、前記第1導電型の半導体基板の裏面に設けられた裏面電極とからなり、前記ソース電極、このソース電極が共通に接続された前記ソース領域を含む前記複数のベ−ス領域および前記裏面電極とにより主電流セルが構成され、前記複数個のストライプ状のゲート電極の一つには、ゲート電極の長手方向に沿って延長された長楕円状の窓が形成されており、このゲート電極、前記センス電極、このセンス電極が接続された前記ソース領域を含むベ−ス領域および前記裏面電極とにより電流検出セルが構成される縦型MOS構造の半導体装置において、前記電流検出セルを構成するゲート電極に形成された長楕円状の窓は、その長手方向端部の幅がその長手方向中央部の幅より拡大されており、前記ゲート電極をマスクとして前記半導体基板に形成された第2導電型のベ−ス領域の端部もその幅が長手方向中央部の幅より拡大されていることを特徴とするものである。
【0010】
また、本発明の電流検出セルを有する縦型MOS半導体装置半導体装置においては、前記電流検出セルを構成するゲート電極に形成された長楕円状の窓は、その長手方向端部がほぼ扇状に拡大されており、前記ゲート電極をマスクとして形成されたベ−ス領域は、前記主電流セルを構成するベ−ス領域よりもその長さが短く、前記電流検出セルを構成するベ−ス領域の端部は、ほぼ扇状に拡大されていることを特徴とする請求項1記載の電流検出セルを有するものである。
【0011】
【発明の実施の形態】
以下本発明の電流検出機能を有する半導体装置の実施形態について図面を参照して説明する。図1は、本発明の一実施形態である縦型MOSFETにおけるポリシリコンゲートパターン部の平面図、図2は上記縦型MOSFETの断面図、図3はその断面斜視図である。なお、図面中、従来の半導体装置の構成不文と同一の構成部分には同一の符号を付して、その詳細な説明は省略するものとし、以下では主として従来装置と異なる点を重点的に説明する。
【0012】
図示のように、本発明のMOSFETの構造は、N型半導体基板1上に絶縁膜5を介して設けられたストライプ状に形成されたポリシリコンのゲート電極6と、前記ゲート電極をマスクとして二重拡散により前記半導体基板に形成されたP型ベ−ス領域3と、このベ−ス領域の表面に所定の深さで選択的に形成されたN型ソース領域4と、前記ベ−ス領域3とソース領域4からなりソース電極7と接続される主電流セル領域101が構成されている。
【0013】
次に、半導体基板1上にはまた、絶縁膜5を介して、主電流セル101を構成するゲート電極6と平行にゲート電極8が配設されている。このゲート電極8には図1に示すように、その中央に端部が扇状に拡大された長楕円状の窓11が形成されており、この窓11を介してP導電型のベ−ス領域13が形成されている。このベ−ス領域13の表面領域には、また、端部が扇状に拡大されたストライプ状の窓11の中央部に沿って、2本のソース領域14が形成されており、これらのソース領域14およびベ−ス領域13の両方にコンタクトするセンス電極17がソース電極7とは独立に形成されている。このセンス電極17が接続されたソース領域14と、このソース領域14を含むベ−ス領域13と、その両側に配設されたゲート電極8、そして前記半導体基板1表面に設けられた裏面電極9とにより、電流検出セル102が構成されている。
【0014】
このように、本発明のMOSFETの構造は電流検出セル102のベ−ス領域を、端部を扇状に拡張したストライプ状のマスクパターンにより形成したことを特徴とするものである。このような構造により、電流検出セル102の耐圧を従来の装置の場合に比較して高くすることができる。この理由を図4乃至図7により、従来装置と対比して説明する。図4は本発明の電流検出セル部分の上面図、図5は図4のA−A線に沿う断面図、図6及び図7は従来の装置における対応する図面である。図4及び図5に示すように、本発明の電流検出セル部分のベース領域13は、隣接する主電流セル領域101のベース領域3との距離がその端部においてもその他の部分より短いか、ほぼ同じになるため、逆バイアスによる空乏層の広がりも図の破線で示すように、相互に重なり合うため、電界の集中が起こらず耐圧は主電流セルとほぼ同じになる。これに対して、従来の装置においては、図6及び図7に示すように、電流検出セル部分のベース領域23は、隣接する主電流セル領域101のベース領域3との距離がその端部において大きくなるため、空乏層の広がりが十分でなく、この部分の電界が他の部分に比べて大きくなり、この部分の耐圧が低下して低電圧でブレークダウンを生ずる結果となる。
【0015】
本発明に係る構造のMOSFETの耐圧特性を図8に従来の構造の耐圧特性(図中に破線で示す)と比較して示す。
【0016】
上記の実施形態はNチャネル型MOSFETを例示したが、半導体ウェーハの構造によりIGBT(Insulated Gate Bipolar Transistor )などのMOS型半導体装置、また逆導電型の半導体装置にも適用できる。
【0017】
さらに、本発明においては電流検出セルを構成するベース領域端部の形状は、隣接する主電流セルを構成するベース領域との間隔を短縮することを目的としているため、その形状は上記扇型に限定されるものではない。
【0018】
【発明の効果】
以上説明したように、本発明は、主電流セル領域の一部に形成された電流検出セル領域のベース領域端部の領域面積をその本体部分に対して拡張することにより、電流検出セル部分の耐圧低下を防止し、以って電流検出セルが組み込まれた半導体装置全体の耐圧を向上することができる。
【図面の簡単な説明】
【図1】本発明の一実施形態である縦型MOSFETにおけるシリコンゲートパターン部の平面図。
【図2】図1の縦型MOSFETの断面図。
【図3】図1の縦型MOSFETの断面斜視図。
【図4】図1の縦型MOSFETにおける電流検出セル部分の上面図。
【図5】図4のA−A線に沿う断面図。
【図6】従来の縦型MOSFETにおける電流検出セル部分の上面図。
【図7】図6のA−A線に沿う断面図。
【図8】本発明に係る構造のMOSFETの耐圧特性を説明する線図。
【図9】従来例の縦型MOSFETの断面図。
【図10】従来例の縦型MOSFETの断面斜視図。
【図11】従来例の縦型MOSFETにおけるストライプ状のポリシリコンゲートパターン部の平面図。
【符号の説明】
1…N型半導体基板
3…P型ベ−ス領域
4…N型ソース領域
5…ゲート絶縁膜
6…ゲート電極
13…P型ベ−ス領域
14…N型ソース領域
23…P型ベ−ス領域
24…N型ソース領域
101…主電流セル領域
102…電流検出セル領域
202…電流検出セル領域
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a current detection function, and more particularly to a structure of a current detection cell portion.
[0002]
[Prior art]
Overcurrent protection is an important issue in MOSFETs. Conventionally, a detection resistor or current shunt has been inserted into the bus, but in recent years, current detection elements (cells) have become on-chip. The power loss for detection, the number of parts, and the detection circuit can be simplified. FIG. 9 is a cross-sectional view of a conventional vertical MOSFET in which such current detection cells are formed on the same chip as the main current cell, FIG. 10 is a cross-sectional perspective view thereof, and a plan view of a stripe-shaped polysilicon gate pattern portion. Are shown in FIG.
[0003]
As shown in these drawings, a vertical MOS structure has a plurality of stripe-shaped gate electrodes 6 provided on an N-type semiconductor substrate 1 with an insulating film 5 interposed therebetween, and a semiconductor substrate using these gate electrodes 6 as a mask. A plurality of base regions 3 of P conductivity type formed in one surface region, and two N conductivity types formed along the gate electrode 6 in each region of these base regions 3 Source region 4 is formed. A source electrode 7 that contacts both the base region 3 and the source region 4 is connected in common to the plurality of base regions 3 in which the source regions 4 are formed. A source electrode terminal S is derived. The source electrode terminal S, the source region 4 to which the source electrode 7 is commonly connected, the base region 3 including them, the gate electrode 6 disposed between the base regions 3, and the surface of the semiconductor substrate 1 A main current cell 101 is constituted by the back surface electrode 9 provided on the surface.
[0004]
Next, a gate electrode 8 is disposed on the semiconductor substrate 1 in parallel with the gate electrode 6 constituting the main current cell 101 via the insulating film 5. As shown in FIG. 11, the gate electrode 8 has an oblong window 9 formed at the center thereof, and a P-conductive base region 23 is formed through the window 9. In the surface region of the base region 23, two source regions 24 are formed along the elliptical window 9, and both the source region 24 and the base region 23 are formed. The sense electrode 27 to be contacted is formed independently of the source electrode 7. A source region 24 to which the sense electrode 27 is connected; a sense electrode terminal Se connected to the source region 24; a base region 23 including the source region 24; and gate electrodes 8 disposed on both sides thereof. A current detection cell 202 is constituted by the back electrode 9 provided on the surface of the semiconductor substrate 1.
[0005]
Note that gate electrodes 6 constituting the main current cell 101 are disposed on both sides of the gate electrode 8 (only one of them is shown in FIG. 11), and between these gate electrodes 6 as well. A base region 3 constituting the main current cell 101 is formed.
[0006]
[Problems to be solved by the invention]
As described above, in a conventional semiconductor device having a current detection function, a unit cell is formed by double diffusion using a polysilicon gate as a mask material, and a part of the cell is taken out as a current detection cell by another electrode. . In general, when the current detection cell region is formed with the same polysilicon gate width and opening width as the main current cell portion so that the current detection cell exhibits the same output characteristics as the main current cell, the end portion of the base region 23 of the current detection cell region is formed. In FIG. 11, a region (FIG. 11) is formed in which the distance dL between the base regions with the adjacent main current cells is larger than the distance d at the center of the base region 23.
[0007]
In the MOSFET having such a structure, when a high voltage in the reverse direction is applied between the source electrode terminal S and the back electrode 9, and between the sense electrode terminal Se and the back electrode 9, the current detection cell region and the main current cell region In the portion where the distance between the base regions is large, the depletion layer is not sufficiently spread compared to the portion where the distance is small, and the electric field is concentrated on this portion, so that the breakdown voltage is lowered and the breakdown voltage of the entire MOSFET is deteriorated. there were.
[0008]
The present invention has been made in view of the above problems, and an object thereof is to prevent a breakdown voltage from being lowered in a MOSFET having a current detection function.
[0009]
[Means for Solving the Problems]
A vertical MOS semiconductor device having a current detection cell according to the present invention includes a plurality of stripe-shaped gate electrodes arranged substantially in parallel via an insulating film on the surface of a first conductivity type semiconductor substrate, A plurality of second conductivity type base regions formed in the semiconductor substrate using the gate electrode as a mask, a first conductivity type source region formed in these base regions, and these source regions Of the plurality of base regions to be formed, a source electrode commonly connected to the source region in the base region excluding a part thereof, and a source electrode in the partial base region are connected A plurality of base regions including the source electrode and the source region to which the source electrode is connected in common, and a back electrode provided on a back surface of the first conductivity type semiconductor substrate. And the back electrode Ri principal current cell is configured, wherein the one of a plurality of stripe-shaped gate electrode are longitudinally extended oblong windows along the gate electrode is formed, the gate electrode, wherein In a vertical MOS structure semiconductor device in which a current detection cell is constituted by a sense electrode, a base region including the source region to which the sense electrode is connected, and the back electrode, a gate electrode constituting the current detection cell The oblong window formed in the window has a width at the end in the longitudinal direction larger than the width at the center in the longitudinal direction. The window of the second conductivity type formed on the semiconductor substrate using the gate electrode as a mask. The width of the end portion of the base region is larger than the width of the central portion in the longitudinal direction .
[0010]
Further, in the vertical MOS semiconductor device semiconductor device having the current detection cell according to the present invention, the elliptical window formed in the gate electrode constituting the current detection cell has its longitudinal end enlarged substantially in a fan shape. The base region formed using the gate electrode as a mask is shorter in length than the base region that constitutes the main current cell, and the base region that constitutes the current detection cell. The end portion has a current detecting cell according to claim 1, wherein the end portion is substantially fan-shaped.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a semiconductor device having a current detection function according to the present invention will be described below with reference to the drawings. 1 is a plan view of a polysilicon gate pattern portion in a vertical MOSFET according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of the vertical MOSFET, and FIG. 3 is a cross-sectional perspective view thereof. In the drawings, the same components as those of the conventional semiconductor device are designated by the same reference numerals, and the detailed description thereof will be omitted. The following mainly focuses on differences from the conventional device. explain.
[0012]
As shown in the figure, the structure of the MOSFET of the present invention includes a polysilicon gate electrode 6 formed in a stripe shape on an N-type semiconductor substrate 1 with an insulating film 5 interposed therebetween, and two gates using the gate electrode as a mask. A P-type base region 3 formed in the semiconductor substrate by heavy diffusion; an N-type source region 4 selectively formed at a predetermined depth on the surface of the base region; and the base region 3 and the source region 4, and a main current cell region 101 connected to the source electrode 7 is formed.
[0013]
Next, a gate electrode 8 is disposed on the semiconductor substrate 1 in parallel with the gate electrode 6 constituting the main current cell 101 via the insulating film 5. As shown in FIG. 1 , the gate electrode 8 is formed with an oblong window 11 whose end is enlarged in a fan shape at the center thereof, and a P-conductivity type base region is formed through the window 11. 13 is formed. In the surface region of the base region 13 , two source regions 14 are formed along the central portion of the stripe-shaped window 11 whose ends are enlarged in a fan shape. A sense electrode 17 that contacts both the base electrode 14 and the base region 13 is formed independently of the source electrode 7. A source region 14 to which the sense electrode 17 is connected, a base region 13 including the source region 14, a gate electrode 8 disposed on both sides thereof, and a back electrode 9 provided on the surface of the semiconductor substrate 1 Thus, the current detection cell 102 is configured.
[0014]
As described above, the MOSFET structure of the present invention is characterized in that the base region of the current detection cell 102 is formed by a striped mask pattern whose ends are expanded in a fan shape. With this structure, the withstand voltage of the current detection cell 102 can be increased as compared with the conventional device. The reason for this will be described with reference to FIGS. 4 to 7 in comparison with the conventional apparatus. 4 is a top view of the current detection cell portion of the present invention, FIG. 5 is a cross-sectional view taken along the line AA of FIG. 4, and FIGS. 6 and 7 are corresponding drawings in the conventional apparatus. As shown in FIGS. 4 and 5, the base region 13 of the current detection cell portion of the present invention has a distance from the base region 3 of the adjacent main current cell region 101 shorter than the other portions at the end portion. Since the depletion layers due to the reverse bias spread as shown by the broken lines in the figure, they overlap with each other, so that the electric field does not concentrate and the breakdown voltage is almost the same as that of the main current cell. On the other hand, in the conventional apparatus, as shown in FIGS. 6 and 7, the base region 23 of the current detection cell portion has a distance from the base region 3 of the adjacent main current cell region 101 at the end thereof. Since it becomes large, the depletion layer does not spread sufficiently, the electric field in this part becomes larger than in other parts, and the breakdown voltage in this part decreases, resulting in breakdown at a low voltage.
[0015]
The breakdown voltage characteristics of the MOSFET having the structure according to the present invention are shown in FIG. 8 in comparison with the breakdown voltage characteristics of the conventional structure (shown by broken lines in the figure).
[0016]
The above embodiment exemplifies an N-channel type MOSFET, but can be applied to a MOS type semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) or a reverse conductivity type semiconductor device depending on the structure of the semiconductor wafer.
[0017]
Furthermore, in the present invention, the shape of the end portion of the base region constituting the current detection cell is intended to shorten the distance between the base region constituting the adjacent main current cell, so that the shape is the above fan shape. It is not limited.
[0018]
【The invention's effect】
As described above, the present invention expands the area of the base region end of the current detection cell region formed in a part of the main current cell region with respect to the main body portion, thereby The breakdown voltage can be prevented from being lowered, and the breakdown voltage of the entire semiconductor device incorporating the current detection cell can be improved.
[Brief description of the drawings]
FIG. 1 is a plan view of a silicon gate pattern portion in a vertical MOSFET according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view of the vertical MOSFET of FIG.
3 is a cross-sectional perspective view of the vertical MOSFET of FIG.
4 is a top view of a current detection cell portion in the vertical MOSFET of FIG. 1. FIG.
5 is a cross-sectional view taken along line AA in FIG.
FIG. 6 is a top view of a current detection cell portion in a conventional vertical MOSFET.
7 is a cross-sectional view taken along line AA in FIG.
FIG. 8 is a diagram for explaining the breakdown voltage characteristics of a MOSFET having a structure according to the present invention.
FIG. 9 is a cross-sectional view of a conventional vertical MOSFET.
FIG. 10 is a cross-sectional perspective view of a conventional vertical MOSFET.
FIG. 11 is a plan view of a stripe-like polysilicon gate pattern portion in a conventional vertical MOSFET.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... N-type semiconductor substrate 3 ... P-type base region 4 ... N-type source region 5 ... Gate insulating film 6 ... Gate electrode 13 ... P-type base region 14 ... N-type source region 23 ... P-type base Region 24 ... N-type source region
101 ... Main current cell region
102 ... Current detection cell region
202 ... Current detection cell region

Claims (2)

第1導電型の半導体基板の表面上に絶縁膜を介してほぼ平行に配設された複数個のストライプ状のゲート電極と、これらのゲート電極をマスクとして前記半導体基板に形成された複数の第2導電型のベ−ス領域と、これらのベ−ス領域内に形成された第1導電型のソース領域と、これらのソース領域が形成される前記複数のベ−ス領域のうち、一部を除いたベース領域内の前記ソース領域に共通に接続されるソース電極と、前記一部のベ−ス領域内のソース領域に接続されるセンス電極と、前記第1導電型の半導体基板の裏面に設けられた裏面電極とからなり、前記ソース電極、このソース電極が共通に接続された前記ソース領域を含む前記複数のベ−ス領域および前記裏面電極とにより主電流セルが構成され、前記複数個のストライプ状のゲート電極の一つには、ゲート電極の長手方向に沿って延長された長楕円状の窓が形成されており、このゲート電極、前記センス電極、このセンス電極が接続された前記ソース領域を含むベ−ス領域および前記裏面電極とにより電流検出セルが構成される縦型MOS構造の半導体装置において、前記電流検出セルを構成するゲート電極に形成された長楕円状の窓は、その長手方向端部の幅がその長手方向中央部の幅より拡大されており、前記ゲート電極をマスクとして前記半導体基板に形成された第2導電型のベ−ス領域の端部もその幅が長手方向中央部の幅より拡大されていることを特徴とする電流検出セルを有する縦型MOS半導体装置。A plurality of striped gate electrodes arranged substantially in parallel on the surface of the first conductivity type semiconductor substrate with an insulating film interposed therebetween, and a plurality of second gate electrodes formed on the semiconductor substrate using these gate electrodes as a mask. A base region of two conductivity types, a first conductivity type source region formed in these base regions, and a part of the plurality of base regions in which these source regions are formed A source electrode commonly connected to the source region in the base region excluding, a sense electrode connected to the source region in the part of the base region, and a back surface of the first conductivity type semiconductor substrate consists of a back surface electrode provided on the source electrode, the plurality of base to the source electrode includes a common connected the source regions - main current cell by a source region and said back electrode is formed, said plurality Striped One of the over gate electrode, longitudinally extended oblong windows along the gate electrodes are formed, the gate electrode, the sense electrode, the source region where the sense electrodes are connected In a vertical MOS structure semiconductor device in which a current detection cell is configured by a base region including the back electrode and the back electrode, an oblong window formed in the gate electrode forming the current detection cell The width of the end portion is larger than the width of the central portion in the longitudinal direction, and the width of the end portion of the second conductivity type base region formed on the semiconductor substrate using the gate electrode as a mask is also the center in the longitudinal direction. A vertical MOS semiconductor device having a current detection cell, wherein the vertical MOS semiconductor device is larger than the width of the portion . 前記電流検出セルを構成するゲート電極に形成された長楕円状の窓は、その長手方向端部がほぼ扇状に拡大されており、前記ゲート電極をマスクとして形成されたベ−ス領域は、前記主電流セルを構成するベ−ス領域よりもその長さが短く、前記電流検出セルを構成するベ−ス領域の端部は、ほぼ扇状に拡大されていることを特徴とする請求項1記載の電流検出セルを有する縦型MOS半導体装置。The oblong window formed in the gate electrode constituting the current detection cell has its longitudinal end portion enlarged in a substantially fan shape, and the base region formed using the gate electrode as a mask The length of the base region constituting the main current cell is shorter than that of the base region constituting the main current cell, and the end of the base region constituting the current detection cell is substantially fan-shaped. Vertical MOS semiconductor device having current detection cells.
JP06913199A 1999-03-15 1999-03-15 Vertical MOS semiconductor device having current detection cell Expired - Fee Related JP3878353B2 (en)

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