JP3874083B2 - Solid-state imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device.
[0002]
[Prior art]
Solid-state imaging devices such as CCD solid-state imaging devices and MOS type solid-state imaging devices are widely used as image input devices such as various portable terminal devices, digital still cameras, and digital video cameras. In such a solid-state image pickup device, the image pickup surface has an aspect ratio of horizontal: vertical = 4: 3 in accordance with an NTSC (National Television System Committee Standard) display device generally used in current televisions and the like. ing. For example, when the pixel configuration of the solid-state imaging device is 640 pixels wide and 480 pixels long according to the VGA standard, the aspect ratio of the pixels is usually 1, so the aspect ratio of the imaging surface is horizontal: vertical = 4 : 3. Further, in recent years, a solid having an imaging surface with such an aspect ratio in accordance with a horizontal screen image receiving device such as horizontal: vertical = 5: 3, 14: 9, and 16: 9 as seen in the wide NTSC system or the like. Imaging devices are also used.
[0003]
[Problems to be solved by the invention]
However, depending on the subject, there are many cases where the subject is vertically long like a person, for example, and such a horizontally long imaging surface is not necessarily suitable for such a subject. FIG. 9 is an explanatory diagram illustrating a subject image formed on an imaging surface when a vertically long subject is imaged by a solid-state imaging device having a horizontally long imaging surface. As shown in FIG. 9, in the case of an imaging surface having an aspect ratio of horizontal: vertical = 4: 3, or a horizontally long imaging surface 102, when a vertically long subject such as a person is photographed, the entire image 104 is captured, for example. When formed in the center of the surface 102, empty areas 106 are formed on both sides of the image 104, resulting in an unbalanced screen.
[0004]
In addition, mobile terminal devices such as mobile phones and PDAs (Personal Digital Assistants) are often vertically long, and the screen of a liquid crystal display device mounted on the mobile terminal device also matches the shape of the mobile terminal device. Many are vertically long. Therefore, as shown in FIG. 10, when an image 108 captured by a solid-state imaging device having a horizontally long imaging surface is displayed on the screen 110 of the mobile terminal device, the horizontal length of the image 108 to display the entire image. Is set to the length of the screen 110 in the horizontal direction, empty areas 112 are generated above and below the screen 110.
[0005]
When displaying multiple lines of text on a display screen with a limited size, such as a mobile phone, it is better to make the display screen longer and take a larger number of lines than to make it horizontally long and one line long. It is known to be easy to use.
When a person's face is photographed and displayed, the aspect ratio of the screen is approximately in the range of horizontal: vertical = 1: 1.2 to 1: 1.6. It has been found by experiments by the inventors of the present invention that the degree is the highest.
[0006]
Further, the conventional solid-state imaging device has the following problems.
FIG. 11 is a schematic plan view showing an example of a conventional solid-state imaging device having a CCD structure.
The solid-state imaging device 114 is configured by arranging a large number of optical sensors 118 (photodiodes), a vertical charge transfer register 120, a horizontal charge transfer register 122, and the like on a semiconductor substrate 116. The photosensors 118 are arranged vertically and horizontally on the semiconductor substrate 116, and a vertical charge transfer register 120 is provided adjacent to each column of the photosensors 118. The horizontal charge transfer register 122 extends in the row direction of the optical sensor 118 on one end side of the vertical charge transfer register 120.
[0007]
In such a configuration, the signal charges generated by receiving the light by each photosensor 118 are simultaneously taken into the corresponding vertical charge transfer registers 120 under the control of the transfer control circuit 158 (arrow 126), and the vertical The charges are transferred toward the horizontal charge transfer register 122 at a relatively low speed on the charge transfer register 120. Then, the signal charge reaching the end of the vertical charge transfer register 120 is supplied to the horizontal charge transfer register 122 (arrow 128), and this time, the horizontal charge transfer register 122 is directed toward the output side at a relatively high speed. The data is transferred and sequentially output from the horizontal charge transfer register 122. The signal charge output from the horizontal charge transfer register 122 is converted into a voltage signal by a floating diffusion unit (not shown), amplified by the output amplifier 123, and output as an image signal.
[0008]
However, in this type of solid-state imaging device 114, the signal charge may not be correctly supplied from the vertical charge transfer register 120 to the horizontal charge transfer register 122 at the connection portion 130 between the vertical charge transfer register 120 and the horizontal charge transfer register 122. In addition, the solid-state imaging device in which such a defect has occurred must be discarded as a defective product, and the manufacturing yield has been reduced.
[0009]
In addition, the horizontal charge transfer register 122 normally needs to be driven at a transfer rate (several tens to 100 MHz) several hundred times that of the vertical charge transfer register 120, and therefore, transfer defects are likely to occur. Furthermore, since the imaging surface 132 is horizontally long and the number of pixels 124 arranged in the row direction is larger than the column direction, the horizontal charge transfer register 122 has more stages than the vertical charge transfer register 120. Therefore, the manufacturing conditions of the horizontal charge transfer register 122 are stricter than those of the vertical charge transfer register 120, and this point is also a major factor for reducing the manufacturing yield of the solid-state imaging device.
[0010]
FIG. 12 is a schematic plan view showing an example of a conventional MOS type solid-state imaging device.
The solid-state imaging device 134 is configured by disposing a pixel portion 138, an S / H / CDS portion 140, a horizontal signal line 142, and the like on a semiconductor substrate 136. In the pixel portion 138, pixels 144 each including a photosensor are arranged vertically and horizontally, and a vertical signal line 146 is arranged for each column of the pixels 144 (and thus, a column of photosensors). One end of the vertical signal line 146 is connected to the S / H • CDS unit 140, and the output of the S / H • CDS unit 140 is connected to the horizontal signal line 142. The number of pixels 144 in the row direction is larger than the number of pixels 144 in the column direction, and the pixel portion 138 and therefore the imaging surface are horizontally long as shown in FIG.
[0011]
In such a configuration, the signal charge generated by receiving the light sensor of each pixel 144 is converted into a voltage signal, and then the vertical signal is simultaneously output for each row of the pixels 144 under the control of the vertical selection unit 148. The signal is output to the line 146 and supplied to the S / H • CDS unit 140 through the vertical signal line 146.
The S / H / CDS unit 140 samples and holds the voltage signal supplied through the vertical signal line 146, removes the fixed pattern noise included in the output signal of the pixel 144 by CDS (Correlation Double Sampling), and performs horizontal selection. Under the control of the means 164, the output signals of the pixels 144 are sequentially output to the horizontal signal line 142 in the order of the columns of the pixels 144. The signal output to the horizontal signal line 142 is output as an image signal through the output circuit 150.
[0012]
However, in this type of solid-state imaging device 134, a transistor as a switching element for outputting a signal to the horizontal signal line 142 is provided for each vertical signal line 146 at the output unit of the S / H • CDS unit 140. Therefore, all the diffusion layer capacitances of these transistors are connected to the horizontal signal line 142, and there is a problem that the parasitic capacitance related to the horizontal signal line 142 is large.
[0013]
Further, when the resolution of the solid-state imaging device 134 is increased, and therefore the number of columns of the pixels 144 is increased, the signals must be read at a higher speed unless the signal reading time for one row of pixels is changed. Therefore, a large transistor having a high driving force must be used as the transistor, resulting in a further increase in the parasitic capacitance of the horizontal signal line 142.
[0014]
Therefore, the conventional solid-state imaging device 134 has a problem that the amplitude of the signal output from the horizontal signal line 142 is small due to the parasitic capacitance and it is difficult to increase the speed. Further, when the parasitic capacitance of the horizontal signal line 142 increases, it is necessary to increase the capacitance of the capacitor for the sample and hold that constitutes the S / H • CDS unit 140, and the area occupied by the S / H • CDS unit 140 increases. There was also the fault of doing.
[0015]
FIG. 13 is a schematic plan view showing another example of a conventional MOS type solid-state imaging device.
In the solid-state imaging device 152 shown in FIG. 13, the signal output from the S / H / CDS unit 140 is not output serially through the horizontal signal line 142 for each vertical signal line 146 as in the solid-state imaging device 134. In order to increase the speed, the signal output from the S / H / CDS unit 140 for each vertical signal line 146 is output in parallel via the signal processing / output unit 154 through the output pad 156 provided for each vertical signal line 146. It is the composition to do.
[0016]
However, in this solid-state imaging device 152, the number of output pads 156 corresponding to the number of columns of the pixels 144 is provided, so that the number of output pads 156 increases as the number of columns of the pixels 144 increases, and the exclusive area increases. Further, the number of wirings for the output pad 156 increases, which is disadvantageous in mounting.
[0017]
  The present invention has been made to solve such problems, and its purpose is to form a useless area in which no subject image exists on both sides of the imaging surface when imaging a vertically long subject. An object of the present invention is to provide a solid-state imaging device capable of avoiding and obtaining an image suitable for a display device having a vertically long display screen.
  Also,An object of the present invention is to provide a MOS type solid-state imaging device capable of reducing the parasitic capacitance related to a horizontal signal line and increasing the number of pixels, increasing the speed, reducing the size, and improving the image quality.
  Another object of the present invention is to provide a MOS type solid-state imaging device that is advantageous in terms of downsizing and mounting by reducing the number of output pads.
  Another object of the present invention is to provide a solid-state imaging device capable of obtaining an image suitable for a display device having a vertically long display screen even when the imaging surface is horizontally long.
[0020]
[Means for Solving the Problems]
  The present invention achieves the above object.Multiple light sensors arranged vertically and horizontallyA plurality of sensors, each of which corresponds to a pixel, and the aspect ratio of the pixels is 1: 1.A plurality of vertical signal lines that are provided for each column of the photosensors and that output electric signals based on signal charges generated by receiving the photosensors in the corresponding column and the corresponding ones provided for the photosensors. A first switching element that selectively supplies the signal based on the signal charge of the photosensor to the vertical signal line, and the signal for each row of the photosensor supplied through the plurality of vertical signal lines is output. A solid body formed by forming on a semiconductor substrate a horizontal signal line and a second switching element that is provided for each vertical signal line and selectively supplies the signal from the corresponding vertical signal line to the horizontal signal line. In the imaging apparatus, the number of arrays in the column direction of the photosensors is larger than the number of arrays in the row direction.
[0021]
As described above, in the solid-state imaging device according to the present invention, since the number of arrangements of the optical sensors in the column direction is larger than the number of arrangements in the row direction, the imaging surface is vertically long. A useless area where no image exists is not formed. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
[0022]
When the total number of pixels is constant, the number of vertical signal lines is reduced and the number of second switching elements is reduced, so that the parasitic capacitance related to the horizontal signal lines is reduced and a margin for increasing the number of columns of pixels is created. Therefore, it is advantageous for increasing the number of pixels. In addition, since the parasitic capacitance related to the horizontal signal line is reduced, the speed can be increased. Further, the size of the device can be reduced by downsizing the second switching element and the capacitor for sample and hold. It will be advantageous. Furthermore, since a sufficiently large output signal can be obtained, the S / N is improved and the image quality is improved.
[0023]
  The present invention also provides a plurality of optical sensors arranged vertically and horizontally.A plurality of sensors, each of which corresponds to a pixel, and the aspect ratio of the pixels is 1: 1.A plurality of vertical signal lines that are provided for each column of the photosensors and that output electric signals based on signal charges generated by receiving the photosensors in the corresponding column and the corresponding ones provided for the photosensors. A switching element that selectively supplies the signal due to the signal charge of the optical sensor to the vertical signal line, and an output pad that is provided for each vertical signal line and that outputs the signal supplied through the vertical signal line. A solid-state imaging device formed on a substrate, wherein the number of arrays of the optical sensors in the column direction is larger than the number of arrays in the row direction.
[0024]
As described above, in the solid-state imaging device according to the present invention, since the number of arrangements of the optical sensors in the column direction is larger than the number of arrangements in the row direction, the imaging surface is vertically long. A useless area where no image exists is not formed. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
Furthermore, when the total number of pixels is constant, the number of vertical signal lines is reduced, and thus the number of output pads is reduced, which is advantageous in terms of downsizing and mounting of the device.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic plan view showing an example of a solid-state imaging device having a CCD structure according to the present invention.
The solid-state imaging device 2 is configured by arranging a large number of optical sensors 6 (photodiodes), a vertical charge transfer register 8, a horizontal charge transfer register 10 and the like on a semiconductor substrate 4. The photosensors 6 are arranged vertically and horizontally on the semiconductor substrate 4, and a vertical charge transfer register 8 is provided adjacent to each column of the photosensors 6. The horizontal charge transfer register 10 extends in the row direction of the photosensors 6 on one end side of the vertical charge transfer register 8. In the present embodiment, as an example, the arrangement pitch in the row direction and the arrangement pitch in the column direction of the photosensors 6 are equal, and thus the pixels 12 constituted by the photosensors 6 have an aspect ratio of 1: 1. The number of pixels 12 (and thus the optical sensor 6) in the column direction is larger than the number in the row direction. For example, the number of columns in the column direction: the number of rows in the row direction = 4: 3. It has become.
[0030]
The ratio between the number of pixels 12 arranged in the column direction and the number of rows arranged in the row direction, and thus the aspect ratio of the imaging surface 14 can be set variously. For example, the length / row of the imaging surface 14 in the column direction of the pixels 12 When a captured image of a person's face is displayed on a screen having the same aspect ratio as a value in a range where the length of the direction is greater than 1.2 and smaller than 1.6, the image is comfortable for the viewer. It is also effective.
As a combination of the number of pixels 12 arranged in the row direction and the number of columns arranged in the column direction, considering the resolution of an existing display device, (288, 352), (480, 640), (600, 800), (768, 1024) is also effective.
[0031]
The operation of the solid-state imaging device 2 is basically the same as that of the solid-state imaging device shown in FIG. 11, and the signal charge of each photosensor 6 is controlled by the corresponding vertical charge transfer register under the control of the transfer control circuit 16. 8 at the same time (arrow 18) and transferred at a low speed on the vertical charge transfer register 8 toward the horizontal charge transfer register 10. Then, the signal charge that has reached the end of the vertical charge transfer register 8 is supplied to the horizontal charge transfer register 10 (arrow 20). This time, the signal charge is transferred at a high speed toward the output side on the horizontal charge transfer register 10 and the horizontal charge is transferred. Output sequentially from the transfer register 10. The signal charge output from the horizontal charge transfer register 10 is converted into a voltage signal by a floating diffusion unit (not shown), amplified by the output amplifier 9, and output as an image signal.
[0032]
In the solid-state imaging device 2 of such an embodiment, the number of arrangements of the optical sensors 6 in the column direction is larger than the number of arrangements in the row direction, so that the imaging surface 14 is vertically long, as shown in the explanatory diagram of FIG. When a vertically long subject is imaged, the image 24 is formed on the imaging surface 14 in a well-balanced manner, and a useless area where no subject image exists is formed on both sides of the imaging surface 14 as in the prior art. Further, since the captured image is vertically long, when the captured image is displayed on a display device such as a mobile phone having a vertically long display screen, empty areas do not occur at the top and bottom of the screen.
[0033]
When the total number of pixels is constant, the number of stages of the horizontal charge transfer register 10 is reduced, so that the probability of occurrence of a failure in the connecting portion 130 between the vertical charge transfer register 8 and the horizontal charge transfer register 10 is reduced. Yield is improved. In addition, since the number of stages of the horizontal charge transfer register 10 having strict manufacturing conditions is reduced, the manufacturing yield is also improved in this respect.
[0034]
Next, a second embodiment of the present invention will be described.
FIG. 3 is a schematic plan view showing an example of a MOS type solid-state imaging device according to the present invention.
The solid-state imaging device 26 is configured by arranging a pixel unit 30, an S / H / CDS unit 32, a horizontal signal line 34, and the like on a semiconductor substrate 28. In the pixel portion 30, pixels 36 each including a photosensor are arranged vertically and horizontally, and a vertical signal line 38 is arranged for each column of the pixels 36 (and thus a column of photosensors). One end of the vertical signal line 38 is connected to the S / H • CDS unit 32, and the output of the S / H • CDS unit 32 is connected to the horizontal signal line 34. The aspect ratio of the pixels 36 is 1: 1, and the number of pixels 36 in the column direction is larger than the number of arrays in the row direction. For example, the number of arrays in the column direction: the number of arrays in the row direction = 4: 3. The pixel unit 30, that is, the imaging surface 40 is vertically long.
[0035]
Note that the ratio between the number of pixels 36 arranged in the row direction and the number of columns arranged in the column direction, and thus the aspect ratio of the imaging surface 40, can be set variously. For example, the length / row of the imaging surface 40 in the column direction of the pixels 36 When a captured image of a person's face is displayed on a screen having the same aspect ratio as a value in a range where the length of the direction is greater than 1.2 and smaller than 1.6, the image is comfortable for the viewer. It is also effective.
[0036]
FIG. 4 is a circuit diagram showing the configuration of each pixel. As shown in FIG. 4, the pixel 36 includes a photodiode 42 (light sensor), a transfer transistor 44, a floating diffusion portion 46, and a reset transistor 47 in relation to the function of converting light into an electrical signal. It includes an amplifying transistor 48 and an address transistor 50 (first switching element according to the present invention) for outputting an electrical signal generated by the photodiode 42.
[0037]
The photodiode 42 has an anode connected to the ground and a cathode connected to the source of the transfer transistor 44. The drain of the transfer transistor 44 is connected to the floating diffusion portion 46, and the transfer pulse is supplied to the gate from the vertical selection means 66 through the common signal line 52 for each row of the pixels 36. The reset transistor 47 has a source connected to the floating diffusion unit 46 and a drain connected to the power source Vdd, and a gate supplied with a reset pulse from the vertical selection unit 66 through a common signal line 49 for each row of the pixels 36.
[0038]
The gate of the amplification transistor 48 is connected to the floating diffusion section 46, and the drain is connected to the power supply Vdd. An address transistor 50 is interposed between the amplifying transistor 48 and the vertical signal line 38, and an address pulse is supplied to the gate from the vertical selection means 66 through a common signal line 51 for each row of the pixels 36. The source of the amplification transistor 48 is connected to the drain of the address transistor 50, and the source of the address transistor 50 is connected to the vertical signal line 38. The vertical signal line 38 is connected to the constant current source 54 outside the pixel unit 30.
[0039]
FIG. 5 is a partial circuit diagram showing the configuration of the S / H • CDS unit 32. FIG. 5 shows only a circuit portion related to one vertical signal line 38, and actually such a circuit is provided for each vertical signal line 38.
As shown in FIG. 5, the S / H / CDS unit 32 includes transistors 56 and 58, capacitors 60 and 62, and a horizontal selection transistor 64 (second switching element according to the present invention). . The drain of the transistor 56 is connected to the vertical signal line 38 and the source is connected to one end of the capacitor 60, and the first sampling pulse is supplied to the gate of the transistor 56 from the vertical selection means 66. The drain of the transistor 58 is connected to the power source Vb, the source is connected to the other end of the capacitor 60, and the second sampling pulse is supplied to the gate from the vertical selection means 66. The first and second sampling pulses are supplied in common to the gates of all the transistors 56 and 58 of the S / H • CDS unit 32.
[0040]
A capacitor 62 is connected between the other end of the capacitor 60 and the ground, and a drain of a horizontal selection transistor 64 is further connected to the other end of the capacitor 60. The source of the horizontal selection transistor 64 is connected to the horizontal signal line 34, and a selection pulse is individually supplied from the horizontal selection means 67 to the gate.
[0041]
In such a configuration, the solid-state imaging device 26 basically operates as follows.
That is, the signal charges generated by receiving the light sensor of each pixel 36 are converted into voltage signals, and then output to the vertical signal line 38 for each row of the pixels 36 under the control of the vertical selection means 66. The signal is supplied to the S / H / CDS unit 32 through the vertical signal line 38.
The S / H • CDS unit 32 samples and holds the voltage signal supplied through the vertical signal line 38, removes fixed pattern noise included in the output signal of the pixel 36 by CDS, and controls by the horizontal selection unit 67. The output signals of the pixels 36 are sequentially output to the horizontal signal line 34 in the order of the columns of the pixels 36. The signal output to the horizontal signal line 34 is output as an image signal through an output circuit 68 including an AGC (Automatic Gain Control) circuit and an A / D converter, for example.
[0042]
Next, operations of the pixel 36 and the S / H / CDS unit 32 will be described in detail.
First, the vertical selection means 66 outputs a reset pulse and an address pulse. As a result, the reset transistor 47 is turned on and the floating diffusion portion 46 is connected to the power supply Vdd, the electric charge accumulated in the floating diffusion portion 46 is eliminated, and the voltage of the floating diffusion portion 46 in the reset state, that is, the offset voltage Is output from the amplification transistor 48 to the vertical signal line 38 through the address transistor 50 in the ON state. Since the amplification transistor 48 forms a source follower circuit together with the constant current source 54 when the address transistor 50 is on, a voltage following the voltage of the floating diffusion portion 46 is transmitted from the amplification transistor 48 to the vertical signal line 38. Output with low impedance.
[0043]
Subsequently, the vertical selection means 66 outputs the first and second sampling pulses to the transistors 56 and 58 to turn on the transistors 56 and 58, respectively. As a result, the offset voltage output from the reset pixel 36 to the vertical signal line 38 as described above is held in the capacitor 60.
[0044]
Next, the vertical selection means 66 outputs a transfer pulse, turns on the transfer transistor 44, and transfers the charge received and accumulated by the photodiode 42 to the floating diffusion unit 46. The floating diffusion unit 46 generates a voltage corresponding to the transferred charge amount and supplies the voltage to the amplification transistor 48. At this time, the vertical selection unit 66 outputs an address pulse to turn on the address transistor 50. As a result, the voltage of the floating diffusion section 46 is output to the vertical signal line 38 by the amplification transistor 48 with low impedance.
[0045]
In the S / H • CDS unit 32, the first sampling pulse is supplied from the horizontal selection unit 67 to turn on the transistor 56, and the voltage output to the vertical signal line 38 as described above is transmitted through the transistor 56 and the capacitor 60. Applied to the capacitor 62. Here, since the capacitor 60 holds the offset voltage of the pixel 36, a voltage obtained by subtracting the offset voltage held by the capacitor 60 is applied to the capacitor 62, and the capacitor 62 holds the voltage.
Since the offset voltage differs for each pixel 36, noise due to offset variation can be removed by removing the offset by the S / H / CDS circuit in this way.
Thereafter, the horizontal selection means 67 sequentially outputs selection pulses to the horizontal selection transistors 64 for each of the vertical signal lines 38, the horizontal selection transistors 64 are sequentially turned on, and the voltage held by the capacitor 62 is sequentially applied to the horizontal signal. Output to line 34.
[0046]
In such a solid-state imaging device 26 of the second embodiment, as described above, the number of photosensors, and hence the number of pixels 36 arranged in the column direction is larger than the number of rows arranged in the row direction, and the imaging surface 102 is vertically long. Therefore, when a vertically long subject is imaged, useless areas in which no subject image exists on both sides of the imaging surface 40 are not formed. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
[0047]
When the total number of pixels is not different from the conventional one, the number of vertical signal lines 38 is reduced and the number of horizontal selection transistors 64 is reduced. Therefore, the parasitic capacitance related to the horizontal signal line 34 is reduced, and the total number of pixels is increased. Since there is a margin for increasing the number of columns of 36, it is advantageous for increasing the number of pixels. Further, since the parasitic capacitance related to the horizontal signal line 34 is reduced, the speed can be increased. Further, since the horizontal selection transistor 64 and the capacitors 60 and 62 for sample and hold can be small, the apparatus can be downsized. It is advantageous for the conversion. Further, since the signal voltage is not attenuated and a sufficiently large output signal can be obtained, the S / N is improved and the image quality is improved.
[0048]
Next, a third embodiment of the present invention will be described.
FIG. 6 is a schematic plan view showing a solid-state imaging device according to the third embodiment. In the figure, the same elements as those in FIG. 3 are denoted by the same reference numerals.
The solid-state imaging device 70 of the third embodiment is different from the solid-state imaging device 26 of FIG. 3 in that each vertical signal line 38 is output from the S / H / CDS unit 32 like the solid-state imaging device 26. The signal is not output serially through the horizontal signal line 34, but is output in parallel through the output pad 74 provided for each vertical signal line 38 via the signal processing / output unit 72. .
In this solid-state imaging device 70 as well, like the solid-state imaging device 26, the aspect ratio of the pixels 36 is 1: 1, and the number of arrangement of the pixels 36 in the column direction is larger than the number of arrangements in the row direction. The number of arrays in the direction: the number of arrays in the row direction = 4: 3, and the pixel unit 30, that is, the imaging surface 40 is vertically long.
[0049]
Therefore, in the solid-state imaging device 70, when a vertically long subject is imaged, useless areas where no subject image exists are not formed on both sides of the imaging surface 40. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
Furthermore, when the total number of pixels is the same as the conventional one, the number of vertical signal lines 38 is reduced, and thus the number of output pads is reduced, which is advantageous in terms of downsizing and mounting of the device.
[0050]
Next, a fourth embodiment of the present invention will be described.
FIG. 7 is a schematic plan view showing a solid-state imaging device as a fourth embodiment.
The solid-state imaging device 76 shown in FIG. 7 is different from the solid-state imaging device shown in FIG. 11 in that the transfer control circuit 16 is configured to function also as an imaging area limiting unit.
[0051]
That is, when the low-level portrait mode signal 16B is input, the transfer control circuit 16A operates in the same manner as the transfer control circuit 158 of FIG. 11, and therefore the transfer control circuit 16A is connected to all the vertical charge transfer registers 120. The transfer clock is supplied to operate, and the signal charges generated by all the optical sensors 118 are transferred by the vertical charge transfer registers 120 and supplied to the horizontal charge transfer registers 122. On the other hand, when the high-level vertically long mode signal 16B is input, the transfer control circuit 16A operates as an imaging region limiting unit, and with respect to a predetermined number of vertical charge transfer registers 120 on both sides 162 on the imaging surface 132. In this case, the transfer clock is not supplied, and the transfer clock is supplied only to the remaining central vertical charge transfer register 120.
[0052]
As a result, the signal charge is supplied only to the horizontal charge transfer register 122 from the vertical charge transfer register 120 at the center, and the signal charge is not supplied to the horizontal charge transfer register 122 from the vertical charge transfer register 120 on both sides 162. . Here, the transfer control circuit 16A supplies a transfer clock to the number of vertical charge transfer registers 120 in the central portion which is smaller than the number of photosensors arranged in the column direction, and accordingly, the substantial number of pixels 124 arranged in the row direction is set. As shown in FIG. 14, the substantial imaging surface 132A is vertically long, and an image suitable for a display device having a vertically long display screen can be obtained.
[0053]
Note that the vertical charge transfer registers 120 for which the transfer control circuit 16A restricts the transfer of signal charges are not necessarily arranged on both sides of the imaging surface 132, and are arranged on either one of the sides. Even if the transfer of signal charges is restricted only in the vertical charge transfer register 120, the imaging surface can be made substantially vertically long.
As the aspect ratio of the substantial imaging surface 132A shown in FIG. 14, for example, the vertical length H / the horizontal length W is set to a value in a range larger than 1.2 and smaller than 1.6. It is also effective to display a photographed image of a person's face on the screen with the same aspect ratio so that the image is comfortable for the viewer.
[0054]
Next, a fifth embodiment of the present invention will be described.
FIG. 8 is a schematic plan view showing a solid-state imaging device as a fifth embodiment.
The solid-state imaging device 78 shown in FIG. 8 is different from the solid-state imaging device shown in FIG. 12 in that the horizontal selection unit is configured to function as an imaging region limiting unit.
That is, when the low-level portrait mode signal 164B is input, the horizontal selection unit 164A operates in the same manner as the horizontal selection unit 164 of FIG. The signals are sequentially supplied to the horizontal signal line 142 as described above. On the other hand, when the high-level portrait mode signal 164B is input, the horizontal selection unit 164A operates as an imaging region limiting unit, and signals from the predetermined number of vertical signal lines 146 in the both side portions 166 on the pixel unit 138 are displayed. Does not supply the signal to the horizontal signal line 142 but supplies only the signal from the remaining vertical signal line 146 in the center to the horizontal signal line 142.
[0055]
Here, the horizontal selection unit 164A controls to supply the horizontal signal line 142 with signals from the central vertical signal line 146 which is smaller in number than the number of optical sensors arranged in the column direction. Therefore, in this solid-state imaging device 78, the number of pixels 144 arranged in the row direction can be substantially smaller than the number of columns arranged in the column direction, and an image suitable for a display device having a vertically long display screen can be obtained.
[0056]
Note that the vertical signal lines 146 for restricting the signal output by the horizontal selection unit 164A are not necessarily arranged on both sides of the pixel portion 138, and the vertical signals arranged on either one of the side portions are not necessarily provided. Even when the output of the signal from only the line 146 is restricted, the imaging surface can be made substantially vertically long.
As a substantial aspect ratio of the imaging surface, for example, a person with a screen having the same aspect ratio in which the vertical length / horizontal length is a value in a range larger than 1.2 and smaller than 1.6. It is also effective to display a photographed image of the face so that the image is comfortable for the viewer.
[0058]
【The invention's effect】
  As explained aboveIn the solid-state imaging device of the present invention having a vertical signal line and a horizontal signal line,The aspect ratio of the pixels each consisting of a photosensor is 1: 1, and theySince the number of photosensors arranged in the column direction is larger than the number of rows arranged in the row direction, the imaging surface is vertically long, and when imaging a vertically long subject, useless areas where no subject image exists on both sides of the imaging surface are formed. There is nothing. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
[0059]
When the total number of pixels is constant, the number of vertical signal lines is reduced and the number of second switching elements is reduced, so that the parasitic capacitance related to the horizontal signal lines is reduced and a margin for increasing the number of columns of pixels is created. Therefore, it is advantageous for increasing the number of pixels. In addition, since the parasitic capacitance related to the horizontal signal line is reduced, the speed can be increased. Further, the size of the device can be reduced by downsizing the second switching element and the capacitor for sample and hold. It will be advantageous. Furthermore, since a sufficiently large output signal can be obtained, the S / N is improved and the image quality is improved.
[0060]
  Also,Vertical signal line andIn the solid-state imaging device of the present invention having an output pad,The aspect ratio of the pixels each consisting of a photosensor is 1: 1, and theySince the number of photosensors arranged in the column direction is larger than the number of rows arranged in the row direction, the imaging surface is vertically long, and when imaging a vertically long subject, useless areas where no subject image exists on both sides of the imaging surface are formed. There is nothing. In addition, since the captured image is also vertically long, when the captured image is displayed on a display device having a vertically long display screen, empty areas do not occur above and below the screen.
  Furthermore, when the total number of pixels is constant, the number of vertical signal lines is reduced, and thus the number of output pads is reduced, which is advantageous in terms of downsizing and mounting of the device.
[Brief description of the drawings]
FIG. 1 is a schematic plan view showing an example of a solid-state imaging device having a CCD structure according to the present invention.
2 is an explanatory diagram showing an image formed by a vertically long subject on the imaging surface of the solid-state imaging device of FIG. 1; FIG.
FIG. 3 is a schematic plan view showing an example of a MOS type solid-state imaging device according to the present invention.
4 is a circuit diagram illustrating a configuration of each pixel in the solid-state imaging device of FIG. 3;
5 is a partial circuit diagram illustrating a configuration of an S / H • CDS unit in the solid-state imaging device of FIG. 3;
FIG. 6 is a schematic plan view showing a solid-state imaging device according to a third embodiment.
FIG. 7 is a schematic plan view showing a solid-state imaging device according to a fourth embodiment.
FIG. 8 is a schematic plan view showing a solid-state imaging device according to a fifth embodiment.
FIG. 9 is an explanatory diagram illustrating an image of a subject formed on an imaging surface when a vertically long subject is imaged by a solid-state imaging device having a horizontally long imaging surface.
FIG. 10 is an explanatory diagram showing a case where a horizontally long image is displayed on a vertically long screen display device.
FIG. 11 is a schematic plan view showing an example of a conventional solid-state imaging device having a CCD structure.
FIG. 12 is a schematic plan view showing an example of a conventional MOS type solid-state imaging device.
FIG. 13 is a schematic plan view showing another example of a conventional MOS type solid-state imaging device.
14 is an explanatory diagram showing a case where a vertically long subject is imaged on the imaging surface of the solid-state imaging device of FIG. 7;
[Explanation of symbols]
2, 26, 70, 76, 78, solid-state imaging device, 4 ... semiconductor substrate, 6 ... optical sensor, 8 ... vertical charge transfer register, 10 ... horizontal charge transfer register, 12 ... pixel, 14 ... Imaging surface, 16... Transfer control circuit, 28... Semiconductor substrate, 30... Pixel portion, 32 .. S / H / CDS portion, 34. Signal line 66... Vertical selection means 67 67 horizontal selection means 68... Output circuit 72.

Claims (3)

A plurality of photosensors arranged vertically and horizontally, each of the plurality of photosensors corresponding to a pixel, and the aspect ratio of the pixels is 1: 1, and provided for each column of the photosensors A plurality of vertical signal lines for outputting an electric signal based on signal charges generated by receiving light generated by the photosensors in the corresponding columns, and the signals by the signal charges of the corresponding photosensors provided for the photosensors. A first switching element that selectively supplies the vertical signal line; a horizontal signal line that outputs the signal for each row of the photosensors; and is supplied through the plurality of vertical signal lines; And a second switching element that selectively supplies the signal from the corresponding vertical signal line to the horizontal signal line on a semiconductor substrate. I,
A solid-state imaging device, wherein the number of arrays in the column direction of the photosensors is larger than the number of arrays in the row direction. A plurality of photosensors arranged vertically and horizontally, each of the plurality of photosensors corresponding to a pixel, and the aspect ratio of the pixels is 1: 1, and provided for each column of the photosensors A plurality of vertical signal lines for outputting an electric signal based on signal charges generated by receiving light generated by the photosensors in the corresponding columns, and the signals by the signal charges of the corresponding photosensors provided for the photosensors. A solid-state imaging device comprising: a switching element that selectively supplies the vertical signal line; and an output pad that is provided for each vertical signal line and outputs the signal supplied through the vertical signal line. Because
A solid-state imaging device, wherein the number of arrays in the column direction of the photosensors is larger than the number of arrays in the row direction. The value obtained by dividing the length in the column direction of the photosensors by the length in the row direction of the photosensors of the imaging surface formed by the photosensors arranged in the vertical and horizontal directions is larger than 1.2 and 1.6. The solid-state imaging device according to claim 1 , wherein the solid-state imaging device is smaller.

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