JP3870755B2 - Active matrix display device and driving method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device that performs gradation display by an amount of current, such as an organic electroluminescent element.
[0002]
[Prior art]
Since the organic light emitting element is a self light emitting element, a backlight required for a liquid crystal display device is unnecessary, and it is expected as a next generation display device from the advantages such as a wide viewing angle.
[0003]
In the organic light emitting device, the light emission intensity of the device and the electric field applied to the device are not in a proportional relationship, and the light emission intensity of the device and the current density flowing through the device are in a proportional relationship. The variation in emission intensity relative to the variation can be reduced by performing gradation display by current control.
[0004]
An example of an active matrix display device using a switching element having a semiconductor layer is shown in FIG. Each pixel includes a plurality of switching elements 73 a to 73 d, a storage capacitor 74, and an organic electroluminescent element 72 as indicated by 79.
[0005]
The switching element 73 makes the switching elements 73a and 73b conductive by the output from the gate driver 70 in the row selection period (period A) of one frame, and the switching element 73d is made nonconductive. Conversely, in the non-selection period (period B), 73d is turned on, and 73a and 73b are turned off.
[0006]
By this operation, in period A, the amount of current flowing through 73c is determined according to the current value output from the source driver 71, the gate voltage is determined from the relationship between the source-drain current of 73c and the gate voltage, and according to the gate voltage. The accumulated charge is stored in the storage capacitor 74. In the period B, the gate voltage of 73c is set according to the amount of charge accumulated in the period A. Therefore, the same current as the current flowing in 73c in the period A flows in 73c also in the period B. The light emitting element 72 is caused to emit light. The amount of charge in the storage capacitor 74 changes according to the amount of current flowing through the source signal line 76, and the light emission intensity of the organic light emitting element 72 changes.
[0007]
[Problems to be solved by the invention]
As a display pattern, it was found that the luminance of the non-lighted pixel differs between when a current is passed through a certain source signal line in the order of lighting and non-lighting and when a current is passed in the order of non-lighting and lighting. In the order of lighting and non-lighting, the non-lighting pixels lighted about 0.5, assuming that the luminance at lighting is 1 and the luminance at non-lighting is 0. In addition, when a non-lighting signal is continuously supplied within the same frame period after the lighting signal is supplied once, the luminance of the non-lighting pixels gradually decreases from 0.5, the frame frequency is 60 Hz, and the number of display rows In the case of 220 lines, the luminance is 0 from the 6th to 7th lines.
[0008]
On the other hand, when the lighting signal was sent after the non-lighting, the lighting luminance was 0.8 at first, but it was possible to display with luminance 1 from the third row.
[0009]
The current density required for the source signal line is 0.01 mA / square centimeter when displaying black, and 5 mA / square centimeter when displaying white. The current supplied to each pixel is 1.5 nA to 29 nA during black display and 750 nA to 14.5 μA during white display in a display device used as a mobile phone, PDA, or television.
[0010]
Although it is necessary to change the gate voltage of the drive transistor 73c so that the same current as that of the source signal line flows, the charge necessary for the gate voltage change is supplied from the power supply line 75 through the transistor 73c.
[0011]
An equivalent circuit for one pixel at this time is shown in FIG. FIG. 8B shows the relationship between the drain current Id of the transistor 81 and the gate voltage Vg.
[0012]
When the gate voltage is small, the apparent resistance value of the drive transistor 81 increases. Therefore, the smaller the gate voltage, that is, the black gradation with the lower current value, the greater the resistance value. Due to the time constant between the resistance value of the driving transistor and the stray capacitance 83 parasitic on the source signal line 84, the waveform is rounded, and it takes time to change to a predetermined current. As a result, there is a problem that the selection period (horizontal scanning period) must be lengthened.
[0013]
[Means for Solving the Problems]
In order to solve the above problems, the active matrix display device of the present invention sets the current I1 in the first period (writing period) and uniquely corresponds to the current I1 in the second period (display period). In an active matrix display device in which a pixel circuit is configured to flow I2 through a display element, each current satisfies a relationship of I1> I2.
[0014]
As a means for realizing this, a capacitor is connected between the gate signal line and the gate electrode of the transistor for current control,
It is characterized in that the source current required to obtain the same EL current is increased, the apparent resistance value of the transistor is reduced, and the rounding of the waveform is reduced.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0016]
(Embodiment 1 of the invention)
FIG. 1 shows a circuit for one pixel of a display device according to a first embodiment of the present invention. It is characterized in that a capacitor Ct18 is provided as compared with a circuit for one pixel having a conventional configuration. FIG. 2 shows a timing chart of main waveforms.
[0017]
In order to flow a signal for turning on the transistors 17b and 17c to the gate signal line 1 (12) and to flow a predetermined current (I1) to the EL element 16, a current I1 is passed to the source signal line 11. At this time, the gate potential of the transistor 17a is set to V1. (It is assumed that the voltage is V1 when the current is I1 in the current-voltage characteristic of the transistor 17a). This is the first period, that is, the selection period (horizontal scanning period) in FIG. Note that the transistor 17d is inactive during this period.
[0018]
Next, a signal for turning off the transistors 17b and 17c is supplied to the gate signal line 1 (12), and a signal for turning on the transistor 17d is supplied to the gate signal line 2 (13). This is the second period in FIG. At this time, since the capacitance Ct (18) exists, the gate voltage value of the transistor 17a changes from V1 in accordance with the potential change of the gate signal line 1.
[0019]
The amount of change ΔVp at this time is expressed by ΔVp = ΔVg × (Cgs + Ct) / (Cgs + Ct + Cs), where Cgs is the gate-source capacitance of the transistor 17b. Here, Cs indicates a capacitance value of the storage capacitor 14 and ΔVg indicates a potential change amount of the gate signal line 1. As shown in FIG. 2, since the gate signal line voltage increases at the time of switching between the first period and the second period, the gate potential of the drive transistor 17a rises. The increase value varies depending on the values of the three capacitors, and Cgs is determined by the size and configuration of the transistor. Therefore, the amount of change is actually controlled by Ct and Cs.
[0020]
An increase in the gate potential of the drive transistor 17a causes a decrease in the drain current. The drain current decreases by an amount corresponding to the change amount ΔVp. Therefore, the current flowing through the EL element 16 with the gate signal line 2 in the conducting state is smaller than the predetermined current value I1.
[0021]
On the contrary, this indicates that in order to pass the current I1 to the EL element in the second period, a current larger than I1 is passed to the transistor 17a in the first period, and Cs is small or Ct is If it becomes large, the electric current to flow can be made larger. If Cs is reduced, the charge holding ability is reduced, and the gate potential of 17a in the second period is likely to change. Therefore, it is desirable to increase Ct.
[0022]
If the current flowing through the source signal line is increased in this way, the apparent resistance value of the transistor having the current-voltage characteristic shown in FIG. 8B can be reduced. As a result, the time constant due to the product of the resistance and the stray capacitance is reduced, so that the time for changing to the predetermined current value in the first period can be shortened.
[0023]
FIG. 3 shows the relationship between the current flowing through the source signal line 11 and the current flowing through the EL element 16 when the value of Ct is changed when the amplitude of the gate signal line is 14V.
[0024]
When the capacitance ratio ((Cgs + Ct) / (Cgs + Ct + Cs)) is 0.03, the current value that should flow through the source signal line is about five times the current value that flows through the EL element. When Ct is further increased, the ratio of the current value flowing through the source signal line to the current value flowing through the EL element increases. When the capacity ratio is 0.11, it becomes 200 times. If it is further increased to 0.15, it becomes 500 times.
[0025]
Since the resistance value of the drive transistor decreases as the current flowing through the source signal line increases, the time required to change to the predetermined current decreases. Therefore, the larger the value of Ct, the better.
[0026]
However, when Ct is increased and the capacitance ratio is 0.15, when the current flowing through the EL at black gradation is 3 nA, the current flowing through the source signal line is 1.5 μA as shown in FIG. Is big. When the voltage of the EL power supply line is set to 15 V, when the number of source signal lines is 528 assuming a cellular phone or the like, the power required for writing is 11.9 mW even during black display with the smallest current. On the other hand, since the current value required to change to a predetermined current value within one horizontal scanning period at a frame frequency of 60 Hz may be about 0.3 μA, the maximum value of Ct is such that the capacitance ratio is 0.11. Is desirable from the viewpoint of reducing power consumption.
[0027]
On the other hand, the lower limit value of Ct is desirably a capacity ratio of 0.03. By increasing the current value by at least about 5 times, if the frame frequency is lowered to about 30 Hz, it can be changed to a predetermined current value within one horizontal scanning period.
[0028]
Even when the frame frequency is 60 Hz, when the switching means 58, the voltage source 59 and the current source 50 are provided in the source signal line 51 as shown in FIG. In the remaining period, the current source 50 is selected so that the period switching means 58 selects the voltage source 59 for the period of 2 μs or more and 5 μs or less at the beginning of each horizontal scanning period.
[0029]
In this way, the black gradation can be changed during one horizontal scanning period at the latest. Further, since the change of the source signal line changes from the voltage value representing the black gradation to the voltage value corresponding to the predetermined current value, it is lower than the predetermined luminance when the current value does not change to the current value indicating the predetermined gradation. Displayed with brightness. This is conspicuous on the low gradation side where there is little current, while on the other hand, on the high gradation side, the original current value is large and the current value can be changed sufficiently, so that a predetermined luminance can be output.
[0030]
When this is represented in the figure, the relationship between the gradation and the observed luminance as indicated by 61 in FIG. 6 is obtained. Originally, the gradation characteristic is better seen when the luminance change between one gradation in the low gradation part is smaller than that in the high gradation part. In this method using the voltage source 59, the current value is not necessarily changed to a predetermined current. It can be seen that there is no effect on the image quality even without it. In consideration of this, even if the capacity ratio is 0.03, it can be driven at 60 Hz.
[0031]
Further, as a method of changing to a predetermined current value in a short time, a current X times the predetermined current value (here, X is a natural number of 2 or more) is supplied to the source signal line, and the second period is supplied by the gate signal line 2 (53). There is a method in which the conduction period of the transistor 57d is set to 1 / X. Although the luminance is X times, the predetermined luminance can be displayed because the light emission period is 1 / X. In FIG. 9, the length of the period 91 is changed. In this example, the circuit configuration of FIG. 5 has been described. However, the voltage source 59 and the switching unit 58 may be omitted if each gradation can be sufficiently changed to a predetermined current value within one horizontal scanning period.
[0032]
In addition to changing the value of Ct, the amount of change in the voltage of the gate signal line 1 may be changed. In FIG. 3, the amount of change in the voltage of the gate signal line 1 is 14 V. However, when this is set to 16 V, for example, the current flowing through the EL is 0.5 to 0. 0 compared to 14 V for the same source signal line current. It becomes 8 times. Therefore, in order to obtain the same luminance as that at 14 V, the source signal line is caused to flow from 1.3 to 2 times, and the apparent resistance value of the driving transistor is lowered accordingly, so that the waveform rounding of the signal line is reduced. Thus, a predetermined current value can be passed in a short horizontal scanning period.
[0033]
Further, since the amount of current flowing through the EL element is changed by changing the amount of change in the voltage of the gate signal line 1, the luminance of the display portion can be changed by changing the amplitude of the voltage of the gate signal line 1. This can be realized by decreasing the amplitude of the voltage of the gate signal line 1 when increasing the luminance, and increasing the amplitude of the voltage of the gate signal line 1 when decreasing the luminance.
[0034]
Further, there is a method of adjusting the luminance by changing the time required for changing the voltage of the gate signal line 1 and changing ΔVg. Since the frequency component is high when the waveform rounding of the gate signal line is small, the change in the gate potential of the drive transistor 17a becomes large via Ct. As a result, the luminance decreases. On the other hand, when the waveform rounding becomes large, ΔVg is apparently small and the potential change is small, so the amount of change in luminance is small, and the luminance is higher than when the waveform rounding is small.
[0035]
Each gate signal line generally uses a buffer for the output of the gate driver. For example, the configuration is as shown in FIG. A shift register 210 is a block that sequentially transmits a certain pulse. The output of the shift register 210 is output to each gate signal line through the buffer 211. An example of the output waveform at that time is shown in 212 to 214. Changing the slew rate of the buffer 211 or inserting a capacitor or resistor in the gate signal line changes the way the waveform is rounded.
[0036]
Since the gate signal line has wiring resistance and stray capacitance, the gate signal line waveform in the vicinity of the gate driver and the gate signal line waveform in the pixel farthest from the gate driver are different as shown in FIG. In the near pixel, the rise and fall of the waveform are instantaneously performed as indicated by 134, but in the case of the far pixel, the waveform changes as indicated by 135 in accordance with the time constants of the resistance and capacitance indicated in 137 and 138. Thereby, ΔVg becomes small. When the gate driver is arranged as shown in FIG. 13B, the change ΔVp in the gate potential of the driving transistor is smaller on the right side than on the left side of the screen, so that the current flowing through the EL element increases and the luminance increases. In particular, the increase in luminance becomes conspicuous during black display, and the contrast also decreases. Therefore, the size of the capacitor 136 in FIG. 13B is changed according to the distance from the gate driver. By increasing the capacitance value of 136b far from the gate driver compared to 136a close to the gate driver, the magnitude of ΔVp can be prevented from changing even when ΔVg becomes small.
[0037]
In FIG. 13, the description has been given in the case where the gate signal line is supplied from one of the screens. However, even when the gate signal line is supplied from both of the screens, similarly, the capacitance of the pixel far from the supply source is increased. The same effect can be obtained if the structure is made smaller as it approaches.
[0038]
When three types of EL elements 16 of red, green, and blue are displayed side by side as a multi-color display device, the current density-luminance characteristics of the EL elements 16 of the respective colors are different, so that the upper limit value of the current density at the black gradation is different. For example, when three color EL elements having current density-luminance characteristics as shown in FIG. 14 are used, the current at the time of black gradation of the green light emitting element 141 is smaller than that of the red light emitting element 143. In the green pixel, it is necessary to reduce the current density. In view of this, in the pixel configuration (FIG. 1) to which a capacitor according to the present invention is added, the size of the capacitor 18 is changed for each emission color to change the value of the current flowing through the EL. When the EL element shown in FIG. 14 is used, the pixel that emits green light with the smallest emission start current may have the largest capacitance and the pixel that emits red light may have the smallest capacitance.
[0039]
One end of the capacitor Ct (18) is connected to the gate signal line 1, but it is not necessarily connected to the gate signal line, and another signal line is connected as a voltage control line 159 as shown in FIG. May be. The voltage control line 159 is connected to all the capacitors Ct in the same row as shown in FIG. 16, and is controlled by the gate driver. The signal line waveforms at this time are shown in FIG. The voltage control line is set to the high level at the same time as the gate signal line 1 becomes the high level or with a delay of about several microseconds. The low level is again when the gate signal line 1 becomes low level or after the voltage control line becomes high level and the transistor 157d changes from the conductive state to the non-conductive state.
[0040]
As a result, the gate potential of the transistor 157a changes by the product of the voltage change amount ΔVg of the voltage control line 159 and the capacitance ratio Ct / (Ct + Cs). In this figure, ΔVp changes from V1. This reduces the current. In order to pass a predetermined current through the EL element, a current larger than a predetermined current value is passed through the source signal line. Therefore, as described above, even in a region where the current flowing through the EL element is small, by increasing the capacitance Ct and the voltage change amount ΔVg, the current value flowing through the source signal line is increased, the resistance value of the transistor is lowered, and the waveform is changed. Can be done quickly.
[0041]
In addition, since this method can increase the value of ΔVg compared to connecting one end of Ct to the gate signal line, the amount of change in the current value of the transistor can be increased by increasing ΔVg even if the value of Ct is small. Can be increased. When connected to the gate signal line, the maximum value of ΔVg is determined by the breakdown voltage of the transistor and should be about 20 V or less. However, the voltage control line according to the embodiment of the present invention may have a potential difference of 20 V or more. Therefore, there is an advantage that the voltage value can be increased, the capacitance Ct can be reduced, and the aperture ratio of the pixel can be increased.
[0042]
In addition to designing and forming the capacitor Ct as an element, for example, a capacitor can be formed by arranging the gate electrode of the transistor 17b and the gate electrode of the transistor 17a overlapping each other with an insulating film or the like arranged side by side, Using the cross region of the wiring connected to 1 and the transistor 17a, the capacitance may be controlled by the size of the cross region.
[0043]
Instead of the capacitor, the transistor 178 may be formed as shown in FIG. 17, and the source-gate capacitance of the transistor may be used. The drain electrode is not connected, but may be connected to the node 170.
[0044]
In the above example, the circuit configuration using the p-type transistor has been described. However, the same effect can be obtained by using the n-type transistor as shown in FIG. For example, FIG. 11 shows the gate signal line waveform and the voltage change of the gate voltage and drain current of the transistor 107a for current control.
[0045]
In a first period (corresponding to a horizontal scanning period), a high level signal is applied to the gate signal line 1 (102), and the transistors 107c and 107b are turned on. By supplying a predetermined current value to the source signal line 101 during this period, the source signal line 101 and the gate voltage of the transistor 107a are changed to a voltage corresponding to the predetermined current.
[0046]
Next, in the second period, the gate signal line 1 (102) is set to a low level so that no current flows from the source signal line 101. At this time, the potential of the node 100 changes according to the potential change of the gate signal line 1 by the stray capacitance 109 parasitic between the gate electrode and the source electrode of the transistor 107b. In this case, as shown in FIG. As a result, the drain current of the n-type transistor 107a also decreases, and as a result, the current flowing through the EL element 106 also decreases. The amount of decrease is expressed by the same expression as that for the p-type transistor. When the capacitance 108 is increased, the amount of decrease in the current value also increases. Since the current value flowing through the source signal line is increased to correct the decrease in the current value, the effect of shortening the time required for the current value change is the same in the n-type transistor as in the case of the p-type transistor.
[0047]
Further, the pixel configuration is not limited to the above, and for example, a configuration as shown in FIG. 4 may be used. 48 is a capacitance added according to the present invention, and 49 is a capacitance parasitic between the gate and source electrodes of the transistor 47b. The potential difference of the node 40 between when the transistors 47d and 47b are conductive and non-conductive varies depending on the size of the capacitor 48. This is because the potential change of the gate signal line 2 (43) is transmitted to the node 40 through the capacitors 48 and 49. Since the voltage of the gate signal line 2 (43) rises between the conduction time and the non-conduction time, the potential of the node 40 also rises. As a result, the drain currents of the transistors 47a and 47c are reduced. As a result, the EL element current becomes smaller than the source signal line current, so that a large amount of source signal line current can be flowed to correct the decrease, and the apparent resistance values of the transistors 47a and 47c can be lowered. The time required for changing the value can be shortened.
[0048]
A similar effect can be obtained even in a circuit composed of n-type transistors (FIG. 12).
[0049]
Note that the present invention is not limited to the specific circuit configuration described above, and the current I in the first period (writing period).₁And the current I in the second period (display period)₁Current I uniquely corresponding to₂In an active matrix display device in which a pixel circuit is configured to flow through a display element, I₁> I₂It is characterized by being driven to become. I₁And I₂Is a relationship between the source signal line current and the EL current at a specific capacitance ratio as shown in FIG. 3, for example. This relationship is expressed as I, B, and n as positive constants.₁= A + B · I₂ ⁿCan be approximated. Note that the fact that this relationship is established is that the current I₂Great effect when is small.
[0050]
(Embodiment 2 of the invention)
FIG. 19 shows a circuit for one pixel of the display device according to the second embodiment of the present invention. The gradation value is displayed by changing the value of the current flowing through the EL element 196 by the gate voltage of the thin film transistor 197a. In the row selection period, the transistor 197b is turned on, and charges are accumulated in the storage capacitor 194 in accordance with the voltage applied to the source signal line 191. In the non-selection period, the transistor 197b is in a non-conductive state, and the drain current of the transistor 197a is determined in accordance with the charge stored in the storage capacitor 194 to perform gradation display. Display is performed by performing this operation on all lines.
[0051]
FIG. 20 shows waveforms of the gate signal line, the node 199, and the drain current of the transistor 197a at this time. In the row selection period, a voltage V1 is applied to the source signal line 191 in order to flow a predetermined current I1 to the EL element. When the row selection period ends, the gate signal 192 is changed to a high level. At this time, since the gate signal line 192 and the gate electrode of the transistor 197a are connected by the capacitor Ct (198), the potential of the node 199 also changes by ΔVp as the gate signal line 192 changes. ΔVp = (Ct + Cgs) / (Ct + Cgs + Cs) × ΔVg. Here, Cgs is a source-gate capacitance of the transistor 197b. Since ΔVg changes to the higher voltage, ΔVp also changes to the higher voltage. As a result, the potential difference between the source and gate of the transistor 197a is reduced, so that the drain current of 197a is also reduced.
[0052]
Therefore, in order to obtain a predetermined luminance, the voltage applied to the source signal line 191 is reduced. The power can be reduced by reducing the source signal line voltage.
[0053]
This is also effective when the transistors 197a and 197b are n-type transistors. FIG. 22 shows a circuit configuration when an n-type transistor is used.
[0054]
A predetermined voltage is applied from the source signal line 221 during the row selection period, and charges are stored in the storage capacitor 224. When the row selection period ends, the gate signal line 222 changes from a high level to a low level in a direction in which the voltage decreases. As a result, the potential at the node 229 also decreases due to the presence of the capacitor 228. Since the gate voltage of the transistor 227a decreases, the drain current decreases. As described above, similarly to the p-type transistor described in FIGS. 19 and 20, the drain current changes and the current flowing through the EL element 226 changes. This shows that the same effect can be obtained regardless of the p-type and n-type transistors.
[0055]
In the present invention, the transistor has been described by taking a thin film transistor as an example.
[0056]
Further, although an EL element has been described as a display element, an organic light emitting element, an inorganic electroluminescence element, a light emitting diode, or the like may be used.
[0057]
【The invention's effect】
As described above, the present invention uses the gate voltage change when changing from the row selection period to the non-selection period by connecting the gate electrode of the transistor that performs current control with the voltage of the gate signal line and the gate electrode by a capacitor. Thus, the current flowing through the EL element is made smaller than the current flowing through the source signal line. The source signal line current is increased to correct the amount of current flowing through the EL element, and the apparent resistance value of the transistor for current control is reduced, thereby reducing the waveform rounding caused by the product of the parasitic capacitance parasitic on the source signal line. In addition, charges corresponding to a predetermined current can be stored in the storage capacitor in a short horizontal scanning period. As a result, the display device of the present invention can display a moving image or a television broadcast with a luminance corresponding to the input signal.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration of a pixel according to an embodiment of the present invention.
FIG. 2 is a diagram showing a change in the amount of each signal line in the pixel configuration of FIG.
FIG. 3 is a diagram showing the relationship between source signal line current and EL current for different capacitance ratios.
FIG. 4 is a diagram showing a second pixel configuration in the embodiment of the present invention.
FIG. 5 is a diagram showing a pixel configuration and a source signal line power supply in an embodiment of the present invention.
FIG. 6 is a diagram showing a relationship between gradation and luminance in the embodiment of the present invention.
FIG. 7 is a diagram showing a configuration of a display device of the present invention.
FIG. 8 is a diagram showing an equivalent circuit of one pixel when charge corresponding to a predetermined source signal line current is stored in a storage capacitor;
FIG. 9 is a diagram showing waveforms of signal lines in the configuration of FIG. 5 so that predetermined luminance can be obtained even in a short horizontal scanning period.
FIG. 10 is a diagram showing a third pixel configuration in the embodiment of the present invention.
11 is a diagram showing changes in signal line voltages and currents in FIG. 10;
FIG. 12 is a diagram showing a fourth pixel configuration in the embodiment of the present invention.
FIG. 13 is a diagram showing a gate signal line waveform and a configuration of the entire display unit in the embodiment of the present invention;
FIG. 14 is a diagram showing an example of the relationship between current density and luminance of a display element
FIG. 15 is a diagram showing a circuit for one pixel when a voltage control line is provided;
FIG. 16 is a diagram illustrating a configuration of a display device, a source driver, and a gate driver when a voltage control line is provided.
FIG. 17 shows a circuit for one pixel when a capacitor is formed using a transistor.
18 is a diagram showing signal line waveforms in the circuit configuration of FIG.
FIG. 19 is a diagram showing a circuit for one pixel in the second embodiment of the present invention;
20 is a diagram showing changes of signal lines in the circuit configuration of FIG. 19;
FIG. 21 is a diagram showing an example of a gate signal line generation unit
FIG. 22 is a diagram in which a circuit for one pixel in the second embodiment of the present invention is formed by n-channel transistors;
[Explanation of symbols]
11 Source signal line
12 Gate signal line 1
13 Gate signal line 2
14 Storage capacity
15 EL power line
16 EL element
17 Thin film transistor
18 capacity

Claims (2)

In an active matrix display device,
A driving transistor for controlling a current supplied from a power source;
A storage capacitor for holding the gate potential of the driving transistor; a signal line connecting transistor that forms a current path from a source signal line to the driving transistor;
A storage capacitor connection transistor that forms a path for transferring charge from the source signal line or the signal line connection transistor to the storage capacitor;
A capacitance between the gate electrode of the driving transistor and the gate electrode of the storage capacitor connection transistor;
For each pixel,
An active matrix display device, wherein the capacitance is obtained by changing a capacitance value in accordance with a difference in current density vs. luminance characteristics or voltage vs. luminance characteristics of the display element. In an active matrix display device,
A driving transistor for controlling a current supplied from a power source;
A storage capacitor for holding the gate potential of the driving transistor;
A signal line connection transistor that forms a current path from a source signal line to the driving transistor;
A gate signal line for controlling the gate potential of the signal line connecting transistor;
A storage capacitor connection transistor that forms a path for transferring charge from the source signal line or the signal line connection transistor to the storage capacitor;
A capacitance between the gate electrode of the driving transistor and the gate electrode of the storage capacitor connection transistor;
For each pixel,
2. The active matrix display device according to claim 1, wherein the capacitance is obtained by changing a capacitance value in accordance with a distance from a voltage output applied to the gate signal line.

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