JP3863961B2 - Font generator device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a font generator for storing character information used as, for example, a dot printer, a word processor or the like as a dot matrix pattern.apparatusAbout.
[0002]
[Prior art]
  In recent years, along with the enhancement of functions of personal computers, word processors, etc., fonts of various character sizes have been demanded as display devices and printing devices have become higher in definition. Conventionally, these fonts have been stored in a hard disk drive or the like. However, due to the high integration of semiconductor memories, they are often held in non-volatile memories such as mask ROM (read-only memory). Yes.
[0003]
  FIG. 7 shows a storage state of a character dot matrix pattern in a conventionally used font generator. In FIG. 7, a character is represented by a dot matrix pattern of 16 dots vertically × 16 dots horizontally. The logic “1” is set at the bit position of the shaded portion constituting the character “A” in the figure, and the logic “0” is set at the bit position of the white portion, whereby the character “A” is stored. .
  The character stored in this manner is read by sequentially scanning the row address corresponding to the vertical direction of the character, and the word data of each row address (logic “1” representing the character portion and logic “1” representing the white portion). 0 ") is output in parallel.
[0004]
  As described above, if the scan address for one character is N bits (N = 4 in FIG. 7), 2^NRow address, and usually word data (D0 to D7) is also a power of 2 (in FIG. 7, 2^Four(= 2 × 2^Three)).
[0005]
  Next, a character reading operation from the font generator will be described in detail with reference to the block diagram of FIG.
  First, when a JIS code is given, the address conversion circuit 1 generates a character address where the character pattern designated by the JIS code is stored. In this case, assuming that a character pattern of 1024 character types or less is stored in the font generator 2, the character address is 10 bits (2^Ten= 1024) Necessary.
[0006]
  If the character size is 16 dots long x 16 dots wide, 256 characters are required for each character, and the storage capacity of the font generator 2 is 256 Kbits (= 2).¹⁸Bit, K = 2^Ten)Is required. Further, assuming that font data is stored in the font generator 2 with 8 bits per word, the horizontal 16 dots of one character are expressed by two words. Therefore, at the time of reading, as shown in FIG. 7, it is necessary to divide a dot matrix pattern of one character into left and right two by 16 dots vertically and 8 dots horizontally, and scan the row address twice as shown by arrows.
[0007]
  Therefore, conventionally, the address of the font generator 2 is assigned as follows.
  That is, the scan address is 5 bits from A0 to A4, the lower 4 bits of the address A0 to A3 are assigned 16 vertical rows of characters (that is, the row address), and the remaining 1 bit of the address A4 is a dot matrix pattern. Assign left and right. The character address is assigned to the upper 10 bits of A5 to A14.
[0008]
  Then, for example, the clock CLK is input to the counter 3 constituted by five binary counters, and the scan addresses A0 to A4 of the lower 5 bits of the font generator 2 are generated. Then, the adder 4 adds the upper 10-bit character address addresses A5 to A14 generated by the address conversion circuit 1 and the lower 5-bit scan address A0 to A4 generated by the counter 3, and adds 15 The real addresses A0 to A14 of the bit font generator 2 are generated.
[0009]
  As a result, the dot matrix pattern of the character designated by the upper 10-bit character address addresses A5 to A14 among the real addresses A0 to A14 is 16 dots × horizontal in accordance with the lower 5-bit scan addresses A0 to A4. Each 8 dots are scanned twice in synchronism with the clock CLK, and one character font data is output in the period of the clock CLK32.
[0010]
[Problems to be solved by the invention]
  However, the conventional font generator configured as described above and operating as described above has the following problems.
  That is, as described above, the number of row addresses and the word length of one word of the font generator 2 are powers of two. Therefore, when a character dot matrix pattern having a size that does not fit the power of 2 is stored in the font generator 2, an empty area is generated in the font generator 2.
[0011]
  For example, assuming that the size of the character dot matrix pattern stored in the font generator 2 is vertical 12 dots × horizontal 12 dots, the dot matrix pattern of the character “A” is stored as shown in FIG. In this case, if the scan address is made 4 bits by subtracting “1” from the original 5 bits, the number of row addresses becomes “8” because 1 bit is taken for the above left and right designations, and the required number of row addresses is 12 or less. End up. Therefore, the dot matrix area (hereinafter referred to as “one character area”) 5 assigned as one character in the font generator 2 cannot be smaller than the vertical 16 dots × horizontal 16 dots, and is around the dot matrix pattern of the character “A”. An empty area is generated in the area.
[0012]
  As described above, the upper 10 bits of the real addresses A0 to A14 of the font generator 2 are assigned to the character address address, while the lower 5 bits are assigned to the scan address. As shown in FIG. 10, each character address is distributed and exists.
  In other words, the conventional font generator has a problem that a free area generated when a character dot matrix pattern having a size that does not fit the power of 2 cannot be used for other purposes.
[0013]
  As described above, when storing a character dot matrix pattern having a size that does not conform to the power of 2, the character dot matrix pattern is equally divided into a plurality of blocks, each of which is a power of 2 dots. A pattern generating circuit for storing blocks in separate ROMs has been proposed (Japanese Patent Laid-Open No. 58-17488).
  However, in today's case where a large amount of character fonts are stored on one chip due to an increase in the degree of integration of semiconductor memory, it is inappropriate to store character dot matrix patterns that require a large number of ROMs such as the pattern generation circuit. .
[0014]
  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a font generator that can effectively use a free area generated when storing a character dot matrix pattern having a size that does not conform to a power of 2.apparatusIs to provide.
[0015]
[Means for Solving the Problems]
  To achieve the above object, the invention according to claim 1Font generator deviceIs
  Font generator that stores multiple dot matrix patternsWith,
  The font generator is continuously assigned addresses,
  The address space of the font generator is 2 ^m Pieces ( m is a positive integer ) The address area is equally divided into
  In the storage area corresponding to the address area,One character area which is the maximum value of the dot matrix pattern is set to 2 in the vertical or horizontal direction. ^m PiecesEqually dividedEachPartial character areaWord data representing the font data of
  Input address input to read the dot matrix patternOf a specific address identified byMost significant m bitsBut, Each divided aboveaddressAssign to areaAnd
  The lowest n of the specific address ( n is a positive integer ) A bit is assigned to the row address,
  The bits except the lowest n bits and the highest m bits in the specific address are characters. Assigned to the street address,
  2 above ^m 2 corresponding to one address area ^m Among the storage areas, a storage area other than the storage area in which the word data representing the font data is stored functions as a nonvolatile memory,
  The same address as the row address and character address of the specific address ( A0-A13 ) Rewritable memory accessed with
  Most significant m bits of the above input address and selection signal ( SLC ) When the value of the most significant m bits of the input address is a specific value and the selection signal is a selection signal for selecting the rewritable memory, Output data selecting means for selecting output data from the font generator when the output signal is selected and the selection signal is a selection signal for selecting the font generator;
Further comprising
  When the most significant m-bit value of the input address is the specific value and the selection signal is a selection signal for selecting the font generator, it is specified by the input address in the font generator. 2 above ^m While data other than the font data is output from the non-volatile memory of the storage areas,
  When the value of the most significant m bits of the input address is a value other than the specific value and the selection signal is a selection signal for selecting the font generator, the input address in the font generator is 2 above specified ^m The font data is output from the storage area in which the word data is stored among the storage areas.
It is characterized by that.
[0016]
  According to the above configuration, a plurality of dot matrix patterns of the same size are included in the address space of the font generator.2 ^mIn each address area equally divided intoCorresponding 2 ^m Storage areasStored in a distributed manner. Therefore, when memorizing a character dot matrix pattern that does not fit the power of 2For each characterThe resulting free space aboveThe highest level of a specific address specified by the input addressm bitsthe abovespecificofBy assigning a value, free space for all characters,Font generator aboveuponRecord2 ^m In piecesEqually dividedMemoryIdentify above areaofAddress area specified by valueStorage area corresponding toGather inCanThe
  Thus, the font generatorStorage areaBy forming continuous free space on top, free space that can be used effectively is formed.The
[0017]
  AndThis does not occur when a dot matrix pattern whose size does not fit the power of 2 is stored in the font generator.SkyThis area is released to the user as a nonvolatile memory. Also,The same address as the row address and character address of the specific address ( A0-A13 ) And the most significant m bits of the input address and the selection signal ( SLC ) Output data selection means for selecting any of output data from the rewritable memory, font data from the font generator, and data other than the font data from the nonvolatile memory of the font generator, based on Because we preparedthe aboveRewritableThe memory address isNon-volatileShared with memory address. Thus, the address generation circuit for the rewritable memory is saved.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.
<First embodiment>
  FIG. 1 shows the address space of the font generator of this embodiment.
  The font generator 11 has a storage capacity of 256K bits. If the font generator 11 stores character patterns within 1024 character types, the character address is 10 bits (2^Ten= 1024) Necessary. Also, as shown in FIG. 2, it is assumed that the size of the character dot matrix pattern is 12 vertical dots × 12 horizontal dots that do not fit the power of 2, and font data is stored in 4 bits per word.
[0019]
  Here, the address of the font generator 11 is 16 bits from A0 to A15. Then, 10 bits of the addresses A4 to A13 are assigned to the character address. On the other hand, 6 bits of addresses A0 to A3, A14, and A15 are assigned to the scan address. Further, among the scan addresses A0 to A3, A14, and A15, the lower 4 bits of the addresses A0 to A3 are assigned to the row address.
[0020]
  Further, as described above, the font generator 11 has a storage capacity of 256 K bits, and a maximum of 1024 = 2.^TenCan store character patterns of character types. Therefore, the storage capacity of one character is 256 bits, and as shown in FIG. 2, the one character area 14 is 16 dots long × 16 dots wide. Here, since one word is 4 bits, it is necessary to express 16 horizontal dots of one character area 14 with four words. Therefore, at the time of reading, it is necessary to divide one character area 14 into four areas a, b, c, and d by 16 dots vertically and 4 dots horizontally and to scan the row address four times.
  Therefore, in the present embodiment, the most significant 2 bits of the addresses A14 and A15 among the scan addresses A0 to A3, A14 and A15 are assigned to the designation of the four areas a, b, c and d.
[0021]
  As a result, by storing a character dot matrix pattern having a size of 12 dots vertically by 12 dots horizontally in each of the character areas 14 of the font generator 11 as shown in FIG. In the minimum address area A obtained by equally dividing 11 address spaces into four areas A, B, C, and D in ascending order of addresses, the word data of the area a of the one character area 14 is stored. Hereinafter, the word data of the area b of the one-character area 14 is stored in the area B of the font generator 11, the word data of the area c is stored in the area C, and the word data of the area d is stored in the area D. It will be.
  That is, a continuous empty area 13 is formed in the maximum address area D of the font generator 11. Hereinafter, 192K bits of the areas A to C used as an actual font generator are referred to as a font storage area 12.
[0022]
  The reading operation from the font generator 11 is performed as follows.
  16-bit addresses A0 to A15 are input to the font generator 11. Then, for the combination (0,0), (0,1), (1,0) of the most significant 2 bits of the addresses A14 and A15 among the addresses A0 to A15, the character specified by the character address A4 to A13 The partial dot matrix pattern is scanned in synchronization with the clock CLK according to the lower 4 bits of the scan addresses A0 to A3. In this way, font data of one character is output at a cycle of clock CLK48 (number of row addresses “16” × number of combinations of addresses A14 and A15 “3”).
[0023]
  If the combination of the most significant 2-bit addresses A14 and A15 is (1, 1) and data is read from the empty area 13 of the font generator 11, data invalidation means (not shown) is used. The read output data is set to high impedance.
[0024]
  As described above, in the present embodiment, when storing a dot matrix pattern of vertical 12 dots × horizontal 12 dots that does not conform to the power of 2 in the 256 Kbit font generator 11, the dot matrix of one character is stored. The combination (1,1) of the most significant 2-bit addresses A13 and A14 is assigned to the empty area generated in the one character area 14 which is the maximum value. As a result, all the empty areas of the one character area 14 are continuously present on the higher address side in the address space of the font generator 11.
  Therefore, a continuous 64K-bit empty area 13 can be formed on the upper address side of the font generator 11, and as a result, the 256K-bit font generator 11 can be reduced to 192K bits.
[0025]
  In the above embodiment, the combination (1, 1) of the most significant 2 bits of the addresses A13 and A14 among the addresses A0 to A14 is assigned to the empty area of the one character area 14. It is not limited to. For example, when the 1 character area is 8 words in the vertical direction and 8 words in the horizontal direction, and the empty area is expressed by 2 words, the combination of the most significant 3 bits of addresses (1, 1, 0), (1, 1 , 1) is assigned.
[0026]
<Second Embodiment>
  The font generator in this embodiment has a storage capacity of 256K bits. If the font generator stores character patterns of up to 1024 character types, the character address is 10 bits (2^Ten= 1024) Necessary. Also, as shown in FIG. 3, it is assumed that the size of the character dot matrix pattern is 12 vertical dots × 12 horizontal dots that do not fit the power of 2, and font data is stored in 8 bits per word.
[0027]
  In this embodiment, the address of the font generator is 15 bits A0 to A14. Then, 10 bits of the addresses A3 to A12 are assigned to the character address. On the other hand, 5 bits of addresses A0 to A2, A13, and A14 are assigned to the scan address. Further, among the scan addresses A0 to A2, A13, and A14, the addresses A1, A2, A13, and A14 are assigned to the row address.
[0028]
  Similarly to the first embodiment, one character area 15 is 16 dots long × 16 dots wide. Here, since one word is 8 bits, it is necessary to express 16 horizontal dots of one character area 15 with two words. Therefore, at the time of reading, it is necessary to equally divide one character area 15 into two areas e and f by 16 dots vertically and 8 dots horizontally and scan the row address twice.
  Therefore, in the present embodiment, as shown in FIG. 3, the address A0 of the least significant bit among the scan addresses A0 to A2, A13, and A14 is assigned to the designation of the two areas e and f.
[0029]
  As a result, the combination of the most significant 2 bits of the addresses A13 and A14 in each character area 15 of the font generator is sized in the row address space of (0,0), (0,1), (1,0). By storing the character dot matrix pattern of 12 dots vertically × 12 dots horizontally, the word data of the region g of the one character region 15 is stored in the region corresponding to the minimum address region A shown in FIG. Hereinafter, the word data of the area h of the one character area 15 is stored in the area corresponding to the area B, the word data of the area i is stored in the area corresponding to the area C, and the area corresponding to the area D is the area. j word data is stored.
  That is, a continuous free area is formed in an area corresponding to the maximum address area D shown in FIG.
[0030]
  The reading operation from this font generator is performed as follows.
  Partial dot matrix pattern of characters specified by the character address A3 to A12 with respect to the combination (0,0), (0,1), (1,0) of the addresses (A13, A14) among the addresses A0 to A14 However, the areas e and f are alternately scanned in synchronization with the clock CLK in accordance with the scan addresses A0 to A2 of the lower 3 bits. In this way, font data of one character is output in a cycle of clock CLK24 (number of combinations of addresses A1 and A2 “4” × number of combinations of addresses A15 and A14 “3” × number of states of address A0 “2”).
[0031]
  If the combination of the most significant 2-bit addresses A13 and A14 is (1, 1) and data is read from the empty area of the font generator, the data invalidation means (not shown) The read data is set to high impedance.
[0032]
  As described above, in the present embodiment as well, when a dot matrix pattern of vertical 12 bits × horizontal 12 bits that does not conform to a power of 2 is stored in a 256 Kbit font generator, a dot matrix area for one character is used. A combination (1, 1) of the most significant 2-bit address is assigned to an empty area generated in a certain character area 15. As a result, all the empty areas of the one character area 15 are continuously present on the upper address side in the address space of the font generator.
  Therefore, a continuous 64K-bit empty area can be formed on the upper address side of the font generator, and as a result, the 256K-bit font generator can be reduced to 192K bits.
[0033]
<Third Embodiment>
  This embodiment is formed by applying the first and second embodiments when a character dot matrix pattern of vertical 12 dots × horizontal 12 dots that does not fit the power of 2 is stored in a 256 Kbit font generator. The present invention relates to a method for effectively using the free space that has been used.
  However, in the following description, the case where the first embodiment is applied will be described as an example.
[0034]
  FIG. 4 is a block diagram of the font generator apparatus according to the present embodiment.
  In FIG. 4, the font generator 16 has the same address space as the font storage area 12 in the font generator 11 shown in FIG. The RAM 17 (random access memory) has the same storage capacity of 64K bits as the empty area 13 in the font generator 11 shown in FIG. 1, and has an address space accessed by addresses A0 to A13. That is, in the present embodiment, the address for the empty area 13 of the font generator 11 in the first embodiment is effectively used as the address for the RAM 17.
[0035]
  16-bit addresses A0 to A15 generated by an address conversion circuit (not shown) are supplied to the font generator 16. The lower addresses A0 to A13 of the addresses A0 to A15 are supplied to the RAM 17, while the highest addresses A14 and A15 are supplied to the multiplexer 18. Then, the multiplexer 18 selects either the output data from the font generator 16 or the output data from the RAM 17 according to the most significant addresses A14 and A15, and outputs the selected data to the outside.
[0036]
  The font generator device configured as described above operates as follows to read font data.
  When a JIS code is given to the address conversion circuit, addresses A0 to A15 of the font generator 16 are generated and supplied to the font generator 16. Then, the font generator 16 performs the first implementation when the combination of the most significant addresses A14 and A15 among the input addresses A0 to A15 is (0,0), (0,1), (1,0). Font data is output as described in the embodiment.
  On the other hand, the RAM 17 outputs the data designated by the addresses A0 to A13 regardless of the combination of the highest addresses A14 and A15.
[0037]
  The multiplexer 18 receives the most significant 2 bits of the addresses A14 and A15, and when the combination of the addresses A14 and A15 is (0,0), (0,1), (1,0), the font generator 16 The font data from is output to the outside. On the other hand, when the combination of the addresses A14 and A15 is (1, 1), the data from the RAM 17 is output to the outside.
[0038]
  As described above, in this embodiment, the font generator 16 having a storage capacity of 192 Kbits is used, and the first embodiment is applied so that the vertical 12 dots × the horizontal 12 dots that do not fit the power of 2 are used. A character dot matrix pattern is stored. Therefore, it is possible to store a character dot matrix pattern having a size that does not conform to the power of 2 so that a useless area does not occur.
  Since the combination (1, 1) of the most significant 2 bits of the addresses A0 to A13 among the 16 bits of the addresses A0 to A15 for the font generator 16 is assigned to the RAM 17, the addresses A0 to A0 for the font generator 16 are assigned. The RAM 17 can be accessed using A15. Therefore, an address conversion circuit for the RAM 17 is not required, and the circuit configuration can be simplified.
[0039]
  The RAM 17 is configured to have the same address space as the empty area 13 in the font generator 11 shown in FIG. Then, the addresses A0 to A15 may be supplied to the RAM 17, and the data may be extracted separately from the font generator 16 and the RAM 17 without using the multiplexer 23.
[0040]
<Fourth embodiment>
  In this embodiment, when a character dot matrix pattern of vertical 12 dots × horizontal 12 dots that does not fit the power of 2 is stored in a 256 Kbit font generator, the first and second embodiments are applied. The present invention relates to another method in which a user or the like effectively uses the formed free space.
  However, in the following description, the case where the first embodiment is applied will be described as an example.
[0041]
  FIG. 5 is a block diagram of the font generator apparatus of the present embodiment.
  The font generator 21 in the present embodiment has a storage capacity of 256 K bits. The font generator 21 stores character patterns within 1024 character types of 12 vertical dots × 12 horizontal dots that do not fit the power of 2 in 4 bits per word.
[0042]
  The address of the font generator 21 is 16 bits A0 to A15, and addresses A4 to A13 are assigned to the character address. On the other hand, addresses A0 to A3, A14, and A15 are assigned to scan addresses. Of the scan addresses A0 to A3, A14, and A15, the lower four bits of the addresses A0 to A3 are assigned to the row address.
  Then, as described in the first embodiment, a 64K-bit free area 21b is formed on the upper address side of the font generator 21.
[0043]
  Therefore, in the present embodiment, a 192 Kbit area on the lower address side of the font generator 21 is used as the font storage area 21a. Then, the 64K-bit empty area 21b on the higher address side is released to the user as a user area, and a dot matrix pattern of the user's own characters is stored or made available as a program storage area.
[0044]
  Furthermore, in the present embodiment, as shown in FIG. 6, a RAM 22 having the same storage capacity of 64 K bits as the user area 21b and having an address space accessed by addresses A0 to A13 is provided. Then, the addresses A0 to A15 generated by the address conversion circuit (not shown) are supplied to the font generator 21. Further, the lower addresses A0 to A13 of the addresses A0 to A15 are supplied to the RAM 22, and the most significant 2 bits of the addresses A14 and A15 are supplied to the multiplexer 23.
  The multiplexer 23 selects either the output data from the font generator 21 or the output data from the RAM 22 according to the selection signal SLC and the most significant addresses A14 and A15 input from the outside, and outputs them to the outside. .
[0045]
  The font generator device configured as described above operates as follows to read font data.
  When a JIS code is given to the address conversion circuit, addresses A0 to A15 of the font generator 21 are generated and supplied to the font generator 21. Then, when the combination of the most significant addresses A14 and A15 among the addresses A0 to A15 is (0, 0), (0, 1), (1, 0), the font generator 21 is the first embodiment. The font data in the font storage area 21a is output as described above. In the case of (1, 1), the data of the user area 21b is output.
  On the other hand, the RAM 22 outputs the data designated by the addresses A0 to A13 regardless of the combination of the highest addresses A14 and A15.
[0046]
  The multiplexer 23 outputs the output data of the RAM 22 to the outside when the selection signal SLC is “1” and the combination of the most significant addresses A14 and A15 is (1, 1). In other cases, output data from the font generator 21 is output to the outside. Therefore, when the selection signal SLC is “0” and the combination of the highest addresses A14 and A15 is (1, 1), the data in the user area 21b is output to the outside. When the selection signal SLC is “0” and the combination of the highest addresses A14 and A15 is (0, 0), (0, 1), (1, 0), the font storage area The font data 21a is output to the outside.
[0047]
  As described above, in this embodiment, a 64-Kbit free space generated by storing a character dot matrix pattern of 12 bits in length × 12 bits in width that does not fit the power of 2 in the 256-Kbit font generator 21 is stored in the user. The area 21b is further provided with a 64K-bit RAM 22 having an address space accessed by addresses A0 to A13. The multiplexer 23 selects either the output data from the font generator 21 or the output data from the RAM 22 in accordance with the selection signal SLC and the most significant addresses A14 and A15, and outputs them to the outside.
  Therefore, the empty area of the font generator 21 can be released to the user and used effectively. Further, the circuit configuration can be simplified by using the address conversion circuit for the font generator 21 as the address conversion circuit for the RAM 22.
[0048]
  In the third and fourth embodiments, the case where the address assignment according to the first embodiment is applied to the font generators 16 and 21 is described as an example. However, it is also possible to apply the address assignment according to the second embodiment. However, in that case, 15-bit addresses A0 to A14 are supplied to the font generators 16 and 21, and the multiplexers 18 and 23 may select output data according to the combination of the most significant bits A13 and 14. .
[0049]
【The invention's effect】
  As is clear from the above, the font generator of the invention according to claim 1apparatusIndicates that one character area, the maximum value of the dot matrix pattern, is 2 in the vertical or horizontal direction.^mThe font generator's address space2 ^mDivided into equal parts and this equally divided address area2 corresponding to ^m Storage areasIn each of the above partial character areasRepresents font dataWord data is stored and input addressSpecific address identified byEach of the above divided m bitsaddressSince one dot matrix pattern is allocated to the area, the address space of the font generator is2 ^m In each address area equally divided intoCorresponding 2 ^m Storage areasStored in a distributed manner.
  Therefore, the above-described vacant area generated when a dot matrix pattern having a size that does not fit the power of 2 is stored.Top of specific addressSpecify m bitsofBy assigning a value, free space of all characters isStorage areaThe above specified inofAddress area specified by valueStorage area corresponding toCan be collected. That is, according to the present invention, the font generatorStorage areaA continuous free space can be formed on the top and effective use of the free space can be achieved.The
[0050]
  further,2 above ^m Rewrite the storage area other than the storage area in which the word data representing the font data is stored as a non-volatile memory and accessed at the same address as the row address and character address of the specific address. And the output data from the rewritable memory, the font data from the font generator, and the non-volatile memory of the font generator based on the most significant m bits of the input address and the selection signal. Output data selection means for selecting any data other than the font dataTherefore, a free area generated when a dot matrix pattern having a size that does not conform to the power of 2 is stored can be released to the user as a nonvolatile memory, so that the free area can be effectively used.
  Further, since the address of the non-volatile memory and the address for the rewritable memory can be shared, the address generation circuit for the rewritable memory becomes unnecessary. Therefore, the circuit configuration is simplified.
[Brief description of the drawings]
FIG. 1 is a diagram showing an address space in a font generator of the present invention.
2 is an explanatory diagram of a method of assigning a character dot matrix pattern of 12 vertical dots × 12 horizontal dots for the address space shown in FIG. 1; FIG.
FIG. 3 is an explanatory diagram of a character dot matrix pattern assignment method different from FIG. 2;
FIG. 4 is a block diagram of a font generator device in which a character dot matrix pattern is stored according to FIG.
5 is a block diagram of a font generator device different from FIG.
6 is a diagram illustrating an address space of a font generator and a RAM in FIG. 5;
FIG. 7 is an explanatory diagram of a storage state in a conventional font generator.
FIG. 8 is a block diagram of a conventional font generator device.
9 is a diagram showing a storage state when a character dot matrix pattern of 12 vertical dots × 12 horizontal dots is stored by the storage method shown in FIG.
10 is an explanatory diagram of an empty area on the address space of the font generator when a character dot matrix pattern is stored in the storage state shown in FIG. 9. FIG.
[Explanation of symbols]
11, 16, 21 ... Font generator,
12, 21a: Font storage area, 13: Free area,
14, 15 ... 1 character area, 17, 22 ... RAM,
18, 23: Multiplexer, 21b: User area.

Claims (1)

A font generator that stores multiple dot matrix patterns
The font generator is continuously assigned addresses,
Address space 2 ^m pieces of the font generator (m is a positive integer) are equally divided address region is defined,
In the storage area corresponding to the address area, word data representing font data of each partial character area obtained by equally dividing one character area which is the maximum value of the dot matrix pattern into 2 ^m pieces in the vertical direction or the horizontal direction. Is stored,
Most significant m bits of a particular address specified by the input address input to read the dot matrix pattern, and assigned to the divided respective address regions,
The least significant n bits ( where n is a positive integer ) of the specific address are assigned to the row address,
Bits other than the lowest n bits and the highest m bits in the specific address are assigned to the character address,
Of the 2 ^m pieces of memory area corresponding to the 2 ^m pieces of address area, the storage area other than the storage area the word data representing the font data is stored, acts as a non-volatile memory,
A rewritable memory that is accessed at the same address ( A0 to A13 ) as the row address and character address of the specific address ;
In response to the most significant m bits of the input address and the selection signal ( SLC ) , the value of the most significant m bits of the input address is a specific value, and the selection signal should select the rewritable memory When the selection signal is a selection signal, the output data from the rewritable memory is selected. On the other hand, when the selection signal is a selection signal for selecting the font generator, the output data from the font generator is selected. With output data selection means
Further comprising
When the most significant m-bit value of the input address is the specific value and the selection signal is a selection signal for selecting the font generator, it is specified by the input address in the font generator. While data other than the font data is output from the non-volatile memory of the 2 ^m storage areas,
When the value of the most significant m bits of the input address is a value other than the specific value and the selection signal is a selection signal for selecting the font generator, the input address in the font generator is font generator device according to claim <br/> to the font data from the storage area where the word data of the above specified 2 ^m pieces of storage area is stored is output that.

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