JP3844640B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a thin film semiconductor device having an operating semiconductor film and a method for manufacturing the same, and is particularly suitable for a thin film transistor in which a source / drain is formed in an operating semiconductor film and a gate electrode is formed on a channel region. It is.
[0002]
[Prior art]
Thin film transistors (TFTs) are formed on extremely thin and fine semiconductor films, so they are expected to be mounted on large-screen liquid crystal panels in consideration of recent demands for large areas. ing.
[0003]
As an operating semiconductor film of a TFT, the use of a polycrystalline silicon film has been studied because it has a higher carrier mobility and is thermally stable than an amorphous silicon film. At present, the following method is used as a method of forming an operating semiconductor film using a polycrystalline silicon film.
[0004]
(1) A method is employed in which a heat treatment at about 600 ° C. to 1100 ° C. is applied to an amorphous silicon film for crystallization to form a polycrystalline silicon film. In this method, crystallization is achieved by forming crystal nuclei in the initial stage of heat treatment and growing them.
[0005]
(2) The amorphous silicon film is melted by applying laser energy and crystallized at the time of cooling to form a polycrystalline silicon film.
[0006]
(3) A polycrystalline silicon film is directly formed at a temperature of 600 ° C. or higher by chemical vapor deposition or physical vapor deposition.
[0007]
[Problems to be solved by the invention]
Here, the method of forming a semiconductor thin film on a glass substrate is taken as an example, and the problems of conventional techniques are discussed. In order to use glass, the temperature of the substrate is limited to 600 ° C. or less.
[0008]
The crystal growth method described in (1) requires a heat treatment temperature of 600 ° C., which corresponds to a heat treatment at a high temperature for the glass, and the glass is deformed. In addition, since the grown crystal contains a large amount of stacking faults and twins, it cannot be expected to form a polycrystalline silicon film with good crystallinity.
[0009]
In the crystal growth method described in (3), columnar crystals are formed and the crystal grain size is small, so that the crystallinity is not sufficient and crystals exhibiting high electron mobility cannot be formed.
[0010]
In the method using laser annealing described in (2), the laser that can be used in consideration of not increasing the temperature of the substrate is limited to pulse laser annealing represented by excimer laser. When an excimer laser is used, since a crystal is grown via a melt phase, a high-quality polycrystalline silicon film can be obtained. However, there is a problem that the energy region in which a high-quality polycrystalline silicon film can be obtained is very narrow. In addition, when an excimer laser is used, only the surface silicon thin film region melts to a high temperature, but the temperature of the glass itself is low. Therefore, the cooling rate of the silicon melt is increased.
[0011]
Therefore, melt growth occurs in a supercooled state, a large amount of crystal nuclei are formed, and the crystal grain size is small. Usually, the crystal grain size is about 300 nm to 500 nm. When a polycrystalline silicon thin film is formed using an excimer laser having the best crystallinity, the electron mobility of the thin film transistor is 200 cm.²/ Vs, and the electron mobility of single crystal silicon is 600 cm.²It is much smaller than / Vs. This is because the crystal grain size is small and the crystal grain boundary part acts as a strong carrier scatterer.
[0012]
As described above, conventionally, the operating semiconductor film is composed of a polycrystalline silicon film, but the decrease in electron mobility due to grain boundaries cannot be suppressed, and it is difficult to reliably obtain a high-quality polycrystalline silicon film. There is a serious problem that there is.
[0013]
An object of the present invention is to provide a method for forming a semiconductor thin film capable of obtaining high electron mobility even when it is formed at a low temperature, a semiconductor device using the semiconductor thin film, and a method for manufacturing the same.
[0016]
[Means for Solving the Problems]
  UpThe purpose is to manufacture a thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate, in which a constricted constricted portion is formed, and a portion that becomes a channel region is narrower than other portions. A step of forming an island-shaped semiconductor film on the insulating substrate, and covering the semiconductor film with a separation film and forming a heat insulating film so as to surround only the side surface of the semiconductor film with the separation film interposed therebetween. And forming the operating semiconductor film by irradiating the semiconductor film with an energy beam from the upper surface to crystallize the semiconductor film. The
[0018]
In the method for manufacturing a semiconductor device, the heat insulating film may be formed thicker than the semiconductor film.
[0019]
  The above object is also a method of manufacturing a thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate,A constricted portion that is constricted in a cut shape is formed, and a part that becomes a channel region is formed narrower than other parts,Forming an island-shaped semiconductor film on the insulating substrate; covering the semiconductor film with a separation film; and covering the entire surface of the semiconductor film with a heat insulating film through the separation film; And a step of crystallizing the semiconductor film by irradiating an energy beam from the lower surface of the insulating substrate to form the operating semiconductor film.
[0021]
From the above consideration, if the generation of crystal grain boundaries that cause a decrease in electron mobility can be suppressed, the electron mobility is improved, and the performance of the semiconductor element is improved. For this purpose, the operating semiconductor film may be composed of crystal grains having a large grain size, and the ultimate form is a single crystal semiconductor.
[0022]
In one embodiment of the present invention, at least a channel region of the operating semiconductor film is formed using crystal grains having a large grain size in which the growth direction is controlled. As a result, the generation of crystal grain boundaries perpendicular to the current direction is suppressed, and a semiconductor that is substantially in a single crystal state, that is, a crystal state that includes only a grain boundary having an inclination of less than 90 ° with respect to the current direction. A channel region is formed from a single crystal semiconductor, and since it is in a quasi-single crystal state, a semiconductor device with high mobility can be realized.
[0023]
In order to form crystal grains having a large grain size, it is necessary to reduce the cooling rate of the melt by some method. As one of the methods, a heat insulating film having a large heat capacity is formed, and a film to be crystallized is placed in contact with the film or in a position very close to the heat insulating film, and a temperature distribution is formed on the silicon island. To exist. This makes it possible to control the nucleation position and the direction of crystal growth by lowering the cooling temperature and controlling the temperature distribution, and crystal grains having a large grain size are formed. In the present invention, a heat insulating film having a large heat capacity and functioning as a heat bath is formed on the side surface of an island-shaped semiconductor film, which is a material of an operating semiconductor film, via a separation film, The cooling rate is reduced and the temperature distribution of the semiconductor film is controlled to control the nucleation position and the crystal growth direction. As a result, an operating semiconductor film having a large crystal grain size and a substantially quasi-single crystal state can be obtained.
[0024]
In another aspect of the present invention, if at least the channel region of the operating semiconductor film is a circular crystal grain, the radius of the crystal grain is L, 250 nm <L, and the channel width is W, W A polycrystal state composed of circular crystal grains having a diameter of <4L is formed. That is, the width of the channel region is extremely narrow and is occupied by almost one circular large grain crystal grain in the width direction. Therefore, the channel region is substantially configured as a large grain crystal state, and has a high mobility. A semiconductor device can be realized.
[0025]
In the present invention, a heat insulating film is formed through the separation film so as to cover the island-shaped semiconductor film that is the material of the operating semiconductor film, and the energy beam is irradiated from the lower surface, thereby reducing the cooling rate of the melt. It is possible to obtain an operating semiconductor film in a polycrystalline state made of circular large grain crystals having a diameter of about several μm.
[0026]
In the present invention, since the crystal grows by scanning a continuous wave laser from the narrow region of the silicon layer toward the wide region, the laterally grown crystal can be taken over and the crystal Defects can be eliminated outside the silicon layer. Therefore, according to the present invention, a silicon thin film having single crystal silicon can be formed. Note that the width of the silicon layer is not necessarily changed, and may be a uniform width.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings.
[0028]
[First Embodiment]
In the first embodiment of the present invention, a thin film transistor (TFT) is exemplified as a semiconductor device, and the configuration thereof will be described together with a manufacturing method. In describing the manufacturing method, first, the structure and the forming method of the operating semiconductor film of the TFT, which is a feature of the present invention, will be described.
[0029]
FIG. 1 and FIG. 2 are process cross-sectional views showing a method for forming this operating semiconductor film.
[0030]
First, as shown in FIG. 1A, after a silicon oxide film 2 serving as a buffer layer is formed on a glass substrate 1 to a thickness of about 200 nm, an amorphous silicon film 3 is formed as a semiconductor film to a thickness of about 80 nm by PECVD ( It is formed by Plasma Enhanced Chemical Vapor Deposition. The film thickness of the amorphous silicon film 3 is preferably about 30 nm to 200 nm from the relationship with the film thickness of a heat retaining film described later. Next, heat treatment is performed on the glass substrate 1 at 450 ° C. for 2 hours for hydrogen extraction.
[0031]
Subsequently, as shown in FIG. 1B, the amorphous silicon film 3 is processed into an island shape. In the present embodiment, patterning is performed by photolithography and dry etching so that the width at the cross-sectional portion corresponding to the channel region in the drawing becomes gradually narrower. At this time, over-etching is performed.
[0032]
Subsequently, as shown in FIG. 1C, a silicon oxide film 4 serving as an isolation film is formed by PECVD so as to have a film thickness of about 30 nm so as to cover the entire surface (side surface and upper surface) of the amorphous silicon film 3. To do.
[0033]
Subsequently, as shown in FIG. 1D, an amorphous silicon film is formed to a thickness of about 300 nm so as to cover the amorphous silicon film 3 via the silicon oxide film 4 by PECVD, and nickel (Ni) is used. The amorphous silicon film is changed to the polycrystalline silicon film 5 by metal induced solid phase growth. A metal impurity that induces solid phase growth may be other than Ni. At this time, the solid phase growth temperature is 570 ° C., and the heat treatment time is 8 hours. By this treatment, the amorphous silicon film having a film thickness of about 300 nm is changed to the polycrystalline silicon film 5, but the amorphous silicon film 3 covered with the silicon oxide film 4 as the separation film prevents the silicon oxide film 4 from diffusing Ni. In order to do so, it is kept in an amorphous silicon state.
[0034]
Here, the polycrystalline silicon film 5 may be formed from the beginning so as to cover the amorphous silicon film 3 by chemical vapor deposition or physical vapor deposition.
[0035]
Further, the heat insulating film is not necessarily made of polycrystalline silicon, and may be amorphous silicon. Moreover, you may comprise a heat retention film | membrane using another material.
[0036]
Subsequently, as shown in FIG. 2A, the polycrystalline silicon film 5 is polished and planarized by a CMP (Chemical Mechanical Polishing) method. At this time, since the silicon oxide film 4 functions as a CMP stopper, the CMP is stopped on the silicon oxide film 4 and surface planarization is realized.
[0037]
Subsequently, as shown in FIG. 2B, an excimer laser is irradiated as an energy beam from the upper surface with the polycrystalline silicon film 5 surrounding the amorphous silicon film 3 as a heat insulating film through the silicon oxide film 4 from the side surface. Then, the amorphous silicon film 3 is crystallized.
[0038]
The temperature distribution in the amorphous silicon film 3 during crystallization is as shown in FIG. Time t immediately after laser irradiation₁The temperature difference between the amorphous silicon film 3 and the heat insulating film (polycrystalline silicon film) 5 is very small, but the time t₂, T_ThreeAs the temperature proceeds, the temperature drop rate of the amorphous silicon film 3 becomes considerably larger than that of the heat retaining film 5. This is because the heat capacity is large because the heat insulating film 5 is thicker than the amorphous silicon film 3. Therefore, the heat insulating film 5 has a slower cooling rate than the amorphous silicon film 3 and serves as a heat bath. For this reason, in the amorphous silicon film 3, a temperature gradient is formed in the direction from the edge part to the inside, specifically, the vicinity of the edge part is high, and the temperature distribution becomes low as it goes to the inside. Therefore, as shown in FIG. 4, solidification is delayed at the edge portion of the amorphous silicon film 3, and crystallization proceeds in a method from the inside toward the edge portion.
[0039]
At this time, in the portion corresponding to the channel region when the active semiconductor film is formed, as shown in FIG. 5, solidification progresses in the direction (longitudinal direction) along the edge portion, and the growth direction is controlled. Crystal grains having large grain sizes are formed, and crystal grain boundaries are formed along the solidification direction. That is, a few crystal grain boundaries are formed only in the direction along the current direction, and almost no crystal grain boundaries are generated in the direction perpendicular to the current direction. Therefore, quasi-single crystal silicon which is a substantially single crystal semiconductor. The operation semiconductor film 11 is formed.
[0040]
Here, as shown in FIG. 6, in order to control the temperature distribution of the amorphous silicon film 3, a heat absorber 13 made of an insulating material is embedded in the silicon oxide film 2 so as to be positioned below the amorphous silicon film 3. May be. As a result, the temperature drop rate of the amorphous silicon film 3 is further increased, a large temperature distribution is formed, and the certainty of quasi-single crystallization is ensured.
[0041]
Subsequently, as shown in FIG. 2C, the heat insulating film 5 is removed by dry etching. At this time, since the silicon oxide film 4 functioning as an isolation film is interposed between the operating semiconductor film 11 and the heat insulating film 5, the operating semiconductor film 11 surrounded by the silicon oxide film 4 is not etched. Thereafter, as shown in FIG. 2D, the silicon oxide film 4 is peeled and removed by wet etching using HF, thereby completing the operation semiconductor film 11.
[0042]
(Modification)
Here, various quasi-single crystal silicon films having different patterning shapes will be described in consideration of good crystal growth.
[0043]
(Modification (Part 1))
First, a modification example (No. 1) will be described. Since the sample preparation method is almost the same as the above-described method, a description thereof will be omitted.
[0044]
Here, as shown in FIGS. 7A and 7B, the amorphous silicon film 3 is patterned into an island shape having a shape in which the width gradually decreases at the central portion, that is, the portion that becomes the channel region. FIG. 7B is an enlarged view of the inside of the circle C in FIG.
[0045]
At this time, as shown in FIG. 8, the crystal growth mechanism is a lateral growth mechanism from the inside of the amorphous silicon film 3 described above to the edge portion. At point A in the figure, it is possible to perform lateral growth toward both edge portions. Therefore, one crystal nucleus is formed at the point A, and one single crystal grain is formed in a region approximately twice the lateral growth distance. In the region where the width is further narrowed, the heat retaining effect by the heat retaining film 5 present at the edge portion becomes stronger, so that the solidification is delayed. For this reason, one single crystal grain formed at point A propagates to a narrow region, and one single crystal grain is formed at a site where the width gradually decreases. This is similar to the growth mechanism shown in FIG.
[0046]
(Modification (Part 2))
Next, a modified example (No. 2) will be described. Since the sample preparation method is almost the same as the above-described method, a description thereof will be omitted.
[0047]
Here, as shown in FIG. 9, the amorphous silicon film 3 is patterned into an island shape that has a shape that has a necking portion 12 that is narrowed in a cut shape while the width gradually decreases at a portion that becomes a channel region. Note that FIG. 9 corresponds to the circle C described above.
[0048]
At this time, as the crystal growth mechanism, as shown in FIG. 10, since one crystal grain is selected by the necking portion 12, a single crystal grain can be formed. The property that one single crystal grain formed by the necking portion 12 spreads and forms in a region where the width becomes narrow is the same as the mechanism of the modification (part 1).
[0049]
(Modification (Part 3))
Next, a modification (No. 3) will be described. Since the sample preparation method is almost the same as the above-described method, a description thereof will be omitted.
[0050]
Here, as shown in FIG. 11, another example of the amorphous silicon film 3 provided with the necking portion 12 is shown. Here, the reduction ratio of the width of the portion to be the channel region is smaller than that of the modification (No. 2), and the patterning is performed so as to be wide. Note that FIG. 11 corresponds to the circle C described above.
[0051]
At this time, the crystal growth mechanism is as shown in FIG. 12, and one crystal nucleus is formed and propagated from the point A in the necking portion 12, so that the quasi-single crystal region is greatly expanded.
[0052]
A TFT is manufactured using the operating semiconductor film 11 formed as described above. Here, a case where an n-channel TFT is manufactured will be described as an example. 13 to 16 are process cross-sectional views illustrating the TFT manufacturing method according to this embodiment.
[0053]
First, as shown in FIG. 13A, an operating semiconductor film 11 formed by the above-described method is prepared on a glass substrate 21 via a silicon oxide film 22 serving as a buffer. Here, the operating semiconductor film 11 formed according to the modification (part 1) is used.
[0054]
Subsequently, as shown in FIG. 13B, a silicon oxide film 23 serving as a gate oxide film is formed on the operating semiconductor film 11 to a thickness of about 120 nm by PECVD. At this time, other methods such as LPCVD (Low Pressure Chemical Vapor Deposition) or sputtering may be used.
[0055]
Subsequently, as shown in FIG. 13C, an aluminum film (or aluminum alloy film) 24 is formed by sputtering to have a film thickness of about 300 nm.
[0056]
Subsequently, as shown in FIG. 14A, the aluminum film 24 is patterned into an electrode shape by photolithography and subsequent dry etching to form a gate electrode 24. At this time, processing is performed so that the gate electrode 24 is positioned above the portion shown in the circle C in FIG. 7A, that is, the quasi-single crystal grain grows greatly and the portion (channel region) where single crystallization is remarkable.
[0057]
Subsequently, as shown in FIG. 14B, the silicon oxide film 23 is patterned using the patterned gate electrode 24 as a mask to form a gate oxide film 23 following the shape of the gate electrode.
[0058]
Subsequently, as shown in FIG. 14C, ion doping is performed on both sides of the gate electrode 24 of the operating semiconductor film 11 using the gate electrode 24 as a mask. Specifically, an n-type impurity, here phosphorus (P), is accelerated energy 10 keV, dose amount 5 × 10.¹⁵/ Cm²Source / drain regions are formed by ion doping under the following conditions.
[0059]
Subsequently, as shown in FIG. 15A, after excimer laser irradiation is performed to activate phosphorus in the source / drain regions, the film thickness is formed so as to cover the entire surface as shown in FIG. SiN is deposited to a thickness of about 300 nm, and an interlayer insulating film 25 is formed.
[0060]
Subsequently, as shown in FIG. 16A, contact holes 26 that expose the gate electrode 24 and the source / drain regions of the operating semiconductor film 11 are formed in the interlayer insulating film 25.
[0061]
Subsequently, as shown in FIG. 16B, after forming a metal film 27 such as aluminum so as to bury each contact hole 26, the metal film 27 is patterned as shown in FIG. A wiring 27 is formed to be electrically connected to the gate electrode 24 and the source / drain region of the operating semiconductor film 11 through the contact hole 26.
[0062]
Thereafter, an n-type TFT is completed through formation of a protective film covering the entire surface. Specifically, the n-type TFT is manufactured so that the operating semiconductor film 11 has a channel length of about 10 μm and a channel width of about 30 μm, and the electron mobility is measured.²A high mobility of / Vs was achieved.
[0063]
As described above, according to the present embodiment and various modifications thereof, at least the channel region of the operating semiconductor film 11 is composed of crystal grains having a large grain size in which the growth direction is controlled, so that it is orthogonal to the current direction. The generation of crystal grain boundaries is suppressed, and the channel region is composed of substantially single-crystal silicon, that is, quasi-single-crystal silicon. An apparatus can be realized.
[0064]
[Second Embodiment]
Next, a second embodiment of the present invention will be described. In the present embodiment, the structure and manufacturing method of the TFT are exemplified as in the first embodiment, but the structure and the forming method of the operating semiconductor film are different. In addition, about the structural member etc. similar to 1st Embodiment, the same code | symbol is described and description is abbreviate | omitted.
[0065]
FIG. 17 is a schematic plan view showing the main configuration of the n-type TFT according to the present embodiment.
[0066]
  This n-type TFT is in a polycrystalline silicon state in which at least the channel region of the operating semiconductor film 31 is made of disk-shaped crystal grains 35 having a large circular particle diameter, and the source / drain regions 33 and 34 have a disk at the peripheral portion. The crystal grains 35 are formed, and the microcrystalline silicon 36 is formed inside. Here, the width of the channel region is extremely narrow and is occupied by almost one disk-like crystal grain 35 in the width direction, so that the channel region is substantially configured as several crystal grains. FIG. 18 shows a state in which the actually formed semiconductor film 31 is observed with a scanning electron microscope. AboveDiThe structures of the squirrel crystal grains 35 and the microcrystalline silicon 36 are clearly shown. Since the strip-shaped gate electrode 32 is provided on the channel region so as to be substantially orthogonal to each other, a high mobility TFT is realized.
[0067]
In order to form the operation semiconductor film 31 having such a configuration, first, similarly to the first embodiment, the strain point is about 600 ° C. to 700 ° C. through the respective steps of FIG. 1A to FIG. A silicon oxide film that forms a pattern of an amorphous silicon film 41 having a film thickness of about 100 nm on a substrate 1 made of glass transparent to visible light through a silicon oxide film 2 to form a separation film having a film thickness of about 20 nm. 4, an amorphous silicon film is formed to a thickness of about 300 nm. Thereafter, the amorphous silicon film is changed to a polycrystalline silicon film by metal-induced solid phase growth (550 ° C., 8 hours) using nickel (Ni), and the heat retaining film 42 is formed.
[0068]
The heat insulating film 42 is not necessarily made of polycrystalline silicon, and may be amorphous silicon. Moreover, you may comprise the heat insulation film | membrane 42 using another material.
[0069]
Subsequently, as shown in FIG. 19, with the heat insulating film 42 covering the surface (upper surface and side surface) of the amorphous silicon film 41, the excimer laser is irradiated as an energy beam from the lower surface to crystallize the amorphous silicon film 41. Let By this irradiation, energy for dissolving the heat insulating film 42 is added to the heat insulating film 42 so that the temperature of the amorphous silicon film 41 is higher than the melting point 1410 ° C. of silicon crystal. Since the heat insulating film 42 is thicker than the amorphous silicon film 41, the heat capacity is large and the cooling rate is slow. That is, it acts as a heat bath. As a result, in the region of the amorphous silicon film 41 close to the heat retaining film 42, the cooling rate is slow, and one crystal nucleus formed accidentally can sufficiently grow. As a result, as shown in FIG. 17, at least a narrow portion serving as a channel region is constituted by disk-shaped crystal grains 35 having a large circular particle diameter, and a wide portion serving as a source / drain is composed of microcrystalline silicon 36 and disk-shaped crystal grains 35. The operation semiconductor film 31 is formed in a polycrystalline state formed so as to be surrounded by The disk-shaped crystal grains 35 are circular crystal grains where 250 nm <L where L is the radius of the crystal grains and W <4L where W is the channel width.
[0070]
Here, as in FIG. 6 of the first embodiment, in order to control the temperature distribution of the amorphous silicon film 41, heat absorption made of an insulating material in the silicon oxide film 2 so as to be positioned below the amorphous silicon film 41. The body may be buried. As a result, the temperature drop rate of the amorphous silicon film 41 is further increased, a large temperature distribution is formed, and the certainty of crystallization with a large circular particle diameter is ensured.
[0071]
Thereafter, after the protective film 42 is removed by RIE using the silicon oxide film 4 as a stopper, the silicon oxide film 4 is removed by wet etching using HF.
[0072]
FIG. 20 shows an example in which a TFT is formed by the same manufacturing process as that of the first embodiment using the operation semiconductor film 31 thus obtained.
[0073]
Similar to the TFT shown in FIG. 16C of the first embodiment, the TFT is manufactured so that the operating semiconductor film 11 has a channel length of about 10 μm and a channel width of about 30 μm, and the electron mobility is measured. 450cm²A high mobility of / Vs was achieved.
[0074]
As described above, according to the present embodiment, a semiconductor device with high mobility can be realized by configuring at least the channel region of the operating semiconductor film 31 from the disk-shaped crystal grains 35 having a large circular particle diameter. .
[0075]
[Third Embodiment]
A method for forming a silicon thin film according to a third embodiment of the present invention will be described with reference to FIGS. 21 to 24 are process cross-sectional views illustrating the method for forming the silicon thin film according to the present embodiment. FIG. 25 is a plan view showing the patterning shape of the silicon layer.
[0076]
First, a buffer layer 112 made of a silicon oxide film having a thickness of 400 nm is formed on a glass substrate 110 having a thickness of 0.7 mm by PECVD.
[0077]
Next, a silicon layer 114 made of an amorphous silicon layer having a thickness of 150 nm is formed on the buffer layer 112 by PECVD.
[0078]
Next, heat treatment is performed at 450 ° C. for 2 hours, thereby removing hydrogen from the silicon layer 114 (see FIG. 21A).
[0079]
Next, the silicon layer 114 is patterned by using a photolithography technique (see FIG. 21B). At this time, the silicon layer 114 is patterned into a planar shape as shown in FIG.
[0080]
That is, the width of the silicon layer 114 is changed in the region 115c between the regions 115a and 115b to be the source / drain. Specifically, in the silicon layer 114 in the region 115c, the width of the silicon layer 114 is narrowed in the region 117a on the lower side of the drawing, and the width of the silicon layer 114 is gradually increased in the central region 117b. In the region 117c, the width of the silicon layer 114 is increased.
[0081]
Next, the surface of the buffer layer 112 is etched using an HF-based etchant using the silicon layer 114 as a mask to form a step in the buffer layer 112 (see FIG. 21C).
[0082]
Next, a separation film 116 made of a silicon oxide film having a thickness of 30 nm is formed on the entire surface by PECVD (see FIG. 22A). The separation film 116 is not limited to a silicon oxide film, but it is desirable to use a material having a melting point higher than that of the silicon layer 114. This is because if the separation film 116 is dissolved when the silicon layer 114 is crystallized, the silicon layer 114 and the heat insulating layer 118a (see FIG. 23B) are integrated. Further, the separation film 116 desirably functions as an etching stopper when the heat insulating layer 118a is etched.
[0083]
Next, a heat insulating layer 118 made of an amorphous silicon film having a thickness of 250 nm is formed on the entire surface by PECVD. The film formation conditions are, for example, SiH_FourGas and H₂The flow rate ratio to the gas is set to 2:98, and the temperature in the deposition chamber is set to 350 ° C., for example.
[0084]
Next, an impurity layer 120 made of a 3 nm-thickness Ni film is formed on the entire surface by sputtering (see FIG. 22B).
[0085]
Next, heat treatment is performed at 550 ° C. for 8 hours, and Ni in the impurity layer 220 is solid-phase diffused into the heat insulating layer 118. Thus, a heat insulating layer 118a made of a polycrystalline silicon layer is formed by solid phase growth of amorphous silicon using Ni (see FIG. 23A).
[0086]
By this heat treatment, the heat insulating layer 118a is in a polycrystalline silicon state, but the silicon layer 114 covered with the separation film 116 is kept in an amorphous silicon state because the separation film 116 prevents the diffusion of Ni. .
[0087]
FIG. 26 is a graph obtained by measuring the crystal states of the heat insulating layer, the separation film, and the silicon layer by Raman scattering spectroscopy. The horizontal axis in FIG. 26 indicates the relative position with respect to the glass substrate surface, the left vertical axis indicates the Raman frequency, and the right vertical axis indicates the half width. The crystal state was measured from the back side of the glass substrate.
[0088]
As shown in FIG. 26, the half-value width is small in the heat retaining layer 118a, and the half-value width is large in the silicon layer 114. From this, it can be seen that the heat treatment layer 118a is in a polycrystalline silicon state and the silicon layer 114 is maintained in an amorphous silicon state by the heat treatment.
[0089]
Next, at room temperature, the silicon layer 114 is irradiated with a continuous wave (CW) laser from the lower surface side of the glass substrate 110, that is, the surface on which the buffer layer 112 is formed, to thereby form the silicon layer 114. Is crystallized (see FIG. 23A).
[0090]
In the present embodiment, since a continuous wave laser is used, when the laser is absorbed by the glass substrate 110, the glass substrate 110 becomes high temperature, and as a result, the glass substrate 110 is deformed. Therefore, in this embodiment, the glass substrate 110 is prevented from being deformed by using a laser having a high transmittance with respect to the glass substrate 110.
[0091]
FIG. 27 is a graph showing the relationship between the laser wavelength and the transmittance with respect to the glass substrate. The horizontal axis indicates the wavelength of the laser, and the vertical axis indicates the laser transmittance with respect to the glass substrate. Examples 1 to 3 are measured using glass substrates made of different materials.
[0092]
As can be seen from FIG. 27, even when any one of the glass substrates of Examples 1 to 3 is used, a high transmittance is obtained as long as the laser wavelength is 400 nm or more. From this, it is considered that if a laser having a wavelength of 400 nm or more is used, the glass is difficult to be absorbed by the glass substrate and the glass substrate can be prevented from becoming high temperature, so that deformation of the glass substrate can be avoided. . Note that the wavelength of the laser to be irradiated is not limited to 400 nm or more, and may be an appropriate wavelength according to the characteristics of the material of the glass substrate used.
[0093]
From this viewpoint, in this embodiment, for example, a laser having a wavelength of 532 nm is used. As the laser having such a wavelength, for example, the second harmonic of an Nd: YAG semiconductor laser can be used.
[0094]
Here, the mechanism of crystallization of the silicon layer according to the present embodiment will be explained with reference to FIG. FIG. 28 is a plan view showing the crystallization mechanism of the silicon layer.
[0095]
In this embodiment, the laser is scanned from the lower side in FIG. 28 toward the upper side in the drawing. The arrows in the figure indicate the laser scanning direction.
[0096]
When the silicon layer 114 in the region 117a having a narrow width among the silicon layer 114 in the region 115c is irradiated with laser, a temperature gradient as shown in FIG. 29 is formed in the silicon layer 114. FIG. 29 is a conceptual diagram showing the temperature gradient of the silicon layer when irradiated with a laser.
[0097]
The temperature gradient as shown in FIG. 29 is formed by the following mechanism.
[0098]
That is, since the silicon layer 114 is covered with the heat insulating layer 118a via the separation film 116, when the laser is irradiated, the silicon layer 114 is heated to a high temperature and melts. Since the laser beam is blocked by 114, it is difficult to reach a high temperature.
[0099]
On the other hand, the heat retaining layer 118a on both sides of the silicon layer 114 is heated to a high temperature because it is irradiated with laser. Moreover, since the heat retaining layer 118a is formed thick, it has a large heat capacity and a low cooling rate.
[0100]
Accordingly, the heat insulating layer 118a on both sides of the silicon layer 114 functions as a heat bath for the silicon layer 114, while the heat insulating layer 118a in the region above the silicon layer 114 increases the cooling rate with respect to the silicon layer 114. To function. For this reason, in the process of cooling the silicon layer 114, the temperature inside the silicon layer 114 is lowered, while the edge portion of the silicon layer 114 is kept at a high temperature.
[0101]
When such a temperature gradient is formed, the temperature of the inside of the silicon layer 114 is lower than that of the edge portion of the silicon layer 114, so that crystal growth proceeds from the inside of the silicon layer 114 to the outside.
[0102]
Such crystal growth may start when the region 117a is scanned with a laser, or may start when the laser is scanned to the vicinity of the region 117b.
[0103]
When the laser is scanned into the region 117b where the width of the silicon layer 114 gradually increases, the crystal grows further, and the crystal grain boundary is excluded outside the silicon layer 114.
[0104]
As the laser is further scanned, the crystal is taken over and the single crystal silicon 114a is formed in the region where the width of the silicon layer 114 is widened.
[0105]
Next, as shown in FIG. 24, the heat retaining layer 118a is etched by RIE (Reactive Ion Etching) using the separation film 116 as an etching stopper.
[0106]
Next, the separation film 116 is etched by HF wet etching.
[0107]
Thus, the silicon thin film according to the present embodiment is formed.
[0108]
The silicon thin film thus formed can be used as a channel layer of a thin film transistor.
[0109]
FIG. 30 is a plan view showing the positional relationship between the silicon thin film formed in this embodiment and the gate electrode.
[0110]
As shown in FIG. 30, a gate electrode 130 is formed on the single crystal silicon 114a through a gate insulating film (not shown). With this structure, since the single crystal silicon 114a serves as a channel, a thin film transistor with high electron mobility can be provided.
[0111]
Note that a method of manufacturing a thin film transistor using the silicon thin film formed in the present embodiment will be described in detail in the fourth embodiment.
[0112]
(Evaluation results)
Next, the crystal state of the silicon thin film formed as described above will be described with reference to FIG. FIG. 31 is a photomicrograph showing the crystal state of the silicon thin film formed according to this embodiment. This micrograph was observed by SEM (Scanning Electron Microscopy) method. Moreover, in order to clarify the defect, secco etching is performed.
[0113]
As shown in FIG. 31, the crystal grows greatly from the narrowed region toward the widened region, forming a single crystal.
[0114]
As described above, according to the present embodiment, since the crystal grows by scanning the continuous wave laser from the narrow region of the silicon layer toward the wide region, the crystal can be taken over and the crystal Grain boundaries can be excluded outside the silicon layer. Therefore, according to this embodiment, a silicon thin film having single crystal silicon can be formed.
[0115]
(Modification (Part 1))
Next, a method for forming a silicon thin film according to a modification (No. 1) of this embodiment will be described with reference to FIG. FIG. 32 is a plan view showing a method for forming a silicon thin film according to this modification.
[0116]
The silicon thin film forming method according to this modification is mainly characterized in that the heat insulating layer 118a is formed so as to cover at least the region 115c without forming the heat insulating layer 118a on the entire surface.
[0117]
When the continuous wave laser is irradiated, a larger amount of heat is accumulated in the heat insulating layer 118a than when the short pulse laser is irradiated.
[0118]
For this reason, when the heat insulating layer 118a is formed on the entire surface, the glass substrate 110 may be held at a high temperature for a long time, and the glass substrate 110 may be deformed.
[0119]
Therefore, in this modification, the heat insulating layer 118a is formed so as to cover at least the region 115c without forming the heat insulating layer 118a on the entire surface.
[0120]
If the heat insulating layer 118a is formed so as to cover at least the region 115c as in this modification, the silicon layer 114 in the region 115c can be melted at a high temperature, and crystal growth can be performed in the same manner as described above. There is no particular problem because it is possible.
[0121]
Next, the crystal state of the silicon thin film formed according to this modification will be described with reference to FIG. FIG. 33 is a photomicrograph showing the crystalline state of the silicon thin film formed according to this modification.
[0122]
Also in the case of the silicon thin film formed by this modification, as with the silicon thin film formed by the first embodiment shown in FIG. 31, from the region where the width is narrowed toward the region where the width is wide, The crystal grows large and becomes a single crystal.
[0123]
In this manner, even when the heat insulating layer 118a is formed so as to cover at least the region 115c, the single crystal silicon 114a can be formed.
[0124]
Therefore, according to this modification, it is possible to prevent the glass substrate from being deformed, and to provide a high-quality liquid crystal display device.
[0125]
(Modification (Part 2))
Next, a method for forming a silicon thin film according to a modification (No. 2) of the present embodiment will be described with reference to FIG. FIG. 34 is a conceptual diagram showing a method for forming a silicon thin film according to this modification.
[0126]
The main feature of the method for forming a silicon thin film according to this modification is that a necking portion 119 constricted in a cut shape is formed in a region 117b where the width of the silicon layer 114 gradually increases.
[0127]
In the present modification, since the width of the silicon layer 114 is partially narrowed by the necking portion 119, the crystal grain boundary 121 is blocked.
[0128]
For this reason, the single crystal silicon 114a can be reliably formed in the region above the paper surface from the necking portion 119.
[0129]
Thus, according to the present modification, the crystal grain boundary can be blocked by forming the necking portion, so that the single crystal silicon 114a can be formed more reliably.
[0130]
If the single crystal silicon 114a thus formed is used for a channel, a thin film transistor with high electron mobility can be provided.
[0131]
(Modification (Part 3))
Next, a method for forming a silicon thin film according to a modification (No. 3) of the present embodiment will be described with reference to FIG. FIG. 35 is a conceptual diagram showing a method for forming a silicon thin film according to this modification.
[0132]
The main feature of the silicon thin film forming method according to this modification is that the silicon layer 114 is formed so that the width of the silicon layer 114 gradually increases in the region reaching the source / drain region 115a from the center of the region 115c. There is.
[0133]
In the method for forming a silicon thin film according to the third embodiment shown in FIG. 25, the region 117b in which the width of the silicon layer 114 gradually increases is only the central portion of the region 115c. The width of the silicon layer 114 is gradually increased in a wide range from the portion to the region 115a.
[0134]
Even when the silicon layer 114 is patterned in this manner, the single crystal silicon 114a can be formed.
[0135]
A necking portion 119 may be further formed.
[0136]
(Modification (Part 4))
Next, a method for forming a silicon thin film according to a modification (No. 4) of the present embodiment will be described with reference to FIG. FIG. 36 is a conceptual diagram showing a method for forming a silicon thin film according to this modification.
[0137]
The main feature of the method for forming a silicon thin film according to this modification is that the width of the silicon layer 114 is gradually increased in the region 115c extending from the region 115a to the region 115b.
[0138]
In the method for forming a silicon thin film according to the third embodiment shown in FIG. 25, the region 117b in which the width of the silicon layer 114 gradually increases is only the central portion of the region 115c. The width of the silicon layer 114 is gradually increased in a wide range reaching 115a.
[0139]
Even when the silicon layer 114 is patterned in this manner, the single crystal silicon 114a can be formed.
[0140]
(Modification (Part 5))
Next, a method for forming a silicon thin film according to a modification (No. 5) of the present embodiment will be described with reference to FIG. FIG. 37 is a conceptual diagram showing a method for forming a silicon thin film according to this modification.
[0141]
The method for forming a silicon thin film according to this modification is mainly characterized in that the width of the silicon layer 114 in the region 115c is substantially uniform and the necking portion 119 is formed in a part of the region 115c.
[0142]
In this modification, since the necking portion 119 is formed in the silicon layer 114 in the region 115c, the single crystal silicon 114a is formed in the region above the paper surface of the necking portion 119 even when the width of the region 115c is substantially uniform. Is formed. That is, when the laser is scanned in the direction of the arrow in the figure, the crystal grain boundary is blocked in the necking portion 119, and when the laser is further scanned, single crystal silicon is formed in the region above the paper surface of the necking portion 119. 114a is formed.
[0143]
As described above, according to the present modification, even when the width of the region 115c is formed to be substantially uniform, the single crystal silicon 114a can be formed by forming the necking portion 119.
[0144]
If the single crystal silicon 114a thus formed is used for a channel, a thin film transistor with high electron mobility can be provided.
[0145]
FIG. 38 is a plan view showing the positional relationship between the silicon thin film formed in this embodiment and the gate electrode.
[0146]
As shown in FIG. 38, a gate electrode 130 is formed on the single crystal silicon 114a through a gate insulating film (not shown). Since the single crystal silicon 114a serves as a channel, a thin film transistor with high electron mobility can be provided.
[0147]
Note that when the laser is scanned downward on the paper surface, the single crystal silicon 114 a is formed below the paper surface of the necking portion 119, so the gate electrode 130 may be formed below the paper surface of the necking portion 119.
[0148]
[Fourth Embodiment]
A method of manufacturing a thin film transistor according to the fourth embodiment of the present invention will be described with reference to FIGS. 39 to 42 are process cross-sectional views illustrating the method of manufacturing the thin film transistor according to the present embodiment. The same components as those of the first to third embodiments shown in FIGS. 1 to 38 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
[0149]
The thin film transistor manufacturing method according to the present embodiment is mainly characterized in that the silicon thin film formed according to the third embodiment is used for the channel layer. Here, a case where an n-type thin film transistor is manufactured will be described as an example.
[0150]
First, the silicon thin film formed according to the third embodiment is patterned into a desired shape (see FIG. 39A). For example, the channel length is 2 μm and the channel width is 2 μm. 39A corresponds to the region 115a in FIG. 25, and the left portion of the semiconductor layer 124 corresponds to the region 115b in FIG. Further, the central portion of the semiconductor layer 124 in FIG. 39A corresponds to the region 115c in FIG.
[0151]
Next, a gate oxide film 126 made of a 120 nm-thickness silicon oxide film is formed on the entire surface by PECVD. Note that the gate oxide film 126 may be formed by LPCVD, sputtering, or the like (see FIG. 36B).
[0152]
Next, an aluminum layer 128 having a thickness of 300 nm is formed on the entire surface by sputtering (see FIG. 36C).
[0153]
Next, the aluminum layer 128 is patterned into the shape of the gate electrode 130 by using a photolithography technique (see FIG. 37A). The gate electrode 130 is formed on the single crystal silicon 114a among the silicon thin films formed in the third embodiment. Accordingly, since the single crystal silicon 114a can be used for the channel, a thin film transistor with high electron mobility can be provided.
[0154]
Next, the gate oxide film 126 is etched by self-alignment with the gate electrode 130 (see FIG. 37B).
[0155]
Next, impurity ions are implanted into the semiconductor layer 124 in a self-aligned manner with the gate electrode 130. As the impurity, for example, phosphorus can be used.
[0156]
Next, excimer laser is irradiated from above the glass substrate 110 to activate the impurities introduced into the semiconductor layer 124. Thus, the source / drain diffusion layer 132 is formed in self-alignment with the gate electrode 130 (see FIG. 38A).
[0157]
Next, an interlayer insulating film 134 made of a 300 nm-thickness SiN film is formed on the entire surface (see FIG. 38B).
[0158]
Next, contact holes 136 reaching the source / drain diffusion layers 132 and the gate electrode 130 are formed in the interlayer insulating film 134 (see FIG. 39A).
[0159]
Next, a conductive layer formed by laminating a 100 nm thick Ti film, a 200 nm thick Al film, and a 100 nm thick Ti film is formed on the entire surface.
[0160]
Next, the conductive layer is patterned using a photolithography technique, thereby forming a gate electrode 138a and a source / drain electrode 138b made of the conductive layer (see FIG. 39B).
[0161]
Thus, the thin film transistor according to the present embodiment is manufactured.
[0162]
(Evaluation results)
Next, the electron mobility of the thin film transistor manufactured as described above was measured.
[0163]
As a result, the electron mobility is 350 cm.²A high value of / Vs could be obtained.
[0164]
Thus, according to this embodiment, since single crystal silicon can be used for a channel, a thin film transistor with high electron mobility can be provided.
[0165]
[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.
[0166]
For example, the semiconductor device described in each of the above embodiments includes a peripheral circuit integrated liquid crystal display (LCD), system on panel, system on glass, and SOI (Silicon On Insulator) element including TFTs. It is possible to apply as
[0167]
In the third embodiment, amorphous silicon is used as the silicon layer 114, but is not limited to amorphous silicon. For example, polycrystalline silicon may be used.
[0168]
In the third embodiment, Ni is used for the impurity layer 120, but is not limited to Ni, and metal impurities other than Ni may be used.
[0169]
In the third embodiment, the heat insulating layer 118a made of polycrystalline silicon is formed by solid-phase growth of amorphous silicon using Ni. However, the present invention is not limited to such solid-phase growth, and many layers are formed by vapor-phase growth. A heat insulating layer made of crystalline silicon may be formed. The heat insulating layer 118a is not limited to polycrystalline silicon, and amorphous silicon may be used. Moreover, you may comprise the heat retention layer 118a using another material.
[0170]
In the third embodiment, the laser is irradiated from the lower side of the glass substrate, but the laser may be irradiated from the upper side of the glass substrate. In this case, the heat insulating layer 118a above the silicon layer 114 may be removed by a CMP method or the like. Further, the heat insulating layer 118a above the silicon layer 114 may not be removed.
[0171]
In the third embodiment, the silicon oxide film is used as the separation film. However, the separation film is not limited to the silicon oxide film, and for example, a silicon nitride film or the like may be used.
[0172]
In the third embodiment, the width of the channel region is changed. However, it is not always necessary to change the width of the channel region. For example, the channel width may be uniform.
[0173]
In the third embodiment, the necking portion is formed. However, the necking portion is not necessarily formed.
[0174]
[Appendix]
(Appendix 1) A thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate, wherein at least a channel region of the operating semiconductor film has only a grain boundary having an inclination of less than 90 ° with respect to a current direction. A semiconductor device which is in a quasi-single crystal state which is a crystalline state including.
[0175]
(Supplementary Note 2) A thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate, wherein at least a channel region of the operating semiconductor film is a circular crystal grain, and the radius of the crystal grain is 250 nm. A semiconductor device characterized by being in a polycrystalline state composed of crystal grains having a large circular grain size with W <4L where <L and the channel width is W.
[0176]
(Supplementary note 3) The semiconductor device according to Supplementary note 1 or 2, wherein the channel region of the operation semiconductor film is formed narrower than other portions.
[0177]
(Supplementary Note 4) In the semiconductor device according to any one of Supplementary Notes 1 to 3, the operating semiconductor film includes fine crystal grains and circular crystal grains in a source / drain region, and a radius of the crystal grains. A semiconductor device having a portion made of a crystal grain having a large circular grain size where W is less than L and 250 nm <L and W is less than 4 L where W is a channel width.
[0178]
(Supplementary note 5) The semiconductor device according to any one of supplementary notes 1 to 4, wherein a narrow neck portion is formed in the channel region.
[0179]
(Additional remark 6) It is a semiconductor thin film processed into the shape which has a narrow part, Comprising: At least the said narrow part is a quasi-single state which contains only the grain boundary which has an inclination below 90 degrees with respect to an electric current direction. A semiconductor thin film characterized by being in a crystalline state.
[0180]
(Supplementary Note 7) A method of manufacturing a thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate, the step of forming an island-shaped semiconductor film on the insulating substrate, and the semiconductor film as a separation film A step of covering and surrounding a side surface of the semiconductor film with a heat insulating film through the isolation film; and a step of irradiating the semiconductor film with an energy beam from the upper surface to crystallize the semiconductor film to form the operating semiconductor film A method for manufacturing a semiconductor device, comprising:
[0181]
(Additional remark 8) The manufacturing method of the semiconductor device of Additional remark 7 WHEREIN: A heat absorber is provided in the lower part of the said semiconductor film, and irradiation of the said energy beam is performed.
[0182]
(Additional remark 9) The manufacturing method of the semiconductor device of Additional remark 7 WHEREIN: The said heat retention film | membrane is formed thicker than the said semiconductor film.
[0183]
(Additional remark 10) It is a manufacturing method of the thin film type semiconductor device by which the operation | movement semiconductor film was formed on the insulated substrate, Comprising: The process of forming an island-like semiconductor film on the said insulated substrate, and the said semiconductor film by isolation | separation film A step of covering and covering the entire surface of the semiconductor film with a heat insulating film through the isolation film; and irradiating the semiconductor film with an energy beam from the lower surface of the insulating substrate to crystallize the semiconductor film, Forming a semiconductor device. A method for manufacturing a semiconductor device, comprising:
[0184]
(Additional remark 11) The manufacturing method of the semiconductor device in any one of additional remark 7 thru | or 10 WHEREIN: The said semiconductor film before energy beam irradiation consists of amorphous silicon or polycrystalline silicon.
[0185]
(Supplementary Note 12) In the method of manufacturing a semiconductor device according to any one of Supplementary Notes 7 to 11, the heat insulating film is made of a semiconductor material, a metal material, an insulating material, a mixture or a compound thereof, Production method.
[0186]
(Additional remark 13) The manufacturing method of the semiconductor device in any one of additional remark 7 thru | or 12 WHEREIN: Irradiating the said energy beam using an excimer laser as a light source.
[0187]
(Additional remark 14) The manufacturing method of the semiconductor device in any one of Additional remark 7 thru | or 13 WHEREIN: The said channel area | region of the said operation | movement semiconductor film is formed more narrowly than another site | part.
[0188]
(Additional remark 15) The manufacturing method of the semiconductor device in any one of Additional remarks 7 thru | or 14 WHEREIN: A narrow constriction part is formed in the said channel area | region.
[0189]
(Supplementary Note 16) A step of forming an island-shaped semiconductor film on an insulating substrate, a step of covering the semiconductor film with a separation film, and surrounding a side surface of the semiconductor film with a heat insulating film through the separation film, and the semiconductor film And irradiating an energy beam from above to crystallize the semiconductor film to form the operating semiconductor film.
[0190]
(Supplementary Note 17) Forming an island-shaped semiconductor film on an insulating substrate, covering the semiconductor film with a separation film, covering the entire surface of the semiconductor film with a heat insulating film via the separation film, and the semiconductor film Irradiating an energy beam from the lower surface of the insulating substrate to crystallize the semiconductor film to form the operating semiconductor film.
[0191]
(Supplementary Note 18) A step of forming a silicon layer on an insulating substrate, a step of forming a heat insulating layer on at least a side surface of the silicon layer, and irradiating the silicon layer with an energy beam that continuously oscillates to crystallize the silicon layer A process for forming a silicon thin film.
[0192]
(Supplementary note 19) In the method for forming a silicon thin film according to supplementary note 18, the insulating substrate is a substrate that transmits the energy beam, and in the step of crystallizing the silicon layer, an energy beam having a wavelength of 400 nm or more is irradiated. A method for forming a silicon thin film.
[0193]
(Supplementary note 20) In the method for forming a silicon thin film according to supplementary note 19, in the step of forming the thermal insulation layer, the insulation layer is formed in the step of forming the thermal insulation layer on the upper surface of the silicon layer and crystallizing the silicon layer. A method for forming a silicon thin film, comprising irradiating the energy beam from the back side of a substrate.
[0194]
(Supplementary note 21) In the method for forming a silicon thin film according to any one of supplementary notes 18 to 20, in the step of forming the thermal insulation layer, the thermal insulation layer is selectively formed in the vicinity of a partial region of the silicon layer. A method for forming a silicon thin film.
[0195]
(Supplementary note 22) In the method for forming a silicon thin film according to any one of supplementary notes 18 to 21, in the step of forming the silicon layer, the silicon layer is formed so that a width varies in a partial region of the silicon layer. A method for forming a silicon thin film, comprising:
[0196]
(Supplementary note 23) In the method for forming a silicon thin film according to any one of supplementary notes 18 to 22, in the step of forming the silicon layer, a notch is formed in a part of the silicon layer. Method.
[0197]
(Supplementary Note 24) In the method for forming a silicon thin film according to supplementary note 22 or 23, in the step of crystallizing the silicon layer, a portion where the width of the silicon layer is widened from a portion where the width of the silicon layer is narrowed A method for forming a silicon thin film, wherein the energy beam is scanned in a direction toward the surface.
[0198]
【The invention's effect】
As described above, according to the present invention, it is possible to realize a thin film type semiconductor device having an extremely high electron mobility by forming an operating semiconductor film from a semiconductor thin film whose influence of crystal grain boundaries is negligible. It becomes.
[0199]
In addition, according to the present invention, since a crystal is grown by scanning a continuous wave laser from a narrow region of the silicon layer toward a wide region, the crystal grown in the lateral direction can be taken over. Crystal defects can be eliminated outside the silicon layer. Therefore, according to the present invention, a silicon thin film having single crystal silicon can be formed, and a semiconductor device having high electron mobility can be provided using the silicon thin film.
[Brief description of the drawings]
FIG. 1 is a process cross-sectional view (part 1) illustrating a method for forming an operating semiconductor film according to a first embodiment of the present invention;
FIG. 2 is a process cross-sectional view (part 2) illustrating the method for forming the operating semiconductor film according to the first embodiment of the present invention;
FIG. 3 is a schematic diagram showing temperature distribution characteristics in an amorphous silicon film during crystallization.
FIG. 4 is a schematic diagram showing how crystallization proceeds in a method from an inside toward an edge portion in an amorphous silicon film.
FIG. 5 is a schematic plan view showing a generation direction of a crystal grain boundary in a portion that becomes a channel region where the width of an amorphous silicon film is gradually narrowed.
FIG. 6 is a schematic cross-sectional view showing an example in which a heat absorber made of an insulating material is embedded in a silicon oxide film for separation.
FIG. 7 is a schematic plan view showing an amorphous silicon film according to a modification (Part 1) of the first embodiment of the present invention.
FIG. 8 is a schematic plan view showing the mechanism of crystal growth according to a modification (Part 1) of the first embodiment of the present invention.
FIG. 9 is a schematic plan view showing an amorphous silicon film according to a modification (No. 2) of the first embodiment of the present invention.
FIG. 10 is a schematic plan view showing the mechanism of crystal growth according to a modification (Part 2) of the first embodiment of the present invention.
FIG. 11 is a schematic plan view showing an amorphous silicon film according to a modification (Part 3) of the first embodiment of the present invention.
FIG. 12 is a schematic plan view showing the mechanism of crystal growth according to a modification (Part 3) of the first embodiment of the present invention.
FIG. 13 is a process cross-sectional view (part 1) illustrating the manufacturing method of the TFT according to the first embodiment of the invention;
FIG. 14 is a process cross-sectional view (part 2) illustrating the manufacturing method of the TFT according to the first embodiment of the invention;
FIG. 15 is a process cross-sectional view (part 3) illustrating the manufacturing method of the TFT according to the first embodiment of the invention;
FIG. 16 is a process cross-sectional view (No. 4) illustrating the method for manufacturing the TFT according to the first embodiment of the invention;
FIG. 17 is a schematic plan view showing the main configuration of an n-type TFT according to a second embodiment of the invention.
FIG. 18 is a photomicrograph showing the observation of the crystal structure of an operating semiconductor film.
FIG. 19 is a schematic cross-sectional view showing a step of crystallizing an amorphous silicon film.
FIG. 20 is a schematic cross-sectional view showing the main configuration of a TFT according to a second embodiment of the invention.
FIG. 21 is a process sectional view (No. 1) showing the method for forming the silicon thin film according to the third embodiment of the invention;
FIG. 22 is a process cross-sectional view (part 2) illustrating the method for forming the silicon thin film according to the third embodiment of the present invention;
FIG. 23 is a process cross-sectional view (part 3) illustrating the method for forming the silicon thin film according to the third embodiment of the present invention;
FIG. 24 is a process cross-sectional view (part 4) illustrating the method for forming the silicon thin film according to the third embodiment of the present invention;
FIG. 25 is a plan view (part 1) showing a patterning shape of a silicon layer;
FIG. 26 is a graph obtained by measuring crystal states of a heat insulating layer, a separation film, and a silicon layer by Raman scattering spectroscopy.
FIG. 27 is a graph showing the relationship between the wavelength of a laser and the transmittance with respect to a glass substrate.
FIG. 28 is a plan view showing a crystallization mechanism of a silicon layer.
FIG. 29 is a conceptual diagram showing a temperature gradient of a silicon layer when laser irradiation is performed.
FIG. 30 is a plan view showing the positional relationship between the silicon thin film and the gate electrode formed according to the first embodiment of the present invention.
FIG. 31 is a photomicrograph showing the crystalline state of a silicon thin film formed according to the third embodiment of the present invention.
FIG. 32 is a plan view showing a method for forming a silicon thin film according to a first modification of the third embodiment of the present invention.
FIG. 33 is a photomicrograph showing the crystalline state of a silicon thin film formed by a modification (Part 1) of the third embodiment of the present invention.
FIG. 34 is a conceptual diagram showing a method for forming a silicon thin film according to a modification (Part 2) of the third embodiment of the present invention.
FIG. 35 is a conceptual diagram showing a method for forming a silicon thin film according to a modification (Part 3) of the third embodiment of the present invention.
FIG. 36 is a conceptual diagram showing a method for forming a silicon thin film according to a modification (No. 4) of the third embodiment of the present invention.
FIG. 37 is a conceptual diagram showing a method for forming a silicon thin film according to a modification (No. 5) of the third embodiment of the present invention.
FIG. 38 is a plan view showing a positional relationship between a silicon thin film formed by a modification (No. 5) of the third embodiment of the present invention and a gate electrode.
FIG. 39 is a process cross-sectional view (part 1) illustrating the method for manufacturing the thin film transistor according to the fourth embodiment of the invention;
FIG. 40 is a process cross-sectional view (part 2) illustrating the method for manufacturing the thin film transistor according to the fourth embodiment of the present invention;
FIG. 41 is a process cross-sectional view (part 3) illustrating the method for manufacturing the thin film transistor according to the fourth embodiment of the present invention;
FIG. 42 is a process cross-sectional view (part 4) illustrating the method for manufacturing the thin film transistor according to the fourth embodiment of the present invention;
[Explanation of symbols]
1 ... Glass substrate
2 ... Silicon oxide film used as buffer
3. Amorphous silicon film
4 ... Silicon oxide film used as separation film
5 ... Thermal insulation film
11 ... Working semiconductor film
12 ... Necking club
13 ... heat absorber
21 ... Glass substrate
22 ... Silicon oxide film serving as a buffer
23 ... Gate oxide film (silicon oxide film)
24 ... Gate electrode (aluminum film)
25. Interlayer insulating film
26 ... Contact hole
27. Wiring (metal film)
31. Working semiconductor film
32 ... Gate electrode (aluminum film)
33 ... Source region
34 ... Drain region
35 ... Disk-like crystal grains with a large circular grain size
36 ... Microcrystalline silicon
41 ... Amorphous silicon film
42. Thermal insulation film
110 ... Glass substrate
112 ... Buffer layer
114 ... silicon layer
114a ... single crystal silicon
115a, 115b, 115c ... area
116 ... separation membrane
117a: Area where width is narrowed
117b: Area where width is gradually increased
117c: Widened area
118 ... Thermal insulation layer
118a ... thermal insulation layer
119 ... Necking part
120 ... Impurity layer
121 ... Grain boundary
124: Semiconductor layer
126 ... Gate oxide film
128 ... Aluminum layer
130 ... Gate electrode
132: Source / drain diffusion layer
134. Interlayer insulating film
136 ... contact hole
138a ... Gate electrode
138b ... Source / drain electrode

Claims (4)

A method of manufacturing a thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate,
Forming an island-shaped semiconductor film on the insulating substrate such that a constricted portion narrowed in a cut shape is formed, and a portion to be a channel region is formed to be narrower than other portions;
Covering the semiconductor film with a separation film, and forming a heat insulating film so as to surround only the side surface of the semiconductor film through the separation film;
Irradiating the semiconductor film with an energy beam from above to crystallize the semiconductor film to form the operating semiconductor film. In the manufacturing method of the semiconductor device according to claim 1 ,
The method of manufacturing a semiconductor device, wherein the heat insulating film is formed thicker than the semiconductor film. A method of manufacturing a thin film semiconductor device in which an operating semiconductor film is formed on an insulating substrate,
Forming an island-shaped semiconductor film on the insulating substrate such that a constricted portion narrowed in a cut shape is formed, and a portion to be a channel region is formed to be narrower than other portions;
Covering the semiconductor film with a separation film, and covering the entire surface of the semiconductor film with a heat insulating film through the separation film;
Irradiating the semiconductor film with an energy beam from the lower surface of the insulating substrate to crystallize the semiconductor film to form the operating semiconductor film. In the manufacturing method of the semiconductor device of Claim 1 or 3 ,
Irradiating the energy beam using an excimer laser as a light source. A method for manufacturing a semiconductor device.

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