JP3840630B2 - Automatic inspection device and protective relay device - Google Patents

Automatic inspection device and protective relay device Download PDF

Info

Publication number
JP3840630B2
JP3840630B2 JP25660899A JP25660899A JP3840630B2 JP 3840630 B2 JP3840630 B2 JP 3840630B2 JP 25660899 A JP25660899 A JP 25660899A JP 25660899 A JP25660899 A JP 25660899A JP 3840630 B2 JP3840630 B2 JP 3840630B2
Authority
JP
Japan
Prior art keywords
signal
inspection
detection
output
failure detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP25660899A
Other languages
Japanese (ja)
Other versions
JP2001086636A (en
Inventor
功 和知
和秋 熊谷
親司 小松
純 野呂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP25660899A priority Critical patent/JP3840630B2/en
Publication of JP2001086636A publication Critical patent/JP2001086636A/en
Application granted granted Critical
Publication of JP3840630B2 publication Critical patent/JP3840630B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Emergency Protection Circuit Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、自動点検装置と保護継電装置に係り、特に、電力系統に故障が発生したときに、保護範囲内の遮断器に対して主検出トリップ指令を出力するリレーと故障検出トリップ指令を出力するリレーの状態を自動点検するに好適な自動点検装置及びこの自動点検装置を内蔵した保護継電装置に関する。
【0002】
【従来の技術】
電力系統においては、電力系統に地絡故障等が発生したときに、保護範囲内の遮断器をトリップし、地絡故障等から系統を保護する保護継電装置が設けられている。この種の保護継電装置において、保護範囲(保護区間)内の遮断器をトリップするに際しては、常時開状態にある一対のリレー接点(主検出トリップ指令出力用リレー接点と故障検出トリップ指令出力用リレー接点)を直列に接続し、直列に接続されたリレー接点の一方を遮断器のトリップ回路に接続し、電力系統の保護区間で地絡故障等が発生したときに一方のリレー接点を閉じ、電力系統の保護区間及びそれ以外の区間で地絡故障等が発生したときに他方のリレー接点を閉じ、両方のリレー接点が閉じたことを条件にトリップ回路を駆動し、トリップ回路の駆動により遮断器をトリップする構成が採用されている。
【0003】
一方、この種の保護継電装置において、各リレー接点の動作を点検するに際しては、各リレー接点を動作させてリレー接点の動作状態を点検することが行なわれている。この場合、点検時に、両者のリレー接点が同時に閉じると遮断器がトリップされ、系統の故障によらず点検によって遮断器がトリップされることになる。そこで、リレー接点の点検時に遮断器が不要にトリップされるのを防止するために、各リレー接点と直列に、トリップロック回路を構成するリレー接点を挿入し、通常の運用時にはトリップロック回路用のリレー接点を閉じた状態とし、点検時にのみトリップロック回路用のリレー接点を開き、自動点検時に不要に遮断器がトリップされるのを防止する構成が採用されている。
【0004】
しかし、主検出トリップ指令出力用リレー接点と故障検出トリップ指令出力用リレー接点と直列にトリップロック回路を挿入する構成では、トリップロック回路が増えた分回路構成が複雑となる。すなわち、電力系統の保護区間内に地絡故障等が発生したときに主検出トリップ指令出力用のリレー接点の動作を制御する主検出ユニットによってトリップロック回路を制御するには、トリップロック回路を遮断器ごとに必ず設ける必要がある。特に、母線保護のように、トリップ回路を電気所の全ての遮断器に設けることが余儀なくされる場合、トリップロック回路を全ての遮断器に設けることが必要となり、回路構成が複雑となるとともに、遮断器の数によってはトリップロック回路を実装できないことがある。
【0005】
そこで、特開昭56−58721号公報に記載されているように、トリップロック回路を設けることなく、一対のリレー接点の動作状態を自動的に点検することができる自動点検方式が提案されている。この自動点検方式によれば、一方のリレー要素に対する点検時には、他方のリレー要素に対する自動点検をロックするようになっている。
【0006】
【発明が解決しようとする課題】
従来技術では、二つのリレー要素に対して誤って同時に点検指令が出力されたときについて十分に配慮されていない。
【0007】
本発明の目的は、複数のトリップ指令出力手段に対して点検指令が重複した時間帯に出力されても一方のトリップ指令出力手段に対してのみ点検を行なうことができる自動点検装置と保護継電装置を提供することにある。
【0008】
【課題を解決するための手段】
前記目的を達成するために、本発明は、主検出トリップ指令と故障検出トリップ指令との論理を条件に電力系統の保護区間に属する遮断器をトリップするトリップ手段に接続されて主検出閉路信号に応答して前記トリップ手段に主検出トリップ指令を出力する主検出トリップ指令出力手段と、前記トリップ手段に接続されて故障検出閉路信号に応答して前記トリップ手段に故障検出トリップ指令を出力する故障検出トリップ指令出力手段とを点検対象として、
主検出点検指令により主検出点検起動信号を出力する主検出点検起動信号出力手段と、前記主検出点検起動信号を受けこの主検出点検起動信号の出力を第1の設定時間遅延させる主検出点検起動信号遅延手段と、故障検出点検指令により故障検出点検起動信号を出力する故障検出点検起動信号出力手段と、前記故障検出点検起動信号を受けこの故障検出点検起動信号の出力を第2の設定時間遅延させる故障検出点検起動信号遅延手段と、前記主検出点検起動信号に応答して前記故障検出点検起動信号出力手段と前記故障検出点検起動信号遅延手段に第1のリセット信号を与えて信号の出力を強制的に停止する故障検出リセット手段と、前記故障検出点検起動信号に応答して前記主検出点検起動信号出力手段と前記主検出起動信号遅延手段に第2のリセット信号を与えて信号の出力を強制的に停止する主検出リセット手段と、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号を入力し前記故障点検起動信号の発生がないことを条件に前記入力信号を主検出閉路信号として前記主検出トリップ指令出力手段に出力する主検出閉路手段と、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号を入力し前記主検出点検起動信号の発生がないことを条件に前記入力信号を故障検出閉路信号として前記故障検出トリップ指令出力手段に出力する故障検出閉路手段とを備えてなる自動点検装置を構成したものである。
【0009】
前記自動点検装置を構成するに際しては、以下の要素を付加することができる。
【0010】
(1)前記主検出点検起動信号に応答して故障検出点検ロック信号の出力を開始し前記主検出点検起動信号遅延手段から主検出点検起動信号の出力が停止された後も第3の設定時間の間は前記故障検出点検ロック信号を継続して出力する故障検出点検ロック信号出力手段と、前記故障検出点検起動信号に応答して主検出点検ロック信号の出力を開始し前記故障検出点検起動信号遅延手段から故障検出点検起動信号の出力が停止された後も第4の設定時間の間は前記主検出点検ロック信号を継続して出力する主検出点検ロック信号出力手段とを備え、前記主検出閉路手段は、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号を入力し前記主検出点検ロック信号出力手段から主検出点検ロック信号の出力がないことを条件に前記入力信号を主検出閉路信号として出力してなり、前記故障検出閉路手段は、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号を入力し前記故障検出点検ロック信号出力手段から故障検出点検ロック信号の出力がないことを条件に前記入力信号を故障検出閉路信号として出力してなる。
【0011】
また、本発明は、電力系統の保護区間で故障が発生したときに主故障検出信号を出力する主故障検出信号出力手段と、前記保護区間および前記保護区間以外の電力系統で故障が発生したときに補助故障検出信号を出力する補助故障検出信号出力手段と、主検出点検指令により主検出点検起動信号を出力する主検出点検起動信号出力手段と、前記主検出点検起動信号を受けこの主検出点検起動信号の出力を第1の設定時間遅延させる主検出点検起動信号遅延手段と、故障検出点検指令により故障検出点検起動信号を出力する故障検出点検起動信号出力手段と、前記故障検出点検起動信号を受けこの故障検出点検起動信号の出力を第2の設定時間遅延させる故障検出点検起動信号遅延手段と、前記主検出点検起動信号に応答して前記故障検出点検起動信号出力手段と前記故障検出点検起動信号遅延手段に第1のリセット信号を与えて信号の出力を強制的に停止する故障検出リセット手段と、前記故障検出点検起動信号に応答して前記主検出点検起動信号出力手段と前記主検出起動信号遅延手段に第2のリセット信号を与えて信号の出力を強制的に停止する主検出リセット手段と、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号または前記主故障検出信号を入力し前記故障検出点検起動信号の発生がないことを条件に前記いずれかの入力信号を主検出閉路信号として出力する主検出閉路手段と、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号または前記補助故障検出信号を入力し前記主検出点検起動信号の発生がないことを条件に前記いずれかの入力信号を故障検出閉路信号として出力する故障検出閉路手段と、前記主検出閉路信号に応答して主検出トリップ指令を出力する主検出トリップ指令出力手段と、前記故障検出閉路信号に応答して故障検出トリップ指令を出力する故障検出トリップ指令出力手段と、前記主検出トリップ指令と前記故障検出トリップ指令との論理積を条件に前記保護区間に属する遮断器をトリップするトリップ手段とを備えてなる保護継電装置を構成したものである。
【0012】
前記保護継電装置を構成するに際しては、以下の要素を付加することができる。
【0013】
(1)前記主検出点検起動信号に応答して故障検出点検ロック信号の出力を開始し前記主検出点検起動信号遅延手段から主検出点検起動信号の出力が停止された後も第3の設定時間の間は前記故障検出点検ロック信号を継続して出力する故障検出点検ロック信号出力手段と、前記故障検出点検起動信号に応答して主検出点検ロック信号の出力を開始し前記故障検出点検起動信号遅延手段から故障検出点検起動信号の出力が停止された後も第4の設定時間の間は前記主検出点検ロック信号を継続して出力する主検出点検ロック信号出力手段とを備え、前記主検出閉路手段は、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号または前記主故障検出信号を入力し前記主検出点検ロック信号出力手段から主検出点検ロック信号の出力がないことを条件に前記いずれかの入力信号を主検出閉路信号として出力してなり、前記故障検出閉路手段は、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号または前補助故障検出信号を入力し前記故障検出点検ロック信号出力手段から故障検出点検ロック信号の出力がないことを条件に前記いずれかの入力信号を故障検出閉路信号として出力してなる。
【0014】
前記した手段によれば、主検出点検指令が出力されたときには、この指令に応答して主検出点検起動信号が出力され、この主検出点検起動信号により故障検出点検起動信号出力手段と故障検出点検起動信号遅延手段に対して第1のリセット信号が与えられて信号の出力が強制的に停止され、その後、故障検出点検起動信号の発生がないことを条件に主検出点検起動信号が主検出閉路信号として主検出トリップ指令出力手段に出力され、主出力トリップ指令出力手段に対する点検が行なわれる。一方、故障検出点検指令が出力されたときには、この故障検出点検指令により故障検出点検起動信号が出力され、この故障検出点検起動信号により主検出点検起動信号出力手段と主検出点検起動信号遅延手段に対して第2のリセット信号が与えられて信号の出力が強制的に停止され、その後、主検出点検起動信号の発生がないことを条件に、故障検出点検起動信号が故障検出閉路信号として故障検出トリップ指令出力手段に出力され、故障検出トリップ指令出力手段に対する点検が実施される。この結果、主検出点検指令と故障検出点検指令の発生時間帯が重複した場合でも、一方の起動信号の出力がリセットされるため、主検出トリップ指令出力手段と故障検出トリップ指令出力手段に対して同時に自動点検が行なわれるのを防止することができる。
【0015】
さらに、主検出閉路手段が主検出点検起動信号を入力したときに、主検出点検ロック信号の出力がないことを条件に入力信号を主検出閉路信号として出力し、一方、故障検出閉路手段が故障検出点検起動信号を入力したときには、故障検出点検ロック信号の出力がないことを条件に入力信号を故障検出閉路信号として出力しているため、点検終了後、主検出トリップ指令出力手段または故障検出トリップ指令出力手段の復帰時に、主検出トリップ指令出力手段と故障検出トリップ指令出力手段が同時に動作するのを防止することができる。
【0016】
【発明の実施の形態】
以下、本発明の一実施形態を図面に基づいて説明する。図1は自動点検装置を含む保護継電装置の全体構成図である。図1において、保護継電装置は、主検出ユニット10、故障検出ユニット12、リレー接点MX1、MX2、MX3、……、MXn、リレー接点FDX1、FDX2、FDX3、……、FDXn、遮断器CB1、CB2、CB3、……、CBnを備えて構成されており、各遮断器CB1〜CBnが電力系統の保護区間(保護範囲)内に配置されている。
【0017】
主検出ユニット10は、メモリ14、主故障検出回路16、主検出点検起動回路18、ORゲート20、ANDゲート22、タイマ24、26、ORゲート28、ANDゲート30を備えて構成されており、ANDゲート30の出力側がリレー接点MX1〜MXnを駆動するリレー回路(図示省略)に接続されている。故障検出ユニット12は、メモリ32、補助故障検出回路34、故障検出点検起動回路36、ORゲート38、ANDゲート40、タイマ42、44、ORゲート46、ANDゲート48を備えて構成されており、ANDゲート48の出力側がリレー接点FDX1〜FDXnを駆動するリレー回路(図示省略)に接続されている。
【0018】
主検出ユニット10のメモリ14には、主検出ユニット10の動作を制御するための主検出プログラムが内蔵されており、主検出ユニット10は、主検出プログラムにしたがって各部の動作を制御するように構成されている。主故障検出回路16は、電力系統の保護区間で地絡故障等が発生したときに主故障検出信号を出力する主故障検出信号出力手段として構成されており、地絡故障等が発生したときには、“1"レベルの主故障検出信号をORゲート20、28に出力するようになっている。主検出点検起動回路18は、メモリ14に内蔵された主検出プログラムに従って主検出点検指令が出力されたときに、この主検出点検指令により“1"レベルの主検出点検起動信号をORゲート20、ANDゲート22、タイマ26に出力する主検出点検起動信号出力手段として構成されている。ORゲート20は、主故障検出回路16または主検出点検起動回路18から“1"の信号が出力されたときに、“1"の信号を第1のリセット信号として、故障検出ユニット12の故障検出点検起動回路36とANDゲート40に出力し、故障検出点検起動回路36、ANDゲート40から“1"の信号が出力されるのを強制的に停止するようになっている。すなわち、ORゲート20、ANDゲート40は故障検出リセット手段として構成されている。ANDゲート22は、故障検出ユニット12から“1"レベルの第2のリセット信号が入力されないことを条件に、主検出点検起動回路18の出力による主検出点検起動信号をタイマ24に出力するようになっている。タイマ24は、オンディレイタイマとして、図2(a)に示すように、ANDゲート22から出力される“1"レベルの主検出点検起動信号を第1の設定時間tだけ遅延させる主検出点検起動信号遅延手段として構成されており、時間tだけ遅延された主検出点検起動信号がORゲート28に入力されるようになっている。タイマ26は、オフディレイタイマとして、主検出点検起動回路18の出力による主検出点検起動信号に応答して、“1"レベルの故障検出点検ロック信号の出力を開始し、主検出点検起動回路18から“1"レベルの主検出点検起動信号の出力が停止された後も、第3の設定時間t'の間は“1"レベルの故障検出点検ロック信号をANDゲート48に対して継続して出力する故障検出点検ロック信号出力手段として構成されている。ORゲート28は、主故障検出回路16またはタイマ24から“1"の信号が出力されたときに、“1"レベルの信号をANDゲート30に出力するようになっている。ANDゲート30は、ORゲート28から“1"レベルの信号が入力されたときに、故障検出ユニット12から“1"レベルの主検出点検ロック信号が入力されないことを条件に、“1"レベルの信号を主検出閉路信号としてリレー接点MX1〜MXnのリレー回路に出力するようになっている。すなわち、ORゲート28、ANDゲート30主検出閉路手段として構成されている。リレー接点MX1〜MXnは、ANDゲート30から“1"レベルの信号が出力されたときにその接点を閉じ、主検出トリップ指令を出力するようになっている。すなわち、リレー接点MX1〜MXnは主検出トリップ指令出力手段として構成されている。
【0019】
一方、故障検出ユニット12のメモリ32には、故障検出ユニット12の動作を制御するためのプログラム(故障検出プログラム)が内蔵されている。補助故障検出回路34は、電力系統の保護区間及び保護区間以外の電力系統で地絡故障等が発生したときに補助故障検出信号として“1"レベルの信号をORゲート38、46に出力する補助故障検出信号出力手段として構成されている。故障検出点検起動回路36は、メモリ32に内蔵された故障検出プログラムの実行に伴って故障検出点検指令が出力されたときに、この故障検出点検指令により“1"レベルの故障検出点検起動信号をORゲート38、ANDゲート40、タイマ44に出力する故障検出点検起動信号出力手段として構成されている。ORゲート38は、補助故障検出回路34または故障検出点検起動回路36から“1"レベルの信号が出力されたときに、“1"レベルの信号を第2のリセット信号として主検出点検起動回路18とANDゲート22に出力し、主検出点検起動回路18、ANDゲート22から“1"レベルの信号が出力されるのを強制的に停止させるようになっている。すなわち、ORゲート38、ANDゲート22は主検出リセット手段として構成されている。ANDゲート40は、故障検出点検起動回路36から“1"レベルの故障検出点検起動信号が入力されたときに、ORゲート20から“1"レベルの第1のリセット信号が入力されないことを条件に、“1"レベルの故障検出点検起動信号をタイマ42に出力するようになっている。タイマ42は、オンディレイタイマとして、ANDゲート40から“1"レベルの信号が入力されたとき、第2の設定時間t後に“1"レベルの信号を出力する故障検出点検起動信号遅延手段として構成されており、t時間遅延された故障検出点検起動信号がORゲート46に入力されるようになっている。タイマ44は、オフディレイタイマとして、故障検出点検起動回路36から“1"レベルの故障検出点検起動信号が入力されたときに、“1"レベルの主検出点検ロック信号の出力を開始し、故障検出点検起動回路36から“1"レベルの故障検出点検起動信号の出力が停止された後も、第2の設定時間t'の間は、“1"レベルの主検出点検ロック信号をANDゲート30に対して継続して出力する主検出点検ロック信号出力手段として構成されている。ORゲート46は、補助故障検出回路34またはタイマ42から“1"レベルの信号が入力されたときに、“1"レベルの信号をANDゲート48に出力するようになっている。ANDゲート48は、ORゲート46から“1"レベルの信号が入力されたときに、タイマ26から“1"レベルの故障検出点検ロック信号が入力されないことを条件に、“1"レベルの故障検出閉路信号をリレー接点FDX1〜FDXnに出力するようになっている。すなわち、ORゲート46、ANDゲート48は故障検出閉路手段として構成されている。
【0020】
リレー接点FDX1〜FDXnは、ANDゲート48から“1"レベルの故障検出閉路信号が出力されたときにその接点を閉じ、各リレー接点FDX1〜FDXnから故障検出トリップ指令を出力するようになっている。すなわち各リレー接点FDX1〜FDXnは故障検出トリップ指令出力手段として構成されている。さらに、リレー接点FDX1〜FDXnはリレー接点MX1〜MXnと互いに直列に接続されて各遮断器CB1〜CBnのトリップ回路に接続されている。各遮断器CB1〜CBnは、主検出トリップ指令と故障検出トリップ指令による論理、例えば、主検出トリップ指令と故障検出トリップ指令との論理積を条件に各遮断器CB1〜CBnをトリップするトリップ手段としてのトリップコイル等を内蔵しており、各遮断器CB1〜CBnは、各リレー接点MX1〜MXn、FDX1〜FDXnの接点が閉じたときに保護区間の電力系統に属する母線あるいは送電線を開放するようになっている。
【0021】
上記構成において、主検出点検指令及び故障検出点検指令が出力されていないときに、電力系統の保護区間で地絡故障等が生じ、主故障検出回路16から“1"レベルの信号が出力されると、ORゲート28、ANDゲート30の出力が“1"レベルとなり、リレー接点MX1〜MXnが閉じ、主検出トリップ指令が出力される。このとき、補助故障検出回路34から“1"レベルの信号が出力されると、ORゲート46、ANDゲート48から“1"レベルの信号が出力され、リレー接点FDX1〜FDXnが閉じ、故障検出トリップ指令が出力される。このとき遮断器CB1〜CBnのトリップ手段を駆動する論理積の条件が成立するため、各遮断器CB1〜CBnはトリップされ、電力系統の保護区間を地絡故障等から保護することができる。
【0022】
次に、電力系統が正常状態にあるときに、主検出プログラムの起動により主検出点検指令が出力されると、主検出点検起動回路18から“1"レベルの主検出点検起動信号が出力され、故障検出点検起動回路36とタイマ32がリセットされる。主検出点検起動信号が発生した後、t時間経過すると、ANDゲート30において、故障検出ユニット12から“1"レベルの主検出点検ロック信号が入力されないことを条件に、“1"レベルの主検出閉路信号が各リレー接点MX1〜MXnに出力され、各リレー接点が閉じることにより、点検対象としての各リレー接点MX1〜MXnに対する自動点検を実行することができる。このとき、故障検出ユニット12のANDゲート48から故障検出閉路信号が出力されるのが阻止されているため、リレー接点MX1〜MXnに対する自動点検のみを行なうことができる。
【0023】
次に、電力系統が正常状態にあるときに、故障検出ユニット12の故障検出プログラムの起動に伴って故障検出点検指令が出力されると、故障検出点検起動回路36から“1"レベルの故障検出点検起動信号が出力される。このとき、この故障検出点検起動信号により主検出ユニット10の主検出点検起動回路18とタイマ24がリセットされる。そして故障検出点検起動信号が出力された後、t時間経過すると、ANDゲート48において、主検出ユニット10から故障検出点検ロック信号が出力されないことを条件に、“1"レベルの故障検出閉路信号が各リレー接点FDX1〜FDXnに出力され、各リレー接点が閉じる。これにより、点検対象としてのリレー接点FDX1〜FDXnに対する自動点検を行なうことができる。このとき主検出点検起動回路18とタイマ24がリセットされてANDゲート30から主検出閉路信号が出力されるのが阻止されているため、各リレー接点FDX1〜FDXnに対してのみ自動点検を行なうことができる。
【0024】
次に、故障検出点検指令よりも主検出点検指令を優先させたときの動作を図2の(b)に示すタイムチャートにしたがって説明する。まず、プログラムの起動により故障検出点検指令が出力された後、この故障検出点検指令が“1"レベルとなっている時間帯すなわち故障検出点検指令が出力された後、重複した時間帯に主検出点検指令が出力されると、故障検出点検指令よりも主検出点検指令による制御が優先されるため、故障検出点検起動信号が出力された後、重複した時間帯に主検出点検起動信号が出力されると、優先制御により、主点検起動信号により故障検出点検起動回路36とタイマ42がリセットされる。そして主検出点検起動信号が出力された後、t時間後に、ANDゲート30において、故障検出ユニット12から主検出点検ロック信号が出力されないことを条件に、主検出閉路信号が出力され、リレー接点MX1〜MXnが閉じ、リレー接点MX1〜MXnに対する自動点検が行なわれる。すなわち故障検出点検起動信号と主検出点検起動信号が重複した時間帯で発生しても、主検出ユニット10の制御が優先されるときには、リレー接点MX1〜MXnに対してのみ自動点検が実行されることになる。
【0025】
また本実施形態においては、主検出ユニット10により点検動作または故障検出ユニット12による点検動作が終了した後は、この点検終了後からt'時間後も主検出ユニット10による点検時にはタイマ26からANDゲート48に対して故障検出点検ロック信号が出力され、故障検出ユニット12による点検時には、ANDゲート30に対してタイマ44から主検出点検ロック信号が出力されるため、各リレー接点MX1〜MXnまたはリレー接点FDX1〜FDXnが復帰動作するときでも、主検出トリップ指令と故障検出トリップ指令が同時に出力されるのを防止することができる。
【0026】
前記実施形態において、各リレー接点MX1〜MXnに対する自動点検を高速に行なうに際しては、ORゲート20の出力信号をタイマ44に与えてタイマ44をORゲート20の出力信号によってクリアさせる構成を採用すれば、タイマ44の復帰を待たずにリレー接点MX1〜MXnの点検を実行することができる。
【0027】
本実施形態によれば、主検出点検指令と故障検出点検指令が誤って重複した時間帯で発生しても、一方のユニットの指令により他方のユニットの動作がリセットされるとともに、主検出点検起動信号または故障検出点検起動信号が出力された後、協調時間帯としてのt時間後に、他方のユニットからロック信号が出力されないことを条件としてのみ点検対象に対する自動点検を実行するようにしているため、主検出点検指令と故障検出点検指令が誤って重複した時間帯で発生しても、一方の点検対象に対してのみ確実に自動点検を実施することができる。
【0028】
【発明の効果】
以上説明したように、本発明においては、主検出点検指令が出力されたときには、この指令に応答して主検出点検起動信号が出力され、この主検出点検起動信号により故障検出点検起動信号出力手段と故障検出点検起動信号遅延手段に対して第1のリセット信号が与えられて信号の出力が強制的に停止され、その後、故障検出点検起動信号の発生がないことを条件に主検出点検起動信号が主検出閉路信号として主検出トリップ指令出力手段に出力され、主出力トリップ指令出力手段に対する点検が行なわれ、一方、故障検出点検指令が出力されたときには、この故障検出点検指令により故障検出点検起動信号が出力され、この故障検出点検起動信号により主検出点検起動信号出力手段と主検出点検起動信号遅延手段に対して第2のリセット信号が与えられて信号の出力が強制的に停止され、その後、主検出点検起動信号の発生がないことを条件に、故障検出点検起動信号が故障検出閉路信号として故障検出トリップ指令出力手段に出力され、故障検出トリップ指令出力手段に対する点検が実施される。従って、本発明によれば、主検出点検指令と故障検出点検指令の発生時間帯が重複した場合でも、一方の起動信号の出力がリセットされるため、主検出トリップ指令出力手段と故障検出トリップ指令出力手段に対して同時に自動点検が行なわれるのを防止することができる。
【図面の簡単な説明】
【図1】本発明の一実施形態を示す保護継電装置の全体構成図である。
【図2】図1に示す装置の作用を説明するためのタイムチャートである。
【符号の説明】
10 主検出ユニット
12 故障検出ユニット
14 メモリ
16 主故障検出回路
18 主検出点検起動回路
20 ORゲート
22 ANDゲート
24、26 タイマ
28 ORゲート
30 ANDゲート
32 メモリ
34 補助故障検出回路
36 故障検出点検起動回路
38 ORゲート
40 ANDゲート
42、44 タイマ
46 ORゲート
48 ANDゲート
MX1〜MXn、FDX1〜FDXn リレー接点
CB1〜CBn 遮断器
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an automatic inspection device and a protective relay device, and in particular, a relay that outputs a main detection trip command to a circuit breaker within a protection range when a failure occurs in a power system and a fault detection trip command. The present invention relates to an automatic inspection device suitable for automatically inspecting the state of a relay to be output, and a protective relay device incorporating this automatic inspection device.
[0002]
[Prior art]
In a power system, when a ground fault or the like occurs in the power system, a protective relay device is provided that trips a circuit breaker within a protection range and protects the system from a ground fault or the like. In this type of protective relay device, when tripping the circuit breaker within the protection range (protection section), a pair of relay contacts that are normally open (main detection trip command output relay contact and fault detection trip command output) Relay contact) is connected in series, one of the relay contacts connected in series is connected to the trip circuit of the circuit breaker, and one of the relay contacts is closed when a ground fault occurs in the protection section of the power system, When a ground fault occurs in the protection section of the power system and other sections, the other relay contact is closed, the trip circuit is driven on the condition that both relay contacts are closed, and shut off by driving the trip circuit A configuration that trips the vessel is adopted.
[0003]
On the other hand, in this type of protective relay device, when checking the operation of each relay contact, the operation of each relay contact is checked by operating each relay contact. In this case, at the time of inspection, if both relay contacts are simultaneously closed, the circuit breaker is tripped, and the circuit breaker is tripped by inspection regardless of the system failure. Therefore, in order to prevent the circuit breaker from being tripped unnecessarily during the inspection of the relay contacts, the relay contacts that make up the trip lock circuit are inserted in series with each relay contact. A configuration is adopted in which the relay contact is closed, the relay contact for the trip lock circuit is opened only during inspection, and the circuit breaker is prevented from being tripped unnecessarily during automatic inspection.
[0004]
However, in the configuration in which the trip lock circuit is inserted in series with the relay contact for main detection trip command output and the relay contact for failure detection trip command output, the circuit configuration is increased by adding the trip lock circuit. That is, to control the trip lock circuit by the main detection unit that controls the operation of the relay contact for main detection trip command output when a ground fault occurs in the protection section of the power system, the trip lock circuit is shut off. It is necessary to install it for every vessel. In particular, when the trip circuit is forced to be provided in all the circuit breakers of the electric station, such as busbar protection, it is necessary to provide the trip lock circuit in all the circuit breakers, and the circuit configuration becomes complicated. Depending on the number of circuit breakers, the trip lock circuit may not be implemented.
[0005]
Therefore, as described in Japanese Patent Application Laid-Open No. 56-58721, there has been proposed an automatic inspection method that can automatically inspect the operation state of a pair of relay contacts without providing a trip lock circuit. . According to this automatic inspection method, the automatic inspection for the other relay element is locked at the time of inspection for one of the relay elements.
[0006]
[Problems to be solved by the invention]
In the prior art, sufficient consideration is not given to when the inspection command is erroneously output simultaneously to the two relay elements.
[0007]
SUMMARY OF THE INVENTION An object of the present invention is to provide an automatic inspection device and a protective relay capable of performing inspection only on one trip command output means even if the inspection commands are output to a plurality of trip command output means in a time period overlapping. To provide an apparatus.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a main detection closing signal connected to trip means for tripping a circuit breaker belonging to the protection section of the power system on the condition of the logic of the main detection trip command and the fault detection trip command. A main detection trip command output means for outputting a main detection trip command to the trip means in response, and a fault detection connected to the trip means for outputting a fault detection trip command to the trip means in response to a fault detection closing signal Trip command output means
Main detection / inspection start signal output means for outputting a main detection / inspection start signal in response to a main detection / inspection command, and main detection / inspection start to receive the main detection / inspection start signal and delay the output of the main detection / inspection start signal for a first set time. A signal delay means, a failure detection inspection activation signal output means for outputting a failure detection inspection activation signal in response to a failure detection inspection instruction, and delaying the output of the failure detection inspection activation signal upon receipt of the failure detection inspection activation signal by a second set time. A failure detection / inspection activation signal delaying means, and a first reset signal applied to the failure detection / inspection activation signal output means and the failure detection / inspection activation signal delay means in response to the main detection / inspection activation signal to output a signal. A failure detection resetting means for forcibly stopping, a main detection inspection activation signal output means and a main detection activation signal delay means in response to the failure detection inspection activation signal. The main detection reset means for forcibly stopping the output of the signal by giving the reset signal and the main detection inspection activation signal by the output of the main detection inspection activation signal delay means are input and the failure inspection activation signal is not generated The main detection closing means for outputting the input signal as the main detection closing signal to the main detection trip command output means on condition that the failure detection inspection activation signal is output by the output of the failure detection inspection activation signal delay means. An automatic inspection device is provided that includes failure detection closing means for outputting the input signal as a failure detection closing signal to the failure detection trip command output means on condition that no inspection activation signal is generated.
[0009]
In configuring the automatic inspection device, the following elements can be added.
[0010]
(1) A third set time after the output of the main detection / inspection start signal is stopped from the main detection / inspection start signal delay means in response to the main detection / inspection start signal. A failure detection / inspection lock signal output means for continuously outputting the failure detection / inspection lock signal, and in response to the failure detection / inspection start signal, output of a main detection / inspection lock signal is started and the failure detection / inspection start signal Main detection / inspection lock signal output means for continuously outputting the main detection / inspection lock signal for a fourth set time even after the output of the failure detection / inspection start signal from the delay means is stopped, and the main detection The closing means receives the main detection inspection start signal by the output of the main detection inspection start signal delay means, and the main detection inspection lock signal output means does not output the main detection inspection lock signal. Force detection signal is output as a main detection closing signal, and the failure detection closing means receives a failure detection inspection activation signal output from the failure detection inspection activation signal delay means, and detects a failure from the failure detection inspection lock signal output means. The input signal is output as a failure detection closing signal on condition that no inspection lock signal is output.
[0011]
The present invention also provides a main failure detection signal output means for outputting a main failure detection signal when a failure occurs in the protection section of the power system, and when a failure occurs in the power system other than the protection section and the protection section. Auxiliary failure detection signal output means for outputting an auxiliary failure detection signal to the main detection inspection start signal output means for outputting a main detection inspection start signal in response to a main detection inspection command, and the main detection inspection start signal received by the main detection inspection start signal. A main detection inspection start signal delay means for delaying the output of the start signal for a first set time, a failure detection inspection start signal output means for outputting a failure detection inspection start signal in response to a failure detection inspection command, and the failure detection inspection start signal The failure detection inspection start signal delay means for delaying the output of the failure detection inspection start signal for a second set time, and the failure detection inspection in response to the main detection inspection start signal A failure detection reset means for forcibly stopping the output of the signal by supplying a first reset signal to the dynamic signal output means and the failure detection inspection activation signal delay means; and the main detection in response to the failure detection inspection activation signal. Main detection reset means for forcibly stopping the output of the signal by giving a second reset signal to the inspection activation signal output means and the main detection activation signal delay means, and main detection by the output of the main detection inspection activation signal delay means Main detection closing means for inputting an inspection start signal or the main failure detection signal and outputting any one of the input signals as a main detection closing signal on condition that the failure detection inspection start signal is not generated, and the failure detection inspection Any one of the above on condition that the failure detection inspection start signal by the output of the start signal delay means or the auxiliary failure detection signal is input and the main detection inspection start signal is not generated A failure detection closing means for outputting an input signal as a failure detection closing signal, a main detection trip command output means for outputting a main detection trip command in response to the main detection closing signal, and a failure in response to the failure detection closing signal Protection comprising: a fault detection trip command output means for outputting a detection trip command; and a trip means for tripping a circuit breaker belonging to the protection section on the condition of a logical product of the main detection trip command and the fault detection trip command. It constitutes a relay device.
[0012]
When configuring the protective relay device, the following elements can be added.
[0013]
(1) A third set time after the output of the main detection / inspection start signal is stopped from the main detection / inspection start signal delay means in response to the main detection / inspection start signal. A failure detection / inspection lock signal output means for continuously outputting the failure detection / inspection lock signal, and in response to the failure detection / inspection start signal, output of a main detection / inspection lock signal is started and the failure detection / inspection start signal Main detection / inspection lock signal output means for continuously outputting the main detection / inspection lock signal for a fourth set time even after the output of the failure detection / inspection start signal from the delay means is stopped, and the main detection The closing means inputs a main detection inspection start signal or the main failure detection signal output from the main detection inspection start signal delay means, and outputs a main detection inspection lock signal from the main detection inspection lock signal output means. Any one of the input signals is output as a main detection closing signal on condition that there is no failure, and the failure detection closing means is a failure detection inspection starting signal or a pre-auxiliary failure by the output of the failure detection inspection starting signal delay means. One of the input signals is output as a failure detection closing signal on condition that a detection signal is input and no failure detection / inspection lock signal is output from the failure detection / inspection lock signal output means.
[0014]
According to the means described above, when the main detection inspection command is output, a main detection inspection start signal is output in response to the command, and the failure detection inspection start signal output means and the failure detection inspection are output by the main detection inspection start signal. The first reset signal is given to the start signal delay means and the output of the signal is forcibly stopped, and then the main detection check start signal is the main detection closed circuit on condition that no failure detection check start signal is generated. As a signal, it is output to the main detection trip command output means, and the main output trip command output means is inspected. On the other hand, when a failure detection / inspection command is output, a failure detection / inspection start signal is output by this failure detection / inspection command, and this failure detection / inspection start signal outputs to the main detection / inspection start signal output means and the main detection / inspection start signal delay means. On the other hand, if the second reset signal is given and the output of the signal is forcibly stopped, then the failure detection inspection activation signal is detected as a failure detection closing signal on condition that no main detection inspection activation signal is generated. This is output to the trip command output means, and the failure detection trip command output means is inspected. As a result, even if the main detection inspection command and failure detection inspection command occurrence time zones overlap, the output of one start signal is reset, so the main detection trip command output means and the failure detection trip command output means At the same time, automatic inspection can be prevented.
[0015]
Furthermore, when the main detection closing means inputs the main detection inspection start signal, the input signal is output as the main detection closing signal on the condition that there is no output of the main detection inspection lock signal, while the failure detection closing means fails. When a detection / inspection start signal is input, the input signal is output as a failure detection closing signal on condition that no failure detection / inspection lock signal is output. When the command output means is restored, it is possible to prevent the main detection trip command output means and the failure detection trip command output means from operating simultaneously.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an overall configuration diagram of a protective relay device including an automatic inspection device. In FIG. 1, the protective relay device includes a main detection unit 10, a failure detection unit 12, relay contacts MX1, MX2, MX3, ..., MXn, relay contacts FDX1, FDX2, FDX3, ..., FDXn, circuit breaker CB1, CBn, CB3,..., And CBn are provided, and each of the circuit breakers CB1 to CBn is arranged in a protection section (protection range) of the power system.
[0017]
The main detection unit 10 includes a memory 14, a main failure detection circuit 16, a main detection inspection activation circuit 18, an OR gate 20, an AND gate 22, timers 24 and 26, an OR gate 28, and an AND gate 30. The output side of the AND gate 30 is connected to a relay circuit (not shown) that drives the relay contacts MX1 to MXn. The failure detection unit 12 includes a memory 32, an auxiliary failure detection circuit 34, a failure detection inspection activation circuit 36, an OR gate 38, an AND gate 40, timers 42 and 44, an OR gate 46, and an AND gate 48. The output side of the AND gate 48 is connected to a relay circuit (not shown) that drives the relay contacts FDX1 to FDXn.
[0018]
The memory 14 of the main detection unit 10 incorporates a main detection program for controlling the operation of the main detection unit 10, and the main detection unit 10 is configured to control the operation of each part according to the main detection program. Has been. The main failure detection circuit 16 is configured as a main failure detection signal output means for outputting a main failure detection signal when a ground fault occurs in the protection section of the power system. When a ground fault occurs, A “1” level main failure detection signal is output to the OR gates 20 and 28. When a main detection / inspection command is output in accordance with a main detection program built in the memory 14, the main detection / inspection activation circuit 18 generates a "1" level main detection / inspection activation signal by the OR gate 20, The main detection / inspection activation signal output means outputs to the AND gate 22 and the timer 26. The OR gate 20 detects the failure of the failure detection unit 12 by using the signal “1” as the first reset signal when the signal “1” is output from the main failure detection circuit 16 or the main detection inspection activation circuit 18. The signal is output to the inspection activation circuit 36 and the AND gate 40, and the output of the signal "1" from the failure detection inspection activation circuit 36 and the AND gate 40 is forcibly stopped. That is, the OR gate 20 and the AND gate 40 are configured as failure detection reset means. The AND gate 22 outputs a main detection / inspection activation signal output from the main detection / inspection activation circuit 18 to the timer 24 on condition that the second reset signal of “1” level is not input from the failure detection unit 12. It has become. The timer 24 is an on-delay timer, as shown in FIG. 2 (a), for main detection / inspection activation that delays the “1” level main detection / inspection activation signal output from the AND gate 22 by a first set time t. The main detection / inspection activation signal delayed by time t is input to the OR gate 28 as signal delay means. As an off-delay timer, the timer 26 starts outputting a "1" level failure detection inspection lock signal in response to the main detection inspection activation signal output from the main detection inspection activation circuit 18, and the main detection inspection activation circuit 18 Even after the output of the main detection / inspection start signal of “1” level is stopped, the “1” level failure detection / inspection lock signal continues to the AND gate 48 for the third set time t ′. It is configured as a failure detection / inspection lock signal output means for outputting. The OR gate 28 outputs a “1” level signal to the AND gate 30 when a “1” signal is output from the main failure detection circuit 16 or the timer 24. The AND gate 30 is provided with the condition that the “1” level main detection inspection lock signal is not input from the failure detection unit 12 when the “1” level signal is input from the OR gate 28. The signal is output as a main detection closing signal to the relay circuit of the relay contacts MX1 to MXn. That is, the OR gate 28 and the AND gate 30 are configured as main detection closing means. The relay contacts MX1 to MXn are configured to close their contacts and output a main detection trip command when a “1” level signal is output from the AND gate 30. That is, the relay contacts MX1 to MXn are configured as main detection trip command output means.
[0019]
On the other hand, the memory 32 of the failure detection unit 12 contains a program (failure detection program) for controlling the operation of the failure detection unit 12. The auxiliary failure detection circuit 34 outputs an “1” level signal as an auxiliary failure detection signal to the OR gates 38 and 46 when a ground fault or the like occurs in the protection section of the power system and the power system other than the protection section. It is configured as a failure detection signal output means. The failure detection / inspection activation circuit 36 outputs a failure detection / inspection activation signal of "1" level in response to the failure detection / inspection command when a failure detection / inspection command is output as the failure detection program stored in the memory 32 is executed. It is configured as a failure detection inspection activation signal output means for outputting to the OR gate 38, the AND gate 40, and the timer 44. When the “1” level signal is output from the auxiliary failure detection circuit 34 or the failure detection inspection activation circuit 36, the OR gate 38 uses the “1” level signal as the second reset signal as the main detection inspection activation circuit 18. Are output to the AND gate 22 and the output of the "1" level signal from the main detection / inspection activation circuit 18 and the AND gate 22 is forcibly stopped. That is, the OR gate 38 and the AND gate 22 are configured as main detection reset means. The AND gate 40 is provided on condition that the “1” level first reset signal is not input from the OR gate 20 when the “1” level failure detection inspection start signal is input from the failure detection inspection start circuit 36. , “1” level failure detection inspection activation signal is output to the timer 42. The timer 42 is configured as an on-delay timer as failure detection inspection activation signal delay means for outputting a “1” level signal after a second set time t when a “1” level signal is input from the AND gate 40. The failure detection inspection activation signal delayed by time t is input to the OR gate 46. As an off-delay timer, the timer 44 starts outputting a “1” level main detection / inspection lock signal when a “1” level failure detection / inspection activation signal is input from the failure detection / inspection activation circuit 36. Even after the output of the “1” level failure detection / inspection start signal from the detection / inspection start circuit 36 is stopped, the AND gate 30 outputs the “1” level main detection / inspection lock signal for the second set time t ′. The main detection / inspection lock signal output means is configured to output continuously. The OR gate 46 outputs a “1” level signal to the AND gate 48 when a “1” level signal is input from the auxiliary failure detection circuit 34 or the timer 42. The AND gate 48 detects the failure at “1” level on condition that the “1” level failure detection check lock signal is not input from the timer 26 when the “1” level signal is input from the OR gate 46. A closing signal is output to the relay contacts FDX1 to FDXn. That is, the OR gate 46 and the AND gate 48 are configured as failure detection closing means.
[0020]
The relay contacts FDX1 to FDXn are closed when a "1" level failure detection closing signal is output from the AND gate 48, and a failure detection trip command is output from each of the relay contacts FDX1 to FDXn. . That is, each of the relay contacts FDX1 to FDXn is configured as a failure detection trip command output means. Further, the relay contacts FDX1 to FDXn are connected in series with the relay contacts MX1 to MXn and connected to the trip circuit of each of the circuit breakers CB1 to CBn. Each circuit breaker CB1 to CBn is a trip means for tripping each circuit breaker CB1 to CBn on the condition of a logical product of the main detection trip command and the failure detection trip command, for example, a logical product of the main detection trip command and the failure detection trip command. The trip breaker CB1 to CBn opens the bus or transmission line belonging to the power system in the protection section when the contact of each relay contact MX1 to MXn, FDX1 to FDXn is closed. It has become.
[0021]
In the above configuration, when the main detection inspection command and the failure detection inspection command are not output, a ground fault or the like occurs in the protection section of the power system, and a signal of “1” level is output from the main failure detection circuit 16. Then, the outputs of the OR gate 28 and the AND gate 30 become “1” level, the relay contacts MX1 to MXn are closed, and the main detection trip command is output. At this time, if a "1" level signal is output from the auxiliary failure detection circuit 34, a "1" level signal is output from the OR gate 46 and the AND gate 48, the relay contacts FDX1 to FDXn are closed, and a failure detection trip occurs. A command is output. At this time, since the condition of the logical product for driving the trip means of the circuit breakers CB1 to CBn is satisfied, each of the circuit breakers CB1 to CBn is tripped and the protection section of the power system can be protected from a ground fault or the like.
[0022]
Next, when the main detection inspection command is output by starting the main detection program when the power system is in a normal state, a main detection inspection start signal of “1” level is output from the main detection inspection start circuit 18, The failure detection inspection activation circuit 36 and the timer 32 are reset. After the main detection / inspection start signal is generated, when the time t elapses, the AND detection detection unit 12 does not receive the main detection / inspection lock signal at the “1” level from the failure detection unit 12. A closing signal is output to each of the relay contacts MX1 to MXn, and each relay contact is closed, whereby automatic inspection for each of the relay contacts MX1 to MXn as an inspection target can be executed. At this time, since the failure detection closing signal is prevented from being output from the AND gate 48 of the failure detection unit 12, only the automatic inspection of the relay contacts MX1 to MXn can be performed.
[0023]
Next, when a failure detection / inspection command is output in association with the activation of the failure detection program of the failure detection unit 12 when the power system is in a normal state, the failure detection / inspection activation circuit 36 detects a failure of “1” level. An inspection start signal is output. At this time, the main detection / inspection activation circuit 18 and the timer 24 of the main detection unit 10 are reset by the failure detection / inspection activation signal. When t time elapses after the failure detection / inspection activation signal is output, the AND gate 48 outputs a failure detection closing signal of “1” level on condition that no failure detection / inspection lock signal is output from the main detection unit 10. The relay contacts FDX1 to FDXn are output and the relay contacts are closed. Thereby, the automatic inspection with respect to the relay contacts FDX1 to FDXn as inspection objects can be performed. At this time, since the main detection / inspection activation circuit 18 and the timer 24 are reset and the main detection closing signal is prevented from being output from the AND gate 30, automatic inspection is performed only for the relay contacts FDX1 to FDXn. Can do.
[0024]
Next, the operation when the main detection / inspection command is given priority over the failure detection / inspection command will be described with reference to the time chart shown in FIG. First, after a failure detection inspection command is output by starting the program, the main detection is performed in a time zone in which this failure detection inspection command is “1” level, that is, after a failure detection inspection command is output, When the inspection command is output, the control by the main detection inspection command has priority over the failure detection inspection command, so after the failure detection inspection activation signal is output, the main detection inspection activation signal is output in the overlapping time zone. Then, the failure detection inspection activation circuit 36 and the timer 42 are reset by the main inspection activation signal by priority control. Then, after the main detection / inspection start signal is output, the main detection closing signal is output on the condition that the main detection / inspection lock signal is not output from the failure detection unit 12 in the AND gate 30 after the time t, and the relay contact MX1 is output. -MXn is closed, and the relay contacts MX1-MXn are automatically inspected. That is, even if the failure detection inspection activation signal and the main detection inspection activation signal are generated in the overlapping time zone, when the control of the main detection unit 10 is prioritized, only the relay contacts MX1 to MXn are automatically inspected. It will be.
[0025]
In the present embodiment, after the inspection operation by the main detection unit 10 or the inspection operation by the failure detection unit 12 is completed, the timer 26 performs an AND gate from the timer 26 at the time of inspection by the main detection unit 10 even after time t ′ after the completion of the inspection. 48, a failure detection / inspection lock signal is output, and at the time of inspection by the failure detection unit 12, the main detection / inspection lock signal is output from the timer 44 to the AND gate 30, so that each relay contact MX1 to MXn or relay contact Even when the FDX1 to FDXn return, the main detection trip command and the failure detection trip command can be prevented from being output at the same time.
[0026]
In the above-described embodiment, when the automatic inspection for each of the relay contacts MX1 to MXn is performed at high speed, a configuration is adopted in which the output signal of the OR gate 20 is supplied to the timer 44 and the timer 44 is cleared by the output signal of the OR gate 20. The relay contacts MX1 to MXn can be inspected without waiting for the timer 44 to return.
[0027]
According to the present embodiment, even if the main detection inspection command and the failure detection inspection command occur in a time zone that is mistakenly overlapped, the operation of the other unit is reset by the command of one unit, and the main detection inspection activation is started. After the signal or the failure detection inspection activation signal is output, the automatic inspection for the inspection object is executed only on condition that the lock signal is not output from the other unit after t time as the cooperative time zone. Even if the main detection inspection command and the failure detection inspection command are erroneously generated in the overlapping time zone, it is possible to reliably carry out automatic inspection for only one inspection object.
[0028]
【The invention's effect】
As described above, in the present invention, when a main detection / inspection command is output, a main detection / inspection start signal is output in response to the command, and a failure detection / inspection start signal output means is output by the main detection / inspection start signal. The main detection inspection start signal is provided on the condition that the first reset signal is given to the failure detection inspection start signal delay means and the output of the signal is forcibly stopped, and then no failure detection inspection start signal is generated. Is output to the main detection trip command output means as the main detection closing signal, and the main output trip command output means is inspected. On the other hand, when the failure detection inspection command is output, the failure detection inspection instruction is started by this failure detection inspection instruction. A signal is output, and a second reset signal is sent to the main detection inspection start signal output means and the main detection inspection start signal delay means by the failure detection inspection start signal. The signal output is forcibly stopped and the failure detection inspection activation signal is output to the failure detection trip command output means as a failure detection closing signal on condition that no main detection inspection activation signal is generated. Then, the failure detection trip command output means is inspected. Therefore, according to the present invention, since the output of one of the start signals is reset even when the generation times of the main detection inspection command and the failure detection inspection command overlap, the main detection trip command output means and the failure detection trip command It is possible to prevent simultaneous automatic inspection of the output means.
[Brief description of the drawings]
FIG. 1 is an overall configuration diagram of a protective relay device showing an embodiment of the present invention.
FIG. 2 is a time chart for explaining the operation of the apparatus shown in FIG.
[Explanation of symbols]
10 Main detection unit
12 Failure detection unit
14 memory
16 Main fault detection circuit
18 Main detection inspection start circuit
20 OR gate
22 AND gate
24, 26 timer
28 OR gate
30 AND gate
32 memory
34 Auxiliary fault detection circuit
36 Fault detection inspection start circuit
38 OR gate
40 AND gate
42, 44 Timer
46 OR gate
48 AND gate
MX1-MXn, FDX1-FDXn Relay contact
CB1-CBn circuit breaker

Claims (4)

主検出トリップ指令と故障検出トリップ指令との論理を条件に電力系統の保護区間に属する遮断器をトリップするトリップ手段に接続されて主検出閉路信号に応答して前記トリップ手段に主検出トリップ指令を出力する主検出トリップ指令出力手段と、前記トリップ手段に接続されて故障検出閉路信号に応答して前記トリップ手段に故障検出トリップ指令を出力する故障検出トリップ指令出力手段とを点検対象として、
主検出点検指令により主検出点検起動信号を出力する主検出点検起動信号出力手段と、前記主検出点検起動信号を受けこの主検出点検起動信号の出力を第1の設定時間遅延させる主検出点検起動信号遅延手段と、故障検出点検指令により故障検出点検起動信号を出力する故障検出点検起動信号出力手段と、前記故障検出点検起動信号を受けこの故障検出点検起動信号の出力を第2の設定時間遅延させる故障検出点検起動信号遅延手段と、前記主検出点検起動信号に応答して前記故障検出点検起動信号出力手段と前記故障検出点検起動信号遅延手段に第1のリセット信号を与えて信号の出力を強制的に停止する故障検出リセット手段と、前記故障検出点検起動信号に応答して前記主検出点検起動信号出力手段と前記主検出起動信号遅延手段に第2のリセット信号を与えて信号の出力を強制的に停止する主検出リセット手段と、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号を入力し前記故障点検起動信号の発生がないことを条件に前記入力信号を主検出閉路信号として前記主検出トリップ指令出力手段に出力する主検出閉路手段と、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号を入力し前記主検出点検起動信号の発生がないことを条件に前記入力信号を故障検出閉路信号として前記故障検出トリップ指令出力手段に出力する故障検出閉路手段とを備えてなる自動点検装置。
Connected to the trip means that trips the circuit breakers belonging to the protection section of the power system on the condition of the logic of the main detection trip command and the failure detection trip command, the main detection trip command is sent to the trip means in response to the main detection closing signal. The main detection trip command output means for outputting, and the fault detection trip command output means connected to the trip means and outputting a fault detection trip command to the trip means in response to the fault detection closing signal, are subject to inspection,
Main detection / inspection start signal output means for outputting a main detection / inspection start signal in response to a main detection / inspection command, and main detection / inspection start to receive the main detection / inspection start signal and delay the output of the main detection / inspection start signal for a first set time. A signal delay means, a failure detection inspection activation signal output means for outputting a failure detection inspection activation signal in response to a failure detection inspection instruction, and delaying the output of the failure detection inspection activation signal upon receipt of the failure detection inspection activation signal by a second set time. A failure detection / inspection activation signal delaying means, and a first reset signal applied to the failure detection / inspection activation signal output means and the failure detection / inspection activation signal delay means in response to the main detection / inspection activation signal to output a signal. A failure detection resetting means for forcibly stopping, a main detection inspection activation signal output means and a main detection activation signal delay means in response to the failure detection inspection activation signal. The main detection reset means for forcibly stopping the output of the signal by giving the reset signal and the main detection inspection activation signal by the output of the main detection inspection activation signal delay means are input and the failure inspection activation signal is not generated The main detection closing means for outputting the input signal as the main detection closing signal to the main detection trip command output means on condition that the failure detection inspection activation signal is output by the output of the failure detection inspection activation signal delay means. An automatic inspection device comprising failure detection closing means for outputting the input signal as a failure detection closing signal to the failure detection trip command output means on condition that no inspection activation signal is generated.
請求項1記載の自動点検装置において、前記主検出点検起動信号に応答して故障検出点検ロック信号の出力を開始し前記主検出点検起動信号遅延手段から主検出点検起動信号の出力が停止された後も第3の設定時間の間は前記故障検出点検ロック信号を継続して出力する故障検出点検ロック信号出力手段と、前記故障検出点検起動信号に応答して主検出点検ロック信号の出力を開始し前記故障検出点検起動信号遅延手段から故障検出点検起動信号の出力が停止された後も第4の設定時間の間は前記主検出点検ロック信号を継続して出力する主検出点検ロック信号出力手段とを備え、前記主検出閉路手段は、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号を入力し前記主検出点検ロック信号出力手段から主検出点検ロック信号の出力がないことを条件に前記入力信号を主検出閉路信号として出力してなり、前記故障検出閉路手段は、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号を入力し前記故障検出点検ロック信号出力手段から故障検出点検ロック信号の出力がないことを条件に前記入力信号を故障検出閉路信号として出力してなることを特徴とする自動点検装置。2. The automatic inspection device according to claim 1, wherein output of a failure detection inspection lock signal is started in response to the main detection inspection activation signal, and output of the main detection inspection activation signal is stopped from the main detection inspection activation signal delay means. After that, during the third set time, the failure detection inspection lock signal output means for continuously outputting the failure detection inspection lock signal and output of the main detection inspection lock signal in response to the failure detection inspection start signal are started. The main detection / inspection lock signal output means for continuously outputting the main detection / inspection lock signal for a fourth set time even after the output of the failure detection / inspection start signal is stopped from the failure detection / inspection start signal delay means. And the main detection circuit closing means inputs a main detection inspection start signal output from the main detection inspection start signal delay means, and receives a main detection inspection lock signal from the main detection inspection lock signal output means. The input signal is output as a main detection closing signal on condition that there is no output, and the failure detection closing means inputs a failure detection inspection starting signal by an output of the failure detection inspection starting signal delay means, and the failure An automatic inspection device characterized in that the input signal is output as a failure detection closing signal on condition that a failure detection inspection lock signal is not output from the detection inspection lock signal output means. 電力系統の保護区間で故障が発生したときに主故障検出信号を出力する主故障検出信号出力手段と、前記保護区間および前記保護区間以外の電力系統で故障が発生したときに補助故障検出信号を出力する補助故障検出信号出力手段と、主検出点検指令により主検出点検起動信号を出力する主検出点検起動信号出力手段と、前記主検出点検起動信号を受けこの主検出点検起動信号の出力を第1の設定時間遅延させる主検出点検起動信号遅延手段と、故障検出点検指令により故障検出点検起動信号を出力する故障検出点検起動信号出力手段と、前記故障検出点検起動信号を受けこの故障検出点検起動信号の出力を第2の設定時間遅延させる故障検出点検起動信号遅延手段と、前記主検出点検起動信号に応答して前記故障検出点検起動信号出力手段と前記故障検出点検起動信号遅延手段に第1のリセット信号を与えて信号の出力を強制的に停止する故障検出リセット手段と、前記故障検出点検起動信号に応答して前記主検出点検起動信号出力手段と前記主検出起動信号遅延手段に第2のリセット信号を与えて信号の出力を強制的に停止する主検出リセット手段と、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号または前記主故障検出信号を入力し前記故障検出点検起動信号の発生がないことを条件に前記いずれかの入力信号を主検出閉路信号として出力する主検出閉路手段と、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号または前記補助故障検出信号を入力し前記主検出点検起動信号の発生がないことを条件に前記いずれかの入力信号を故障検出閉路信号として出力する故障検出閉路手段と、前記主検出閉路信号に応答して主検出トリップ指令を出力する主検出トリップ指令出力手段と、前記故障検出閉路信号に応答して故障検出トリップ指令を出力する故障検出トリップ指令出力手段と、前記主検出トリップ指令と前記故障検出トリップ指令との論理積を条件に前記保護区間に属する遮断器をトリップするトリップ手段とを備えてなる保護継電装置。A main failure detection signal output means for outputting a main failure detection signal when a failure occurs in the protection section of the power system, and an auxiliary failure detection signal when a failure occurs in the power system other than the protection section and the protection section. Auxiliary failure detection signal output means for outputting, a main detection inspection activation signal output means for outputting a main detection inspection activation signal in response to a main detection inspection command, and receiving the main detection inspection activation signal, 1 main detection inspection start signal delay means for delaying a set time of 1; failure detection inspection start signal output means for outputting a failure detection inspection start signal in response to a failure detection inspection command; A failure detection inspection activation signal delay means for delaying the output of the signal for a second set time; and the failure detection inspection activation signal output means in response to the main detection inspection activation signal. A failure detection reset means for forcibly stopping the output of the signal by giving a first reset signal to the failure detection inspection activation signal delay means; and the main detection inspection activation signal output means in response to the failure detection inspection activation signal. A main detection reset means for forcibly stopping the output of the signal by giving a second reset signal to the main detection start signal delay means, and a main detection check start signal by the output of the main detection check start signal delay means or the A main detection closing means for inputting a main failure detection signal and outputting any one of the input signals as a main detection closing signal on condition that the failure detection inspection start signal is not generated; and a failure detection inspection start signal delay means; Failure of any of the input signals on condition that the failure detection inspection start signal by output or the auxiliary failure detection signal is input and the main detection inspection start signal is not generated A failure detection closing means for outputting as an output / closing signal, a main detection trip command output means for outputting a main detection trip command in response to the main detection closing signal, and a failure detection trip command in response to the failure detection closing signal. A protection relay device comprising: a fault detection trip command output means for outputting; and a trip means for tripping a circuit breaker belonging to the protection section on the condition of a logical product of the main detection trip command and the fault detection trip command. 請求項3記載の保護継電装置において、前記主検出点検起動信号に応答して故障検出点検ロック信号の出力を開始し前記主検出点検起動信号遅延手段から主検出点検起動信号の出力が停止された後も第3の設定時間の間は前記故障検出点検ロック信号を継続して出力する故障検出点検ロック信号出力手段と、前記故障検出点検起動信号に応答して主検出点検ロック信号の出力を開始し前記故障検出点検起動信号遅延手段から故障検出点検起動信号の出力が停止された後も第4の設定時間の間は前記主検出点検ロック信号を継続して出力する主検出点検ロック信号出力手段とを備え、前記主検出閉路手段は、前記主検出点検起動信号遅延手段の出力による主検出点検起動信号または前記主故障検出信号を入力し前記主検出点検ロック信号出力手段から主検出点検ロック信号の出力がないことを条件に前記いずれかの入力信号を主検出閉路信号として出力してなり、前記故障検出閉路手段は、前記故障検出点検起動信号遅延手段の出力による故障検出点検起動信号または前補助故障検出信号を入力し前記故障検出点検ロック信号出力手段から故障検出点検ロック信号の出力がないことを条件に前記いずれかの入力信号を故障検出閉路信号として出力してなることを特徴とする保護継電装置。In the protective relay device according to claim 3, in response to the main detection inspection start signal, output of a failure detection inspection lock signal is started, and output of the main detection inspection start signal is stopped from the main detection inspection start signal delay means. After that, during the third set time, the failure detection inspection lock signal output means for continuously outputting the failure detection inspection lock signal and the output of the main detection inspection lock signal in response to the failure detection inspection start signal are output. The main detection / inspection lock signal output for continuously outputting the main detection / inspection lock signal for a fourth set time even after the output of the failure detection / inspection start signal from the failure detection / inspection start signal delay means is stopped. The main detection closing means receives the main detection inspection activation signal or the main failure detection signal output from the main detection inspection activation signal delay means, and outputs the main detection inspection lock signal output means. Any one of the input signals is output as a main detection closing signal on condition that no main detection inspection lock signal is output from the failure detection circuit, and the failure detection closing means is a failure caused by the output of the failure detection inspection start signal delay means. A detection / inspection start signal or a pre-auxiliary failure detection signal is input, and one of the input signals is output as a failure detection closing signal on condition that no failure detection / inspection lock signal is output from the failure detection / inspection lock signal output means. A protective relay device characterized in that.
JP25660899A 1999-09-10 1999-09-10 Automatic inspection device and protective relay device Expired - Fee Related JP3840630B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25660899A JP3840630B2 (en) 1999-09-10 1999-09-10 Automatic inspection device and protective relay device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25660899A JP3840630B2 (en) 1999-09-10 1999-09-10 Automatic inspection device and protective relay device

Publications (2)

Publication Number Publication Date
JP2001086636A JP2001086636A (en) 2001-03-30
JP3840630B2 true JP3840630B2 (en) 2006-11-01

Family

ID=17295005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25660899A Expired - Fee Related JP3840630B2 (en) 1999-09-10 1999-09-10 Automatic inspection device and protective relay device

Country Status (1)

Country Link
JP (1) JP3840630B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6140658B2 (en) 2014-08-20 2017-05-31 株式会社Soken Traveling lane marking recognition device, traveling lane marking recognition program

Also Published As

Publication number Publication date
JP2001086636A (en) 2001-03-30

Similar Documents

Publication Publication Date Title
JPH11313438A (en) Fault protection device for power distribution system
US5574611A (en) Service interruption minimizing system for power distribution line
CN100380766C (en) Direction comparing distance relay apparatus
JP3840630B2 (en) Automatic inspection device and protective relay device
JP3760759B2 (en) Overcurrent relay device
JPS6338930B2 (en)
US20240305090A1 (en) Method and system for protecting an electrical distribution network comprising at least two sources of electrical energy
JP2746951B2 (en) Protective relay
JPH04299019A (en) Circuit for reclosing pcm current differential relay device
JPS6318412B2 (en)
JPH09103029A (en) Protection system for power system
JP2005168150A (en) Automatic inspection device for protective relay device
JP2001103666A (en) Opening phase-controlling device and dispersion-type- controlling device incorporating it
SU964833A1 (en) Device for single-phase automatic reconnection of power transmission line
JPH01238422A (en) Protective device for distribution system
JP3374211B2 (en) Reclosing circuit device
JPS58198113A (en) Reclosing device for protecting relaying equipment
KR100979603B1 (en) Protection control apparatus
SU1015462A1 (en) Device for automatic reconnection for automatics of advancing division of mains
JPS61177118A (en) Reclosing relay system
JPH0135578B2 (en)
JPS5947528B2 (en) Slight ground fault selection relay method
JPH04299016A (en) Reclosing system
JP2005012949A (en) Field blocker throw-in interlock device of motor
KR950010268A (en) Distribution line open and close method and line switch control device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050131

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060626

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060704

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060727

R150 Certificate of patent (=grant) or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees