JP3819515B2 - Interline flicker reduction device, down converter device, and video signal processing device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention is an interline arranged at the front stage of a down-converter device that converts a video signal of a high-definition television such as a high-definition television into a video signal of an existing television, for example, a video signal of an NTSC television or a PAL television. More particularly, the present invention relates to an interline flicker reduction apparatus that reduces interline flicker that occurs during conversion by a down-converter apparatus and related apparatuses.
[0002]
[Summary of Invention]
The present invention relates to an interline flicker reduction device and related devices for reducing interline flicker generated in a television system using an interlace scanning method, and particularly relates to an NTSC video signal for a high definition television such as a high-definition television. When converting to a video signal such as a television or a PAL television, the high-frequency component in the oblique direction included in the high-definition television video signal is not subjected to band limitation, and the high-definition television video signal By limiting the band of only the included vertical high frequency component, the flicker in the television video signal after down-conversion is reduced while preventing the resolution from being deteriorated.
[0003]
[Prior art]
When a high-definition television image signal such as a high-definition television is played back on a current television (for example, an NTSC television or a PAL television), a combination of digital filter processing and sub-sampling processing as shown in FIG. The video signal of the high-definition television is converted into the video signal of the current television using the down-converter device that performs the above.
[0004]
The down-converter device 101 shown in this figure takes an A / D conversion circuit 102 that takes in a video signal (high-definition television video signal) of a high-definition television to be converted and performs A / D conversion (analog / digital conversion). A horizontal low-pass filter circuit 103 that performs a low-pass filtering process on the horizontal direction of the high-definition television video signal output from the A / D conversion circuit 102 to limit the horizontal band, and the horizontal low-pass filter. A vertical low-pass filter circuit 104 that performs low-pass filtering processing to interpolate scanning lines with respect to the vertical direction of a high-definition television video signal output from the circuit 103, and an image output from the vertical low-pass filter circuit 104 A scanning line thinning circuit 105 for thinning signal scanning lines, and this scanning line thinning circuit The video signal output from 105 to D / A conversion (digital / analog converter), and a D / A converter circuit 106 to the current TV video signal (current television picture signal).
[0005]
Then, the high-definition television image signal to be converted is captured, digitized, and then subjected to horizontal low-pass filtering processing to limit the horizontal band and vertical low-pass filtering processing to perform scanning line processing. Are interpolated, the scanning lines of the obtained video signal are thinned out, and then analogized to obtain the current television video signal.
[0006]
In this case, the vertical low-pass filter circuit 104 generates a video signal having a scanning line number that is the least common multiple of the scanning line number of the high-definition television video signal and the scanning line number of the current television video signal. For example, if the high-definition television video signal is a high-definition video signal having 1125 scanning lines and the current television video signal is an NTSC television video signal having 525 scanning lines, the high-definition television video signal An interpolation process is performed on the video signal to generate a video signal having 7875 scanning lines corresponding to the least common multiple.
[0007]
In the scanning line thinning circuit 105, the number of scanning lines of the video signal output from the vertical low-pass filter circuit 104 is set to the number of scanning lines of the current television video signal to be converted, for example, 525 current television video signals. In the case of an NTSC television video signal having the number of scanning lines, the scanning lines of the video signal output from the vertical low-pass filter circuit 104 are grouped every 15 lines, and one scanning line is taken out from each of these groups. Thus, the number of scanning lines of the current television video signal (NTSC, PAL, etc.) is set.
[0008]
However, the above-described processing is for explaining the conversion principle, and in an actual down-converter device, the circuit is simplified by performing some omission when the hardware is realized.
[0009]
[Problems to be solved by the invention]
However, when the above-described conventional down-converter device 101 is used to convert a high-definition television video signal into a current television video signal, there are the following problems.
[0010]
In other words, high-definition television video signals such as high-definition televisions have high-frequency components in the vertical direction, so when a high-definition television video signal is down-converted to the current television video signal, the high-definition television signal The high-frequency component in the vertical direction of the television video signal appears as interline flicker, and the image quality deteriorates. In particular, a high-definition television image signal is a video signal that includes a high-frequency component in the vertical direction and a low-frequency component in the horizontal direction, such as a video signal that includes a horizontal line of white characters superimposed on the screen. At some point, interline flicker appears prominently.
[0011]
Therefore, as a method of reducing such interline flicker, conventionally, a method of uniformly limiting the vertical band by the vertical low-pass filter circuit 104 or the like has been employed. However, in such a method, interline flicker is used. However, at the same time, the resolution in the vertical direction deteriorates. For this reason, there is a problem that the conflicting problems of reducing interline flicker and preventing resolution degradation cannot be essentially solved only by limiting the band using a low-pass filter for scanning line interpolation. there were.
[0012]
In addition, since such interline flicker is a problem inherent to a television system using an interlace scanning method, there is a problem that interline flicker occurs even in an NTSC camera having a high vertical resolution. . In particular, among the currently used NTSC cameras, a camera that uses a one-line readout type CCD to improve the vertical resolution has a problem that such interline flicker occurs. there were.
[0013]
In addition, although such a problem does not occur in the high-definition camera at present, if the MTF is improved in the future, the problem of the interline flicker described above will also occur in the high-definition camera. .
[0015]
SUMMARY OF THE INVENTION In view of the above circumstances, the present invention prevents the reduction in resolution when downconverting a high-definition television video signal to a current television video signal with hardware of a scale that does not cause a problem in practice. It is an object of the present invention to provide an interline flicker reduction device capable of performing video processing necessary to achieve both reduction of interline flicker.
[0016]
Further, in claim 2, when the current television picture signal of high definition television video signal is down-converted, while preventing a decrease in resolution, provide a down-converter device capable of reducing the interline flicker The purpose is to do.
[0017]
According to the third aspect of the present invention, the interline flicker component included in the high-definition television video signal output from the interlaced scanning camera can be greatly reduced, thereby reducing the vertical resolution. It is an object of the present invention to provide a video signal processing apparatus that can reduce interline flicker without causing the image to flicker.
[0019]
[Means for Solving the Problems]
In order to achieve the above object, the interline flicker reduction apparatus according to the present invention described in claim 1 performs band limitation in the vertical direction on a high-definition television video signal using an interlace scanning method, and it obtains the difference between the high-definition television video signal before this is band-limited already high definition television video signal and band limitation, and vertical high-frequency component extraction circuit for generating a vertical high-frequency signal, The vertical high-frequency signal output from the vertical high-frequency component extraction circuit is band-limited in the horizontal direction, and the vertical high-frequency / horizontal low-frequency signal obtained by the band limiting process and the band limitation are obtained. A horizontal high-frequency component extraction circuit that generates a diagonal high-frequency signal by obtaining a difference from the vertical high-frequency signal before processing, and a diagonal output from the horizontal high-frequency component extraction circuit. By adding the directional high-frequency band signal and a high definition television video signal band-limited already generated by the vertical high-frequency component extraction circuit, a high definition television in which only the high-frequency component of the vertical band-limited And an adder circuit for generating a video signal.
[0020]
According to a second aspect of the present invention, the interline flicker reducing device according to the first aspect is arranged in a stage preceding the downconverter main body for converting a high definition television video signal into a current standard television video signal. It is characterized by being configured .
[0021]
Further, the invention described in claim 3 is the image signal processing apparatus for output processing or video processing high-definition television video signal, a portion of the high-definition television video signal output processing or video processing apparatus as it has been characterized by using the interline flicker reduction apparatus according to claim 1.
[0023]
According to the first aspect of the present invention, the vertical direction high-frequency component extraction circuit limits the bandwidth in the vertical direction to the high-definition television video signal using the interlace scanning method, and performs this bandwidth limitation processing. After obtaining the difference between the high-definition television video signal obtained in step 1 and the high-definition television video signal before the band limiting process, and generating the vertical high-frequency signal, the horizontal high-frequency component extraction circuit The vertical high-frequency signal output from the vertical high-frequency component extracting circuit is band-limited in the horizontal direction, and the vertical high-frequency / horizontal low-frequency signal obtained by this band limiting processing and the band limitation are obtained. Obtaining the difference from the vertical high-frequency signal before processing to generate a diagonal high-frequency signal, and further, by the addition circuit, the diagonal high-frequency signal output from the horizontal high-frequency component extraction circuit By the adding the high-definition television video signal having a bandwidth limitations already output from the vertical high-frequency component extraction circuit, into a high definition television video signal to limit only the high frequency components in the vertical direction, When downconverting a high-definition television video signal to the current television video signal with hardware that does not cause a problem in practice, it is possible to achieve both reduction in resolution and reduction in interline flicker. Perform the necessary video processing.
[0024]
Further, according to the invention of claim 2, in front of the down converter device body for converting the high-definition television video signal in the current standard system television video signals, placing the interline flicker reduction apparatus according to claim 1 By doing so, when down-converting a high-definition television video signal into the current television video signal, interline flicker is reduced while preventing a reduction in resolution.
[0025]
According to a third aspect of the present invention, interlace scanning is performed by using the interline flicker reducing apparatus according to the first aspect as a part of an apparatus for outputting or processing a high-definition television video signal. The interline flicker component contained in the high definition television video signal output from the system camera is greatly reduced, thereby reducing the interline flicker without reducing the vertical resolution.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
《Explanation of basic principle》
First, prior to detailed description of the interline flicker reducing apparatus and related devices according to the present invention, the basic principle of the interline flicker reducing apparatus and related devices according to the present invention will be described.
[0027]
In general, the magnitude of the energy of the high-frequency component in the vertical direction contained in the video signal is proportional to the size of the interline flicker that appears when the video signal obtained by down-converting the video signal is reproduced. Interline flicker can be reduced by uniformly limiting the vertical band included in the video signal.
[0028]
However, when interline flicker is reduced using such an interline flicker reduction method, when an image including a specific pattern is processed, for example, a horizontal frequency component is added to a high frequency component portion in the vertical direction. When an image including the same is processed, when the vertical band is uniformly limited, all vertical high frequency components are deleted regardless of the presence or absence of horizontal frequency components, resulting in a decrease in resolution.
[0029]
On the other hand, in general images (general images), since there are few images that include high-frequency components in the vertical direction and high-frequency components in the horizontal direction, that is, images that include high-frequency components in the diagonal direction, The energy of the frequency component is small, and even if the band of the high frequency component in the oblique direction is not limited, the interline flicker hardly occurs.
[0030]
That is, in a general image, even if the frequency component in an oblique direction is not band-limited, there is a low possibility that an interline flicker of a problem level is generated in practice, and the level is originally low. If the frequency components in the oblique direction are limited, the resolution is degraded and the image is blurred.
[0031]
Therefore, in the interline flicker reduction apparatus and related apparatus according to the present invention, the above-mentioned properties of general images are used, and a high-frequency component in an oblique direction is applied to a high-definition television video signal input to the down-converter apparatus. Without band limiting, only the high frequency component in the vertical direction is band limited, which makes the band limitation of the interpolating low-pass filter for scanning line conversion used in the down converter device a gentle characteristic and high resolution. The interline flicker, which is a problem in practical use, is prevented from occurring while it is secured.
[0032]
<< Description of Embodiment >>
FIG. 1 is a block diagram showing an example of an interline flicker reducing apparatus according to an embodiment of the interline flicker reducing apparatus and related apparatuses according to the present invention.
[0033]
The interline flicker reduction apparatus 1 shown in this figure includes an A / D conversion circuit 2, a vertical high frequency component extraction circuit 3, a horizontal high frequency component extraction circuit 4, and an addition circuit 5. The high-definition television video signal is taken in, and the high-frequency component included in the high-definition television video signal is not subjected to band limitation on the oblique high-frequency component contained in the high-definition television video signal. By restricting only the band components, the high-definition television video signal is input to the down-conversion device, and when the down-conversion is performed, the resolution of the current television video signal is not deteriorated, and the interline flicker Reduce.
[0034]
The A / D conversion circuit 2 takes in a high-definition television video signal, A / D-converts it, and converts the high-definition television digital video signal having an energy distribution as shown in FIG. This is generated and supplied to the vertical high-frequency component extraction circuit 3.
[0035]
The vertical high-frequency component extraction circuit 3 performs low-pass filtering in the vertical direction on the high-definition television digital video signal output from the A / D conversion circuit 2 as shown in FIG. A vertical low-pass filter circuit 6 that generates a high-definition television digital video signal having an accurate energy distribution, and a high-definition television digital video signal output from the A / D conversion circuit 2 and the vertical low-pass filter circuit 6 And a subtracting circuit 7 for generating a vertical high-frequency signal having an energy distribution as shown in FIG. 2 (c) by taking the difference from the band-limited high-definition television digital video signal. The band limitation in the vertical direction is performed on the high-definition television digital video signal output from the A / D conversion circuit 2 and obtained by this band limitation process. The high-definition television digital video signal is supplied to the adder circuit 5 and the difference between the band-limited high-definition television digital video signal and the high-definition television digital video signal before the band limitation processing is obtained. Thus, a vertical high frequency signal is generated and supplied to the horizontal high frequency component extraction circuit 4.
[0036]
The horizontal high-frequency component extraction circuit 4 performs a low-pass filtering process in the horizontal direction on the vertical high-frequency signal output from the vertical high-frequency component extraction circuit 3, as shown in FIG. A horizontal low-pass filter circuit 8 that generates a vertical high-frequency / horizontal low-frequency signal having an energy distribution, a vertical high-frequency signal output from the vertical high-frequency component extraction circuit 3, and a horizontal low-pass filter circuit 8 And a subtracting circuit 9 for generating an oblique high-frequency signal having an energy distribution as shown in FIG. 3B by taking the difference between the vertical high-frequency / horizontal low-frequency signal. The vertical high-frequency signal output from the direction high-frequency component extraction circuit 3 is subjected to horizontal band limitation, and the vertical high-frequency / horizontal low-frequency signal obtained by the band limitation processing and the band limitation processing are obtained. Of obtaining a difference between the vertical high-frequency signal, and generates a diagonal direction high frequency signal and supplies it to the adder circuit 5.
[0037]
The adder circuit 5 outputs the oblique high-frequency signal output from the horizontal high-frequency component extraction circuit 4 and the band-limited high-definition television digital video signal output from the vertical high-frequency component extraction circuit 3. In addition, the high-definition television digital video signal having the energy distribution as shown in FIG. 3C, that is, the high-definition television digital video signal output from the A / D conversion circuit 2 is slanted. The high-frequency component in the direction is not subjected to band limitation, and a high-definition television digital video signal in which only the high-frequency component in the vertical direction is band-limited is generated and supplied to the down-conversion device.
[0038]
As described above, in this embodiment, a high-definition television video signal is captured, and the high-definition television video signal is not subjected to band limitation on the oblique high-frequency component included in the high-definition television video signal. High-definition television is designed to limit the band of only the vertical high-frequency component contained in the high-definition television video signal and supply the high-definition television digital video signal obtained thereby to the down-conversion device. When the video signal is down-converted into the current television video signal, interline flicker can be reduced while preventing a reduction in resolution.
[0039]
In this embodiment, the A / D conversion circuit 2, the vertical high-frequency component extraction circuit 3, the horizontal high-frequency component extraction circuit 4, and the adder circuit 5 are not practically problematic. The hardware is designed to limit only the vertical high-frequency component contained in the high-definition television video signal, so that the manufacture of the device can be facilitated and the down-converter device that has been conventionally used As a front device, it can be attached at low cost.
[0040]
In the above-described embodiment, the interline flicker reduction device 1 is disposed in front of the down converter device to pre-process the high-definition television video signal and down-convert the high-definition television video signal. Thus, when the current television video signal is used, the interline flicker is reduced while preventing a decrease in resolution. However, the interline flicker reduction apparatus 1 is installed in the down converter 10 as shown in FIG. The high-definition television digital video signal obtained by the video processing of the interline flicker reducing device 1 may be supplied to the down-converter device main body 11 and converted into the current television video signal.
[0041]
In this way, when down-converting a high-definition television video signal to obtain the current television video signal, it is possible to reduce interline flicker while preventing a reduction in resolution.
[0042]
In the above-described embodiment, the interline flicker reduction device 1 is disposed in front of the down converter device to pre-process the high-definition television video signal and down-convert the high-definition television video signal. Thus, when the current television video signal is used, the interline flicker is reduced while preventing the resolution from being lowered. As shown in FIG. 5, the video processing device which processes the high-definition television video signal. 12, for example, an interline flicker reduction device 1 is arranged in a video processing device 12 such as a high-definition camera device, and a high-definition television video signal obtained by video processing of the interline flicker reduction device 1 is used as it is or Further, the image may be processed and output.
[0043]
By doing so, it is possible to greatly reduce the components that cause interline flicker contained in high-definition television video signals output from interlace scanning television camera devices, etc. even as it is down-converted high-definition television video signal outputted from such device, while the vertical resolution was held, it is possible to reduce the interline flicker.
[0045]
【The invention's effect】
As described above, according to the first aspect of the present invention, when the high-definition television video signal is down-converted into the current television video signal with hardware of a scale that does not cause a problem in practice, the resolution is reduced. It is possible to perform video processing necessary to achieve both reduction prevention and reduction of interline flicker.
[0046]
According to the second aspect of the present invention, when down-converting a high-definition television video signal into the current television video signal, it is possible to reduce interline flicker while preventing a reduction in resolution. .
[0047]
According to the third aspect of the present invention, the interline flicker component contained in the high definition television video signal output from the interlace scanning type camera can be greatly reduced, and thereby the vertical Interline flicker can be reduced without reducing the directional resolution.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an example of an interline flicker reducing apparatus as an embodiment of an interline flicker reducing apparatus and related apparatuses according to the present invention.
FIG. 2 is an energy distribution diagram showing an operation example of the interline flicker reduction apparatus shown in FIG.
FIG. 3 is an energy distribution diagram showing an operation example of the interline flicker reduction apparatus shown in FIG. 1;
FIG. 4 is a block diagram showing an example of a down converter device according to another embodiment of the interline flicker reduction device and related devices according to the present invention.
FIG. 5 is a block diagram showing an example of a video processing apparatus according to another embodiment of the interline flicker reduction apparatus and related apparatuses according to the present invention.
FIG. 6 is a block diagram showing an example of a general down converter device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Interline flicker reduction device 2 A / D conversion circuit 3 Vertical high frequency component extraction circuit 4 Horizontal high frequency component extraction circuit 5 Addition circuit 6 Vertical low-pass filter circuit 7 Subtraction circuit 8 Horizontal low-pass filter circuit 9 Subtraction circuit 10 Addition circuit 11 Downconverter body 12 Video processing device

Claims (3)

To high definition television video signal using the interlaced scanning method, performs a band limiting vertical, high definition television image before being the bandlimited already high definition television video signal and band-limited A vertical high-frequency component extraction circuit that determines a difference from the signal and generates a vertical high-frequency signal;
The vertical high-frequency signal output from the vertical high-frequency component extraction circuit is band-limited in the horizontal direction, and the vertical high-frequency / horizontal low-frequency signal obtained by the band limiting process and the band limitation are obtained. A horizontal high-frequency component extraction circuit that determines a difference from the vertical high-frequency signal before processing and generates a diagonal high-frequency signal,
The diagonal high-frequency signal output from the horizontal high-frequency component extraction circuit and the band-limited high-definition television video signal generated by the vertical high-frequency component extraction circuit are added to obtain a vertical direction signal. An adder circuit for generating a high-definition television image signal in which only the high-frequency component is band-limited;
An interline flicker reduction apparatus characterized by comprising: 2. A down characterized in that the interline flicker reducing device according to claim 1 is arranged in front of a down converter device body for converting a high-definition television video signal into a current standard system television video signal. Converter device. In a video signal processing apparatus that outputs or processes a high-definition television video signal,
The high the definition television video signals as part of the output process or the image processing apparatus, a video signal processing apparatus characterized by using the interline flicker reduction apparatus according to claim 1.

Images