JP3797274B2 - Firmware dispatch method, method, and program - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a firmware dispatch method, method, and program, and more particularly, to a firmware dispatch method, method, and program in a computer system having a flash memory.
[0002]
[Prior art]
FIG. 3 is a block diagram showing an example of a flash memory. In the figure, the flash memory 11 is divided into a plurality of blocks 111 (block 1) to 115 (block 5). A program code and data can be placed in the flash memory regardless of these blocks. That is, according to the example shown in FIG. 2, task 1 program code, task 2 program code, task 3 program code, data 1 and data 2 are arranged.
[0003]
The flash memory can be erased in units of blocks, but cannot be read or written to other blocks while a certain block is being erased. When reading or writing to another block, it is necessary to wait until the block erase is completed or to temporarily erase the block.
[0004]
For example, while erasing block 4 to erase data 1, block 1, block 2, block 3, and block 5 cannot be read or written. Further, since reading of block 1, block 2, and block 3 cannot be performed, the program codes of task 1 program code, task 2 program code, and task 3 program code arranged in these cannot be fetched, and the program Cannot be executed. In order to perform these reading and writing operations, it is necessary to wait for the erasure of the block 4 to end or to temporarily suspend the erasure of the block 4.
[0005]
[Problems to be solved by the invention]
As described above, when program code and data are arranged in the flash memory, even if only a block in which a certain data exists is erased, a block with program code or other data is being erased. I can't read or write a block. Therefore, when writing such program code, it is necessary to be aware of the operation of the flash memory in each task.
[0006]
That is, the first problem is that each task requires a description that is conscious of erasing the flash memory. This is because reading / writing to the flash memory becomes impossible during erasing the flash memory.
[0007]
The second problem is that even when a flash memory is being erased, if a task requiring operation comes out, execution cannot be quickly transferred to that task. This is because the control of the flash memory and the control of the task are separated.
[0008]
SUMMARY OF THE INVENTION An object of the present invention is to provide a firmware dispatch method, method, and program capable of operating task control and flash memory control in association with each other in a firmware dispatcher in order to improve the above drawbacks. There is to do.
[0009]
[Means for Solving the Problems]
The firmware dispatch system of the present invention includes a flash memory including a plurality of blocks and storing a plurality of task programs and data, an interrupt control program for processing an input / output request from an IO module and an interrupt request from a timer, and the flash memory A RAM for storing information indicating whether or not the operation is possible during erasing for each task and storing a dispatcher for controlling the erasing operation of the flash memory and the execution operation of each task, and a CPU. When executing a task based on an arbitrary event, the operation state of the flash memory is checked, and the operation of the flash memory is determined according to the execution condition of the task.
[0010]
Furthermore, in the firmware dispatch system of the present invention, the dispatcher holds a flash memory control code for erasing and writing the flash memory, and a task management for holding a context of each task related to the task program arranged in the flash memory And a task control code that monitors the state of each task by the task management table and controls the execution of the corresponding task in accordance with an event.
[0011]
The firmware dispatch method of the present invention includes a flash memory including a plurality of blocks and storing a plurality of task programs and data, an interrupt control program for processing an input / output request from an IO module and an interrupt request from a timer, A RAM for storing information indicating whether or not the operation can be performed while erasing the flash memory for each task, and storing a dispatcher for controlling the erasing operation of the flash memory and the execution operation of each task. A method of controlling a system, wherein when a task is executed based on an arbitrary event, the operation state of the flash memory is checked, and the operation of the flash memory is determined according to an execution condition of the task. .
[0012]
Further, the firmware dispatch method of the present invention includes a flash memory including a plurality of blocks and storing a plurality of task programs and data, an interrupt control program for processing an input / output request from an IO module and an interrupt request from a timer, A RAM for storing information indicating whether or not the operation can be performed while erasing the flash memory for each task, and storing a dispatcher for controlling the erasing operation of the flash memory and the execution operation of each task. A system control method in which an arbitrary task is in an executable state, and when the flash memory is not being erased, suspended, or requested to be erased, the task arranged in the flash memory Maintains the context of each task associated with the program If a task management table is searched and an operable task is found, it is executed. If any task is in an executable state, the flash memory is being erased, suspended for erasure, or requested to be erased. When there is an operable task among the tasks necessary to operate during the flash memory erasing by searching the task management table, the erasing of the flash memory is paused and the task is executed. When the task is in an executable state, the task management table is searched and operation is required during the flash memory erasure when the flash memory is being erased, suspended temporarily, or requested to be erased. If there is no operable task among the tasks, the flash memory is erased.
[0013]
The firmware dispatch program of the present invention includes a flash memory including a plurality of blocks and storing a plurality of task programs and data, an interrupt control program for processing an input / output request from an IO module and an interrupt request from a timer, A RAM for storing information indicating whether or not the operation can be performed while erasing the flash memory for each task, and storing a dispatcher for controlling the erasing operation of the flash memory and the execution operation of each task. A control program for a system, wherein when a task is executed based on an arbitrary event, the operation state of the flash memory is checked, and the operation of the flash memory is determined according to an execution condition of the task. .
[0014]
Furthermore, a firmware dispatch program of the present invention includes a flash memory including a plurality of blocks and storing a plurality of task programs and data, an interrupt control program for processing an input / output request from an IO module and an interrupt request from a timer, A RAM for storing information indicating whether or not the operation can be performed while erasing the flash memory for each task, and storing a dispatcher for controlling the erasing operation of the flash memory and the execution operation of each task. When the system control program is in an executable state, the task allocated in the flash memory when the flash memory is not being erased, suspended, or requested to be erased The context of each task related to the program If there is an operable task by searching the task management table that holds the task, it is executed, and if any task is in an executable state, the flash memory is being erased, erase erase suspended, and an erase request If there is an operable task among the tasks required to operate during the flash memory erasure by searching the task management table, the erasure of the flash memory is suspended and the task is executed. However, if any task is in an executable state, the task management table is searched and the flash memory is being erased when the flash memory is being erased, suspended temporarily, or requested to be erased. If there is no operable task among the necessary tasks, the flash memory is erased.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will be described below with reference to the drawings.
[0016]
FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, the firmware dispatch method according to the present invention includes a plurality of blocks 211 and 212 and stores a plurality of task program codes 214 and data 213, an input / output request from the IO module 24, and a timer 25. An interrupt control code 222 for processing an interrupt request and information indicating whether or not operation is possible during erasure of the flash memory are held for each task, and the erase operation of the flash memory and the execution operation of each task are performed. A RAM 22 for storing a dispatcher 221 to be controlled, and when the CPU 23 executes a task based on an arbitrary event, the operation state of the flash memory is checked, and the operation of the flash memory is performed according to the task execution condition. To decide.
[0017]
The dispatcher 221 includes a flash memory control code 2211 for erasing and writing the flash memory, a task management table 2213 that holds contexts of tasks related to a task program arranged in the flash memory, Task control code 2212 is provided for monitoring the status of each task by the task management table and controlling the execution of the corresponding task according to the event.
[0018]
The flash memory 21 includes a block 211 and a block 212. Data 213 is arranged in the block 211, and task program code 214 is arranged in the block 212. The task program code 214 stores a program of a plurality of tasks for providing a service. The data 213 stores data such as parameters used when the task program code 214 is executed.
[0019]
The RAM 22 includes a dispatcher 221 and an interrupt control code 222.
[0020]
The dispatcher 221 includes a flash memory control code 2211, a task control code 2212, and a task management table 2213. The flash memory control code 2211 stores a program code for performing control such as erasing and writing of the flash memory. The task control code 2212 monitors the state of each task managed by the task management table 2213, and stores a program code for controlling the execution of the task according to an event that has occurred.
[0021]
The task management table 2213 manages the context of each task related to the task program code 214 arranged on the flash memory 21. This context includes information indicating whether each task is a task that needs to be executed even when the flash memory is being erased.
[0022]
The interrupt control code 222 is called when an event such as an input / output request or a timer interrupt occurs, and stores program code for processing the event.
[0023]
The CPU 23 fetches and executes the program code of the task program code 214, the flash memory control code 2211, the task control code 2212, and the interrupt control code 222. When an input / output request is received from the IO module 24 or a timer interrupt is received from the timer 25, the corresponding interrupt control code 222 is read and executed.
[0024]
The IO module 24 receives an input request or output request from the outside and notifies the CPU 23 to exchange data with the outside.
[0025]
The timer 25 periodically generates an interrupt and notifies the CPU 23.
[0026]
When an I / O request from the IO module 24 or a periodic interrupt from the timer 25 occurs, these are notified to the CPU 23. Upon receiving these, the CPU 23 interrupts the processing so far, reads and executes the interrupt control code 222, and processes each request.
[0027]
Events that cannot be processed by the interrupt control code 222 require processing to each task, and this request is reflected in the task executable state in the context of each task managed in the task management table 2213. Done.
[0028]
When the execution of the interrupt control code 222 is completed and the CPU 23 can execute another program, the task control code 2212 is read into the CPU 23 to control the task. The task control code 2212 determines how to execute the task while referring to the task management table 2213 in which the context of each task is described.
[0029]
In addition to the program counter value, stack pointer value, task executable state, etc., the context of each task managed by the task management table 2213 should be operated even if the task is being erased from the flash memory. The flag which expresses is provided. The task control code 2212 is executed for any task in consideration of the state of the task, a flag indicating whether or not the flash memory 21 should be operated even while the flash memory is being erased, and whether or not the state of the flash memory 21 is being erased. Decide whether to pass the rights.
[0030]
When the flash memory 21 is not being erased and the task control code 2212 decides to transfer the execution right to a certain task, the CPU 23 reads the program of the target task from the task program code 214 and starts execution.
[0031]
When the flash memory 21 is being erased and the task control code 2212 is determined to pass control to a certain task, the flash memory control code 2211 is read by the CPU 23 and the flash memory 21 is temporarily erased. Thereafter, the program of the target task is read into the CPU 23 from the task program code 214, and execution is started.
[0032]
When the processing of the task is finished and the task control code 2212 is read and executed again by the CPU 23 and the erasure of the flash memory 21 is paused, the task control code 2212 is being erased. Even if there is a task to be executed, the task management table 2213 is checked for confirmation. As a result, if there is no task to be executed, the flash memory control code 2211 is read into the CPU 23 and the erasure of the flash memory 21 is resumed.
[0033]
The task program code 214 is read by the CPU 23 and the task program is executed. At this time, the data 213 is read, written and erased as necessary. When the task program decides to erase the data 213, it notifies the task control code 2212 of an erase request for the block 211 containing the data 213.
[0034]
Thereafter, when the task control code 2212 is read and executed by the CPU 23, it is confirmed whether or not there is a block erase request. At this time, when an erase request for the block 211 is found, the flash memory control code 2211 is read into the CPU 23 and executed. The flash memory control code 2211 starts erasing the block 211 of the flash memory 21 in accordance with the instruction.
[0035]
FIG. 2 is a flowchart showing the operation of the present invention.
[0036]
In the figure, in the firmware dispatch method described above, when the task control code 2212 is read by the CPU 23 and starts executing, the task waits for a change in the state of the task managed in the task management table 2213 (step A1).
[0037]
At this time, if interrupt factors occur from the IO module 24 or the timer 25, they are notified to the CPU. In order to deal with these interrupt factors, the CPU 23 reads the interrupt control code 222 into the CPU 23 and treats the interrupt factors. If the interrupt control code 222 alone cannot be processed, the task status in the task management table 2213 is changed to prompt the task processing.
[0038]
When the operation of the interrupt control code 222 is completed, the task control code 2212 is read into the CPU 23 again to perform the operation. The task control code 2212 that has detected a change in the task state checks the task management table 2213 for a task indicating that it is currently operating, and if there is a task that is operating, changes it to an executable state (step A2).
[0039]
Next, it is checked whether the flash memory 21 is being erased, erased temporarily stopped, or an erase request is made (step A3).
[0040]
If none of these requests is satisfied, the task management table 2213 is searched (step A4) to check whether there is an operable task (step A5), and if there is an operable task, dispatch it to it. Processing is performed (step A6).
[0041]
If any of the conditions is satisfied in step A3, the task management table 2213 is searched (step A7), and it is necessary to operate even during flash memory erasing, and there is a task that is currently operable. Check (step A8).
[0042]
If there is a task that satisfies the conditions, it is further checked whether the flash memory 21 is being erased (step A9). If the task is being erased, the flash memory control code 2211 is read and executed by the CPU 23, and the erase is temporarily stopped. (Step A10), otherwise, the task is dispatched and executed as it is (Step A11).
[0043]
If there is no task that satisfies the condition in step A8, it is checked whether or not the flash memory 21 is currently being erased (step A12).
[0044]
If not erased, it is checked whether or not the flash memory 21 is suspended (step A13). If suspended, the flash memory control code 2211 is read by the CPU 23 and executed to erase the flash memory 21. Restart (step A14).
[0045]
On the other hand, if the erasure is not suspended, it is checked whether there is an erasure request for the block of the flash memory 21 (step A15). If there is, the CPU 23 reads the flash memory control code 2211 and executes it. Erasing is started (step A16).
[0046]
By repeating the above processing, task control and flash memory control are performed.
[0047]
As described above, the task management table 2213 manages the context of a task, which includes information indicating whether the task needs to operate during flash memory erasure. When the task control code 2212 is read and operated by the CPU 23 to determine which task to dispatch, the information in the task management table 2213 and the state of the erase operation of the flash memory 21 are taken into consideration.
[0048]
That is, a task that does not need to operate during the erasure of the flash memory 21 is not dispatched during the erasure of the flash memory. In the case of a task that needs to be operated even when the flash memory 21 is being erased, the flash memory control code 2211 is read into the CPU 23 and the flash memory control program is executed.
[0049]
The flash memory control program temporarily stops the erase operation of the flash memory 21, and then the task control code 2212 is read and executed by the CPU 23 and dispatched to a task that needs to operate. When a task that needs to operate during the flash memory erasure enters a wait state, the flash memory control code 2211 read and executed by the CPU 23 resumes the erase operation of the flash memory 21 that has been temporarily erased.
[0050]
As described above, the dispatcher can operate the task control and the flash memory control in association with each other.
[0051]
【The invention's effect】
As described above in detail, according to the present invention, the task control and the flash memory control are associated with each other and the dispatching process is executed. Therefore, the following effects can be obtained.
[0052]
The first effect is that a task that can operate without being aware of the erase operation of the flash memory can be created.
[0053]
The second effect is that even if a task needs to be operated while the flash memory is being erased, the task can be dispatched quickly.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing an embodiment of the present invention.
FIG. 2 is a flowchart showing the operation of the present invention.
FIG. 3 is an explanatory diagram showing a configuration of a flash memory.
[Explanation of symbols]
21 Flash memory 22 RAM
23 CPU
24 IO module 25 Timer 211, 212 Block 213 Data 214 Task program code 221 Dispatcher 222 Interrupt control code 2211 Flash memory control code 2212 Task control code 2213 Task management table

Claims (6)

Flash memory that contains multiple blocks and stores multiple task programs and data, an interrupt control program that processes I / O requests from IO modules and interrupt requests from timers, and can operate while erasing the flash memory A RAM that stores information indicating whether or not there is for each task and stores a dispatcher that controls the erase operation of the flash memory and the execution operation of each task;
A firmware dispatching system, wherein when a CPU executes a task based on an arbitrary event, the operation state of the flash memory is checked and the operation of the flash memory is determined according to an execution condition of the task. 2. The firmware dispatch system according to claim 1, wherein the dispatcher holds a flash memory control code for erasing and writing the flash memory, and a task management for holding a context of each task related to a task program arranged in the flash memory. A firmware dispatch system comprising: a table; and a task control code that monitors a state of each task by the task management table and controls execution of the corresponding task according to an event. Flash memory that contains multiple blocks and stores multiple task programs and data, an interrupt control program that processes I / O requests from IO modules and interrupt requests from timers, and can operate while erasing the flash memory A control method for a system comprising a RAM that stores information indicating whether or not there is and stores a dispatcher that controls the erase operation of the flash memory and the execution operation of each task,
A firmware dispatch method comprising: checking a state of operation of the flash memory when executing a task based on an arbitrary event, and determining the operation of the flash memory according to an execution condition of the task. Flash memory that includes multiple blocks and stores multiple task programs and data, an interrupt control program that processes I / O requests from IO modules and interrupt requests from timers, and can operate while erasing the flash memory A control method for a system comprising a RAM for storing information indicating whether or not there is for each task and storing a dispatcher for controlling the erase operation of the flash memory and the execution operation of each task,
When an arbitrary task is in an executable state, the context of each task related to the task program arranged in the flash memory when the flash memory is not being erased, suspended, or requested to be erased If there is an operable task, search the task management table that holds
When an arbitrary task is in an executable state, the task management table is searched and the flash memory is erased when the flash memory is being erased, erase-suspended, or requested to be erased. If there is an operable task among the necessary tasks, the erasing of the flash memory is paused and executed.
When an arbitrary task is in an executable state, the task management table is searched and the flash memory is erased when the flash memory is being erased, erase-suspended, or requested to be erased. A firmware dispatch method comprising: erasing the flash memory if there is no operable task among necessary tasks. Flash memory that includes multiple blocks and stores multiple task programs and data, an interrupt control program that processes I / O requests from IO modules and interrupt requests from timers, and can operate while erasing the flash memory A control program for a system comprising a RAM that stores information indicating whether or not there is for each task and stores a dispatcher that controls the erase operation of the flash memory and the execution operation of each task,
A firmware dispatch program characterized in that when a task is executed based on an arbitrary event, an operation state of the flash memory is checked and an operation of the flash memory is determined according to an execution condition of the task. Flash memory that includes multiple blocks and stores multiple task programs and data, an interrupt control program that processes I / O requests from IO modules and interrupt requests from timers, and can operate while erasing the flash memory A control program for a system comprising a RAM that stores information indicating whether or not there is for each task and stores a dispatcher that controls the erase operation of the flash memory and the execution operation of each task,
When an arbitrary task is in an executable state, the context of each task related to the task program arranged in the flash memory when the flash memory is not being erased, suspended, or requested to be erased If there is an operable task, search the task management table that holds
When an arbitrary task is in an executable state, the task management table is searched and the flash memory is erased when the flash memory is being erased, erase-suspended, or requested to be erased. If there is an operable task among the necessary tasks, the erasing of the flash memory is paused and executed.
When an arbitrary task is in an executable state, the task management table is searched and the flash memory is erased when the flash memory is being erased, erase-suspended, or requested to be erased. A firmware dispatch program, wherein if there is no operable task among necessary tasks, the flash memory is erased.

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