JP3789847B2 - Multi-line addressing driving method and apparatus for simple matrix liquid crystal - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multi-line addressing driving method and apparatus for a simple matrix liquid crystal.
[0002]
[Prior art]
Conventionally, a liquid crystal display (LCD) has been used as a display device for word processors and personal computers. Due to the advantages of being easy to downsize, thin and lightweight, the LCD has been increasingly used in recent years, for example, as a mobile phone display.
[0003]
As LCDs, there are simple matrix type LCDs that drive so-called twisted nematic type (TN type) and super twisted nematic type (STN type) liquid crystal display elements without using thin film transistors. As a driving method of this LCD, a multi-line addressing driving method (MLA driving method), which is a multi-line simultaneous driving method for simultaneously selecting and driving a plurality of scanning lines, has been proposed as compared with the conventional line sequential scanning method.
[0004]
In recent years, LCD panels used as display means in personal computers, portable information terminals, mobile phones, and the like have been colorized, and display of high-definition images with multiple gradations has been demanded.
Here, as a gradation driving method for displaying multiple gradations, there are roughly two types, an FRC (frame rate control) gradation method and a PWM (pulse width modulation) gradation method.
[0005]
The FRC gray scale method displays a single display image using a plurality of frames, and controls the number of times the display image is turned on or off depending on the voltage applied to the liquid crystal element in each frame period. This is a gradation method for expressing a tone.
The PWM gradation method is a gradation method that expresses the gradation of the display image by distributing the on and off periods within one frame. That is, the PWM gradation method can be considered as a method of performing the FRC gradation method within one frame.
[0006]
For example, Japanese Patent Laid-Open No. 11-24637 discloses that a natural image is displayed with 64 gradations or more in a large screen simple matrix liquid crystal display device by combining the PWM gradation method and the FRC gradation method. It is disclosed.
This is because each column voltage is divided into two non-uniformly, and a plurality of gradations are expressed in the PWM gradation method in each frame period, and one image is updated in a plurality of frame periods corresponding to the PWM gradation. By combining the FRC gradation method, multiple gradations are configured.
[0007]
In addition, when performing such gradation expression, column voltage control and phase frame control are used in combination. In the column voltage control, the magnitude of the column voltage is variably controlled according to a series of column voltage series applied to display a predetermined gradation on a predetermined liquid crystal element. That is, when the series of column voltage series applied to a predetermined liquid crystal element or column electrode is finer than the pulse width that can be allotted to the column voltage, for example, the magnitude of the column voltage is increased by 5%, It compensates for the decrease in luminance due to high frequency.
[0008]
Further, the phase frame control is to control the phase so that a plurality of average luminances are substantially equal between a plurality of frames in the FRC gradation method.
Further, what is disclosed in the above publication is that the absolute value of each column voltage in the column voltage series is controlled to be the same in the MLA drive system, thereby suppressing the occurrence of splicing, which is an instantaneous luminance bias. I am doing so.
[0009]
[Problems to be solved by the invention]
However, the MLA driving method has a problem that luminance unevenness occurs in the horizontal direction. This uneven luminance in the horizontal direction is a line generated in the direction of the row electrode (COMMON electrode) and is sometimes called a COM line.
On the other hand, the column voltage control disclosed in the publication is not an effective solution to the luminance unevenness in the horizontal direction. The column voltage is determined by the result of the MLA operation (exclusive OR and addition) of the display data and the orthogonal function. Therefore, if a series of column voltage series is predicted over a frame to determine whether or not to increase the column voltage, the circuit becomes very complicated, which is not realistic.
[0010]
An object of the invention disclosed in the publication is that the high-frequency component of the column voltage series is attenuated by the resistance component of the column electrode and the capacitance component of each liquid crystal. However, the luminance unevenness appears in the column electrode direction (usually the vertical direction) and can be said to be a phenomenon different from the luminance unevenness (COM line) in the row electrode direction (usually the horizontal direction), which is a problem of the present invention. The cause of uneven luminance in the horizontal direction is not clear, but it is assumed that this is an optical response characteristic that depends on the pattern of row and column electrode voltages in time series applied to the liquid crystal. It is impossible to solve the problem.
[0011]
The present invention has been made in view of the above-described conventional problems. In a multiline addressing (MLA) driving method for simultaneously driving a plurality of rows of a simple matrix liquid crystal using an orthogonal function, a horizontal characteristic unique to the MLA driving method is provided. It is an object of the present invention to provide a multi-line addressing driving method and apparatus for a simple matrix liquid crystal capable of eliminating luminance unevenness in the direction and improving the display quality of the LCD.
[0012]
[Means for Solving the Problems]
  In order to solve the above problems, the present invention provides:Using an orthogonal function,Simple matrix liquid crystalSelect and drive multiple row electrodes on LCD panel simultaneouslyA multi-line addressing driving method,
One display cycle is composed of fields corresponding to the number of column vectors of the orthogonal function,
Each of the fields is a unit for scanning once from the top to the bottom of the screen on the liquid crystal panel, and each field is a plurality of row electrodes in which the number of row electrodes of the liquid crystal panel is selected at the same time. Consisting of the number of row selection periods divided by the number,
Each of the row selection periods is a selection period of a block that is a unit of the plurality of row electrodes that are simultaneously selected, and each of the row selection periods includes a plurality of sequences,
Each of the sequences is a minimum division time of the row selection period,
Each of the row selection periods is divided into the same number of divided selection periods, and each of the divided selection periods includes the same number of the sequences,
In the simultaneously selected blocks, the row selection periodSplit selection periodEachIn addition,SaidA row vector of orthogonal functionsIn the row directionMultiple sets of orthogonal functions obtained by rotationUse one orthogonal function one by oneallocation,
For each block selected for each field of the one display cycleThe division selection periodIn each ofThe assignmentIsOrthogonal functionOneColumn vectorSelect the row electrodes of the block at the same time by updating each field.A multi-line addressing driving method for a simple matrix liquid crystal is provided.
Here, it is preferable that the number of divided selection periods in each row selection period is smaller than the number of orthogonal functions obtained by the rotation.
[0013]
Similarly, in order to solve the problem, the present invention is a multi-line addressing driving method for simultaneously selecting and driving a plurality of row electrodes of a liquid crystal panel of a simple matrix liquid crystal using an orthogonal function,
One display cycle is composed of fields corresponding to the number of column vectors of the orthogonal function,
Each of the fields is a unit for scanning once from the top to the bottom of the screen on the liquid crystal panel, and each field is a plurality of row electrodes in which the number of row electrodes of the liquid crystal panel is selected at the same time. Consisting of the number of row selection periods divided by the number,
Each of the row selection periods is a selection period of a block that is a unit of the plurality of row electrodes that are simultaneously selected, and each of the row selection periods includes a plurality of sequences,
Each of the sequences is a minimum division time of the row selection period,
Each of the row selection periods is divided into the same number of divided selection periods, and each of the divided selection periods includes the same number of the sequences,
In each block selected for each field of the one display cycle, one column vector of the orthogonal function is updated and loaded for each field, and the loaded column is divided for each divided selection period of the row selection period. Provided is a simple matrix liquid crystal multi-line addressing driving method characterized by simultaneously selecting the row electrodes of the block using column vectors obtained by rotating vector bits in the row direction.
[0014]
Here, the simple matrix liquid crystal multi-line addressing driving method according to any one of the above,
The upper bits of the gradation data corresponding to the display data are expressed by a pulse width modulation gradation method, and the lower bits of the gradation data corresponding to the display data are expressed by a frame rate control gradation method. The liquid crystal is driven so as to be added to the pulse width modulation gradation method by assigning to the sequence that is the minimum division time in the pulse width modulation gradation method what is expressed in the control gradation method,
It is preferable that the row selection period is divided into the divided selection periods for each integer value equal to or larger than the integer value of the quotient obtained by dividing the number of sequences by the number of row electrodes selected simultaneously.
[0015]
  The column vector of the orthogonal function isWithin each said field, each saidIt is preferable to update every block. The column vector of the orthogonal function isWithin each said field is the same column vector and each said saidIt is preferable to update every field.
[0016]
  Similarly, in order to solve the above problem, the present invention provides:Any of the aboveDepending on the driving methodSaidliquid crystalpanelLCD driver characterized by drivingI will provide a. In addition, the present invention provides any one of the aboveProvided is a liquid crystal panel which is driven by a driving method.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, a simple matrix liquid crystal multi-line addressing driving method and apparatus according to the present invention will be described in detail with reference to preferred embodiments shown in the accompanying drawings.
  The present invention relates to an MLA driving method for simultaneously driving a plurality of rows of a simple matrix liquid crystal using an orthogonal function.,lineA set of orthogonal functions (orthogonal function set) obtained by rotating the row vector of the orthogonal function into each of the divided selection periods obtained by dividing the electrode selection period (hereinafter, simply referred to as a row selection period).One orthogonal function eachAnd the horizontal unevenness (COM streak) peculiar to the MLA drive method is eliminated by making the column vector of the assigned orthogonal function go round in time series to the row electrodes in each divided selection period. It is.
[0018]
FIG. 1 is a block diagram showing a circuit configuration of an embodiment of a liquid crystal driving device (LCD driver) for executing a simple matrix liquid crystal multi-line addressing driving method according to the present invention. The LCD driver according to the present embodiment selects seven row electrodes at the same time and sets the voltage level of the column electrodes to four values. This driving method is a driving method proposed by the present inventor in Japanese Patent Application No. 2001-177998 already filed, and is referred to as FLA7 (Four-Level Addressing 7).
As shown in FIG. 1, the LCD driver 10 according to the present embodiment is an MLA driving method in which seven rows (common) are simultaneously selected from the row electrodes of the LCD panel (LCD) 12 and the column electrode voltage is driven with four values. A row electrode driver 14, a column electrode driver 16, and a display data RAM (display data memory) 18 are provided.
[0019]
  A scrambler 20, an EXOR gate 22, an adder (adder) 24, and a latch & decoder 26 are provided. The scrambler 20 receives gradation from a gradation selector for gradation display.conversionReceive data. The gradation selector will be described later.
  In addition, an orthogonal function ROM 28 and an ROT register 30 are provided which rotate the row vector of the orthogonal function that gives the selection pattern of the row electrodes to be simultaneously selected, which is the point of the present invention. The orthogonal function ROM 28 stores initial values of orthogonal function column vectors. The ROT register 30 rotates the bit of the initial value of this column vector and sends it to the EXOR gate 22 and the row electrode driver 14. Although a detailed operation will be described later, a desired row electrode selection pattern is achieved by this rotation.
[0020]
Further, the display data RAM 18 is provided with a RAM decoder 32, and a controller 34 for controlling these components is provided.
In FIG. 1, only one scrambler 20, EXOR 22, adder 24, and latch & decoder 26 are displayed because each color of RGB is processed in a time-sharing manner, but each column (segment) is displayed. These may be provided for each color of RGB.
[0021]
  From the display data RAM 18, the color data (any one of RGB) for seven lines of the LCD 12 that are driven simultaneously are simultaneously output to the scrambler 20. The scrambler 20 is inputColor data andtoneconversionAn on / off signal corresponding to the data is output. The ON / OFF signal output from the scrambler 20 is exclusive-ORed with each corresponding row electrode selection pattern received from the ROT register 30 by the EXOR gate 22 and added by the adder 24.
  The addition result is selected by the latch & decoder 26 from four values of −3 Vc, −Vc, + Vc, and +3 Vc, where the voltage level corresponding to the addition result is Vc, which is 1/3 of the maximum voltage of the column electrode. And output to the column electrode driver 16. The LCD 12 is driven by the row electrode driver 14 and the column electrode driver 16.
[0022]
Thus, in this embodiment, the MLA driving method is used. This is because an MLA driving method in which the number of times of unit time selection is increased is essential to avoid the frame response phenomenon. Furthermore, since the number of selections increases as the number of selected rows increases, the FLA7 driving method that drives 7 rows simultaneously is preferable. In the MLA driving method in which 7 rows are simultaneously driven, the column electrode voltage level type is usually 8 values, but in the FLA 7 driving method, since the value is 4 values, the frequency at which the column electrode voltage changes is about 1 /. It also has the effect of becoming 2. The FLA7 drive system is very effective to realize multi-color, high image quality, video support, low power consumption, low price, left-right symmetry, three-side free, and one chip, which are market demands for LCD modules for mobile phones in particular. Technology.
[0023]
That is, in the FLA7 drive system, the number of simultaneously selected rows is 7, the column electrode voltage type is 4 values, and the maximum usable voltage is as low as about 15 V even in 168 rows of high-speed liquid crystal with a fast average response time. Therefore, a segment (column electrode) driver and a common (row electrode) driver can be integrated into one chip in a fine process in which a relatively large memory for multicolor display data is mounted. In addition, there is little frame response phenomenon, and liquid crystal display with high contrast becomes possible.
Further, in the FLA7 drive system, the column electrode drive circuit is smaller than in the 8-row selection MLA drive system, so the chip size is also small. Accordingly, the drive amplitude of the row electrode selection voltage is small (row voltage Vr = 7.5 Vmax) and the operating frequency can be lowered, so that the power consumption is small.
[0024]
Hereinafter, the FLA7 driving method will be briefly described.
In the present embodiment, seven row electrodes are selected simultaneously. As the row electrode selection pattern, an orthogonal function of 7 rows and 8 columns is used. This orthogonal function is, for example, an orthonormal matrix M as shown in FIG.₁It is represented by That is, the matrix M₁Is its own transpose matrix M₁ ^tAnd the product of the unit matrix I is an integral multiple of the unit matrix I. Matrix M shown in FIG.₁If M₁M₁ ^t= 8I (where I is a 7th order unit matrix). Such a matrix can be obtained, for example, by omitting one row from a Hadamard matrix (in this case, an 8th-order Hadamard matrix).
[0025]
FIG. 3 shows row electrode selection patterns (orthogonal functions) (A), display patterns (B), product-sum operation results (C), column electrode voltage patterns (D), and values corresponding to effective voltages (E ). There are a total of 2 7 = 128 display patterns (B), etc., but they are omitted in the middle.
In FIG. 3, 1 shown in the row electrode selection pattern (A) is + Vr, and -1 is -Vr. Further, it is assumed that the on pixel of the display data is 1 and the off pixel is -1.
A 7-bit row selection column vector constituting each column vector of the row electrode selection pattern (A) and 7-bit display data (vector) of the same column electrode constituting each row vector of the display pattern (B), A table of product-sum operation results (C) is obtained by multiplying the corresponding bits.
[0026]
As shown in FIG. 3, the numerical values appearing in the product-sum operation result (C) are 8 types of ± 7, ± 5, ± 3, and ± 1, and conventionally, when selecting 7 rows, these 8 types A voltage level of (7 + 1 = 8) was required. Here, by replacing -7 and -5 with + 3Vc, -3 and -1 with + Vc, +1 and +3 with -Vc, and +5 and +7 with -3Vc, the voltage levels are -3Vc, -Vc, + Vc. , + 3Vc, and the voltage level of the column electrode is converted into four values.
[0027]
In this way, the column electrode voltage pattern (D) as shown in FIG. 3 is determined.
Further, the value (E) corresponding to the effective voltage in FIG. 3 is obtained by adding the column electrode pattern for each cycle in accordance with the values (−1 and 1) of the row electrode selection pattern (A). That is, the value corresponding to the effective voltage can be obtained by adding the column electrode voltage pattern as it is if the row electrode selection pattern is -1 and adding the column electrode voltage pattern with the polarity reversed if the row electrode selection pattern is 1. Eventually, the product sum of the corresponding elements in each row of the row electrode selection pattern (A) and each row of the column electrode voltage pattern (D) is taken, and the value obtained by changing the sign is a value corresponding to the effective voltage.
[0028]
Comparing the value (E) corresponding to the effective voltage with the display pattern (B), all the ON pixels have the same effective voltage 4 and all the OFF pixels have the same effective voltage −4. From this, it can be seen that the voltage averaging method is established.
In this case, generally, the number of row electrodes is N, the row electrode selection voltage is Vr, the column electrode voltage is Vc, and the ratio thereof is A = Vc / Vr, and the effective voltage (RMS) is obtained. The explanation is omitted and only the result is shown. The effective voltage Von for the on-pixel and the effective voltage Voff for the off-pixel are each expressed by the following equations.
Von = (1 / √N) * Vr * √ (2 * N * A²+ 7 * A + 7)
Voff = (1 / √N) * Vr * √ (2 * N * A²-7 * A + 7)
Further, the voltage ratio A between the row electrode and the column electrode in the case of an ideal bias is as follows.
A = Vc / Vr = √ (7 / (2 * N))
[0029]
Consider a case in which an LCD panel having 168 row electrodes (7 rows × 24 blocks) or 128 (7 rows × 19 blocks) is driven by the FLA7 driving method. It is assumed that the orthogonal function is expressed by, for example, an orthogonal matrix of 7 rows and 8 columns as shown in FIG.
At this time, the eight column vectors (R1 to R8) of the orthogonal function must be updated in time series so that each block (or row) uses all the column vectors during one display cycle.
There are two methods for updating this column vector.
[0030]
One is a block update mode in which a column vector is updated for each block which is a unit (set) of row electrodes selected simultaneously.
FIG. 4 shows how the column vector is updated in the block update mode. In FIG. 4, the number of row electrodes is 168. If 7 rows are selected at the same time, the number of blocks is 168 ÷ 7 = 24 blocks. This is designated as block 0 to block 23. A field is a unit for scanning once from the top to the bottom of the screen on the LCD panel. In the example shown in the figure, one display cycle is completed by scanning 8 fields, that is, the screen 8 times from top to bottom. At this time, in the block update mode, the column vector is updated for each block of 7 rows in each field.
[0031]
Another method of updating the column vector is a field update mode in which the column vector is updated for each field.
FIG. 5 shows how the column vector is updated in the field update mode. FIG. 5 shows a case of 19 blocks with 128 row electrodes and simultaneous selection of 7 rows. As shown in FIG. 5, in the field update mode, the same column vector is used from block 0 to block 18 in one field, and the column vector is updated when the field changes.
[0032]
In the present embodiment, a PpF (PWM plus FRC) gradation method in which the FRC gradation method is added to the PWM gradation method (plus) is applied as the gradation driving method of the simple matrix liquid crystal. In this PpF gradation method, upper bits of gradation data are displayed in a pulse width modulation (PWM) gradation method, and lower bits of gradation data are displayed in a frame rate control (FRC) gradation method. This is assigned to the minimum division time of the gradation method and added to the PWM gradation method. This PpF gradation method is a simple matrix liquid crystal gradation method proposed by the present inventor in Japanese Patent Application No. 2002-084194 already filed.
[0033]
This PpF gradation method is a very effective technology that can realize multi-color, high image quality, motion picture compatibility, low power consumption, low price, etc., which are market demands for LCD modules for mobile phones in particular. .
In the display cycle of the FRC gradation method, one on pixel or off pixel is calculated and displayed with all column vectors, and this is executed for all on pixels or off pixels. For example, when the number of simultaneously selected rows is 7 and an orthogonal function of 7 rows and 8 columns is used, if one gradation is displayed with 64 ON / OFF bits (6 bit 64 gradation data), one display cycle is 512 (8 × 64). In order to display 168 lines (24 blocks) with full animation (30 frames / second), the LCD panel must respond to a frequency of about 369 kHz (512 × 24 × 30).
[0034]
On the other hand, for example, in the case of 7 rows and 8 columns, the display cycle of the PWM gradation method is 8 fields. In the case of 64 gradations, one gradation is expressed by the ON time of 63 divided times. In order to display 168 lines (24 blocks) with full animation, the LCD panel must respond to a frequency of approximately 363 kHz (63 × 8 × 24 × 30).
Further, since the luminance characteristic with respect to the pulse width of the liquid crystal is not linear, in order to display 64 gradations, a pulse width (gradation data) of 64 or more is necessary for correction. Specifically, each of the 64 gradation display data is selected from 128 gradation data and is made to correspond as gradation data. Therefore, the frequency becomes higher (twice).
[0035]
However, there is currently no LCD panel that can respond to such high frequencies. In addition, since the operating frequency increases, power consumption also increases. The FLA7 driving method has an effect of reducing the column frequency to the liquid crystal by about 1/2 because the type of column electrode voltage is not eight but four, but the power consumption cannot be reduced much.
On the other hand, the PpF gradation method selects 64 gradations from 128 gradation data including correction of voltage luminance characteristics of liquid crystal, and displays 260,000 colors in R, G, and B. This is a gradation method corresponding to moving images. The operating frequency can be reduced to ¼ 92 kHz (16 × 8 × 24 × 30), and the power consumption can be significantly reduced. Power consumption does not increase even with complete videos. In addition, the storage capacity for holding the R, G, and B grayscale data is 4608 bits.
[0036]
Hereinafter, the PpF gradation method will be briefly described.
In the PpF gradation method in this embodiment, 64 gradations are selected from 128 gradations (7 bits), the upper 4 bits are expressed in the PWM gradation method, and the lower 3 bits are expressed in the FRC gradation method. Are assigned to the PWM minimum division time and added to the PWM gradation method. The necessary row selection period is set as a multiple of 8.
[0037]
For example, assume that the maximum gradation is 107. At this time, the row selection period is a multiple of 8 greater than 107, for example, 112 (14 × 8) gradations, mapped to 112 gradations, and the row selection period is divided into 14 as sequences 0 to 13. Then, in sequence 0, the lower 3 bits are expressed in the FRC gradation method, and in sequences 1 to 13, the upper 4 bits are expressed in the PWM gradation method.
[0038]
FIG. 6 shows an example of a driving method using a continuous time PWM gradation method.
This is an example of 14 sequences. The value is set in the gradation palette. R (red) and B (blue) are similarly set to the gradation palette using gradations 0-13.
Since the MLA calculation is performed on the ON / OFF data of each sequence using eight types of row electrode selection patterns (column vectors), the processing is completed in eight fields. However, in the continuous-time PWM gradation method, as shown in FIG. 6, all gradations are turned on all at once and turned off according to the display data RAM and the set gradation palette. Since the signals are turned on all at once, flicker may be seen when the repetition frequency of the display cycle is low (for example, 35 Hz or less). As a countermeasure against this, a distributed PWM gradation method in which the on-time of the PWM gradation method is dispersed in the PWM section of the row selection period can be considered.
[0039]
In the FRC section, on / off in each sequence is controlled for each field (FRC sequence) according to the value as shown in FIG. In this way, since the FRC sequence is updated for each field, on and off are averaged, and flicker is small.
At this time, since the MLA operation is performed on the ON / OFF data of each FRC sequence using eight types of row electrode selection patterns (column vectors), in the case of the orthogonal function of 7 rows and 8 columns, one display cycle is 64 times. It will be completed in the field (8 × 8).
[0040]
At this time, as shown in FIG. 7, the FRC section is fixed to the FRC sequence 7 (the most significant bit in the lower 3 bits) as specified. Since the FRC is completed in 8 fields, even if the display data changes, there is little splicing that is an instantaneous luminance change, and there is little deterioration in color reproducibility due to the MLA operation not being completed.
Eventually, the lower 3 bits are rounded off, and equivalently, the FRC period becomes one of the PWM periods, and the upper 4 bits become 4.5 bits. In R, G, and B, 12 bits become 13.5 bits, so the color becomes 11K. This is sufficient for the gradation of a complete movie that can be recognized by the human eye.
[0041]
As an application example of the PpF gradation method, it is conceivable to display the screen of a cellular phone by dividing it into a character or low-speed moving image area and a complete moving image area.
For example, as shown in FIG. 8, the screen 50 of the mobile phone is divided into an FRC non-fixed area A that displays characters, still images, or low-speed moving images, and an FRC fixed area B that displays complete moving images. Then, a complete moving image can be displayed in the FRC fixed area B on the screen 50.
[0042]
Hereinafter, a method for eliminating the horizontal luminance unevenness peculiar to the MLA driving method, which is the point of the present invention, by rotation of row vectors will be described.
First, the luminance unevenness in the horizontal direction will be described. Although the effective voltage of each pixel is equal in calculation, luminance unevenness in the horizontal direction of the screen occurs according to a time-series column vector for each row. This uneven luminance in the horizontal direction has a low display cycle frequency (frame frequency), and appears prominently when displaying all white, and is called a “COM line”. This luminance unevenness in the horizontal direction becomes difficult to see by updating the orthogonal function column vector for each block in the block update mode. However, when the LCD panel is shaken, luminance unevenness can still be seen as a “swing line”. Further, when the cycle of the display cycle is shortened (for example, about 60 cycles), this luminance unevenness disappears.
[0043]
This uneven luminance in the horizontal direction is a problem peculiar to the MLA driving method, and the cause of this occurrence is not well understood. However, it is expected to be a kind of optical response characteristic due to the difference between the time-series row electrode voltage and column electrode voltage patterns applied to the liquid crystal.
For example, the LCD panel is displayed using a 7-by-8 Walsh function as shown in FIG. 9 as an orthogonal function. At this time, the display of the row electrode 1 becomes brighter than the other row electrodes. Even if the polarity of the row vector L1 of the row electrode 1 is reversed, the display of the row electrode 1 is still brighter than the other row electrodes. When the polarity of the column vector R6 in cycle # 6 is inverted, the brightness of the row electrode 1 is reduced, but still brighter than the other row electrodes. If the column vector R6 is moved before the column vector R2 and the column vectors R2 to R5 are shifted backward, the brightness of the row electrode 1 is lost, the row electrode 6 becomes slightly brighter, and the row electrode 7 becomes slightly darker. Become. When the row vectors L1 to L7 are rotated, the bright row electrodes are also rotated together. Further, even when the column vectors R1 to R8 are rotated, the display of the row electrode 1 remains brighter than the other row electrodes.
[0044]
Therefore, a method for eliminating the luminance unevenness in the horizontal direction will be described below.
First, the row electrode selection period (row selection period) is divided into a plurality of division selection periods. Next, a set of orthogonal functions obtained by rotating the row vector of the orthogonal functions is assigned to each division selection period. Then, during the display cycle, the column vector of the assigned orthogonal function is cycled in time series for the row electrodes in each division selection period.
[0045]
This will be explained using a concrete column.
FIG. 10 shows a set (A to G) of orthogonal functions obtained by rotating the orthogonal function A downward by two rows.
For example, as shown in FIG. 11, it is assumed that the row selection period consists of 14 sequences (sequence 0 to sequence 13). The 14 sequences are divided into 7 divided selection periods of 2 sequences. Then, a set of orthogonal functions obtained by rotating the row vectors L1 to L7 by two in each division selection period is assigned.
That is, the orthogonal function A corresponds to the first divided selection period A composed of the sequences 0 and 1, and the row vectors L1 to L7 correspond to the row electrodes 1 to 7 from the top, respectively. On the other hand, the orthogonal function B corresponds to the second divided selection period B composed of the following sequences 2 and 3, and the row vector is shifted downward by two, and the row electrode 1 Let 2 be row vectors L6 and L7. Hereinafter, similarly, each orthogonal function (C to G) corresponds to each division selection period (C to G).
[0046]
In addition, there is one column vector (R1 to R8) designated in the row selection period of one field, and the display cycle is completed by completing the column vector in eight fields.
As shown in FIG. 11, as a result of the rotation, all row vectors from L1 to L7 exist in the row selection period of each row electrode. Therefore, even if there is uneven luminance in the horizontal direction, it is averaged over time. Since all the row electrodes (row electrodes 1 to 7) have the same conditions, the uneven luminance in the horizontal direction that is peculiar to the MLA driving method is eliminated.
[0047]
  In the example shown in FIG. 11, the number of division selection periods and the number of sets of orthogonal functions obtained by rotation are the same number of 7, which is ideal, but this need not be the same. When the number of division selection periods is large, luminance averaging is guaranteed as compared to the case where the number of division selection periods is small. However, in this case, since the voltage level applied to the row electrode and the column electrode changes more, power consumption increases. Conversely, if the number of divided selection periods is smaller, the power consumption is reduced, but the luminance averaging is weakened.
  However, in the portable device, since reduction of power consumption is given priority, it is preferable that the number of division selection periods is small. from these thingsCalculationThen, an integer value (in this case, 2) or more of an integer value (2 in this case) of a quotient (16 ÷ 7 = 2.29) obtained by dividing the number of sequences (for example, 16) by the number of simultaneously selected rows (eg, 7), that is, 2 or more in this case, The row selection period is preferably divided every two, three, four, etc.). Actually, since the degree of luminance unevenness varies depending on the liquid crystal and the orthogonal function, the luminance unevenness may be finally determined by observation.
  In the above example, the width for rotating the row vector is set to two rows. However, the width is not particularly limited to this. The rotation width or the orthogonal function may be changed according to the degree of luminance unevenness.
[0048]
Hereinafter, the operation of the liquid crystal driving device (LCD driver) 10 of FIG. 1 will be described.
The controller 34 instructs display data of a block to be displayed on the LCD panel 12 to the RAM decoder 32 of the display data RAM (display data memory) 18. Then, the display data (R, G, B) for the selected seven rows is sent from the display data RAM 18 to the scrambler 20.
[0049]
The scrambler 20 determines from the gradation conversion data sent from the gradation selector whether the gradation indicated by the display data is on or off in the sequence.
The generation of the gradation conversion data will be described with reference to FIG.
As shown in FIG. 12, the controller 34 sets the upper 4 bits of the gradation data of 64 gradations specified from 128 gradations in the PWM gradation palette 36, and the lower 3 of the gradation data. Set bit to FRC gradation palette 38.
[0050]
The sequencer 40 generates a sequence signal (SQ0 to SQ15) according to the clock and the end sequence value from the controller 34. The PWM gradation palette 36 outputs on / off data of each gradation (gradation 0 to gradation 63) at the time of each sequence (SQ1 to SQ15).
The FRC sequencer 42 generates FRC sequence signals (F0 to F7) according to the clock from the controller 34 and the designation of the FRC fixed area. When it corresponds to the FRC fixed area, it is fixed to F7 corresponding to the most significant bit in the lower 3 bits.
The FRC gradation palette 38 outputs on / off data of each gradation (gradation 0 to gradation 63) at the time of each FRC sequence (F0 to F7).
[0051]
The gradation selector 44 uses the on / off data from the FRC gradation palette 38 in the case of SQ0, and the on / off data from the PWM gradation palette 36 as the gradation conversion data in the case of SQ1 to SQ15. Output.
In this way, the FRC gray scale method is added to the PWM gray scale method by assigning the expression expressed by the FRC gray scale method to the minimum division time in the PWM gray scale method.
[0052]
As described above, the column vector update includes a block update mode and a field update mode. In any case, the column vector used in each block goes around in the display cycle.
In FIG. 1 again, at the start of sequence 0 (see FIG. 11), the controller 34 selects an initial value 7 bits of the column vector from the orthogonal function ROM 28 according to the update mode, and loads it into the ROT register 30. Further, 7 bits of the ROT register 30 are rotated every predetermined number of sequences (division selection period). As a result, rotation of the row vector of the orthogonal function is performed.
[0053]
The element of the column vector corresponding to the row electrode selection pattern is sent from the ROT register 30 to the EXOR gate 22 for each selection period.
In the EXOR gate 22, an exclusive OR (EXOR) of the on / off data from the scrambler 20 and the column vector element rotated corresponding to the row electrode selection pattern is calculated. The result of the EXOR operation is added by the adder 24 and latched by the latch & decoder 26.
[0054]
The column electrode voltage level is selected by the latched value and is supplied to each column electrode by the column electrode driver 16.
On the other hand, the selected row electrode voltage is supplied to the row electrode by the row electrode driver 14, thereby driving the LCD panel 12.
[0055]
Thus, it is not necessary to prepare orthogonal function sets (for example, seven types) by rotating row vectors of orthogonal functions, and only one type needs to be prepared in the orthogonal function ROM 28. From here, the column vector that is the initial value in the sequence 0 is loaded into the ROT register 30, and the bits are rotated (for example, 2-bit rotation) for each divided selection period. The initial value in sequence 0 may be selected according to the update mode as described above.
[0056]
In the above embodiment, the PpF gradation method is used as the gradation method. However, the present invention is not limited to this. The PWM gradation method, the FRC gradation method, or the divided column as in the conventional example is used. The present invention can also be applied to a combined method of a PWM gradation method using voltage and an FRC gradation method.
[0057]
As described above, according to the present embodiment, it is possible to eliminate the uneven luminance in the horizontal direction, which is peculiar to the MLA driving method, and to remarkably improve the display quality.
In addition, when rotating the row vector of the orthogonal function, it is only necessary to load the initial value of the column vector of the orthogonal function and rotate the bits for each division selection period, so that the liquid crystal driving device of the present invention is realized. This circuit can be made extremely small.
Furthermore, by reducing the number of division selection periods compared to the number of orthogonal function sets obtained by rotating row vectors of orthogonal functions, the drive frequency of the column electrodes can be lowered, so that power consumption can be reduced.
In this embodiment, one type of orthogonal function set is shown, but different orthogonal function sets may be mixed.
[0058]
As mentioned above, the simple matrix liquid crystal multi-line addressing driving method and apparatus of the present invention have been described in detail. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. Of course, improvements and changes may be made.
[0059]
【The invention's effect】
As described above, according to the present invention, it is possible to eliminate the uneven luminance in the horizontal direction peculiar to the MLA driving method, improve the display quality, reduce the circuit scale, and further reduce the power consumption. It becomes possible.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a circuit configuration of an embodiment of a liquid crystal driving device (LCD driver) for executing a simple matrix liquid crystal multi-line addressing driving method according to the present invention.
FIG. 2 is an explanatory diagram showing an example of a matrix representing an orthogonal function of 7 rows and 8 columns showing a row electrode selection pattern;
FIG. 3 illustrates a row electrode selection pattern (A), a display pattern (B), a product-sum operation result (C), a column electrode voltage pattern (D), and a value (E) corresponding to an effective voltage in the present embodiment. FIG.
FIG. 4 is an explanatory diagram showing a block update mode which is one update mode of a column vector.
FIG. 5 is an explanatory diagram showing a field update mode which is another update mode of a column vector.
FIG. 6 is an explanatory diagram illustrating an example of a driving method using a continuous time PWM gradation method.
FIG. 7 is an explanatory diagram showing an example of ON / OFF control in an FRC section.
FIG. 8 is an explanatory diagram showing an example of a screen divided into an FRC non-fixed area for displaying characters, still images, and the like and an FRC fixed area for displaying a complete moving image.
FIG. 9 is an explanatory diagram illustrating an example of an orthogonal function of a Walsh function of 7 rows and 8 columns;
FIG. 10 is an explanatory diagram illustrating an example of a set of orthogonal functions obtained by rotating row vectors.
FIG. 11 is an explanatory diagram illustrating a state in which row vectors of orthogonal functions are rotated in a division selection period.
FIG. 12 is a block diagram around a controller showing generation of gradation conversion data.
[Explanation of symbols]
10 Liquid crystal drive (LCD driver)
12 LCD panel
14-row electrode driver
16 row electrode driver
18 Display data RAM
20 Scrambler
22 EXOR gate
24 Adder
26 Latch & Decoder
28 Orthogonal function ROM
30 ROT register
32 RAM decoder
34 Controller
36 PWM gradation palette
38 FRC gradation palette
40 Sequencer
42 FRC sequencer
44 gradation selector
50 (mobile phone) screen

Claims (8)

A multi-line addressing driving method for simultaneously selecting and driving a plurality of row electrodes of a liquid crystal panel of a simple matrix liquid crystal using an orthogonal function ,
One display cycle is composed of fields corresponding to the number of column vectors of the orthogonal function,
Each of the fields is a unit for scanning once from the top to the bottom of the screen on the liquid crystal panel, and each field is a plurality of row electrodes in which the number of row electrodes of the liquid crystal panel is selected at the same time. Consisting of the number of row selection periods divided by the number,
Each of the row selection periods is a selection period of a block that is a unit of the plurality of row electrodes that are simultaneously selected, and each of the row selection periods includes a plurality of sequences,
Each of the sequences is a minimum division time of the row selection period,
Each of the row selection periods is divided into the same number of divided selection periods, and each of the divided selection periods includes the same number of the sequences,
Constant above at block selected simultaneously, the each of the divided selection periods of row selection period, the row vectors of the orthogonal function one by one by using a plurality from among the set of orthogonal functions obtained by rotation in the row direction Assign an orthogonal function of
The 1 in each of the divided selection periods of each of the blocks to be selected for each field of the display cycle, and used to update one column vector of the allocated orthogonal function for each field, the row electrodes of the block A multi-line addressing driving method for a simple matrix liquid crystal characterized by selecting simultaneously . 2. The multi-line addressing driving method for a simple matrix liquid crystal according to claim 1, wherein the number of divided selection periods of each of the row selection periods is less than the number of orthogonal functions obtained by the rotation. A multi-line addressing driving method for simultaneously selecting and driving a plurality of row electrodes of a liquid crystal panel of a simple matrix liquid crystal using an orthogonal function ,
One display cycle is composed of fields corresponding to the number of column vectors of the orthogonal function,
Each of the fields is a unit for scanning once from the top to the bottom of the screen on the liquid crystal panel, and each field is a plurality of row electrodes in which the number of row electrodes of the liquid crystal panel is selected at the same time. Consisting of the number of row selection periods divided by the number,
Each of the row selection periods is a selection period of a block that is a unit of the plurality of row electrodes that are simultaneously selected, and each of the row selection periods includes a plurality of sequences,
Each of the sequences is a minimum division time of the row selection period,
Each of the row selection periods is divided into the same number of divided selection periods, and each of the divided selection periods includes the same number of the sequences,
Column wherein in each of the blocks to be selected for each field of one display cycle, and load the update one column vector of the orthogonal function for each field, each divided selection periods of the row selection period, which is the load A multi-line addressing driving method of a simple matrix liquid crystal , wherein row electrodes of the block are simultaneously selected using a column vector obtained by rotating vector bits in a row direction . A multi-line addressing driving method for a simple matrix liquid crystal according to any one of claims 1 to 3 ,
The upper bits of the gradation data corresponding to the display data are expressed by a pulse width modulation gradation method, and the lower bits of the gradation data corresponding to the display data are expressed by a frame rate control gradation method. The liquid crystal is driven to be assigned to the sequence that is the minimum division time in the pulse width modulation gray scale method and expressed in the control gray scale method, and added to the pulse width modulation gray scale method,
The number of the sequence, for each integer value or an integer value of the quotient of the divided plurality of the row number of electrodes are simultaneously selected, a simple matrix liquid crystal, characterized by dividing the row selection period in the divided selection periods Multi-line addressing driving method. Wherein a column vector of the orthogonal functions, within each of said fields, a simple matrix multiline addressing drive method of a liquid crystal according to claim 1, characterized in that the updated every each of the blocks. The column vectors of the orthogonal function, within each of the fields is the same column vector, simple matrix multiline addressing of the liquid crystal according to claim 1, wherein the updating for each of the fields in each Driving method. 7. A liquid crystal driver, wherein the liquid crystal panel is driven by the driving method according to claim 1.   A liquid crystal panel driven by the driving method according to claim 1.

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