JP3761729B2 - Bias circuit - Google Patents

Bias circuit Download PDF

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Publication number
JP3761729B2
JP3761729B2 JP37075498A JP37075498A JP3761729B2 JP 3761729 B2 JP3761729 B2 JP 3761729B2 JP 37075498 A JP37075498 A JP 37075498A JP 37075498 A JP37075498 A JP 37075498A JP 3761729 B2 JP3761729 B2 JP 3761729B2
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Prior art keywords
circuit
frequency
mim capacitor
bias
frequency band
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JP37075498A
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JP2000196379A (en
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直幸 栗田
恵吾 鴨▲崎▼
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Renesas Technology Corp
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Renesas Technology Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、バイアス回路、更に詳しくいえば、特に、マイクロ波又はミリ波帯で動作するモノリシック集積回路(Microwave Monolithic Integrated Circuits: MMIC)において用いられるトランジスタ駆動用の電源供給を行うバイアス回路に関するものである。
【0002】
【従来の技術】
マイクロ波又はミリ波帯などの高周波帯域で動作する集積回路に用いられるトランジスタの電源供給を行うバイアス回路は、トランジスタ内部の寄生リアクタンス成分と、トランジスタ駆動用の電源供給を行うバイアス回路中のリアクタンス成分などとが共振条件を満足し、異常発振を起こし、それがマイクロ波・ミリ波帯で集積回路が正常に動作しない原因となることがある。
【0003】
上記異常発振を防止するバイアス回路として、例えば、電子情報通信学会技術研究報告ED96-182にて開示された従来例を示す図3及び図4のように、トランジスタ駆動用の直流電源供給を行うバイアス回路は、高周波集積回路の動作周波数付近の高周波信号の伝播を防止するため、集積回路の動作周波数における伝播信号の波長をλとしたとき、λ/4の長さに等しいマイクロストリップ線路2の先端に、MIM(Metal-Insulator-Metal)キャパシタ7と、バイアホール5などを介した接地回路をトランジスタの電源印加端子に付加し、動作周波数周波数近傍の高周波信号をこの接地回路へ導く構成をとり、バイアス回路の直流電圧を印加するための、λ/4マイクロストリップ線路3とDC給電用パッド4への高周波信号の伝播を防止する措置をとるのが一般的である。
【0004】
しかし、トランジスタは、上記動作周波数より低い周波数では大きな利得を持つのが一般的である。そのため、トランジスタ内部の寄生リアクタンス成分と、トランジスタ駆動用の電源供給を行うバイアス回路中のリアクタンス成分などとが共振条件を満足し、動作周波数(数十GHz)より低い数百MHz〜数GHz程度の比較的低い周波数において異常発振を起こし、それがマイクロ波・ミリ波帯で集積回路が正常に動作しない原因となることがある。
【0005】
数百MHz〜数GHzの比較的低い周波数の伝送信号を接地回路へ導くには、10pF程度以上の比較的大きな容量のキャパシタを用いる必要があり、そのため図4に示すように、集積回路の外部にキャパシタ12を独立して設け、このキャパシタ12と、集積回路のバイアス給電用パッド4とを、ボンディングワイヤ13等の手段により接続する構成をとるのが一般的であった。
【0006】
【発明が解決しようとする課題】
上記従来のバイアス回路の構成では、MMIC回路の動作周波数(数十GHz)より低い数百MHz〜数GHz程度の帯域での異常発振を防止するため、マイクロ波・ミリ波帯集積回路の外に10pF程度以上のキャパシタ12を集積回路の外部に装荷し、且つこのキャパシタ12とバイアス給電用パッド4とをボンディングワイヤ等の手段により接続する必要があった。このため、複数個のMMICチップを用いて構成されるマイクロ波帯・ミリ波帯モジュールの作製工数が増加し、モジュール全体の製造コストが、装荷する外部キャパシタの分及びそれらの接続に必要となるボンディング工程の分だけ増大するという問題があった。
【0007】
また、マイクロ波・ミリ波帯集積回路における接地は、バイアホールを用いる方法が一般的である。バイアホールには数10pH程度の寄生インダクタンスが伴い、この寄生インダクタンスと、接地回路に装荷するキャパシタとが共振を起こし、この共振周波数付近において異常発振が起こり、マイクロ波・ミリ波帯集積回路が正常に動作しなくなる危険性があるという問題もあった。
【0008】
従って、本発明の目的は、集積回路、特にマイクロ波・ミリ波帯用集積回路の動作周波数帯域及び動作周波数帯域以下の低い周波数帯域での異常発振を防止し、かつ集積回路の外部に異常発振を防止用のキャパシタを設ける必要の無い集積回路用バイアス回路を提供することである。
【0009】
【課題を解決するための手段】
上記目的を達成するため、本発明では、トランジスタ駆動用の直流電源供給を行うバイアス回路を、モノリシック集積回路の動作周波数帯の伝播信号の波長の4分の1に等しい長さを持つショートスタブの先端と第1のバイアホールとの間に第1のMIMキャパシタと第1のバイアホールとからなる直列回路を接続した第1の接地回路と、上記第1のMIMキャパシタとバイアス給電用パッドとの間に形成された伝播信号の波長の4分の1に等しい長さを持つマイクロストリップ線路と、上記マイクロストリップ線路とバイアス給電パッドとの接続点近傍と第2のバイアホールとの間に第1の薄膜抵抗と第2のMIMキャパシタの直列回路を接続した第2の接地回路を形成して構成される。
【0010】
本発明の好ましい実施形態によれば、MMIC回路の動作周波数を数十GHzとし、数百MHzから数GHz程度の低周波数領域での異常発振を防ぐため、上記第1の薄膜抵抗は50Ω、上記第1のMIMキャパシタは10ないし50pF程度にする。
【0011】
また、上記MMIC回路の動作周波数と上記数百MHzから数GHz程度の周波数の中間の周波数での異常発振を防ぐため、上記ショートスタブの先端と上記第1のバイアホールとの間に、薄膜抵抗と第3のMIMキャパシタからなる直列回路を接続し、上記第1のバイアホールと共に上記中間の周波数を基板に接地する第3の接地回路を構成する。
【0012】
本発明によれば、DC近傍からミリ波帯の動作周波数付近までの広い周波数帯域での異常発振を防止できる。更に、第1、第2及び第3の接地回路がいずれもMMIC回路の中に形成されるため、外付けのキャパシタを必要としない。
【0013】
【発明の実施の形態】
図1及び図2は、それぞれ本発明によるバイアス回路の一実施例の回路図及びそのバイアス回路のMMIC上の回路素子のレイアウト平面図を示す。
【0014】
電界効果トランジスタ1のゲート端子Gには発振回路(図示せず)等のMMICが接続され、ドレイン端子Dに直流電圧を加えるバイアス回路が接続され、ソース端子Sは接地されている。トランジスタ1は増幅回路構成している。バイアス回路は、入力信号の特定の周波数(動作周波数と呼ぶ)成分の波長をλとしたとき、λ/4の長さのマイクロストリップ線路2により構成されるショートスタブと、マイクロストリップ線路2の先端とバイアホール5の間に接続されたMIMキャパシタ7と、上記ショートスタブ(マイクロストリップ線路)2の先端とDC給電用パッド4の間に接続されたλ/4の長さのマイクロストリップ線路3と、DC給電用パッド4近傍とバイアホール6との間に接続された薄膜抵抗11とMIMキャパシタ9の直列回路と、ショートスタブ2の先端とバイアホール5の間に接続された薄膜抵抗10と静電容MIMキャパシタ8の直列回路とをもつ。
【0015】
上記構成の回路で、ショートスタブ2の先端とバイアホール5の間に接続されたMIMキャパシタ7の部分と、ショートスタブ2の先端とDC給電用パッド4との間に接続されたλ/4の長さのマイクロストリップ線路3との部分は、図3、図4に示した従来知られているバイアス回路と同じで、トランジスタ1の給電点である接続点Dからバイアス回路側を見たとき、そのインピーダンスはMMIC回路の動作周波数においてオープンとなり、動作周波数帯の伝送信号は、バイアス回路へ伝播することはない。
【0016】
DC給電用パッド4近傍とバイアホール6との間に接続された薄膜抵抗11とMIMキャパシタ9の直列回路部分は、数百MHzから数GHz程度以下の低周波数帯域の伝送信号がDC給電用パッド4へ伝播することを防止する接地回路を構成する。また、ショートスタブ2の先端とバイアホール5の間に接続された薄膜抵抗10と静電容MIMキャパシタ8の直列回路部分は、上記動作周波数と低周波数帯域の間の中間の周波数帯の伝送信号がDC給電用パッド4へ伝播することを防止する接地回路を構成する。
【0017】
本発明の具体的実施例によれば、上記動作周波数を60GHzとし、バイアホール5及び6の寄生インダクタンス成分が約30pH(通常10ないし50pH)であるので、薄膜抵抗10及び11をいずれも50Ω、MIMキャパシタ8及び9の静電容量を10pF程度となるように構成した。
【0018】
なお、MIMキャパシタ8、9の値は、動作周波数、バイアホール5、6の持つ寄生インダクタンス成分によって、決定されるが、通常のMMICでは、電容量は10pF程度の大きさにすることが望ましい。更にバイアホールが大きなインダクタンス成分をもつ場合には、数百MHzから数GHz程度以下の低周波帯域の伝送信号がDC給電用パッド4へ伝播することがないよう、MIMキャパシタ9の静電容量は、適切な大きさに設定する必要がある。
【0019】
以上説明したように、本実施例では、MMICの動作周波数帯域と、数百MHz程度の低周波数帯域の間の周波数を持つ伝送信号がDC給電用パッド4へ伝播し、異常発振を起こすことを防止する手段を提供するものである。
【0020】
図5及び図6は、上記実施例のバイアス回路の伝送特性について説明する図である。図5は、バイアス回路と主線路すなわちトランジスタ1のドレイン端子Dの接続点からバイアス回路側を見たときの、DC給電用パッド4への伝送信号の通過特性を示したものである。横軸は0から100GHzまでの範囲の周波数を表し、縦軸は‐50dBから0dBの範囲の通過特性を表す。数値が小さいほど、すなわち、マイナス値の値が大きい程、バイアス回路と主線路との接続点からDCパッドへの伝送信号の通過量が少ないことを示す。
【0021】
同図において、曲線a,b,及びcは、それぞれ上記実施例、上記実施例から薄膜抵抗11と静電容MIMキャパシタ9の直列回路部分を除いたもの、及び上記実施例から全ての接地回路を除いた回路の特性を示す。特性cでは、動作周波数60GHz付近において共振条件が成り立ち、異常発振が起こりやすい状態となっている。特性bの図1の50Ω薄膜抵抗10、1pF程度の静電容量を持つMIMキャパシタ8からなる接地回路のみを設けた場合の通過特性は、60GHz付近での共振特性がやや改善されている。さらに、特性aの上記実施例のバイアス回路のごとく、50Ω薄膜抵抗10と、1pF程度のMIMキャパシタ8からなる接地回路と、50Ω薄膜抵抗11と、10pF程度の静電容量を持つMIMキャパシタ9と、バイアホール6からなる接地回路の両者を持つ場合、通過特性はさらに改善され、異常発振が起こる周波数は、0から100GHzの範囲内には存在しない。
【0022】
図6は、図5の1GHz以下の低周波数帯域における通過特性を、拡大して示したものである。上記実施例において、50Ω薄膜抵抗11と、10pF程度の静電容量を持つMIMキャパシタ9と、バイアホール6からなる接地回路を設けることで通過特性が大きく改善されており、直流に近い低周波数帯域で、異常発振が起きる危険性が低減されていることがわかる。
【0023】
以上、本発明の一実施例について説明したが、本発明は上記実施例に限定されるものではない。図7のごとく、接地回路をDC給電用パッド4に直接接続する構成としてもよい。また、50Ω薄膜抵抗11と、MIMキャパシタ9と、バイアホール6は直線上に配置する必要はなく、MMIC回路における各回路要素の配置の状態によっては、適宜50Ω薄膜抵抗11、MIMキャパシタ9、バイアホール6をL字状に配置しても、本発明において期待される効果が何ら影響を受けることはない。
【0024】
薄膜抵抗10及びMIMキャパシタ8を含む接地回路は、独立にバイアホールを設けて実現することもできるが、MMICの回路面積を低減するため、ショートスタブ2の接地に用いているバイアホール5を接地回路を利用することが望ましい。MIMキャパシタ8の静電容量は1pF程度の大きさを持つが、これはバイアホール5の持つ寄生インダクタンス成分が約30pHである場合の例であり、そのインダクタンス成分が異なる大きさを持つ場合には、30GHz程度以下の低周波帯域の伝送信号がDC給電用パッド4へ伝播することがないよう、MIMキャパシタ8の静電容量を、適切な大きさに設定する必要がある。
【0025】
【発明の効果】
以上説明したように、ミリ波帯MMICのバイアス回路において、数百MHzから数GHz帯と、MMICの動作周波数帯域の周波数帯の周波数を持つ伝送信号がDC給電用パッド4へ伝播し、異常発振を起こすことを、防止することができる。更に、2つの接地回路を設けることにより、DC近傍からMMICの動作周波数直下までの広い帯域にわたり、高周波信号のバイアス回路への伝播を低減することが可能となる。このため、バイアス回路内のMIMキャパシタと、バイアホールの持つインダクタンス成分とが共振を起こすという問題が解決される。
【0026】
また、この共振を防止する目的でMMICの外側にチップキャパシタ等を設ける必要がなくなり、マイクロ波・ミリ波帯MMICを用いるモジュールの製作工数及び製造コストが低減されるという効果を奏する。
【図面の簡単な説明】
【図1】本発明によるバイアス回路の一実施例の回路図である。
【図2】本発明によるバイアス回路の一実施例の回路図を構成したMMICの部分平面図である。
【図3】従来例のマイクロ波・ミリ波帯MMICにおけるバイアス回路の回路図である。
【図4】従来例のマイクロ波・ミリ波帯MMICにおける、バイアス回路のMMICの平面図である。
【図5】本発明によるバイアス回路の一実施例の回路図において、高周波信号のバイアス回路への漏洩の度合いを示す通過特性を説明する特性図である。
【図6】図5の通過特性の部分拡大図である。
【図7】本発明によるバイアス回路の他の実施例の回路図を構成したMMICの部分平面図である。
【符号の説明】
1:トランジスタ、
2:4分の1波長マイクロストリップ線路、
3:4分の1波長マイクロストリップ線路、
4:バイアス給電用パッド、
5、6:バイアホール、
7、8、9:MIMキャパシタ、
10、11:薄膜抵抗、
12:外付けキャパシタ、
13:ボンディングワイヤ。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a bias circuit, and more particularly to a bias circuit for supplying power for driving a transistor used in a microwave monolithic integrated circuit (MMIC) operating in a microwave or millimeter wave band. is there.
[0002]
[Prior art]
A bias circuit that supplies power to a transistor used in an integrated circuit that operates in a high frequency band such as a microwave or millimeter wave band includes a parasitic reactance component inside the transistor and a reactance component in the bias circuit that supplies power for driving the transistor. May satisfy the resonance condition and cause abnormal oscillation, which may cause the integrated circuit to not operate normally in the microwave / millimeter wave band.
[0003]
As the bias circuit for preventing the abnormal oscillation, for example, as shown in FIGS. 3 and 4 showing the conventional example disclosed in the technical report ED96-182 of the Institute of Electronics, Information and Communication Engineers, a bias for supplying DC power for driving a transistor is used. The circuit prevents the propagation of high-frequency signals in the vicinity of the operating frequency of the high-frequency integrated circuit, so that the tip of the microstrip line 2 is equal to the length of λ / 4 where λ is the wavelength of the propagation signal at the operating frequency of the integrated circuit. In addition, a ground circuit via a MIM (Metal-Insulator-Metal) capacitor 7 and a via hole 5 is added to the power supply terminal of the transistor, and a high-frequency signal in the vicinity of the operating frequency is guided to the ground circuit. Measures are taken to prevent propagation of high-frequency signals to the λ / 4 microstrip line 3 and the DC power supply pad 4 for applying a DC voltage of the bias circuit. There is common.
[0004]
However, the transistor generally has a large gain at a frequency lower than the above operating frequency. Therefore, the parasitic reactance component inside the transistor and the reactance component in the bias circuit that supplies power for driving the transistor satisfy the resonance condition, and are several hundred MHz to several GHz lower than the operating frequency (several tens of GHz). Abnormal oscillation may occur at a relatively low frequency, which may cause the integrated circuit not to operate normally in the microwave / millimeter wave band.
[0005]
In order to guide a transmission signal having a relatively low frequency of several hundred MHz to several GHz to the ground circuit, it is necessary to use a capacitor having a relatively large capacity of about 10 pF or more. Therefore, as shown in FIG. In general, the capacitor 12 is provided independently, and the capacitor 12 and the bias feeding pad 4 of the integrated circuit are connected by means such as a bonding wire 13.
[0006]
[Problems to be solved by the invention]
In the configuration of the conventional bias circuit, in order to prevent abnormal oscillation in a band of about several hundred MHz to several GHz, which is lower than the operating frequency (several tens of GHz) of the MMIC circuit, outside the microwave / millimeter wave band integrated circuit. It is necessary to load a capacitor 12 of about 10 pF or more outside the integrated circuit and to connect the capacitor 12 and the bias feeding pad 4 by means such as a bonding wire. For this reason, the number of manufacturing steps for microwave / millimeter-wave modules configured using a plurality of MMIC chips is increased, and the manufacturing cost of the entire module is necessary for the external capacitors to be loaded and their connection. There has been a problem that the bonding process is increased.
[0007]
The grounding in the microwave / millimeter wave band integrated circuit is generally a method using a via hole. The via hole has a parasitic inductance of about several tens of pH, and this parasitic inductance and the capacitor loaded in the ground circuit resonate. Abnormal oscillation occurs near the resonance frequency, and the microwave / millimeter wave band integrated circuit is normal. There was also a problem that there was a risk of not working.
[0008]
Accordingly, an object of the present invention is to prevent abnormal oscillation in an operating frequency band of an integrated circuit, in particular, an integrated circuit for microwave / millimeter wave band and a frequency band lower than the operating frequency band, and abnormal oscillation outside the integrated circuit. It is an object of the present invention to provide a bias circuit for an integrated circuit that does not require the provision of a capacitor for preventing this.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, in the present invention, a bias circuit that supplies a DC power supply for driving a transistor is a short stub having a length equal to one-fourth of the wavelength of a propagation signal in the operating frequency band of a monolithic integrated circuit. A first ground circuit in which a series circuit composed of a first MIM capacitor and a first via hole is connected between the front end and the first via hole; and the first MIM capacitor and a bias feeding pad. A microstrip line having a length equal to one-fourth of the wavelength of the propagation signal formed therebetween, and a first via between the vicinity of the connection point between the microstrip line and the bias feed pad and the second via hole. A second ground circuit is formed by connecting a series circuit of a thin film resistor and a second MIM capacitor.
[0010]
According to a preferred embodiment of the present invention, the operating frequency of the MMIC circuit is set to several tens of GHz, and in order to prevent abnormal oscillation in a low frequency range of several hundred MHz to several GHz, the first thin film resistor is 50Ω, The first MIM capacitor is about 10 to 50 pF.
[0011]
Further, in order to prevent abnormal oscillation at an intermediate frequency between the operating frequency of the MMIC circuit and the frequency of several hundred MHz to several GHz, a thin film resistor is provided between the tip of the short stub and the first via hole. Is connected to a series circuit formed of a third MIM capacitor, and a third grounding circuit is configured to ground the intermediate frequency to the substrate together with the first via hole.
[0012]
According to the present invention, it is possible to prevent abnormal oscillation in a wide frequency band from the vicinity of DC to the operating frequency of the millimeter wave band. Furthermore, since the first, second and third ground circuits are all formed in the MMIC circuit, no external capacitor is required.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
1 and 2 are a circuit diagram of an embodiment of a bias circuit according to the present invention and a layout plan view of circuit elements on the MMIC of the bias circuit, respectively.
[0014]
An MMIC such as an oscillation circuit (not shown) is connected to the gate terminal G of the field effect transistor 1, a bias circuit for applying a DC voltage is connected to the drain terminal D, and the source terminal S is grounded. The transistor 1 constitutes an amplifier circuit. The bias circuit includes a short stub constituted by a microstrip line 2 having a length of λ / 4, and a tip of the microstrip line 2 where λ is a wavelength of a specific frequency (referred to as an operating frequency) component of an input signal. And a MIM capacitor 7 connected between the via hole 5 and a microstrip line 3 having a length of λ / 4 connected between the tip of the short stub (microstrip line) 2 and the DC power supply pad 4. The series circuit of the thin film resistor 11 and the MIM capacitor 9 connected between the vicinity of the DC power supply pad 4 and the via hole 6, and the thin film resistor 10 connected between the tip of the short stub 2 and the via hole 5 It has a series circuit of capacitive MIM capacitors 8.
[0015]
In the circuit configured as described above, the portion of the MIM capacitor 7 connected between the tip of the short stub 2 and the via hole 5 and the λ / 4 connected between the tip of the short stub 2 and the DC power supply pad 4. The length of the portion with the microstrip line 3 is the same as the conventionally known bias circuit shown in FIGS. 3 and 4, and when the bias circuit side is viewed from the connection point D that is the feeding point of the transistor 1, The impedance is open at the operating frequency of the MMIC circuit, and the transmission signal in the operating frequency band does not propagate to the bias circuit.
[0016]
A series circuit portion of the thin film resistor 11 and the MIM capacitor 9 connected between the vicinity of the DC power supply pad 4 and the via hole 6 transmits a transmission signal in a low frequency band of about several hundred MHz to several GHz or less. 4 is configured to prevent the propagation to 4. The series circuit portion of the thin film resistor 10 and the electrostatic capacitance MIM capacitor 8 connected between the tip of the short stub 2 and the via hole 5 transmits a transmission signal in an intermediate frequency band between the operating frequency and the low frequency band. A ground circuit for preventing propagation to the DC power supply pad 4 is configured.
[0017]
According to a specific embodiment of the present invention, the operating frequency is 60 GHz, and the parasitic inductance components of the via holes 5 and 6 are about 30 pH (usually 10 to 50 pH), so that the thin film resistors 10 and 11 are both 50Ω, The capacitance of the MIM capacitors 8 and 9 was configured to be about 10 pF.
[0018]
Note that the values of the MIM capacitors 8 and 9 are determined by the operating frequency and the parasitic inductance components of the via holes 5 and 6. However, in a normal MMIC, the capacitance is desirably about 10 pF. Further, when the via hole has a large inductance component, the capacitance of the MIM capacitor 9 is set so that a transmission signal in a low frequency band of about several hundred MHz to several GHz or less is not propagated to the DC power supply pad 4. Need to be set to an appropriate size.
[0019]
As described above, in this embodiment, a transmission signal having a frequency between the operating frequency band of the MMIC and a low frequency band of about several hundred MHz is propagated to the DC power supply pad 4 and causes abnormal oscillation. It provides a means to prevent.
[0020]
5 and 6 are diagrams for explaining the transmission characteristics of the bias circuit of the above embodiment. FIG. 5 shows the transmission characteristics of the transmission signal to the DC power supply pad 4 when the bias circuit side is viewed from the connection point between the bias circuit and the main line, that is, the drain terminal D of the transistor 1. The horizontal axis represents frequencies in the range from 0 to 100 GHz, and the vertical axis represents pass characteristics in the range from -50 dB to 0 dB. The smaller the numerical value, that is, the larger the negative value, the smaller the passing amount of the transmission signal from the connection point between the bias circuit and the main line to the DC pad.
[0021]
In the figure, curves a, b, and c respectively show the above-mentioned embodiment, the above-described embodiment except the series circuit portion of the thin film resistor 11 and the capacitance MIM capacitor 9, and all the ground circuits from the above-mentioned embodiment. The characteristics of the excluded circuit are shown. In the characteristic c, the resonance condition is satisfied near the operating frequency of 60 GHz, and abnormal oscillation is likely to occur. In the case of providing only the ground circuit composed of the MIM capacitor 8 having the capacitance of about 1 pF of the 50Ω thin film resistor 10 of FIG. 1 of the characteristic b, the resonance characteristic around 60 GHz is slightly improved. Further, like the bias circuit of the above-described embodiment of the characteristic a, a ground circuit composed of a 50Ω thin film resistor 10 and an MIM capacitor 8 of about 1 pF, a 50Ω thin film resistor 11, and an MIM capacitor 9 having a capacitance of about 10 pF, In the case of having both of the ground circuits composed of the via holes 6, the pass characteristics are further improved, and the frequency at which abnormal oscillation occurs does not exist in the range of 0 to 100 GHz.
[0022]
FIG. 6 is an enlarged view of the pass characteristics in the low frequency band of 1 GHz or less in FIG. In the above embodiment, by providing the ground circuit composed of the 50Ω thin film resistor 11, the MIM capacitor 9 having a capacitance of about 10 pF, and the via hole 6, the pass characteristic is greatly improved, and the low frequency band close to direct current is obtained. It can be seen that the risk of abnormal oscillation is reduced.
[0023]
As mentioned above, although one Example of this invention was described, this invention is not limited to the said Example. As shown in FIG. 7, the ground circuit may be directly connected to the DC power supply pad 4. The 50Ω thin film resistor 11, the MIM capacitor 9, and the via hole 6 do not need to be arranged on a straight line. Depending on the arrangement state of each circuit element in the MMIC circuit, the 50Ω thin film resistor 11, the MIM capacitor 9, the via Even if the holes 6 are arranged in an L shape, the effects expected in the present invention are not affected at all.
[0024]
The ground circuit including the thin film resistor 10 and the MIM capacitor 8 can be realized by providing a via hole independently, but in order to reduce the circuit area of the MMIC, the via hole 5 used for grounding the short stub 2 is grounded. It is desirable to use a circuit. The capacitance of the MIM capacitor 8 has a magnitude of about 1 pF. This is an example when the parasitic inductance component of the via hole 5 is about 30 pH, and when the inductance component has a different magnitude. Therefore, it is necessary to set the capacitance of the MIM capacitor 8 to an appropriate size so that a transmission signal in a low frequency band of about 30 GHz or less does not propagate to the DC power supply pad 4.
[0025]
【The invention's effect】
As described above, in the bias circuit of the millimeter wave band MMIC, a transmission signal having a frequency in the frequency band of several hundred MHz to several GHz and the operating frequency band of the MMIC propagates to the DC power supply pad 4 to cause abnormal oscillation. Can be prevented. Further, by providing two ground circuits, it is possible to reduce the propagation of the high-frequency signal to the bias circuit over a wide band from the vicinity of DC to immediately below the operating frequency of the MMIC. This solves the problem of resonance between the MIM capacitor in the bias circuit and the inductance component of the via hole.
[0026]
In addition, it is not necessary to provide a chip capacitor or the like outside the MMIC for the purpose of preventing this resonance, and there is an effect that the number of manufacturing steps and the manufacturing cost of the module using the microwave / millimeter wave band MMIC are reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of an embodiment of a bias circuit according to the present invention.
FIG. 2 is a partial plan view of an MMIC constituting a circuit diagram of an embodiment of a bias circuit according to the present invention.
FIG. 3 is a circuit diagram of a bias circuit in a conventional microwave / millimeter wave MMIC.
FIG. 4 is a plan view of an MMIC of a bias circuit in a conventional microwave / millimeter wave MMIC.
FIG. 5 is a characteristic diagram for explaining pass characteristics indicating the degree of leakage of a high-frequency signal to the bias circuit in the circuit diagram of one embodiment of the bias circuit according to the present invention.
6 is a partially enlarged view of the pass characteristic of FIG.
FIG. 7 is a partial plan view of an MMIC constituting a circuit diagram of another embodiment of the bias circuit according to the present invention.
[Explanation of symbols]
1: transistor,
2: 1/4 wavelength microstrip line,
3: 1/4 wavelength microstrip line,
4: Pad for bias feeding,
5, 6: Via hole,
7, 8, 9: MIM capacitor,
10, 11: Thin film resistor,
12: External capacitor
13: Bonding wire.

Claims (1)

マイクロ波・ミリ波帯で動作するモノリシック集積回路に形成されるトランジスタ駆動用の電源供給を行うバイアス回路であって、
一端が上記トランジスタの電圧供給端子に接続され、他端が第1のMIMキャパシタに接続され、モノリシック集積回路の動作周波数帯の伝播信号の波長の4分の1に等しい長さを持つショートスタブと、上記第1のMIMキャパシタと第1のバイアホールとからなる直列回路の第1の接地回路と、
バイアス給電用パッドと上記ショートスタブの他端とを接続する上記波長の4分の1に等しい長さを持つマイクロストリップ線路と、
上記マイクロストリップ線路とバイアス給電パッドとの接続点近傍と接地間に第1の薄膜抵抗と第2のMIMキャパシタと第2のバイアホールとが直列接続され、上記動作周波数帯の周波数より低い周波数成分を短絡する第2の接地回路と、上記ショートスタブの他端と第1のMIMキャパシタとの間に、第2の薄膜抵抗及び第3のMIMキャパシタとからなりかつ上記動作周波数帯の周波数より低く、かつ上記周波数成分の周波数より高い周波数成分を短絡するための第2の直列回路を上記第3のMIMキャパシタが上記第1のバイアホール介して接地した第3の接地回路をもち、
上記第1、第2及び第3のMIMキャパシタの静電容量は、第1および第2のバイアホールの持つ寄生インダクタンス成分の大きさに応じて、それぞれMMICの動作周波数近傍、数百 MHz 程度以下の低周波数帯域及び上記2つの周波数帯域の中間付近の周波数帯域の伝送信号が直流電圧給電用パッドへ伝播することを防止できるような値に設定されたことを特徴とするバイアス回路。
A bias circuit for supplying power for driving a transistor formed in a monolithic integrated circuit operating in a microwave / millimeter wave band ,
A short stub having one end connected to the voltage supply terminal of the transistor and the other end connected to the first MIM capacitor and having a length equal to a quarter of the wavelength of the propagation signal in the operating frequency band of the monolithic integrated circuit; A first grounding circuit in a series circuit comprising the first MIM capacitor and the first via hole;
A microstrip line having a length equal to a quarter of the wavelength connecting the bias feeding pad and the other end of the short stub;
A first thin film resistor, a second MIM capacitor, and a second via hole are connected in series between the connection point between the microstrip line and the bias power supply pad and the ground, and a frequency component lower than the frequency of the operating frequency band. Between the other end of the short stub and the first MIM capacitor, the second thin film resistor and the third MIM capacitor, and lower than the frequency of the operating frequency band. And a third grounding circuit in which the third MIM capacitor is grounded via the first via hole for a second series circuit for short-circuiting a frequency component higher than the frequency of the frequency component,
The capacitances of the first, second, and third MIM capacitors are in the vicinity of the operating frequency of the MMIC, about several hundred MHz or less , depending on the magnitude of the parasitic inductance component of the first and second via holes, respectively. The bias circuit is set to a value capable of preventing a transmission signal in a low frequency band and a frequency band near the middle of the two frequency bands from propagating to the DC voltage supply pad .
JP37075498A 1998-12-25 1998-12-25 Bias circuit Expired - Fee Related JP3761729B2 (en)

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JP2009260639A (en) * 2008-04-16 2009-11-05 Mitsubishi Electric Corp High frequency amplifier

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JP2004289228A (en) * 2003-03-19 2004-10-14 Toshiba Corp Microwave switch circuit
WO2005107063A1 (en) 2004-04-28 2005-11-10 Mitsubishi Denki Kabushiki Kaisha Bypass circuit
JP4788506B2 (en) * 2006-07-14 2011-10-05 日本電気株式会社 amplifier
KR20190025690A (en) * 2016-07-05 2019-03-11 레이던 컴퍼니 An amplified microwave monolithic integrated circuit (MMIC) having a de-queuing section with resistive vias,

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009260639A (en) * 2008-04-16 2009-11-05 Mitsubishi Electric Corp High frequency amplifier

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