JP3729369B2 - Direct conversion FSK receiver - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a circuit configuration technique for configuring a circuit that receives and demodulates an FSK (Frequency Shift Keying) signal by a direct conversion (Dirrect Conversion) method.
[0002]
[Prior art]
One of the methods for receiving and demodulating the FSK signal is a direct conversion method. The FSK signal is a signal for transmitting digital information with a frequency shift (information “0” is shifted to frequency f ₀ and “1” is shifted to frequency f ₁ ). The conversion method has been used in recent years because it has advantages such as no image interference and easy frequency selectivity determined by the baseband. In this method, a local oscillator having a center frequency of frequencies f ₀ and f ₁ is provided, two-axis carriers differing from each other by 90 ° are created, the carrier waves and the received signal are multiplied, and the outputs are low-passed respectively. When added to the filter, in-phase components (abbreviated as Ich components (ch is a channel)) and quadrature components (abbreviated as Qch components) as baseband signals are obtained at the output. It is done. Since the phase relationship between the two components is + 90 ° or −90 ° depending on whether the input signal frequency is higher or lower than the local frequency, whether the information is “0” or “1” is detected by detecting this phase relationship. It is a method of judging.
[0003]
The determination of whether it is + 90 ° or −90 ° is normally performed using a logic circuit. For example, the Qch component zero-crosses in the positive direction or zero-crosses in the negative direction while the Ich component is positive potential. Judge by. Accordingly, when the modulation index is large, zero crossing occurs many times during one symbol, so the determination is easy. However, when the modulation index becomes 1 or less, there may occur no zero crossing between one symbol, A code error occurs.
For this reason, when the modulation index is small, a phase shifter is inserted in both or one of the Ich and Qch baseband signals so that the difference in phase shift amount of the phase shifter is relatively 90 °. Thus, the phase difference that was + 90 ° or −90 ° is converted into a phase difference of 0 ° or 180 °. In this way, since it is sufficient to determine whether the phase is in phase or out of phase even if zero crossing does not occur as in the case of the previous example, it seems that the determination operation can be performed well even if the modulation index decreases.
[0004]
However, this method has the following problems.
The phase shift for the baseband signal should give equal phase shift for all frequencies within the band of the baseband signal, but the amplitude frequency characteristic should be flat. To do this accurately, it is necessary to combine a very large number of networks or to perform Hilbert transformation, but the former increases the circuit scale of the network, and the latter directly performs the transformation. Instead of using a transversal filter (DSP) or a DSP (Digital Signal Processor) instead, it is inevitable that the circuit scale will increase in any case. .
[0005]
[Problems to be solved by the invention]
A 90 ° phase shift relative to all frequency components between both Ich and Qch baseband signals means that, for example, nothing is performed on the Ich signal, and 90 ° phase shift is performed only on the Qch signal. That is. It is quite difficult to perform this phase shift honestly as described above, but if the signal to be handled is a data signal and its amplitude component is waveform-shaped later, only the phase component will be correct. Even if the phase is shifted (differentiated), a demodulated output that does not differ greatly is obtained. Accordingly, it is an object of the present invention to find a circuit configuration method for obtaining a correct differential output only for this Qch signal.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, a direct conversion FSK receiver according to the present invention comprises: first means for forming an in-phase component of a baseband signal and a quadrature component of a baseband signal from an FSK signal by frequency conversion; the in-phase component; A second means for individually sampling and holding each of the orthogonal components at the time of alternately arriving and forming a first step wave and a second step wave, respectively, and the first step wave and the second step wave; The one step wave is sampled and held at a timing different from the previous sampling and hold timing performed on the one step wave to form a third step wave, and the one step wave and the third step wave are formed. A third means for forming a fourth step wave showing a difference from the wave, and the other step wave and the fourth step wave formed by the second means, respectively, Fourth means for sampling and holding to form a fifth step wave and a sixth step wave at a timing different from the timing of the previous sampling and holding performed on the step wave and the second step wave; A fifth means for forming a first comparison signal and a second comparison signal by respectively comparing the staircase wave and the sixth staircase wave with a reference value; and an exclusive logic of the first comparison signal and the second comparison signal And a sixth means for deriving binary signals 0 and 1 which are demodulated outputs of the FSK signal by summation .
[0007]
DETAILED DESCRIPTION OF THE INVENTION
In the above-described embodiment of the present invention, both baseband signals (I signal and Q signal) are added to the individual samplers, where they are sampled alternately at equal time intervals Δt, and the sampler outputs The pulse is sequentially numbered n, for example, Ich is an even number and Qch is an odd number. Focusing on the Nth specific pulse of Ich, if this is I _N , it is only necessary to obtain the slope of Qch when I _N is obtained. Therefore, pulses Q _N-1 and Q _{N + 1} before and after I _N are used. That is, the former pulse is held and the difference Q _{N + 1} -Q _N-1 is obtained. The true slope needs to divide this difference by 2Δt, but this is a gain coefficient, and there is no need to consider only the signal polarity, so this difference will be expressed as a slope.
This operation is very close to the true slope of Qch because the slope of Qch when I _N is obtained is obtained from the sample values before and after I _N. Therefore, if such an operation is performed on successive pulses, the phase component of Qch can be shifted by approximately 90 °. After that, it may be determined whether both Ich and Qch pulses have the same polarity or opposite polarity. By this method, even an FSK signal having a small modulation index can be demodulated by the direct conversion method.
[0008]
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a circuit system diagram showing a main configuration of a direct conversion FSK receiver according to the present invention .
In FIG. 1, 1 is an FSK signal input terminal, 2 and 4 are multipliers (MLTPL), 3 is a π / 2 phase shifter (PHSFT), 5 is a local oscillator (OSC), and 6 and 7 are low-pass filters (LFT). 8, 9, 10, 12, 13 are sample and hold circuits (S & H), 11 is a subtractor (SUBTRCT), 14 and 15 are comparators (COMP), 16 is an exclusive OR circuit (EXOR), and 17 is a demodulated output. A terminal 18 is a control pulse generator (CPG) . In this case, the component part including the multipliers 2 and 4, the π / 2 phase shifter 3, the local oscillator 5, and the low-pass filters 6 and 7 includes a function executed by the component part. The component comprising the sample and hold circuits 8 and 9 and the control pulse generator 18 corresponds to the second means of the first embodiment including the function executed by the component. The component part which consists of the circuit 10, the subtractor 11, and the control pulse generator 18 is equivalent to the 3rd means of Claim 1 including the function performed by the component part. Further, the constituent part composed of the sample hold circuits 12 and 13 and the control pulse generator 18 corresponds to the fourth means of the first aspect including the function executed by the constituent part, and comprises the comparators 14 and 15. The component part corresponds to the fifth means of claim 1 including the function executed in the component part, and the component part composed of the exclusive OR circuit 16 includes the function executed in the component part. This corresponds to the sixth means of claim 1.
The FSK signal input from the FSK signal input terminal 1 has a phase difference of π / 2 in the multipliers 2 and 4 and has a frequency f0 representing the information “0 ” and a frequency f1 representing the information “1”. By multiplying the carrier waves of equal frequency and passing the multiplication outputs through the low-pass filters 6 and 7 , respectively , the I (in-phase) component of the baseband signal is obtained at the output of the low-pass filter 6, and the output of the low-pass filter 7 Q (orthogonal) component of the baseband signal is obtained. These two baseband signals are Ru added to the sample and hold circuits 8 and 9, respectively.
[0009]
Here, FIGS. 2A to 2J are signal waveform diagrams showing the temporal changes of various signals formed in each part of the direct conversion FSK receiver shown in FIG.
In FIG. 2, the horizontal axis represents time, and the vertical axis represents level. (A) is a first control pulse P1 output from the control pulse generator 18, and (b) is a control pulse generator. The second control pulse P2 output from 18 and (c) the third control pulse P3 output from the control pulse generator 18 and (d) are the output signal 6 ′ of the low-pass filter 6 and the output step wave of the sample hold circuit 8. 8 ', the output step wave 12' of the sample hold circuit 12, and (e) are the output signal 7 'of the low pass filter 7, the output step wave 9' of the sample hold circuit 9, and the output step wave 10 'of the sample hold circuit 10. f) is the subtraction output 11 ′ of the subtractor 11, (g) is the output step wave 13 ′ of the sample and hold circuit 13, (h) is the comparison output signal 14 ′ of the comparator 14, and (i) is the comparison output signal of the comparator 15. 1 Illustrates ', (j) is the output signal of the exclusive OR circuit 16, i.e. the demodulated signals 16', respectively.
As shown in FIGS. 2A, 2B, and 2C, the control pulse generator 18 outputs control pulses P1, P2, and P3 with the same period at different timing points. At this time, the control pulse P1 is supplied to the sample and hold circuits 8 and 10, the control pulse P2 is supplied to the sample and hold circuit 9, and the control pulse P3 is supplied to the sample and hold circuits 12 and 13.
As shown in FIG. 2D, when the output signal 6 ′ of the low-pass filter 6 and the control pulse P1 are supplied, the sample and hold circuit 8 samples and holds the output signal 6 ′ with the control pulse P1, and the dotted line The staircase wave 8 ′ is formed as shown in FIG. Then, when the staircase wave 8 ′ and the control pulse P3 are supplied, the sample hold circuit 12 samples and holds the staircase wave 8 ′ with the control pulse P3, and outputs a staircase wave 12 ′ as shown by a solid line. Incidentally, the level I1, I3, I5, I7 · · · which is shown in FIG. 2 (d), a sample value when sampled at time t1, t3, t5, t7 · · · respectively, staircase 12 ' Indicates that these sample values are held.
[0010]
Further, as shown in FIG. 2 (e), the sample-hold circuit 9, 'when the control pulse P2 is supplied, the output signal 7' output signal 7 of the low-pass filter 7 and a sample-hold by the control pulse P2 to (The hold values are Q2, Q4, Q8...) , And a staircase wave 9 ′ as shown by the dotted line is formed. This staircase wave 9 'is further sampled and held by the control pulse P1 in the sample-and-hold circuit 10, and a staircase wave 10' as shown by a solid line is output as its output. Next, the staircase wave 9 ′ and the staircase wave 10 ′ are added to the subtractor 11, and a process of subtracting the staircase wave 10 ′ from the staircase wave 9 ′ is performed, and the output is as shown in FIG. A subtraction signal 11 ′ is output. At this time, the amplitude values of the subtraction signal 11 ′ are Q 4 -Q 2 , Q 6 -Q 4 . This subtraction signal 11 ′ is further sampled and held by the control pulse P3 in the sample and hold circuit 13, and a staircase wave 13 ′ is output to the output as shown by the solid line in FIG. 2 (g).
The staircase wave 12 ' and the staircase wave 13' are supplied to comparators 14 and 15, respectively , where they are compared with a zero volt reference voltage (not shown in FIG. 1) and shown in FIGS. 2 (h) and (i). Comparison signals 14 'and 15' having such a logic level are formed. These comparison signals 14 'and 15' are supplied to an exclusive OR circuit 16 to obtain their exclusive OR, and a demodulated signal 16 'is derived from the output.
[0011]
【The invention's effect】
As described above in detail, according to the present invention, in the direct conversion reception of the FSK signal, the two-axis components of I and Q are alternately sampled, and the difference between only one of them is obtained, thereby sampling the other. Since the former slope component corresponding to the time point can be easily obtained, the demodulated output is obtained by comparing this with the latter polarity. Therefore, even if the modulation index of the FSK signal is small and there is no zero cross point in the symbol, the polarity comparison with one of the differential signals can be performed, so that demodulation is possible.
[Brief description of the drawings]
FIG. 1 is a circuit diagram for explaining the configuration and operating principle of an embodiment of the present invention.
2 is a waveform diagram of each part for explaining the operation of FIG. 1; FIG.
[Explanation of symbols]
1 FSK signal input terminal 2 Multiplier (MLTPL)
3 π / 2 phase shifter (PHSFT)
4 Multiplier (MLTPL)
5 Local oscillator (OSC)
6 Low-pass filter (LPF)
7 Low-pass filter (LPF)
8 Sample hold circuit (S & H)
9 Sample hold circuit (S & H)
10 Sample hold circuit (S & H)
11 Subtractor (SUBTRCT)
12 Sample hold circuit (S & H)
13 Sample hold circuit (S & H)
14 Comparator (COMP)
15 Comparator (COMP)
16 Exclusive OR circuit (EXOR)
17 Demodulation output terminal 18 Control pulse generator (CPG)

Claims (1)

First means for forming an in-phase component of the baseband signal and a quadrature component of the baseband signal from the FSK signal by frequency conversion, and individually sampling and holding each of the in-phase component and the quadrature component at the time of alternately arriving. A second means for forming a first step wave and a second step wave, respectively, and one of the first step wave and the second step wave is applied to the one step wave. A third means for forming a third staircase wave by sampling and holding at a timing different from the sampling-holding timing and forming a fourth staircase wave indicating a difference between the one staircase wave and the third staircase wave. And the other sampling wave formed before the second staircase wave and the fourth staircase wave formed by the second means with respect to the first staircase wave and the second staircase wave, respectively. A fourth means for sampling and holding to form a fifth step wave and a sixth step wave at a timing different from the timing of the first step, and comparing the fifth step wave and the sixth step wave with reference values respectively. Binary signals 0 and 1 which are demodulated outputs of the FSK signal are derived by exclusive OR of the first comparison signal and the second comparison signal by fifth means for forming one comparison signal and a second comparison signal. And a direct conversion FSK receiver characterized by comprising:

Images