JP3724381B2 - RAKE receiver path detection circuit and path detection method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a delayed signal power distribution (hereinafter also referred to as a delay profile) generated based on a received signal in a direct sequence code division multiple access (DS-CDMA) communication. The present invention relates to a path detection circuit and a path detection method of a RAKE receiver that detects a path by using a
[0002]
[Prior art]
In addition to the signal (direct wave) that reaches the receiving side directly, the single transmission signal at the time of transmission is reflected by mountains and buildings, so that it propagates through multiple paths and reaches the receiving side (Such signal waves are called multipath waves). Therefore, a signal that has propagated through such a long path is included in the received signal as a delayed signal. On the receiving side, a correlation between the received signal and the spread code is taken to generate a delay profile in which a peak of signal power appears at the reception time of the direct wave and the reception time of each delayed signal.
[0003]
FIG. 32 is a diagram showing a delay profile obtained in this way.
In the delay profile of FIG. 32, the vertical axis represents the correlation value between the received signal and the spread code and represents the signal power of the received signal. Further, the horizontal axis is a time axis indicating a shift (delay) in the received signal.
Although not shown, a division point obtained by dividing the time axis of the delay profile at a constant time interval (for example, 0.25 chip of a spread code) is provided as a sample time.
The minimum selection path interval at 0.25 chip resolution when detecting the peak of multiple paths from the delay profile at pp51 of the IEICE "Path Search Characteristics of DS-CDMA System by Indoor / Outdoor Experiment" in November 1997 Is shown to be optimal at 0.75 chips.
[0004]
Hereinafter, only the delay profile will be described, and the maximum value of the signal power may be simply referred to as the maximum value or peak, the maximum value of the signal power may be simply referred to as the maximum value or peak, and the peak of the signal power may be simply referred to as the peak. A pair of sample time and signal power at the sample time is called a sample point. Further, the sample point in the delay profile may be referred to as a detection range.
[0005]
FIG. 33 is a configuration diagram of a conventional general RAKE receiver disclosed as a conventional example in Japanese Patent Laid-Open No. 10-112673, for example.
In the figure, 3310 is a matched filter, 3311 is a delay profile generation circuit, 3312 is a first memory for storing a delay profile for each sample point, 3313 is an effective path detection circuit for detecting an effective path in the delay profile, and 3314 is an effective path. Is a second memory for storing.
[0006]
Next, the operation of the conventional path detection circuit will be described.
On the receiving side, the matched filter 3310 correlates the received signal with the spread code, thereby generating an impulse response of the received signal. The impulse response of the received signal is generated at each sampling time by the delay profile generation circuit 3311 to generate a delay profile and write it to the first memory 3312. The first memory 3312 stores the impulse response output from the matched filter 3310 over one symbol. The effective path detection circuit 3313 reads the delay profile from the first memory 3312, and uses the peak delay time exceeding a predetermined threshold as an effective path position representing the delay time of the effective path contributing to propagation. The detected effective path position is written in the second memory 3314 as a timing signal.
[0007]
Thus, the effective path detection is performed by the effective path detection circuit 3313. An example shown in more detail about the effective path detection is the above-mentioned DS-CDMA system based on the Institute of Electronics, Information and Communication Engineers of November 1997 “Indoor / Outdoor Experiments”. Will be described below.
[0008]
In the delay profile, there is a peak of signal power that peaks at the effective path. After detecting a certain effective path, the peak portion that has this effective path as a peak is removed from the detection range, and another effective path is searched. To do.
[0009]
FIG. 34 is a flowchart showing a conventional effective path detection operation.
Next, a conventional effective path detection operation will be described with reference to FIGS. 33 and 34. FIG.
(1) First, the effective path detection circuit 3313 reads the delay profile from the first memory 3312, compares the signal powers of all the sample points with each other, detects the sample point with the maximum signal power as an effective path, and The valid path sample time is stored in the second memory 3314. (Step S3401).
(2) Next, in an environment with small delay dispersion, delay intervals of effective paths may be gathered within one chip. Therefore, there is a possibility that another effective path is included in the peak of the signal power, and the effective path detection circuit 3313 detects the effective path and the left and right n ( n is a natural number) sample points are deleted from the detection range (step S3402).
In this case, the value of n is determined and set in advance by the system so that another effective path can be found from the peak of the signal power.
Note that deletion of sample points means that the sample points are not detected as valid paths.
(3) Next, the valid path detection circuit 3313 checks whether or not the number of detected valid paths has reached a predetermined number (step S3403). If the number of valid paths has not yet reached the predetermined number, the process returns to step S3401, and steps S3401 and S3402 are repeatedly executed until the predetermined number is reached.
(4) When the number of effective paths reaches a predetermined number in step S3403, the effective path sample time is read from the second memory 3314, the signal power of the effective path is extracted from the first memory 3312, and the signal power is large. The processing ends after the sampling time and signal power of the effective path are output to each finger (not shown) in order (step S3404). Thus, the effective path sampling time and signal power are assigned to each finger, and each finger performs despreading based on these signals, thereby enabling RAKE combining.
[0010]
FIG. 35 is a diagram showing a state in which a part of a conventional peak of signal power is deleted from the detection range.
As shown in FIG. 35, when n = 1 is set, the sample point where the signal power is maximum and the sample point adjacent to the left and right are deleted (for example, the signal power is set to 0). When n = 2 is set, the sample points on both sides are also deleted (for example, the signal power is set to 0). When n = 3 is set, both adjacent sample points are also deleted (for example, the signal power is set to 0).
[0011]
[Problems to be solved by the invention]
As described above, RAKE combining can be performed by assigning the detected effective path sample time and signal power to each finger of the RAKE receiver. However, the delay profile fluctuates from time to time, and in a delay profile obtained in an environment where the delay dispersion has a certain magnitude, only one effective path is included in the peak of signal power. Therefore, in the conventional method of deleting 2n sample points (each left and right) in the delay profile from the detection range in the delay profile, if the value of n is small, only a part of the peak is deleted. The foot of the mountain remains. If this remaining skirt is the new maximum value of power, it is erroneously detected as an effective path, leading to degradation of reception performance. On the other hand, if the value of n is too large, there is a possibility that a path close to the detected effective path may be deleted, leading to deterioration in reception accuracy. Thus, there is a problem that it is difficult to set the value of n according to the delay dispersion.
[0012]
The present invention has been made in order to solve the above-described problems, and performs highly accurate effective path detection without depending on delay dispersion, and also performs a pathless allocation corresponding to the number of fingers. An object of the present invention is to provide a detection circuit and a path detection method.
[0013]
[Means for Solving the Problems]
A path detection circuit according to a first aspect of the present invention is a path detection circuit for a RAKE receiver that detects a path using a delay signal power distribution generated based on a received signal.
Detecting the time when the signal power in the delayed signal power distribution becomes maximum and the maximum value of the signal power as the path,
Every time the path is detected, the number of paths is counted up,
A peak of signal power having the path at the top in the delayed signal power distribution is deleted.
[0014]
According to a second aspect of the present invention, there is provided a path detection circuit for a RAKE receiver that detects a path using a delay signal power distribution generated based on a received signal, wherein the time axis of the delay signal power distribution is a time axis. A maximum value detecting means for detecting the time and signal power of the sample point at which the signal power is maximum among the plurality of sample points formed by dividing the predetermined time as the path;
A path number counting means for counting up a path count value each time the path is detected by the maximum value detecting means;
Path detection range control means for deleting a peak of signal power having the path at the top in the delayed signal power distribution every time the path is detected by the maximum value detection means;
And detecting the path, deleting the peak of the signal power, and counting up the number of paths until the path number count value reaches a predetermined value.
[0015]
According to a third aspect of the present invention, there is provided a path detection circuit for a RAKE receiver that detects a path using a delay signal power distribution generated based on a received signal, wherein the time axis of the delay signal power distribution is a time axis. Differential code generation means for examining the difference in signal power of all adjacent sample points among a plurality of sample points formed by dividing the predetermined time, and generating a code of the difference as a difference code;
A maximal point detecting means for detecting adjacent sample points having different differential codes as maximal points indicating the candidate paths;
Maximum value detecting means for detecting, as the path, a sample point having the maximum power among the at least one local maximum point;
A path number counting means for counting up a path count value each time the path is detected by the maximum value detecting means;
Path detection range control means for deleting the path in the delayed signal power distribution each time the path is detected by the maximum value detection means;
The path detection, the path number count-up, and the path deletion are repeated until the path count value exceeds a predetermined value.
[0016]
A path detection circuit according to a fourth invention is
A difference code output from the difference code generation means is sequentially examined from the leftmost sample point to the rightmost sample point, and a maximum point detection means for determining the sample point when the difference code changes as a maximum point is provided. .
[0017]
A path detection circuit according to the fifth invention is:
A maximal point detection unit that sequentially checks the differential code output from the differential code generation unit from the leftmost sample point to the rightmost sample point, and determines the sample point when the differential code changes via 0 as a maximal point. It is provided.
[0018]
A path detection circuit according to the sixth invention is:
Difference code output from the difference code generation means is sequentially examined from the rightmost sample point to the leftmost sample point, and a maximum point detection means for determining the sample point when the difference code changes as a maximum point is provided. .
[0019]
A path detection circuit according to the seventh invention is
A maximal point detection unit that sequentially checks the differential code output from the differential code generation unit from the rightmost sample point to the leftmost sample point, and determines the sample point when the differential code changes via 0 as a maximal point. It is provided.
[0020]
According to an eighth aspect of the present invention, there is provided a path detection circuit comprising noise level comparison means for comparing the signal power detected by the maximum value detection means with a predetermined threshold value and outputting the comparison result as a comparison result signal. The means detects a sample point having the signal power as a path when the signal power is larger than the threshold value based on the comparison result signal.
[0021]
According to a ninth aspect of the present invention, a path detection circuit includes a noise level removing unit that detects a sample point having a signal power greater than a predetermined threshold in the delay signal power distribution, and at least one of the above-described maximum value detection units is configured to detect at least one of the above-described path detection circuits. A sample point having the maximum power among the sample points is detected as a path.
[0022]
In addition, the path detection circuit according to the tenth invention includes guard means for deleting left and right n (n is a natural number) sample points adjacent to the path each time the maximum value detection means detects the path. It is.
[0023]
The path detection circuit according to an eleventh aspect of the present invention is the path detection circuit, wherein when the maximum value detecting means detects a path, the maximum signal power value of the path is set as a threshold value, and the threshold value is decreased stepwise by a predetermined power value. An effective area detecting means for detecting a sample point having a larger power;
The path is detected within a range of sample points detected by the maximum value detecting means.
[0024]
A path detection circuit according to a twelfth aspect of the invention includes path detection range control means for setting the signal power value of sample points constituting a peak of signal power to a minimum value.
[0025]
According to a thirteenth aspect of the present invention, there is provided a path detection circuit including path detection range control means for deleting sample points constituting a peak of signal power from the memory.
[0026]
A path detection circuit according to a fourteenth aspect of the present invention detects a path using a delay signal power distribution generated based on a received signal, and the time and signal at which the signal power in the delay signal power distribution becomes maximum The power, the time when the signal power in the delay signal power distribution becomes inflection, and the signal power are detected as the path.
[0027]
A path detection circuit according to a fifteenth aspect of the present invention is a path detection circuit for a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal.
Primary difference data generation means for generating, as primary difference data, differences in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time; ,
A maximum point detecting means for detecting a maximum point of signal power based on the adjacent primary difference data;
An inflection point detecting means for detecting an inflection point of signal power based on the primary difference data;
Path determining means for determining a path from the maximum point and the inflection point according to a predetermined rule.
[0028]
In addition, the path detection circuit according to the sixteenth aspect of the present invention sequentially checks the sign of the primary difference data output from the primary difference code generating means from the leftmost sample point to the rightmost sample point, and the sign of the primary difference data Is provided with a maximum point detecting means for determining a sample point as a maximum point.
[0029]
The path detection circuit according to the seventeenth invention sequentially checks the sign of the primary difference data data output from the primary difference code generation means from the leftmost sample point to the rightmost sample point, and A maximum point detecting means for determining a sample point when the code changes via 0 as a maximum point is provided.
[0030]
The path detection circuit according to the eighteenth aspect of the present invention sequentially checks the sign of the primary difference data output from the primary difference code generation means from the rightmost sample point to the leftmost sample point, and the sign of the primary difference data Is provided with a maximum point detecting means for determining a sample point as a maximum point.
[0031]
The path detection circuit according to the nineteenth aspect of the present invention sequentially checks the sign of the primary difference data output from the primary difference code generation means from the rightmost sample point to the leftmost sample point, and codes the primary difference data. Is provided with a maximum point detecting means for determining a sample point when the value changes via 0 as a maximum point.
[0032]
In the path detection circuit according to the twentieth aspect, the three consecutive primary difference data are all positive, and the central primary difference data is based on the other two primary difference data and a predetermined threshold value. If it is smaller, an inflection point detecting means for judging any one of the three sample points related to the primary difference data as an inflection point is provided.
[0033]
In the path detection circuit according to the twenty-first invention, the three consecutive primary difference data are all negative, and the central primary difference data is based on the other two primary difference data and a predetermined threshold value. If so, an inflection point detecting means for judging any one of the three sample points related to the primary difference data as an inflection point is provided.
[0034]
A path detection circuit according to a twenty-second aspect of the present invention includes path determination means for detecting a predetermined number of paths from the maximum of the maximum points and the inflection points with the highest signal power.
[0035]
According to a twenty-third aspect of the present invention, a path detection circuit according to a twenty-third aspect of the present invention is arranged such that a path determination unit rearranges a local maximum point and an inflection point according to the magnitude of signal power, And a path output means for outputting as follows.
[0036]
A path detection circuit according to a twenty-fourth aspect of the present invention compares a predetermined threshold value with the signal power at the maximum point and the signal power at the inflection point, and has the signal power when the signal power is greater than the threshold value. Path determination means for detecting sample points as paths is provided.
[0037]
A path detection circuit according to a twenty-fifth aspect of the invention comprises a noise level removing means for detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution, and a local maximum point detection means or an inflection point detection. By the means, a maximum point or an inflection point is detected as a path from at least one of the sample points.
[0038]
A path detection circuit according to a twenty-sixth aspect of the invention includes path determination means that uses at least n (n is a natural number) samples as an interval between paths to be detected.
[0039]
A path detection method according to a twenty-seventh aspect of the present invention is a path detection method for a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal.
Detecting the time when the signal power in the delayed signal power distribution becomes maximum and the maximum value of the signal power as the path,
Every time the path is detected, the number of paths is counted up,
In the delayed signal power distribution, the peak of signal power having the path as a vertex is deleted.
[0040]
A path detection method according to a twenty-eighth aspect of the present invention is a path detection method for a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal.
A maximum value detecting step of detecting the time and signal power of the sample point at which the signal power is maximum among the plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time;
A path number counting step for counting up a path number count value each time the path is detected by the maximum value detecting step;
A path detection range control step of deleting a peak of signal power having the path as a vertex in the delayed signal power distribution every time the path is detected by the maximum value detection step;
And detecting the path, deleting the peak of the signal power, and counting up the number of paths until the path count value reaches a predetermined value.
[0041]
A path detection method according to the twenty-ninth invention is
In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A difference code for examining the difference in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time and generating the difference code as a difference code Generation step;
A maximum point detection step of detecting adjacent sample points having different difference codes as a maximum point indicating the path candidate;
A maximum value detecting step of detecting, as the path, a sample point having a maximum power among the at least one local maximum point;
A path number counting step for counting up a path number count value each time the path is detected by the maximum value detecting step;
A path detection range control step of deleting the path in the delayed signal power distribution every time the path is detected by the maximum value detection step;
The path detection, the path number count-up, and the path deletion are repeated until the path count value exceeds a predetermined value.
[0042]
A path detection method according to the thirtieth invention is
A difference code output from the difference code generation step is sequentially examined from the leftmost sample point to the rightmost sample point, and a maximum point detection step is performed in which the sample point when the difference code changes is determined as the maximum point.
[0043]
A path detection method according to the thirty-first invention is
A differential code output from the differential code generation step is sequentially examined from the leftmost sample point to the rightmost sample point, and a local maximum detection step is performed in which the sample point when the differential code changes via 0 is determined as the local maximum point. Is included.
[0044]
A path detection method according to the thirty-second invention is
A differential code output from the differential code generation step is sequentially examined from the rightmost sample point to the leftmost sample point, and includes a maximum point detection step for determining the sample point when the differential code is changed as a maximum point.
[0045]
A path detection method according to the thirty-third invention is
A maximum point detection step of sequentially checking the difference code output from the difference code generation step from the rightmost sample point to the leftmost sample point and determining the sample point when the difference code changes via 0 as a maximum point Is included.
[0046]
In a path detection method according to a thirty-fourth aspect, the maximum value detecting step includes a noise level comparing step of comparing the detected signal power with a predetermined threshold value and outputting the comparison result as a comparison result signal, wherein the maximum value The detecting step detects a sample point having the signal power as a path when the signal power is larger than the threshold value based on the comparison result signal.
[0047]
A path detection method according to a thirty-fifth aspect of the present invention includes a noise level removing step of detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution, wherein at least one of the maximum value detection steps A sample point having the maximum power among the sample points is detected as a path.
[0048]
The path detection method according to the thirty-sixth aspect of the invention includes a guard step for deleting left and right n (n is a natural number) sample points adjacent to the path each time the maximum value detection step detects the path.
[0049]
Further, in the path detection method according to the thirty-seventh aspect of the present invention, when the maximum value detection step detects a path, the maximum signal power value of the path is set as a threshold value, and the threshold value is decreased stepwise by a predetermined power value. Including an effective area detection step of detecting a sample point having a greater power;
In the maximum value detecting step, the path is detected within a range of detected sample points.
[0050]
According to a thirty-eighth aspect of the present invention, in the path detection range control step, the signal power value at the sample points constituting the peak of signal power is set to the minimum value.
[0051]
According to a thirty-ninth aspect of the present invention, in the path detection range control step, sample points constituting a peak of signal power are deleted from the memory.
[0052]
A path detection method according to a 40th aspect of the present invention is a path detection method for a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal.
The time and signal power at which the signal power in the delay signal power distribution becomes maximum, and the time and signal power at which the signal power in the delay signal power distribution becomes inflection are detected as the path.
[0053]
A path detection method according to a forty-first aspect of the invention is a path detection method for a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal.
A primary difference data generation step of generating, as primary difference data, differences in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time; ,
A maximum point detecting step of detecting a maximum point of signal power based on the adjacent primary difference data;
An inflection point detecting step of detecting an inflection point of signal power based on the primary difference data;
A path determining step of determining a path from the maximum point and the inflection point according to a predetermined rule.
[0054]
In the path detection method according to the forty-second aspect of the present invention, in the maximum point detection step, the sign of the primary difference data output from the primary difference data generation step is sequentially examined from the leftmost sample point to the rightmost sample point, The sample point when the sign of the primary difference data changes is determined as the maximum point.
[0055]
In the path detection method according to the forty-third aspect of the present invention, in the maximum point detection step, the sign of the primary difference data output from the primary difference data generation step is sequentially examined from the leftmost sample point to the rightmost sample point, The sample point when the sign of the primary difference data changes via 0 is determined as the local maximum point.
[0056]
In the path detection method according to the 44th aspect of the present invention, in the local maximum point detection step, the sign of the primary difference data output from the primary difference data generation step is sequentially examined from the rightmost sample point to the leftmost sample point, The sample point when the sign of the primary difference data changes is determined as the maximum point.
[0057]
In the path detection method according to the forty-fifth aspect of the present invention, in the maximum point detection step, the sign of the primary difference data output from the primary difference data generation step is sequentially examined from the rightmost sample point to the leftmost sample point, The sample point when the sign of the primary difference data changes via 0 is determined as the local maximum point.
[0058]
The path detection method according to the forty-sixth aspect of the present invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, out of three consecutive primary difference data, the absolute value of the central primary difference data is smaller than a predetermined threshold, and the signs of the three primary difference data are all the same, If the absolute value of the central primary difference data is smaller than the absolute values of the other two primary difference data, one of the sample points related to the three primary difference data is defined as an inflection point. Judgment is made.
[0059]
The path detection method according to the 47th aspect of the invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, of the three consecutive primary difference data, the central primary difference data is 0 or more and smaller than a predetermined threshold, and the primary differential data at both ends are the primary primary difference data. If it is larger, any one of the sample points related to the three primary difference data is determined as an inflection point.
[0060]
A path detection method according to the 48th aspect of the invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, of the three consecutive primary difference data, the central primary difference data is 0 or less and larger than a predetermined threshold, and the primary differential data at both ends are the primary primary difference data. If it is smaller than this, any one of the sample points related to the three primary difference data is determined as the inflection point.
[0061]
A path detection method according to a 49th aspect of the invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, the three consecutive primary difference data are all 0 or more, the central primary difference data is smaller than a predetermined threshold value, and the primary differential data at both ends are the central primary difference data. If it is larger than the data, one of the sample points related to the three primary difference data is determined as the inflection point.
[0062]
A path detection method according to a fifty aspect of the present invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, the three consecutive primary difference data are all 0 or less, the central primary difference data is larger than a predetermined threshold value, and the primary differential data at both ends are the central primary difference data. If it is smaller than the data, one of the sample points related to the three primary difference data is determined as the inflection point.
[0063]
In addition, the path detection method according to the fifty-first invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step,
In the inflection point detection step, a difference code of the primary difference data of the adjacent sample points is generated as a secondary difference code, the two adjacent secondary difference codes are different, and the two secondary difference codes are Of the three related primary difference data, if the central primary difference data is 0 or more and smaller than a predetermined threshold, one of the sample points related to the three primary difference data is defined as an inflection point. Judgment is made.
[0064]
A path detection method according to a 52nd aspect of the present invention generates a difference in signal power between adjacent sample points as primary difference data in the primary difference data generation step.
In the inflection point detection step, a difference code of the primary difference data of adjacent sample points is generated as a secondary difference code, and the two adjacent secondary difference codes are different, and the two secondary difference codes are generated. Of the three primary difference data related to, if the central primary difference data is less than or equal to 0 and greater than a predetermined threshold, one of the sample points related to the three primary difference data is the inflection point. Is determined.
[0065]
In the path detection method according to the 53rd aspect of the present invention, in the path determination step, a predetermined number of paths are detected from those having the largest signal power among the maximum points and inflection points.
[0066]
In a path detection method according to a fifty-fourth aspect of the present invention, the path determination step includes a rearrangement step of rearranging the maximum point and the inflection point according to the magnitude of the signal power, and a predetermined number of paths from the higher signal power. And a path output step for outputting as follows.
[0067]
The path detection method according to a 55th aspect of the present invention is the path detection step, wherein the predetermined threshold value is compared with the signal power at the local maximum point and the signal power at the inflection point in the path determination step, A sample point having the signal power is detected as a path.
[0068]
A path detection method according to a fifty-sixth aspect of the invention includes a noise level removing step of detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution, and a maximum point detection step or an inflection point detection. In the step, a maximum point or an inflection point is detected as a path from at least one of the sample points.
[0069]
In the path detection method according to the 57th aspect of the present invention, in the path determination step, the detected path interval is at least n (n is a natural number) samples.
[0070]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1.
FIG. 1 is a block diagram including a path detection circuit according to the present invention. In the figure, 11 is a delay profile generation circuit that generates a delay profile from a received signal, and 12 is a path detection circuit that detects an effective path (hereinafter referred to as a path) from the delay profile.
FIG. 2 is a block diagram showing the first embodiment of the path detection circuit 12 according to the present invention. In FIG. 2, 121 is a memory for storing a delay profile, 122 is a maximum value for detecting the maximum value of signal power in the delay profile read from the memory 121 and outputting the maximum value and the sampling time of the maximum value as a path. The detection means, 123 is a path number counting means for counting the number of paths output from the maximum value detection means 122, and 124 is a peak of signal power having the maximum value of the signal power output from the maximum value detection means 122 as a vertex. This is path detection range control means for deleting all sample points to be detected from the detection range.
[0071]
Next, the operation of the first embodiment will be described with reference to FIGS.
The delay profile generation circuit 11 receives the received signal, generates a signal power of the received signal by correlating the received signal and the spread code, and this signal power is stored in the memory 121 of the path detection circuit 12 for each sampling point. A delay profile is generated and stored by storing.
The path detection circuit 12 reads the delay profile generated by the delay profile generation circuit 11 from the memory 121, detects a sample point where the signal power is maximum (hereinafter referred to as a maximum point) as a path, The signal power is taken out by the number of fingers in descending order of the signal power and output to the fingers. The sampling time and signal power of the path output from the path detection circuit 12 are sequentially assigned to each finger (not shown) that is outside the scope of the present invention, thereby enabling RAKE combining.
[0072]
Next, an outline of the operation of the path detection circuit 12 will be described.
The maximum value detecting means 122 reads the signal power of all the sample points of the delay profile from the memory 121, compares the signal power of all the sample points with each other, detects the maximum sample point as a path, and detects the sampling time and signal of the path. Output power to the finger. Further, the maximum value detection means 122 outputs a signal for notifying that a path has been detected as a path detection signal. Each finger can perform RAKE combining by assigning the sampling time and signal power of the path. Further, the path number counting means 123 initializes the value of a path number counter (not shown) held therein in advance to 0, and each time the maximum value detecting means 122 detects a path (specifically, Every time a path detection signal is input from the maximum value detecting means 122, the path number counter is incremented by one. The path number counting means 123 outputs a path detection end signal to notify that the number of paths detected by the other means has been detected. Further, the path detection range control means 124, every time the maximum value detection means 122 detects a path, all sample points constituting one peak of signal power having the maximum value detected by the maximum value detection means 122 as a vertex. Are deleted from the detection range, all the power values of the sample points constituting the mountain including the skirt centered on the path in the memory 121 are set to zero. Until the above-mentioned number-of-pass counter value reaches a number (for example, the number of fingers) set by other means (specifically, until a path detection end signal is output from the number-of-pass counting means 123) Repeat the operation.
[0073]
FIG. 3 is a flowchart showing the operation of the path detection circuit 12 in the first embodiment.
Next, the operation of the path detection circuit 12 will be described with reference to FIG.
(1) First, the pass number count value is set to 0 (step S301).
(2) Next, in the delay profile, a sample point having the maximum value of signal power is detected as a path, and the sampling time and signal power of the path are output to the outside (step S302). The sample time and signal power of the output path are sent to the finger.
(3) Next, one pass count value is added (step S303).
(4) Next, it is checked whether or not the pass number count value has reached the number of fingers (step S304). When the pass count value reaches the number of fingers, the process is terminated. If the pass count value is less than the number of fingers, the process jumps to step S305.
(5) Next, in order to search for other paths after deleting all the sample points constituting one peak (including the skirt) of the signal power having this path as the apex (step S305). The process returns to step S302.
[0074]
FIG. 4 is a flowchart showing the detailed operation of mountain deletion by the path detection range control means 124.
Next, the operation of the path detection range control means 124 will be described with reference to FIG.
(1) When the maximum value detecting unit 122 detects a path (a sample point having the maximum value) (specifically, when a path detection signal is input from the maximum value detecting unit 122), the path detection range control unit 124 The sample time of the sample point on the left side of the path (path sample time -1) is set as the first sample point. In addition, the sample time of the sample point adjacent to the left of the first sample point (pass sample time -2) is set as the second sample point (step S401).
(2) Next, the power at the first sample point is compared with the power at the second sample point (step S402). As a result of comparison, if the latter is larger than the former, the former is deleted from the detection range (specifically, the former power value is set to 0) (step S405), and the process jumps to step S406.
As a result of the comparison in step S402, if the latter is not larger than the former, the former is deleted from the detection range (specifically, the former power value is set to 0) (step S403), and then the process jumps to step S404. .
(3) In step S404, the sample time of the second sample point adjacent to the left of the first sample point is set as a new first sample point, and the sample time (first After setting the sample time -1) of the second sample point to a new second sample point, the process returns to step S402 to delete the next sample point.
(4) In step S406, the sample time of the sample point on the right side of the path (path sample time + 1) is set as the third sample point.
Also, the sample time of the sample point right next to the third sample point (pass sample time +2) is set as the fourth sample point.
(5) Next, the power at the third sample point is compared with the power at the fourth sample point (step S407). As a result of comparison, if the latter is larger than the former, the former is deleted from the detection range (specifically, the power value of the former is set to 0) (step S410), and the process jumps to step S411. As a result of the comparison in step S407, if the latter is not larger than the former, the former is deleted from the detection range (specifically, the former power value is set to 0) (step S408), and then the process jumps to step S409. .
In step S409, the sample time of the fourth sample point that is right next to the third sample point is set as a new third sample point, and the sample time that is right next to the fourth sample point (fourth sample point). After setting the point sample time + 1) to the new fourth sample point, the process returns to step S407 to delete the next sample point.
In step S411, the path detected by the maximum value detection unit 122 is deleted from the detection range (the power value of the path is set to 0), and then the process ends.
[0075]
In this way, every time the power value of the sample point on the left side of the path decreases in the left direction, the sample point is deleted from the detection range. Next, every time the power value of the sample point on the right side of the path decreases, the sample point is deleted from the detection range. Finally, the path is deleted from the detection range. With the above operation, all sample points constituting one mountain are removed from the detection range. This is shown in FIG. In FIG. 5, (1) indicates the first sample point, (2) indicates the second sample point, (3) indicates the third sample point, and (4) indicates the fourth sample point.
[0076]
As described above, according to the first embodiment, the maximum point is detected as a path in order from the maximum point with the largest signal power in the delay profile, so that the accuracy of path detection can be improved.
[0077]
Further, when paths are allocated to all fingers, even if there are peaks in the delay profile, the path detection process is stopped, so that it is possible to perform allocation without waste corresponding to the number of fingers.
[0078]
Embodiment 2.
6 is a block diagram showing Embodiment 2 of the path detection circuit according to the present invention.
In the figure, 611 is a first memory storing a delay profile, 612 is a differential code generating means for generating a difference code of signal power at adjacent sample points, and 613 is a code output from the differential code generating means 612. Maximal point detecting means for detecting a sampling point having a maximum value of signal power from 614, a second memory for storing the sampling time of the maximal point, 615, maximum value detecting means for detecting the maximum value of the signal power in the delay profile , 616 is a path number counting means, and 617 is a maximum value deleting means (path detection range control means).
[0079]
Next, the operation of the path detection circuit 12 in the second embodiment will be described.
(1) The delay profile is stored in advance in the first memory 611 by the delay profile generator 11. The differential code generation means 612 reads the signal power of all the sample points from the first memory 611, and sequentially executes the following processing for each sample point in the direction in which the time advances from the start time to the end time of the delay profile. To go.
First, the other signal power is subtracted from the signal power with the smaller sample point number between two adjacent sample points, and a sign indicating positive or negative or 0 as a calculation result is output as a difference code.
The local maximum point detection means 613 detects this sample point as a local maximum point (pass candidate) every time the difference sign changes from negative to positive, and stores the sample time of the detected local maximum point in the second memory 614. Go.
(2) The maximum value detecting means 615 reads the sampling times of all the maximum points from the second memory 614, reads the signal power corresponding to these maximum points from the first memory 611, and obtains a plurality of maximum values obtained. Among the points, a sample point having the maximum signal power is detected as a path, and the sampling time and signal power of this path are output to the finger.
(3) Further, the path number counting means 616 is configured so that each time the maximum value detecting means 615 detects a path (specifically, every time a path detection signal is input from the maximum value detecting means 615), an internal path number counter ( 1) (not shown).
(4) Then, every time the maximum value detecting means 615 detects a path, the maximum value deleting means 617 sets the sample time of the detected path in the second memory 614 in order to delete the detected path from the detection range. delete.
The operations (3) to (4) are repeatedly executed until the value of the pass number counter reaches the number of fingers (specifically, until a pass detection end signal is output from the pass number counting means 123).
[0080]
FIG. 7 is a flowchart showing the operation of the path detection circuit 12 according to the second embodiment. Next, the operation of the path detection circuit 12 will be described with reference to FIG.
(1) First, the pass number count value is set to 0 (step S701).
(2) Next, the difference in signal power between adjacent sample points is taken for each sample point sequentially over all sample points from the beginning time of the delay profile to the end time, and the sign of this difference data Is output to the memory as a differential code (step S702).
(3) Next, all the difference codes are read from the memory, whether or not the difference codes change from negative to positive is checked, and a sample point having this change is determined as a local maximum point (pass candidate) (step S703). ).
(4) A sample point having the maximum power among the obtained maximum points is detected as a path, and the path sampling time and signal power are output to the outside (step S704). The sample time and signal power of the output path are sent to the finger.
(5) Add one pass count value (step S705).
(6) It is checked whether or not the pass number count value has reached the number of fingers (step S706). When the pass count value reaches the number of fingers, the process is terminated. If the pass count value is less than the number of fingers, the process jumps to step S707.
(7) In step S707, after deleting the path detected in step S704 from the detection range, the process returns to step S704 to search for another path.
[0081]
FIG. 8 is a flowchart showing a detailed operation of maximum point detection in steps S701 to S703 in FIG. Next, the operation of maximum point detection by the path detection circuit 12 will be described with reference to FIG.
The sample point at the sample time 0 (first time on the time axis) is set as the first sample point. Also, a sample point at sample time 1 (next time after the start time on the time axis) is set as a second sample point. Further, the difference sign of the sample point at the start time is set to be negative (step S801).
The signal power of the first sample point and the signal power of the second sample point are read from the memory, the signal power of the second sample point is subtracted from the signal power of the first sample point, and the sign of the calculation result is a differential code (Step S802).
It is determined whether or not the difference code in step S802 is positive (step S803). If the difference code is not positive, it is determined that it is passing through a flat part (hereinafter referred to as flat) or is in the middle of climbing a mountain, and the process jumps to step S806. In step S803, if the difference code is positive, it is determined that the mountain is descending, and the process jumps to step S804.
In step S804, the difference code of the previous time is checked. If the difference code one time ago is positive, the difference code remains positive to positive, and there is no change in the difference code. Therefore, it is determined that the difference code is going down, and the process jumps to step S806. In step S804, if the difference sign of the previous time is negative, it means that the change is from negative to positive, so that it is determined to be maximal and the process jumps to step S805. In step S804, if the difference code of 1 hour before is 0, it is determined that the change is from 0 to positive, and is going down the mountain via a flat surface, and further 1 hour before (2 hours before). Therefore, the process returns to step S804. In step S804, if the previous time is the start time, the difference sign of the start time is set in advance negative in step S801, and the process jumps to step S805.
In step S804, the difference code of 1 hour before (2 hours before) is further examined. If the difference code two hours ago is positive, the difference sign is positive and positive through 0, and there is no change in the differential code. Therefore, it is determined that the difference code is halfway down the flat via step S806. Fly to. In step S804, if the difference sign of the previous two hours is negative, it is determined that the change is from negative to positive via 0, so that the maximum is reached, and the process jumps to step S805. In step S804, if the difference code of 2 hours before is 0, it is determined that the code has transitioned to 0, 0, and positive, and is in the middle of going down a mountain via flatness, and further 1 time Since it is necessary to check the previous (three hours before) difference code, the process returns to step S804. In step S804, if two hours before is the head time, the difference code of the head time is set in advance negative in step S801, and the process jumps to step S805.
In step S804, the difference code of one hour before (three hours before) is further examined. If the difference code three times before is positive, the sign remains positive through 0 from positive, and there is no change in the differential code. Fly to S806. In step S804, if the difference sign three times before is negative, it is determined to be maximal because it is a change from negative to positive via 0, and the process jumps to step S805. In step S804, if the difference code 3 times before is 0, it is determined that the code has transitioned to 0, 0, 0, positive, and is in the middle of going down a mountain via flatness, Since it is necessary to examine the differential code one hour before (four hours before), the process returns to step S804. In step S804, if 3 hours before is the start time, the difference sign of the start time is set in advance negative in step S801, and the process jumps to step S805.
Thereafter, the same operation is repeated until the above continuation condition is resolved.
In step S805, the first sample point is determined as a local maximum point (pass candidate), the sample time of the first sample point is stored, and then the process jumps to step S806 to check the next local maximum point.
In step S806, after adding the sample time 1 to the sample time of the first sample point and the second sample point, the process jumps to step S807.
In step S807, it is checked whether or not the second sample point has exceeded the final time of the detection range. If the second sample point exceeds the final time of the detection range, the process ends. If the final time has not been exceeded, the process returns to step S802 to check for the presence of another local maximum point.
[0082]
As described above, according to the second embodiment, the sample point when the difference sign changes from negative to positive or from negative to positive via 0 is determined as the local maximum point. The number of fingers may be extracted in order from the sample point having the largest signal power among the plurality of maximum points.
In the first embodiment, it is necessary to search almost all sample points as many times as the number of fingers for path detection. However, according to the second embodiment, all sample points are searched only once and the maximum is detected. After detecting the points, it is only necessary to search the maximum number of points less than the total number of sample points every time, so if the number of all sample points in the delay profile is large or the number of fingers is large, Compared to Embodiment 1, the amount of path detection processing can be reduced.
[0083]
In the above example, a difference code is generated by subtracting the signal power of the right adjacent sample point from the signal power of an arbitrary sample point, and this difference code is used as the sample point at the left end (time 0) on the time axis. From the sample point to the right end (final time) sample point, and when the difference sign changes from negative to positive, or changes from negative to positive via 0, the maximum is shown.
Sequentially check from the right end (last time) sample point on the time axis to the left end (time 0) sample point, and if the difference sign changes from positive to negative, or changes from positive to negative via 0, it is determined to be maximal It may be. In this case, the same effect as described above can be obtained.
Also, a difference code is generated by subtracting the signal power of the left adjacent sample point from the signal power of an arbitrary sample point, and this difference code is converted from the sample point at the left end (time 0) on the time axis to the right end (final time). The sample points may be sequentially examined, and when the difference sign changes from positive to negative, it may be determined that the maximum is obtained. In this case, the same effect as described above can be obtained.
Also, a difference code is generated by subtracting the signal power of the left adjacent sample point from the signal power of an arbitrary sample point, and this difference code is converted from the right end (last time) sample point on the time axis to the left end (time 0). The sample points may be sequentially examined, and if the difference sign changes from negative to positive or changes from negative to positive via 0, it may be determined that the maximum is obtained. In this case, the same effect as described above can be obtained.
[0084]
In the above example, every time the maximum value detecting unit 615 detects a path, the maximum value deleting unit 617 sets the sample time of the detected path in the second memory in order to delete the detected path from the detection range. Although the configuration for deletion is shown, the maximum value deletion unit 617 may be configured to set the signal power of the detected path in the first memory 611 to the minimum value as shown in FIG.
[0085]
Embodiment 3.
In the above embodiment, since the path detection circuit 12 uses all local maximum points in the delay profile as path candidates, there is a possibility that local maximum points generated by noise may be erroneously determined as paths. Therefore, in the third embodiment, the path detection circuit 12 enables the maximum point due to noise to be deleted from the detection range.
[0086]
In the third embodiment, only the differences from the first embodiment will be described.
FIG. 10 is a block diagram showing a third embodiment of the path detection circuit according to the present invention. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. 122a is a maximum value detecting means, and 1001 is a noise level comparing means.
[0087]
Next, the operation will be described.
A power level due to noise is measured in advance, and a value obtained by adding a margin to the average of the noise level is set as a noise level threshold in a memory (not shown) held in the noise level comparison unit 1001.
The noise level comparing unit 1001 sets the signal power of the detected path in advance every time the maximum value detecting unit 122a detects a path (specifically, every time a path detection signal is input from the maximum value detecting unit 122a). The compared threshold values are compared, and the comparison result is output as a comparison result signal. Based on the comparison result signal, the maximum value detection unit 122a determines that the path is a path only when the signal power is greater than a threshold value, and outputs the result.
[0088]
As described above, since the maximum point of the noise level is not erroneously determined as a path, the accuracy of RAKE synthesis is improved.
[0089]
In the third embodiment, the noise level comparison means is added to the configuration of the first embodiment, but the same applies to the second embodiment.
[0090]
Embodiment 4.
The fourth embodiment shows an embodiment different from the third embodiment in which the path detection circuit 12 deletes the maximum point of the noise level from the detection range.
[0091]
FIG. 11 is a block diagram showing Embodiment 4 of the path detection circuit according to the present invention. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. Reference numeral 1101 denotes noise level removing means.
[0092]
Next, the operation will be described.
A power level due to noise is measured in advance, and a value obtained by adding a margin to the average of the noise level is set as a noise level threshold in a memory (not shown) held in the noise level removing unit 1101.
Then, the noise level removing unit 1101 reads the delay profile from the memory 121, detects all the sample points having signal power larger than the noise level threshold value, and outputs the detection result to the maximum value detecting unit 122. The maximum value detecting means 122 determines that a sample point having the maximum power from at least one of the sample points is a path and outputs the path.
[0093]
As described above, since the maximum point of the noise level is not erroneously determined as a path, the accuracy of RAKE synthesis is improved. In addition, since the path is detected after the number of sample points is reduced, the number of processes is smaller than in the third embodiment.
[0094]
In the fourth embodiment, the noise level removing means is added to the configuration of the first embodiment, but the present invention can be similarly applied to the second embodiment.
[0095]
Embodiment 5.
In the first embodiment, the sample point having the maximum power is determined to be a path in the delay profile. However, if another peak is present at a time that is quite close to the path, it is highly likely that the sample point is caused by noise. Therefore, in this embodiment, even when there is a sample point that peaks at a power smaller than this maximum power at a time close to the sample point having the maximum power, the guard means is provided so as to delete this sample point from the detection range. Provide.
[0096]
FIG. 12 is a block diagram of a path detection circuit showing a fifth embodiment of the path detection circuit according to the present invention. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. 1201 is a guard means.
[0097]
Next, an outline of the operation of the path detection circuit 12 in the fifth embodiment will be described with reference to FIG.
Only parts different from the first embodiment will be described. The value of the number n of sample points to be deleted is previously determined by other means and set in the guard means 1201. Each time the maximum value detection unit 122 detects a path (specifically, every time a path detection signal is input from the maximum value detection unit 122), the guard unit 1201 detects n left and right sample points adjacent to the path. Delete from (delete from memory).
[0098]
FIG. 13 is a flowchart showing the operation of the path detection circuit 12 in the fifth embodiment.
Next, the operation of the path detection circuit 12 will be described with reference to FIG.
(1) First, the pass number count value is set to 0 (step S1301).
(2) In the delay profile, a sample point having the maximum value of signal power is detected as a path, and the sampling time and signal power of the path are output to the outside (step S1302). The sample time and signal power of the output path are sent to the finger.
(3) The left and right n sample points adjacent to the path are deleted from the detection range (deleted from the memory) (step S1303).
Note that the value of n is set by other means (not shown).
(4) Add one pass count value (step S1304).
(5) It is checked whether the pass count value has reached the number of fingers (step S1305). When the pass count value reaches the number of fingers, the process is terminated. If the pass count value is less than the number of fingers, the process jumps to step S1306.
(6) In step S1306, one mountain having this path as a vertex (however, this mountain is composed of the remaining sample points after part of the mountain is deleted in step S1303). After all sample points are deleted from the detection range, the process returns to step S1302 to search for another path.
[0099]
As described above, according to the fifth embodiment, since the guard is provided so as not to detect the peak due to the noise included in the mountain, the path detection accuracy is improved.
[0100]
In the fifth embodiment, the guard unit is added to the configuration of the first embodiment, but the present invention can be similarly applied to the second to fourth embodiments.
[0101]
Embodiment 6 FIG.
FIG. 14 is a block diagram showing Embodiment 6 of the path detection circuit according to the present invention.
In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
1401 is a descending amount output means for outputting a descending amount that is a unit of signal power that decreases the threshold value, and 1402 detects a sampling point of the signal power that exceeds the threshold value while gradually decreasing the threshold power value in units of the descending amount. Effective area detecting means.
[0102]
Next, an outline of the operation of the path detection circuit 12 will be described.
The descending amount is previously set in the descending amount output means 1401 by other means.
First, the maximum value detection means 122 reads the signal power of all sample points from the memory 121, detects the sample point having the maximum value as a path, and outputs the sample time and signal power of the path to the finger.
Further, the path number counting means 123 initializes the value of a path number counter (not shown) held therein in advance to 0, and each time the maximum value detecting means 122 detects a path (specifically, Every time a path detection signal is input from the maximum value detecting means 122, the path number counter is incremented by one.
The path detection range control unit 124 then deletes all the sample points that constitute one peak having the path as a vertex, and samples that constitute one peak including the skirt centered on the path in the memory 121. Set all point power values to zero.
Further, the effective area detection unit 1402 sets the maximum value first detected by the maximum value detection unit 122 as a threshold value, and then gradually lowers the threshold value in units of a descent amount from the descent amount output unit 1401. , Search for a sample point having a power larger than the threshold value. The maximum value detection means 122 detects the maximum value only within the range of the detected sample points as a result of the search, and outputs the sample time and signal power of the detected path to the finger. Thereafter, the number of passes is counted up and the mountains are deleted in the same manner. The above operation is repeated until the value of the path number counter reaches the number of fingers (specifically, until a path detection end signal is output from the path number counting means 123).
[0103]
FIG. 15 is a flowchart showing the operation of the path detection circuit 12 in the sixth embodiment.
Next, the operation of the path detection circuit 12 will be described with reference to FIG.
(1) First, the pass number count value is set to 0 (step S1501).
(2) In the delay profile, a sample point with the maximum signal power is detected as a path, and the sampling time and signal power of the path are output to the outside (step S1502). The sample time and signal power of the output path are sent to the finger.
(3) After the maximum value of the signal power is set as the threshold (step S1503), the process jumps to step S1504.
(4) In step S1504, one pass count value is added.
(5) Next, it is checked whether or not the pass number count value has reached the number of fingers (step S1505). When the pass count value reaches the number of fingers, the process is terminated. If the pass count value is less than the number of fingers, the process jumps to step S1506.
(6) Next, all the sample points constituting one peak (including the skirt) of the signal power having this path as the apex are deleted from the detection range (step S1506).
(7) In step S1507, it is checked whether there is a sample point having a signal power larger than the threshold value. If a sample point having a signal power greater than the threshold is detected, the process jumps to step S1509. If no sample point having a signal power larger than the threshold value is detected in step S1507, the process jumps to step S1508.
(8) In step S1508, after the threshold value is lowered by the descending amount, the process jumps again to step S1507 in order to check whether there is a sample point having a signal power larger than the threshold value.
(9) In step S1509, a sample point having the maximum signal power among the detected sample points is detected as a path, and after outputting the sampling time and signal power of the path to the outside, another path is detected. Therefore, the process jumps to step S1504. The sample time and signal power of the output path are sent to the finger.
[0104]
FIG. 16 shows how the threshold value and the maximum value are detected.
In the figure, (1) is a threshold value set when the maximum value of signal power is detected, (2) indicates a state where the threshold value is lowered step by step, and (3) is a step by step. Then, the next maximum value is found.
[0105]
As described above, according to this embodiment, only the sample points having a power value equal to or greater than the threshold need be examined, and the range for searching for the maximum value is limited. Therefore, the processing time is longer than searching for all the sample points. Can be reduced.
[0106]
In the sixth embodiment, the descending amount output means and the effective area detecting means are added to the configuration of the first embodiment, but the present invention can be similarly applied to the second to fifth embodiments.
[0107]
In all of the above embodiments, when the signal power peak is deleted, the signal power values of all the sample points constituting the peak are set to 0. Needless to say, it may be deleted from the memory. In this case, in addition to the above effect, the processing speed can be increased by the amount of sample points deleted.
Moreover, when deleting a peak, the setting value of signal power should just be a value deleted from a detection range, and is not restricted to 0.
[0108]
Embodiment 7.
In the seventh embodiment, a mode for detecting not only a path that appears as a local maximum point but also a path that appears as an inflection point in the middle of a signal power mountain will be described.
FIG. 17 is a block diagram showing Embodiment 7 of the path detection circuit according to the present invention. In the figure, 171 is a first memory storing a delay profile, 172 is a primary difference data generating means for generating differential data of signal power at adjacent sample points and outputting it as primary differential data, and 173 is 1 Maximum point detecting means for detecting a sample point having a maximum value of signal power from the sign of the primary difference data (hereinafter referred to as the primary difference code) output from the next difference data generating means 172, 174 is the sampling time of the maximum point 175 is an inflection point detecting means for detecting an inflection point of signal power as a path candidate from the primary difference data output from the primary difference data generating means 172, and 176 is an inflection point. A third memory for storing the sampling time of 187, a path determining means for determining a path from the maximum point and the inflection point, 178, a path deleting means (path detection range control means), 79 is the number of paths count means. For example, the number of fingers is set as the set number of paths in advance in the number-of-passes counting unit 179 by other means.
[0109]
Next, the operation of the path detection circuit 12 in the seventh embodiment will be described.
(1) The delay profile is stored in advance in the first memory 171 by the delay profile generator 11. The primary difference data generation means 172 reads the signal power of all sample points from the first memory 171 and sequentially performs the following processing for each sample point in the direction of time advance from the start time to the end time of the delay profile. Run it.
(1) First, the other signal power is subtracted from the signal power with the smaller sample point number between two adjacent sample points to generate difference data as a calculation result as primary difference data, and an internal memory (not shown) Output to.
(2) The local maximum point detecting means 173 reads the primary difference data from the internal memory, and the sign (primary difference sign) indicating positive, negative or 0 of the primary difference data changes from negative to positive or passes through 0. Then, each time the sample point changes from negative to positive, this sample point is detected as a maximum point (pass candidate), and the sample time of the detected maximum point is stored in the second memory 174.
(3) Further, the inflection point detection means 175 reads the primary difference data from the internal memory, detects the inflection point as a path candidate from the primary difference data, and sets the sample time of the detected inflection point. The data is stored in the third memory 176.
(2) The path determination unit 177 reads all the sample times of the maximum points from the second memory 174, and reads the signal power corresponding to these maximum points from the first memory 171. Further, the path determination unit 177 reads all the inflection point sample times as path candidates from the third memory 176 and reads the signal power corresponding to these inflection points from the first memory 171.
(3) Next, the path determination means 177 detects a sample point where the signal power is maximum among the obtained maximum points and inflection points as a path, and outputs the sampling time and signal power of this path to the finger. To do.
(4) The path number counting means 179 is an internal path number counter (not shown) every time the path determination means 177 detects a path (specifically, every time a path detection signal is input from the path determination means 177). Count up by one).
(5) Then, each time the path determination unit 177 detects a path, the path deletion unit 178 detects the detected path in the second memory 174 or the third memory 176 in order to delete the detected path from the detection range. Delete the sample time of the path.
(6) The above operations (3) to (5) are repeated until the value of the path number counter reaches the number of fingers (specifically, until the path detection end signal is output from the path number counting means 179). Execute.
[0110]
FIG. 18 is a flowchart showing the operation of the path detection circuit 12 in the seventh embodiment. Next, the operation of the path detection circuit 12 will be described with reference to FIG.
(1) First, the pass number count value is set to 0 (step S1801).
(2) Next, the signal power difference between adjacent sample points is sequentially taken for each sample point starting from the head time of the delay profile and over all sample points up to the final time. The next difference data is output (step S1802).
(3) Next, it is sequentially examined whether or not the sign of the primary difference data changes from negative to positive or from 0 to 0 through 0 until the final time from the beginning time of the delay profile, The sample point having this change is output as a maximal point (pass candidate) (step S1803).
(4) Next, an inflection point as a path candidate is detected and output based on the primary difference data from the start time to the end time of the delay profile (step S1804).
(5) Next, a sample point having the maximum power is detected as a path from the obtained maximum points and inflection points, and the sampling time and signal power of the path are output to the outside (step S1805). The sample time and signal power of the output path are sent to the finger.
(6) Next, one pass count value is added (step S1806).
(7) It is checked whether or not the pass count value has reached the number of fingers (step S1807). When the pass count value reaches the number of fingers, the process is terminated. If the pass count value is less than the number of fingers, the process jumps to step S1808.
(8) In step S1808, after deleting the path detected in step S1805 from the detection range, the process returns to step S1805 to search for another path.
[0111]
This makes it possible to detect a path that appears as an inflection point in the middle of the signal power mountain.
[0112]
In the seventh embodiment, in order to delete the detected path from the detection range, the path deleting unit 178 deletes the sample time of the detected path in the second memory 174 and the third memory 176. As shown in FIG. 19, the path deletion unit 178 may be configured to set the signal power of the detected path in the first memory 171 to the minimum value. Thereby, the same effect can be acquired.
[0113]
In addition, a noise level removing unit for detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution between the first memory 171 and the primary difference data generating unit 172 in FIGS. 17 and 19. The noise level removing means reads out the delay profile from the first memory 171 and detects all sample points having a signal power larger than the threshold value. The detection results are used as the primary difference data generating means 172 and the path determining means 177. You may comprise so that it may output to. As a result, the maximum point or inflection point of the noise level is not erroneously determined as a path, and the accuracy of RAKE synthesis is improved. Further, since the path is detected after reducing the number of sample points, the number of processes can be further reduced.
[0114]
Embodiment 8.
FIG. 20 is a block diagram showing an eighth embodiment of the path detection circuit according to the present invention.
In the figure, the same reference numerals as those in FIG. 17 denote the same or corresponding parts.
Reference numeral 200 denotes path determination means for determining a path from the local maximum point and the inflection point.
FIG. 21 is a configuration diagram showing an internal configuration of the path determination unit 200.
In FIG. 21, 2001 is a rearrangement unit that rearranges the local maximum points and the inflection points from the largest signal power to the smallest one, 2002 is a memory that stores the sample times of the rearranged sample points, and 2003 is the power from the memory. This is a path output means for outputting the signal power and the sampling time to the fingers in the descending order of the set number of paths.
[0115]
Next, the operation of the path detection circuit 12 in the eighth embodiment will be described with reference to FIGS.
(1) The delay profile is stored in advance in the first memory 171 by the delay profile generator 11. The primary difference data generation means 172 reads the signal power of all sample points from the first memory 171 and sequentially performs the following processing for each sample point in the direction of time advance from the start time to the end time of the delay profile. Run it.
(1) First, the other signal power is subtracted from the signal power with the smaller sample point number between two adjacent sample points to generate difference data as a calculation result as primary difference data, and an internal memory (not shown) Output to.
(2) The local maximum point detecting means 173 reads the primary difference data from the internal memory, and the sign (primary difference sign) indicating positive, negative or 0 of the primary difference data changes from negative to positive or passes through 0. Then, each time it changes from negative to positive, this sample point is detected as a maximum point (path candidate), and the sample time of the detected maximum point is output to the path determination means 200.
(3) The inflection point detecting means 175 reads the primary difference data from the internal memory, detects an inflection point that is a candidate for the path from the primary difference data, and samples the detected inflection point. Is output to the path determination means 200.
(2) In the path determination unit 200, the rearrangement unit 2001 reads the signal power corresponding to the local maximum point from the first memory 171 each time the local point sampling unit 173 outputs the local maximum sample time. The signal power and the signal powers of all path candidates read from the memory 2002 (0 is set in advance as an initial value) are rearranged in descending order of the signal power, and the rearranged result is stored in the memory 2002. Further, each time the inflection point detection unit 175 outputs the inflection point sampling time, the rearrangement unit 2001 reads the signal power corresponding to the inflection point from the first memory 171, and the signal power and the memory The signal powers of all the path candidates read from 2002 are rearranged in descending order of signal power, and the rearranged results are stored in the memory 2002.
(3) Next, the path output unit 2003 reads the sample time for the set number of paths from the memory 2002 having the larger signal power, reads the signal power at the sample time from the first memory 171, The signal power at this sample time is output as a path to the finger.
[0116]
As a result, in addition to the same effect as that of the seventh embodiment, the process of deleting the detected path from the detection range and searching for the next maximum value again becomes unnecessary. The speed can be increased.
[0117]
20 is provided between the first memory 171 and the primary difference data generation means 172 in FIG. 20, and a noise level removal means for detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution. The delay level is read from the first memory 171 by the noise level removing unit, and all sample points having a signal power larger than the threshold are detected, and the detection result is output to the primary difference data generating unit 172 and the path determining unit 200. You may comprise as follows. As a result, the maximum point or inflection point of the noise level is not erroneously determined as a path, and the accuracy of RAKE synthesis is improved. Further, since the path is detected after reducing the number of sample points, the number of processes can be further reduced.
[0118]
Embodiment 9 FIG.
FIG. 22 is a block diagram showing Embodiment 9 of the path detection circuit according to the present invention.
In the figure, the same reference numerals as those in FIG. 17 denote the same or corresponding parts.
Reference numeral 220 denotes path determination means for determining a path from the local maximum point and the inflection point.
FIG. 23 is a configuration diagram showing an internal configuration of the path determination unit 220.
23, the same reference numerals as those in FIG. 21 denote the same or corresponding parts. 2201 is a rearrangement unit that rearranges the local maximum points and the inflection points in order from the largest power to the smallest power.
[0119]
Next, the operation of the path detection circuit 12 in the ninth embodiment will be described with reference to FIGS.
(1) The delay profile is stored in advance in the first memory 171 by the delay profile generator 11. The primary difference data generation means 172 reads the signal power of all sample points from the first memory 171 and sequentially performs the following processing for each sample point in the direction of time advance from the start time to the end time of the delay profile. Run it.
(1) First, the other signal power is subtracted from the signal power with the smaller sample point number between two adjacent sample points to generate difference data as a calculation result as primary difference data, and an internal memory (not shown) Output to.
(2) The local maximum point detection means 173 reads the primary difference data from the internal memory, and whenever the sign of the primary difference data changes from negative to positive or changes from negative to positive via 0, this sample point Are detected as local maximum points (path candidates), and the sample times of the detected local maximum points are stored in the second memory 174.
(3) Further, the inflection point detection means 175 reads the primary difference data from the internal memory, detects the inflection point as a path candidate from the primary difference data, and sets the sample time of the detected inflection point. The data is stored in the third memory 176.
(2) In the path determination unit 220, the rearrangement unit 2201 reads all the sample times of the maximum points from the second memory 174, and reads the signal power corresponding to these maximum points from the first memory 171. Further, the rearranging means 2201 reads all the inflection point sample times as path candidates from the third memory 176, and reads the signal power corresponding to these inflection points from the first memory 171.
(3) Next, the rearrangement unit 2201 rearranges the obtained local maximum points and inflection points in descending order of signal power, and stores the sample time after the rearrangement in the memory 2002.
(4) Next, the path output unit 2003 sequentially reads the sample times corresponding to the set number of paths from the memory 2002 from the larger signal power to the smaller signal power, reads the signal power at the sample time from the first memory 171 The sampling time and the signal power at the sampling time are output to the finger as a path.
[0120]
FIG. 24 is a flowchart showing the operation of the path detection circuit 12 in the eighth and ninth embodiments. Next, the operation of the path detection circuit 12 will be described with reference to FIG. (1) First, the difference in signal power between adjacent sample points is taken for each sample point sequentially from the beginning time of the delay profile to all sample points up to the final time, and this difference data is first-ordered. It outputs as difference data (step S2401).
(2) Next, it is sequentially checked whether or not the sign of the primary difference data changes from negative to positive, or from 0 to 0 via negative, from the beginning of the delay profile to the final time, The sample point having this change is output as a maximal point (pass candidate) (step S2402).
(3) Next, an inflection point as a path candidate is detected and output based on the primary difference data (step S2403).
(4) Next, the obtained local maximum points and inflection points are sequentially rearranged from the one having the largest signal power to the one having the smaller signal power (step S2404).
(5) Next, a set number of paths are detected in order from the largest in signal power, and the sampling time and the signal power at the sampling time are output to the outside (step S2405). The sample time and signal power of the output path are sent to the finger.
[0121]
The above is the outline of the operation.
Next, the detailed operation of the inflection point detection process in step S1804 in FIG. 18 will be described.
The same applies to the inflection point detection process in step S2403 in FIG.
25 and 26 are flowcharts showing the detailed operation of the inflection point detection process in step S1804 in FIG. 18 or step S2403 in FIG.
Next, the operation of the inflection point detection process by the path detection circuit 12 will be described with reference to FIGS.
(1) Take the difference between the signal power at the sample point at sample time 0 (first time on the time axis) and the signal power at the sample point at sample time 1 (next time after the first time on the time axis) 1 primary difference data. Also, the difference between the signal power at the sample point at sample time 1 and the signal power at the sample point at sample time 2 is taken, and this is used as second primary difference data. Also, the difference between the signal power at the sample point at sample time 2 and the signal power at the sample point at sample time 3 is taken, and this is used as third primary difference data (step S2501).
(2) It is checked whether or not the first primary difference data is positive and equal to the second primary difference data (step S2502). If the first primary difference data is positive and equal to the second primary difference data, a predetermined value (a value larger than the second primary difference data) is added to the first primary difference data for post-processing. ) Is set (step S2503), and the process jumps to step S2504. Otherwise, the process jumps to step S2504.
(3) In step S2504, it is checked whether or not the first primary difference data is negative and equal to the second primary difference data. If the first primary difference data is negative and equal to the second primary difference data, a predetermined value (a value smaller than the second primary difference data) is added to the first primary difference data for post-processing. ) Is set (step S2505), and the process jumps to step S2506. Otherwise, the process jumps to step S2506.
(4) In step S2506, it is checked whether or not the absolute value of the second primary difference data is smaller than the threshold value. If the absolute value of the second primary difference data is smaller than the threshold value, the process jumps to step S2507. Otherwise, the process jumps to step S2513.
(5) In step S2507, it is checked whether or not the signs of the first to third primary difference data are all positive. If the signs of the first to third primary difference data are all positive, the process jumps to step S2508. Otherwise, the process jumps to step S2510.
(6) In step S2508, it is checked whether the absolute value of the first primary difference data and the absolute value of the third primary difference data are larger than the absolute value of the second primary difference data. If the absolute value of the first primary difference data and the absolute value of the third primary difference data are larger than the absolute value of the second primary difference data, the process jumps to step S2509. Otherwise, the process jumps to step S2513.
(7) In step S2509, the sample time of the second primary difference data is output as an inflection point as a path candidate, and then the process jumps to step S2513.
(8) On the other hand, in step S2510, it is checked whether the signs of the first to third primary difference data are all negative. If the signs of the first to third primary difference data are all negative, the process jumps to step S2511. Otherwise, the process jumps to step S2513.
(9) In step S2511, it is checked whether the absolute value of the first primary difference data and the absolute value of the third primary difference data are greater than the absolute value of the second primary difference data. If the absolute value of the first primary difference data and the absolute value of the third primary difference data are larger than the absolute value of the second primary difference data, the process jumps to step S2512. Otherwise, the process jumps to step S2513.
(10) In step S2512, the sample time of the first primary difference data is output as an inflection point to be a path candidate, and the process jumps to step S2513.
(11) In step S2513, it is checked whether the sample point of the third primary difference data is the final time. If it is the final time, the process ends. If it is not the final time, the process jumps to step S2514.
(12) In step S2514, the primary difference data after one time is set for each of the first to third primary difference data. That is, the second primary difference data is set as the first primary difference data, the third primary difference data is set as the second primary difference data, and one time of the third primary difference data is set. The subsequent primary difference data is set as the third primary difference data, and the process returns to step S2502.
[0122]
FIG. 27 shows how a path is detected by the above processing.
In FIG. 27A, (2) (sample time 2) and (6) (sample time 6) indicate paths, (2) is the maximum point of the delay profile, and (6) is the inflection point. .
In FIG. 27B, the primary difference data (<5>-<6>) at the sample time 6 is smaller than the threshold value, and the signs of the primary difference data at the sample times 5 to 7 are all the same (positive). Since the absolute value of the primary difference data at the sample times 5 and 7 is larger than the absolute value of the primary difference data at the sample time 6, the sample point at the sample time 6 is detected as a path. Although (4) is also an inflection point, the primary difference data ((3)-(4)) at the sample time 4 is larger than the threshold value and does not satisfy the path detection condition, so it is not detected as a path.
[0123]
In the eighth embodiment, it is necessary to perform the sorting every time the local maximum point and the inflection point are detected in the path detection process. However, in the ninth embodiment, only one sort is required. In addition to the same effect, the path detection process can be performed faster than in the eighth embodiment.
[0124]
In the above example, the primary difference data is generated by subtracting the signal power of the right adjacent sample point from the signal power of an arbitrary sample point, and among the three consecutive primary difference data, the central primary data is generated. The center when the absolute value of the difference data is smaller than the threshold, the signs of the three primary difference data are all negative, and the absolute values of the preceding and following primary difference data are larger than the central primary difference data The absolute value of the central primary difference data is smaller than the threshold value among the sample point one time before the primary difference data and the continuous primary difference data, and the three primary difference data The center sample point when the signs are all positive and the absolute value of the preceding and following primary difference data is larger than the center primary difference data is detected as an inflection point as a path candidate. Any sample By subtracting the signal power of the sample point on the left from the signal power of, the primary difference data is generated, and among the three consecutive primary difference data, the absolute value of the central primary difference data is smaller than the threshold value, In addition, the signs of the three primary difference data are all positive, and the absolute value of the preceding and following primary difference data is larger than the central primary difference data. Of the sample point and the three consecutive primary difference data, the absolute value of the central primary difference data is smaller than the threshold, the signs of the three primary difference data are all negative, and the preceding and following 1 The center sample point when the absolute value of the next difference data is larger than the center first difference data may be detected as an inflection point as a path candidate. In this case, the same effect as described above can be obtained.
[0125]
In this embodiment, the center sample point or the sample point one time before the center sample point among the three consecutive primary difference data according to the condition is detected as an inflection point as a path candidate. However, the present invention is not limited to this, and any one of the sample points related to the three primary difference data may be detected as an inflection point as a path candidate.
[0126]
Further, a noise level removing unit for detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution is provided between the first memory 171 and the primary difference data generating unit 172 in FIG. The delay level is read from the first memory 171 by the noise level removing unit to detect all sample points having a signal power larger than the threshold, and the detection result is output to the primary difference data generating unit 172 and the path determining unit 220. You may comprise as follows. As a result, the maximum point or inflection point of the noise level is not erroneously determined as a path, and the accuracy of RAKE synthesis is improved. Further, since the path is detected after reducing the number of sample points, the number of processes can be further reduced.
[0127]
Embodiment 10 FIG.
FIG. 28 shows another embodiment of the inflection point detection process, which replaces steps S2506 to S2514 in FIG.
In FIG.
(1) It is checked whether or not the second primary difference data is 0 or more and smaller than the threshold value (step S2801). If the second primary difference data is greater than or equal to 0 and smaller than the threshold, the process jumps to step S2802. Otherwise, the process jumps to step S2804.
(2) In step S2802, it is checked whether or not the first primary difference data and the third primary difference data are larger than the second primary difference data. If the first primary difference data and the third primary difference data are larger than the second primary difference data, the process jumps to step S2803. Otherwise, the process jumps to step S2807.
(3) In step S2803, the sample time of the second primary difference data is output as an inflection point as a path candidate, and then the process jumps to step S2807.
(4) On the other hand, in step S2804, it is checked whether or not the second primary difference data is equal to or smaller than 0 and larger than − (threshold). If the second primary difference data is less than or equal to 0 and greater than-(threshold), the process jumps to step S2805. Otherwise, the process jumps to step S2807.
(5) In step S2805, it is checked whether or not the first primary difference data and the third primary difference data are smaller than the second primary difference data. If the first primary difference data and the third primary difference data are smaller than the second primary difference data, the process jumps to step S2806. Otherwise, the process jumps to step S2807.
(6) In step S2806, the sample time of the first primary difference data is output as an inflection point as a path candidate, and the process jumps to S2807.
(7) In step S2807, it is checked whether the sample point of the third primary difference data is the final time. If it is the final time, the process ends. If it is not the final time, the process jumps to step S2808.
(8) In step S2808, primary difference data after one time is set for each of the first to third primary difference data. That is, the second primary difference data is set as the first primary difference data, the third primary difference data is set as the second primary difference data, and one time of the third primary difference data is set. The subsequent primary difference data is set as the third primary difference data, and the process returns to step S2502.
[0128]
Thereby, an effect similar to that of the ninth embodiment can be obtained.
[0129]
In the above example, the primary difference data is generated by subtracting the signal power of the right adjacent sample point from the signal power of an arbitrary sample point, and among the three consecutive primary difference data, the central primary data is generated. Sample point one hour before the center primary difference data when the difference data is 0 or less and greater than-(threshold) and the preceding and following primary difference data is smaller than the center primary difference data And among the three consecutive primary difference data, the central primary difference data is 0 or more, is smaller than the threshold value, and the preceding and following primary difference data is larger than the central primary difference data. The center sample point is detected as an inflection point as a path candidate, but primary difference data is generated by subtracting the signal power of the left adjacent sample point from the signal power of any sample point, Continuous Of the three primary difference data, the central primary difference data is 0 or more, is smaller than the threshold value, and the front and rear primary difference data is larger than the central primary difference data. The sample point one hour before the next difference data and the primary difference data at the center of the three consecutive primary difference data are 0 or less and greater than-(threshold) and the preceding and following primary You may make it detect the center sample point when difference data is smaller than the center primary difference data as an inflection point used as a path candidate.
[0130]
Thereby, an effect similar to that of the ninth embodiment can be obtained.
[0131]
In this embodiment, the center sample point or the sample point one time before the center sample point among the three consecutive primary difference data according to the condition is detected as an inflection point as a path candidate. However, the present invention is not limited to this, and any one of the sample points related to the three primary difference data may be detected as an inflection point as a path candidate.
[0132]
Embodiment 11 FIG.
FIG. 29 shows still another embodiment of the inflection point detection process, which replaces steps S2506 to S2514 in FIG.
In FIG.
(1) It is checked whether or not all three consecutive primary difference data, that is, the first to third primary difference data are 0 or more (step S2901). If the first to third primary difference data are all 0 or more, the process jumps to step S2902. Otherwise, the process jumps to step S2905.
(2) In step S2902, it is checked whether or not the second primary difference data is smaller than a threshold value. If the second primary difference data is smaller than the threshold value, the process jumps to step S2903. Otherwise, the process jumps to step S2909.
(3) In step S2903, it is checked whether or not the first primary difference data and the third primary difference data are larger than the second primary difference data. If the first primary difference data and the third primary difference data are larger than the second primary difference data, the process jumps to step S2904. Otherwise, the process jumps to step S2909.
(4) In step S2904, after outputting the sample time of the second primary difference data as an inflection point to be a path candidate, the process jumps to step S2909.
(5) On the other hand, in step S2905, it is checked whether or not the first to third primary difference data are all 0 or less. If the first to third primary difference data are all 0 or less, the process jumps to step S2906. Otherwise, the process jumps to step S2909.
(6) In step S2906, it is checked whether or not the second primary difference data is larger than − (threshold value). If the second primary difference data is greater than-(threshold value), the process jumps to step S2907. Otherwise, the process jumps to step S2909.
(7) In step S2907, it is checked whether or not the first primary difference data and the third primary difference data are smaller than the second primary difference data. If the first primary difference data and the third primary difference data are smaller than the second primary difference data, the process jumps to step S2908. Otherwise, the process jumps to step S2909.
(8) In step S2908, the sample time of the first primary difference data is output as an inflection point as a path candidate, and then the process jumps to step S2909.
(9) In step S2909, it is checked whether the sample point of the third primary difference data is the final time. If it is the final time, the process ends. If it is not the final time, the process jumps to step S2910.
(10) In step S2910, primary difference data after one time is set for each of the first to third primary difference data. That is, the second primary difference data is set as the first primary difference data, the third primary difference data is set as the second primary difference data, and one time of the third primary difference data is set. The subsequent primary difference data is set as the third primary difference data, and the process returns to step S2502.
[0133]
Thereby, an effect similar to that of the ninth embodiment can be obtained.
[0134]
In the above example, primary difference data is generated for each sample point by subtracting the signal power of the right adjacent sample point from the signal power of an arbitrary sample point, and all three consecutive primary difference data are 0. Of the three consecutive primary difference data, the central primary difference data is greater than − (threshold), and the preceding and following primary difference data is smaller than the central primary difference data. The sampling point one time before the central primary difference data and all the three consecutive primary difference data are 0 or more, and the central primary difference data among the three consecutive primary difference data is The sample point of the central primary difference data when the primary differential data before and after the primary difference data is smaller than the threshold and larger than the central primary difference data is detected as an inflection point as a path candidate. any The primary difference data is generated by subtracting the signal power of the sample point on the left from the signal power of the sample point, and the three consecutive primary difference data are all 0 or more and the three consecutive primary difference data A sample point one time before the central primary difference data when the central primary difference data is smaller than the threshold value and the preceding and following primary differential data is larger than the central primary difference data; All three consecutive primary difference data are 0 or less, and among the three consecutive primary difference data, the central primary difference data is larger than − (threshold), and the preceding and following primary difference data are You may make it detect the sample point of the center primary difference data when it is smaller than the center primary difference data as an inflection point which becomes a path candidate.
[0135]
Thereby, an effect similar to that of the ninth embodiment can be obtained.
[0136]
In this embodiment, the center sample point or the sample point one time before the center sample point among the three consecutive primary difference data according to the condition is detected as an inflection point as a path candidate. However, the present invention is not limited to this, and any one of the sample points related to the three primary difference data may be detected as an inflection point as a path candidate.
[0137]
Embodiment 12 FIG.
FIG. 30 shows still another embodiment of the inflection point detection process, which replaces steps S2506 to S2514 in FIG.
In FIG.
(1) The second primary difference data is subtracted from the first primary difference data, and the code of the obtained difference data is output as the first secondary difference code. Further, the third primary difference data is subtracted from the second primary difference data, and the code of the obtained difference data is output as the second secondary difference code (step S3001).
(2) Next, it is checked whether or not the first secondary difference sign is positive and the second secondary difference sign is negative (step S3002). If the first secondary difference sign is positive and the second secondary difference sign is negative, the process jumps to step S3003. Otherwise, the process jumps to step S3005.
(3) In step S3003, it is checked whether or not the primary difference data at the sample time of the first secondary difference code is smaller than the threshold and equal to or greater than zero. If the primary difference data is smaller than the threshold and 0 or more, the process jumps to step S3004. Otherwise, the process jumps to step S3008.
(4) In step S3004, the sample time of the primary difference data is output as an inflection point to be a path candidate, and the process jumps to step S3008.
(5) On the other hand, in step S3005, it is checked whether or not the first secondary differential code is negative and the second secondary differential code is positive. If the first secondary difference sign is negative and the second secondary difference sign is positive, the process jumps to step S3006. Otherwise, the process jumps to step S3008.
(6) In step S3006, it is checked whether or not the primary difference data at the sample time of the first secondary difference code is greater than − (threshold) and less than or equal to 0. If the primary difference data is greater than − (threshold) and less than or equal to 0, the process jumps to step S3007. Otherwise, the process jumps to step S3008.
(7) In step S3007, the sample point one hour before the primary difference data is output as an inflection point as a path candidate, and the process jumps to step S3008.
(8) In step S3008, it is checked whether the sample point of the second secondary difference code is the final time. If it is the final time, the process ends. If it is not the final time, the process jumps to step S3009.
(9) In step S3009, the second secondary differential code is set to the first secondary differential code, and the primary differential data one time after the third primary differential data from the third primary differential data. Is set to the second secondary difference code, and the process returns to step S2502.
[0138]
FIG. 31 shows how a path is detected by the above processing.
FIG. 31A shows the delay profile, FIG. 31B shows the primary difference data, and FIG. 31C shows the difference data of the primary difference data. The secondary differential code is a differential data code of the primary differential data shown in FIG. In FIG. 31 (c), the secondary difference sign changes from negative to positive from the sampling time 4 to 5. Therefore, although the condition of step S3005 is satisfied, the primary difference data at sample time 4 is not detected as a path because the condition of step S3006 is not satisfied. Further, the secondary differential sign changes from positive to negative from the sampling time 6 to 7. Therefore, the condition of step S3002 is satisfied. Furthermore, since the primary difference data at the sample time 6 satisfies the condition of step S3003, the sample point at the sample time 6 is detected as a path.
[0139]
Thereby, the same effects as those of the ninth embodiment can be obtained.
[0140]
In the above example, the right-side primary difference data generated in the same manner is subtracted from the primary difference data generated by subtracting the signal power of the right-side sample point from the signal power of any sample point. A secondary differential code is generated, and this secondary differential code is sequentially examined from the left end (time 0) sample point to the right end (final time) sample point on the time axis. If the differential code changes, it is determined as an inflection point. I showed the configuration to
(1) The inflection point may be determined when the secondary difference code changes by sequentially examining from the right end (last time) sample point on the time axis to the left end (time 0) sample point. In this case, the same effect as described above can be obtained.
(2) Further, by subtracting the primary difference data on the left side generated in the same manner from the primary difference data generated by subtracting the signal power on the left side sample point from the signal power of the arbitrary sample point, 2 A secondary differential code is generated, and this secondary differential code is sequentially examined from the leftmost (time 0) sample point to the rightmost (final time) sample point on the time axis, and when the differential code changes, it is determined that the point is an inflection point. It may be. In this case, the same effect as described above can be obtained.
(3) Further, by subtracting the primary difference data on the left side generated in the same manner from the primary difference data generated by subtracting the signal power on the left side sample point from the signal power on the arbitrary sample point, 2 A secondary difference code is generated, and this secondary differential code is sequentially examined from the rightmost (last time) sample point to the leftmost (time 0) sample point on the time axis, and when the differential code changes, it is determined to be an inflection point. It may be. In this case, the same effect as described above can be obtained.
[0141]
In this embodiment, the center sample point or the sample point one time before the center sample point among the three consecutive primary difference data according to the condition is detected as an inflection point as a path candidate. However, the present invention is not limited to this, and any one of the sample points related to the three primary difference data may be detected as an inflection point as a path candidate.
[0142]
In the seventh to twelfth embodiments, the path determination unit compares a predetermined threshold value with the signal power at the maximum point and the signal power at the inflection point, and when the signal power is larger than the threshold value, the signal power It may be configured to detect a sample point having a as a path. Thereby, the maximum point or inflection point due to noise is not erroneously determined as a path, and the accuracy of path detection is improved.
[0143]
Furthermore, in the seventh to twelfth embodiments, the path determination unit may be configured so that the detected path interval is at least n (n is a natural number) samples. As a result, local maximum points and inflection points caused by noise close to the detected path are not determined as paths, and the accuracy of RAKE synthesis is improved.
[0144]
In all the embodiments described above, the number of paths is detected by the number of fingers. However, the present invention is not limited to this, and the number of paths set by other means may be detected.
[0145]
【The invention's effect】
As described above, according to the first, second, twenty-seventh, and twenty-eighth inventions, the maximum point is detected as a path in order from the maximum point having the largest signal power in the delay profile. The effect that can be improved. In addition, if paths are assigned to all fingers, the path detection process is stopped even if there are peaks in the delay profile, so that it is possible to perform an efficient assignment corresponding to the number of fingers.
[0146]
Further, according to the third to seventh or 29th to 33rd inventions, the local maximum point where the difference code changes is used as a candidate for the path, so after searching all sample points only once and detecting the local maximum point, Since it is only necessary to search for a maximum number of points less than the number of all sample points a predetermined number of times, when there are a large number of all sample points in the delay profile or a large number of fingers, compared to a case where all sample points are searched the same number of times, There is an effect that the processing amount of path detection can be reduced.
[0147]
Further, according to the eighth or thirty-fourth invention, since the detected signal power is compared with the threshold value of the noise level in the descending order, the sample point having this signal power is detected as a path when the signal power is larger than the threshold value. Thus, the maximum point due to noise is not erroneously determined as a path, and the accuracy of path detection is improved.
[0148]
According to the ninth or thirty-fifth aspect, a sample point having a signal power greater than a predetermined threshold in the delayed signal power distribution is detected, and a sample point having the maximum power among at least one of the sample points. Is detected as a path, so that the maximum point due to noise is not erroneously determined as a path, and not only the accuracy of path detection is improved, but also the path is detected after the number of sample points is reduced. The number of processes is less than that of the invention.
[0149]
According to the tenth or thirty-sixth invention, the guard means or the guard step deletes n sample points on each of the left and right (n is a natural number) adjacent to the path, and is generated by noise close to the detected path. Since the local maximum point is not determined as a path, the accuracy of RAKE synthesis is improved.
[0150]
According to the eleventh or thirty-seventh aspect, when the maximum point detecting means or the maximum point detecting step detects a path having the maximum power, the signal power of this path is set as a threshold value, and the threshold value is set at a predetermined power value. The sample point with power larger than this threshold is searched while decreasing, and the maximum point is detected around the detected sample point. Therefore, the search range is limited, and the processing speed can be increased compared to searching all. There is an effect.
[0151]
According to the twelfth or thirty-eighth aspect, when deleting a mountain, the path detection range control means or the path detection range control step sets the signal power values of all sample points constituting the mountain to a minimum value. Therefore, there is an effect that the deletion can be surely performed.
[0152]
According to the thirteenth or thirty-ninth invention, when the path detection range control means or the path detection range control step deletes a mountain, all sample points constituting the mountain are deleted from the memory. As a result of the deletion, the processing speed can be increased.
[0153]
According to the fourteenth to fifteenth or the forty-first to forty-first aspects of the invention, the signal power maximum point and the inflection point that is a candidate for the path are detected based on the difference in signal power between adjacent sample points of the delayed signal power distribution. Since the path is determined according to a predetermined rule, it is possible to detect a path that appears as an inflection point in the middle of the signal power mountain.
[0154]
In addition, according to the sixteenth to nineteenth or the twenty-fourth to forty-fifth inventions, the local maximum point where the differential code changes is used as a path candidate, so after searching all sample points only once and detecting the local maximum point, Since it is only necessary to search for a maximum number of points less than the number of all sample points a predetermined number of times, when there are a large number of all sample points in the delay profile or a large number of fingers, compared to a case where all sample points are searched the same number of times, There is an effect that the processing amount of path detection can be reduced.
[0155]
According to the twentieth or 46th, 47th, 49th, and 51st inventions, the inflection point detection means or the inflection point detection method is such that the three consecutive primary difference data are all positive or 0 or more, and If the central primary difference data is smaller than the other two primary difference data and a predetermined threshold, one of the sample points related to the three primary difference data is determined as an inflection point. There is an effect that it is possible to detect a path that appears as an inflection point in the middle of the peak of signal power.
[0156]
According to the twenty-first or the 46th, 48th, 50th, and 52th inventions, the inflection point detection means or the inflection point detection method is such that the three consecutive primary difference data are all negative or 0 or less, and If the central primary difference data is larger than the other two primary difference data and a predetermined threshold, any one of the sample points related to the three primary difference data is determined as an inflection point. There is an effect that it is possible to detect a path that appears as an inflection point in the middle of the peak of signal power.
[0157]
Further, according to the 22nd or 53rd invention, the path determining means or the path determining method detects a predetermined number of paths from the maximum signal point and the inflection point from the largest signal power.
Since the process of deleting the detected path from the detection range and searching for the next maximum value again becomes unnecessary, the path detection process can be speeded up when the number of set paths is large.
[0158]
Further, according to the twenty-third or the fifty-fourth invention, the path determining means or the path determining method rearranges the maximum points and the inflection points according to the magnitude of the signal power, and passes a predetermined number of paths from the highest signal power. Therefore, the process of deleting the detected path from the detection range and searching for the next maximum value again becomes unnecessary. Therefore, when the number of set paths is large, the speed of the path detection process can be increased.
[0159]
According to the twenty-fourth or fifty-fifth aspects, the signal power at the maximum point and the signal power at the inflection point are compared with a predetermined threshold, and the signal power is obtained when the signal power is greater than the threshold. Since the sample point is detected as a path, there is no possibility that a local maximum point or an inflection point due to noise is erroneously determined as a path, and the accuracy of path detection is improved.
[0160]
According to the twenty-fifth or fifty-sixth invention, a sample point having a signal power greater than a predetermined threshold in the delayed signal power distribution is detected, and a maximum point or an inflection point is detected from at least one of the sample points. Is detected as a path, the maximum point or inflection point of the noise level is not erroneously determined as a path, and the accuracy of RAKE synthesis is improved. In addition, since the path is detected after the number of sample points is reduced, the number of processes can be reduced.
[0161]
According to the twenty-sixth or seventy-seventh aspect, since the path determining means or the path determining method uses at least n (n is a natural number) samples as the path interval to be detected, the maximum caused by noise close to the detected path. Since a point or an inflection point is not determined as a path, there is an effect that the accuracy of RAKE synthesis is improved.
[Brief description of the drawings]
FIG. 1 is a block diagram including a path detection circuit according to the present invention.
FIG. 2 is a block diagram showing a first embodiment of a path detection circuit 12 according to the present invention.
FIG. 3 is a flowchart showing the operation of the path detection circuit 12 in the first embodiment.
FIG. 4 is a flowchart showing a detailed operation of the path detection range control unit 124;
FIG. 5 is an explanatory diagram showing a state in which a peak of signal power is deleted in the first embodiment.
FIG. 6 is a configuration diagram showing a second embodiment of a path detection circuit according to the present invention;
FIG. 7 is a flowchart showing the operation of the path detection circuit 12 in the second embodiment.
FIG. 8 is a flowchart showing detailed operation of maximum point detection in steps S701 to S703 in FIG.
FIG. 9 is a configuration diagram illustrating an example in which the maximum value deleting unit sets the signal power of the detected path in the first memory to the minimum value in the second embodiment.
FIG. 10 is a configuration diagram showing a third embodiment of a path detection circuit according to the present invention;
FIG. 11 is a configuration diagram showing a fourth embodiment of a path detection circuit according to the present invention;
FIG. 12 is a configuration diagram of a path detection circuit showing a fifth embodiment of the path detection circuit according to the present invention;
13 is a flowchart showing the operation of the path detection circuit 12 in the fifth embodiment. FIG.
FIG. 14 is a configuration diagram showing a sixth embodiment of a path detection circuit according to the present invention;
FIG. 15 is a flowchart showing the operation of the path detection circuit 12 in the sixth embodiment.
FIG. 16 is an explanatory diagram showing how a threshold value and a maximum value are detected.
FIG. 17 is a block diagram showing Embodiment 7 of a path detection circuit according to the present invention.
FIG. 18 is a flowchart showing the operation of the path detection circuit 12 in the seventh embodiment.
FIG. 19 is a diagram illustrating another configuration example of the path detection circuit according to the seventh embodiment.
FIG. 20 is a block diagram showing an eighth embodiment of the path detection circuit according to the present invention.
21 is a block diagram showing the internal configuration of the path determination means 200 of FIG.
FIG. 22 is a block diagram showing a ninth embodiment of a path detection circuit according to the present invention.
23 is a block diagram showing the internal configuration of the path determination means 220 in FIG.
FIG. 24 is a flowchart showing the operation of the path detection circuit 12 in the eighth and ninth embodiments.
FIG. 25 is a flowchart showing a detailed operation of the inflection point detection process in step S1804 in FIG. 18 or step S2403 in FIG.
FIG. 26 is a flowchart showing a detailed operation of the inflection point detection process in step S1804 in FIG. 18 or step S2403 in FIG. (Continued)
FIG. 27 shows how a path is detected by the processing of the ninth embodiment.
FIG. 28 is a diagram showing another embodiment of the inflection point detection process.
FIG. 29 is a diagram showing still another embodiment of the inflection point detection process.
FIG. 30 is a diagram showing still another embodiment of the inflection point detection process.
FIG. 31 shows how a path is detected by the processing of the twelfth embodiment.
FIG. 32 is a diagram showing a delay profile.
FIG. 33 is a configuration diagram of a conventional general RAKE receiver.
FIG. 34 is a flowchart showing a conventional effective path detection operation.
FIG. 35 is a diagram illustrating a state in which a part of a conventional peak of signal power is deleted from a detection range.
[Explanation of symbols]
11 delay profile generation circuit, 12 path detection circuit, 121 memory, 122, 122a maximum value detection means, 123 path number counting means, 124 path detection range control means, 171 first memory, 172 primary difference data generation means, 173 Maximal point detection means, 174 second memory, 175 inflection point detection means, 176 third memory, 177 path determination means, 178 path deletion means, 179 path number counting means, 200 path determination means, 220 path determination means, 611 first memory, 612 difference code generation means, 613 maximum point detection means, 614 second memory, 615 maximum value detection means, 616 pass number counting means, 617 maximum value deletion means, 1001 noise level comparison means, 1101 noise Level removing means, 1201 guard means, 1401 descending Output means, 1402 Effective area detection means, 2001 Rearrangement means, 2002 Memory, 2003 Path output means, 2201 Rearrangement means, 3310 Matched filter, 3311 Delay profile generation circuit, 3312 First memory, 3313 Effective path detection circuit, 3314 Second memory.

Claims (57)

In a path detection circuit of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
Detecting the time when the signal power in the delayed signal power distribution becomes maximum and the maximum value of the signal power as the path,
Every time the path is detected, the number of paths is counted up,
A path detection circuit for a RAKE receiver, wherein a peak of signal power having the path as a vertex in the delay signal power distribution is deleted. In a path detection circuit of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A maximum value detecting means for detecting the time and signal power of the sample point at which the signal power is maximum among the plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time; and
A path number counting means for counting up a path count value each time the path is detected by the maximum value detecting means;
Path detection range control means for deleting a peak of signal power having the path at the top in the delayed signal power distribution every time the path is detected by the maximum value detection means, and the path count value is predetermined. A path detection circuit for a RAKE receiver, wherein the path detection, the peak removal of the signal power, and the path number count-up are repeated until the value reaches the value of. In a path detection circuit of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A difference code for examining the difference in signal power of all adjacent sample points from among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time and generating the difference code as a difference code Generating means;
A maximal point detecting means for detecting adjacent sample points having different differential codes as maximal points indicating the candidate paths;
Maximum value detecting means for detecting, as the path, a sample point having the maximum power among the at least one local maximum point;
A path number counting means for counting up a path count value each time the path is detected by the maximum value detecting means;
Path detection range control means for deleting the path in the delayed signal power distribution each time the path is detected by the maximum value detection means;
The path detection circuit of the RAKE receiver is configured to repeatedly detect the path, count up the path number, and delete the path until the path count value exceeds a predetermined value. The maximum point detection means is
The differential code output from the differential code generation means is sequentially examined from the leftmost sample point to the rightmost sample point, and the sample point when the differential code changes is determined as the local maximum point. RAKE receiver path detection circuit. The maximum point detection means is
The differential code output from the differential code generation means is sequentially examined from the leftmost sample point to the rightmost sample point, and the sample point when the differential code changes via 0 is determined as the maximum point. A path detection circuit for a RAKE receiver according to claim 3. The maximum point detection means is
4. The differential code output from the differential code generation means is sequentially examined from the rightmost sample point to the leftmost sample point, and the sample point when the differential code changes is determined as the local maximum point. RAKE receiver path detection circuit. The maximum point detection means is
The differential code output from the differential code generation means is sequentially examined from the rightmost sample point to the leftmost sample point, and the sample point when the differential code changes via 0 is determined as the maximum point. The path detection circuit of the RAKE receiver according to claim 3. A noise level comparing means for comparing the signal power detected by the maximum value detecting means with a predetermined threshold and outputting the comparison result as a comparison result signal, the maximum value detecting means based on the comparison result signal, the signal power 8. The path detection circuit for a RAKE receiver according to claim 2, wherein a sample point having the signal power is detected as a path when is greater than the threshold. Noise level removing means for detecting a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution is provided, and the maximum value detecting means selects a sample point having the maximum power from at least one of the sample points. 8. A path detection circuit for a RAKE receiver according to claim 2, wherein the path detection circuit detects the path as a path. The guard means for deleting left and right n (n is a natural number) sample points adjacent to the path each time the maximum value detecting means detects the path. A path detection circuit of the RAKE receiver as described. When the maximum value detecting means detects a path, an effective area detection is performed in which the maximum signal power value of the path is set as a threshold value, and a sample point having a power larger than the threshold value is detected while the threshold value is decreased stepwise by a predetermined power value. With means,
11. The path detection circuit for a RAKE receiver according to claim 2, wherein the maximum value detecting means detects the path within a range of detected sample points. 12. The path detection circuit for a RAKE receiver according to claim 2, wherein the path detection range control means sets the signal power value of the sample points constituting the peak of signal power to a minimum value. 12. The path detection circuit for a RAKE receiver according to claim 2, wherein the path detection range control means deletes sample points constituting a peak of signal power from the memory. In a path detection circuit of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal, the time and signal power at which the signal power in the delayed signal power distribution becomes maximum, and the delay A path detection circuit for a RAKE receiver, characterized in that the time and signal power at which signal power in the signal power distribution becomes inflection are detected as the path. In a path detection circuit of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
Primary difference data generation means for generating, as primary difference data, differences in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time; ,
A maximum point detecting means for detecting a maximum point of signal power based on the adjacent primary difference data;
Inflection point detection means for detecting an inflection point of signal power based on the primary difference data, and path determination means for determining a path from the local maximum point and the inflection point according to a predetermined rule. A path detection circuit for a RAKE receiver. The maximum point detection means is
The sign of the primary difference data output from the primary difference code generation means is sequentially examined from the leftmost sample point to the rightmost sample point, and the sample point when the sign of the primary difference data changes is determined as the local maximum point. The RAKE receiver path detection circuit according to claim 15. The local maximum point detection means sequentially checks the sign of the primary difference data data output from the primary difference code generation means from the leftmost sample point to the rightmost sample point, and the sign of the primary difference data passes through 0. 16. The path detection circuit for a RAKE receiver according to claim 15, wherein the sample point when changed is determined as a local maximum point. The local maximum point detection means sequentially checks the sign of the primary difference data output from the primary difference code generation means from the rightmost sample point to the leftmost sample point, and the sample point when the sign of the primary difference data changes 16. The path detection circuit for a RAKE receiver according to claim 15, wherein the signal is determined as a local maximum point. The local maximum point detection means sequentially checks the sign of the primary difference data output from the primary difference code generation means from the rightmost sample point to the leftmost sample point, and the sign of the primary difference data changes via 0 16. The path detection circuit for a RAKE receiver according to claim 15, wherein the sample point at this time is determined as a local maximum point. The inflection point detecting means determines that the three primary difference data are positive and the central primary difference data is smaller than the other two primary difference data and a predetermined threshold value. 20. The path detection circuit for a RAKE receiver according to claim 15, wherein any one of the sample points related to the primary difference data is determined as an inflection point. Inflection point detection means
If the three consecutive primary difference data are all negative, and the central primary difference data is larger than the other two primary difference data and a predetermined threshold, the three primary difference data are related. 20. The path detection circuit for a RAKE receiver according to claim 15, wherein any one of the sample points is determined as an inflection point. The RAKE receiver path according to any one of claims 15 to 21, wherein the path determining means detects a predetermined number of paths from the maximum point and the inflection point that have the largest signal power. Detection circuit. The path determination means comprises: rearrangement means for rearranging the local maximum point and the inflection point according to the magnitude of the signal power; and path output means for outputting a predetermined number of paths from the largest signal power. The path detection circuit of the RAKE receiver according to any one of claims 15 to 21. The path determination means compares a predetermined threshold value with the signal power at the local maximum point and the signal power at the inflection point, and detects a sample point having the signal power as a path when the signal power is larger than the threshold value. 24. A path detection circuit for a RAKE receiver according to claim 15, wherein: A noise level removing unit that detects a sample point having a signal power larger than a predetermined threshold in the delay signal power distribution is provided, and the local maximum point detecting unit or the inflection point detecting unit is a local maximum from at least one of the sample points. 24. The path detection circuit for a RAKE receiver according to claim 15, wherein a point or an inflection point is detected as a path. 26. The path detection circuit for a RAKE receiver according to claim 15, wherein the path determination means sets at least n (n is a natural number) samples as an interval between paths to be detected. In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
Detecting the time when the signal power in the delayed signal power distribution becomes maximum and the maximum value of the signal power as the path,
Every time the path is detected, the number of paths is counted up,
A path detection method for a RAKE receiver, wherein a peak of signal power having the path as a vertex in the delay signal power distribution is deleted. In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A maximum value detecting step of detecting the time and signal power of the sample point at which the signal power is maximum among the plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time;
A path number counting step for counting up a path number count value each time the path is detected by the maximum value detecting step;
A path detection range control step of deleting a peak of signal power having the path at the top in the delayed signal power distribution every time the path is detected by the maximum value detection step, and the path count value is predetermined. A path detection method for a RAKE receiver, wherein the path detection, the peak removal of the signal power, and the path number count-up are repeated until the value reaches the value of. In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A difference code for examining the difference in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time and generating the difference code as a difference code Generation step;
A maximum point detection step of detecting adjacent sample points having different difference codes as a maximum point indicating the path candidate;
A maximum value detecting step of detecting, as the path, a sample point having a maximum power among the at least one local maximum point;
A path number counting step for counting up a path number count value each time the path is detected by the maximum value detecting step;
A path detection range control step of deleting the path in the delayed signal power distribution every time the path is detected by the maximum value detection step;
And detecting the path, counting up the number of paths, and deleting the path repeatedly until the path count value exceeds a predetermined value. The maximum point detection step is
30. The difference code output from the difference code generation step is sequentially examined from a leftmost sample point to a rightmost sample point, and the sample point when the difference code changes is determined as a local maximum point. RAKE receiver path detection method. The maximum point detection step is
The differential code output from the differential code generation step is sequentially examined from the leftmost sample point to the rightmost sample point, and the sample point when the differential code changes via 0 is determined as the maximum point. 30. A path detection method for a RAKE receiver according to claim 29. The maximum point detection step is
30. The difference code output from the difference code generation step is sequentially examined from the rightmost sample point to the leftmost sample point, and the sample point when the difference code changes is determined as a local maximum point. RAKE receiver path detection method. The maximum point detection step is
The differential code output from the differential code generation step is sequentially examined from the rightmost sample point to the leftmost sample point, and the sample point when the differential code changes via 0 is determined as the maximum point. 30. A path detection method for a RAKE receiver according to claim 29. A noise level comparing step of comparing the signal power detected in the maximum value detecting step with a predetermined threshold and outputting a comparison result as a comparison result signal, wherein the maximum value detecting step is based on the comparison result signal; 34. The path detection method for a RAKE receiver according to claim 28, wherein a sample point having the signal power is detected as a path when is greater than the threshold. A noise level removing step of detecting a sample point having a signal power greater than a predetermined threshold in the delayed signal power distribution, wherein the maximum value detecting step selects a sample point having the maximum power from at least one of the sample points. 34. The path detection method for a RAKE receiver according to claim 28, wherein the path detection method is detected as a path. 36. The guard step according to any one of claims 28 to 35, further comprising a guard step of deleting n right and left (n is a natural number) sample points adjacent to the path each time the maximum value detecting step detects the path. RAKE receiver path detection method. When the maximum value detection step detects a path, an effective area detection is performed in which the maximum signal power value of the path is set as a threshold value, and a sample point having a power larger than the threshold value is detected while the threshold value is decreased stepwise by a predetermined power value. Including steps,
37. The path detection method for a RAKE receiver according to claim 28, wherein the maximum value detection step detects the path within a range of detected sample points. 38. A path detection method for a RAKE receiver according to claim 28, wherein the path detection range control step sets the signal power value of the sample points constituting the peak of the signal power to a minimum value. 38. The path detection method for a RAKE receiver according to claim 28, wherein the path detection range control step deletes sample points constituting a peak of signal power from the memory. In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
RAKE reception characterized in that the time and signal power at which the signal power in the delayed signal power distribution becomes maximum and the time and signal power at which the signal power in the delayed signal power distribution becomes inflection are detected as the path. Machine path detection method. In a path detection method of a RAKE receiver that detects a path using a delayed signal power distribution generated based on a received signal,
A primary difference data generation step of generating, as primary difference data, differences in signal power of all adjacent sample points among a plurality of sample points obtained by dividing the time axis of the delayed signal power distribution by a predetermined time; ,
A maximum point detecting step of detecting a maximum point of signal power based on the adjacent primary difference data;
An inflection point detecting step of detecting an inflection point of signal power based on the primary difference data;
And a path determination step of determining a path according to a predetermined rule from the maximum point and the inflection point. The maximum point detection step is
The sign of the primary difference data output from the primary difference data generation step is sequentially checked from the leftmost sample point to the rightmost sample point, and the sample point when the sign of the primary difference data changes is determined as the local maximum point. 42. The path detection method for a RAKE receiver according to claim 41. The maximum point detection step sequentially checks the sign of the primary difference data output from the primary difference data generation step from the leftmost sample point to the rightmost sample point, and the sign of the primary difference data changes via 0 42. The RAKE receiver path detection method according to claim 41, wherein the sample point at the time is determined as a local maximum point. The maximum point detection step sequentially checks the sign of the primary difference data output from the primary difference data generation step from the rightmost sample point to the leftmost sample point, and the sample point when the sign of the primary difference data changes 42. The path detection method for a RAKE receiver according to claim 41, wherein: is determined as a local maximum point. The maximum point detection step sequentially checks the sign of the primary difference data output from the primary difference data generation step from the rightmost sample point to the leftmost sample point, and the sign of the primary difference data changes via 0 42. The RAKE receiver path detection method according to claim 41, wherein the sample point at the time is determined as a local maximum point. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
In the inflection point detection step, the absolute value of the central primary difference data is smaller than a predetermined threshold among the three consecutive primary difference data, and the signs of the three primary difference data are all the same, If the absolute value of the central primary difference data is smaller than the absolute values of the other two primary difference data, one of the sample points related to the three primary difference data is defined as an inflection point. 46. The path detection method for a RAKE receiver according to any one of claims 41 to 45, wherein the determination is performed. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
In the inflection point detection step, among the three consecutive primary difference data, the central primary difference data is 0 or more and smaller than a predetermined threshold value, and the primary differential data at both ends are the primary primary difference data. 46. The path of the RAKE receiver according to claim 41, wherein any one of the three sample points related to the first order difference data is determined as an inflection point. Detection method. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
In the inflection point detection step, of the three consecutive primary difference data, the central primary difference data is 0 or less and larger than a predetermined threshold, and the primary differential data at both ends are the primary primary difference data. 46. The RAKE receiver path according to claim 41, wherein any one of the three sample points related to the first order difference data is determined as an inflection point. Detection method. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
In the inflection point detection step, the three consecutive primary difference data are all 0 or more, the central primary difference data is smaller than a predetermined threshold value, and the primary differential data at both ends are the central primary difference data. 46. The RAKE receiver according to claim 41, wherein if it is larger than the data, any one of the sample points related to the three primary difference data is determined as an inflection point. Path detection method. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
In the inflection point detection step, the three consecutive primary difference data are all 0 or less, the central primary difference data is larger than a predetermined threshold value, and the primary differential data at both ends are the central primary difference data. 46. The RAKE receiver according to claim 41, wherein if it is smaller than the data, one of the sample points related to the three primary difference data is determined as an inflection point. Path detection method. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
The inflection point detection step generates a difference code of the primary difference data of adjacent sample points as a secondary difference code, the two adjacent secondary difference codes are different, and the two secondary difference codes are Of the three primary difference data involved, if the central primary difference data is 0 or more and smaller than a predetermined threshold, any one of the sample points related to the three primary difference data is defined as an inflection point. The RAKE receiver path detection method according to any one of claims 41 to 45, wherein the determination is performed. The primary difference data generation step generates a difference in signal power between adjacent sample points as primary difference data,
The inflection point detection step generates a difference code of primary difference data of adjacent sample points as a secondary difference code, and the two adjacent secondary difference codes are different, and the two secondary difference codes If the central primary difference data is less than or equal to 0 and larger than a predetermined threshold among the three primary difference data related to, one of the sample points related to the three primary difference data is the inflection point. The RAKE receiver path detection method according to any one of claims 41 to 45, wherein: 53. The path of the RAKE receiver according to claim 41, wherein the path determining step detects a predetermined number of paths from the maximum signal point and the inflection point in descending order of signal power. Detection method. The path determination step includes a rearrangement step of rearranging the local maximum point and the inflection point according to the magnitude of the signal power, and a path output step of outputting a predetermined number of paths from the largest signal power. 53. A method of detecting a path of a RAKE receiver according to claim 41. The path determination step compares a predetermined threshold value with the signal power at the maximum point and the signal power at the inflection point, and detects a sample point having the signal power as a path when the signal power is larger than the threshold value. 53. A path detection method for a RAKE receiver according to claim 41, wherein: A noise level removing step of detecting a sample point having a signal power greater than a predetermined threshold in the delay signal power distribution, wherein the maximum point detection step or the inflection point detection step is a maximum among at least one of the sample points. 53. The path detection method for a RAKE receiver according to claim 41, wherein a point or an inflection point is detected as a path. 57. The path detection method for a RAKE receiver according to claim 41, wherein the path determination step uses at least n (n is a natural number) samples as an interval between paths to be detected.

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