JP3716846B2 - Symbol timing estimation device - Google Patents

Description

  The present invention relates to a symbol timing estimation apparatus that estimates a symbol start timing in packet communication using a preamble signal.

  In general, since it is necessary to synchronize each packet in the packet communication system, a synchronization establishment signal called a preamble signal is provided at the head of each packet. Conventionally, using this preamble signal, for example, the position (timing at which symbol reading is started) where data (hereinafter referred to as a symbol) such as an image, sound, or text following the preamble signal starts is estimated. Various configurations are considered for the symbol timing estimation apparatus.

FIG. 4A is a diagram schematically illustrating an example of an existing symbol timing estimation apparatus.
The symbol timing estimation device 40 shown in FIG. 4A multiplies an input preamble signal by a known preamble signal, and outputs a correlation value between the input preamble signal and the known preamble signal. And a symbol start detector 42 that detects the timing at which a symbol is started based on the correlation value output from the matched filter 41 and outputs a timing signal to that effect.

FIG. 4B shows an output signal of the matched filter 41, and FIG. 4C shows an output signal of the symbol start detector. 4B and 4C, the horizontal axis represents time, and the vertical axis represents the amplitude value of the output signal.
As shown in FIGS. 4B and 4C, the symbol start detector 42 outputs a peak value of the last correlation value (hereinafter referred to as a correlation peak) from the matched filter 41, and then after a certain period ( For example, in OFDM (Orthogonal Frequency Division Multiplexing), if the next correlation peak is not detected in a period of 0.8 μs from detection of a short symbol to detection of the next short symbol, the time at that time is determined. A signal to that effect is output as the symbol start timing.

Since the symbol timing estimation device 40 can be realized with a relatively small number of configurations, such as the matched filter 41 and the symbol start detector 42, the circuit scale can be reduced.
However, when the preamble signal is distorted due to the influence of fading, noise, or an AGC (Automatic Gain Control) circuit, the symbol timing estimation device 40 also distorts the peak value of the correlation value output from the matched filter 41, There is a risk of a detection error in the start timing of the.

Therefore, in order to suppress detection errors in symbol start timing due to the effects of signal distortion caused by fading, noise, or an AGC circuit, for example, correlation values output from the matched filter 41 are sequentially synchronized and added. A method to make the peak stand out is conceivable. (For example, see Non-Patent Document 1)
FIG. 5A is a diagram schematically illustrating an example of an existing symbol timing estimation device including a synchronous adder. In addition, the same code | symbol is attached | subjected about the same structure as Fig.4 (a).

  A symbol timing estimation device 50 shown in FIG. 5A includes a matched filter 41 (for example, equivalent to the matched filter of Non-Patent Document 1) and a synchronous adder that sequentially and synchronously adds correlation peaks output from the matched filter 41. 51 (e.g., equivalent to the synchronous addition in Non-Patent Document 1), an input preamble signal and a signal obtained by delaying the preamble signal by a predetermined period, and an autocorrelator 52 that calculates a correlation value of these signals For example, the correlation value calculated by the autocorrelator 52 is compared with a threshold value, and the comparison result and the peak value of the value calculated by the synchronous adder 51 are compared. The symbol start detector 53 detects the symbol start timing and outputs a timing signal to that effect (for example, the symbol start detector of Non-Patent Document 1). It corresponds to part) and configured with a.

5B shows the output signal of the synchronous adder 51, FIG. 5C shows the output signal of the autocorrelator 52, and FIG. 5D shows the output signal of the symbol start detector 53. It is. 5B to 5D, the horizontal axis represents time, and the vertical axis represents the amplitude value of the output signal.
As shown in FIGS. 5B to 5D, when the correlation value output from the autocorrelator 52 becomes equal to or less than the threshold value A and the output value of the synchronous adder 51 first peaks, as shown in FIGS. Is a symbol start timing, and a signal to that effect is output.

  As described above, the symbol timing estimation device 50 sequentially synchronizes and averages the correlation peaks of the matched filter 41 by the synchronous adder 51, so that signal distortion caused by fading, noise, or an AGC circuit is generated. The detection error of the symbol start timing due to the influence can be suppressed.

In addition, a matched filter (correlation calculator 102), a synchronous adder (delay addition / subtraction circuit 104) that sequentially adds synchronous peaks output from the matched filter, and a time when the output value of the synchronous adder reaches a peak. A symbol timing estimation apparatus having a symbol start detector (peak detector 107) that is a symbol start timing is also conceivable. (For example, see Patent Document 1)
Tomoya Hanshiro, Kazumi Sato, Satoshi Nogata, Study of IEEE802.11a time synchronization method, 2002 IEICE General Conference Proceedings (CD-ROM full volume), IEICE, March 27, 2002 , B-5-253 (document number) JP2003-110523 (pages 3-6, Fig. 1)

However, the calculated value of the autocorrelator 52 near the symbol start timing is attenuated only slowly. Therefore, there is a problem that it is difficult to adjust the threshold value in the symbol start detector 53 and a problem that reception signal distortion tolerance is weakened.
In addition to the matched filter 41 and the symbol start detector 53, the symbol timing estimation apparatus 50 includes an autocorrelator 52 and the like, and there is a problem that the circuit scale and power consumption increase accordingly.

  Also, for example, in the symbol timing estimation device disclosed in Patent Document 1, when the correlation peak output from the matched filter (correlation calculator 102) is synchronously added by the synchronous adder (delay addition / subtraction circuit 104), the last is performed. Therefore, the output value of the synchronous adder (delay addition / subtraction circuit 104) near the symbol start timing is attenuated only slowly. For this reason, there is a problem that it is difficult to adjust a threshold value in the symbol start detector (peak detector 107) and a problem that reception signal distortion tolerance is weakened.

  In view of the above-described problems, the present invention provides a symbol timing estimation device that facilitates adjustment of a threshold value in a symbol start detector, enhances received signal distortion resistance, and can reduce circuit scale and power consumption. The purpose is to do.

In order to solve the above problems, the present invention adopts the following configuration.
That is, the symbol timing estimation apparatus of the present invention is a symbol timing estimation apparatus that estimates the start timing of symbols in packet communication using a preamble signal, and outputs a correlation value between an input preamble signal and a known preamble signal A matched filter that sequentially and synchronously adds correlation values output from the matched filter, and a multiplier that multiplies the correlation value output from the matched filter and a value calculated by the synchronous adder. And a symbol start detector that sets a time when a peak value of the value calculated by the multiplier becomes smaller than a predetermined value as a start timing of the symbol, and the synchronous adder uses a forgetting coefficient to Synchronous addition is performed so that the weight for the correlation value becomes small.

  As described above, the level of the correlation peak of the matched filter is increased by the synchronous adder using the forgetting coefficient, and further, the correlation value output from the matched filter is multiplied by the value calculated by the synchronous adder. Since the output value of the multiplier near the start timing is sharply attenuated, the difference between the peak value of the multiplier output value at the time of receiving the preamble signal and the peak value of the multiplier output value near the symbol start timing is Can be bigger. Thereby, the adjustment of the predetermined value (threshold value) in the symbol start detector can be facilitated.

  In addition, since the correlation peak level of the matched filter is increased and the output value of the multiplier near the symbol start timing is sharply attenuated, the preamble signal is affected by fading, noise, AGC circuit, etc. Even if distorted, it is possible to reduce the detection error of the symbol start timing. As a result, the received signal distortion tolerance can be increased.

In addition, since the autocorrelator provided in the conventional symbol timing estimation apparatus can be eliminated, the circuit scale and power consumption can be reduced accordingly.
The synchronous adder of the symbol timing estimation device includes an adder, a register that delays a value output from the adder by a certain period, and a forgetting coefficient multiplication that multiplies the value delayed by the register by the forgetting coefficient. And the adder may be configured to add the correlation value output from the matched filter and the value calculated by the forgetting factor multiplier.

  The symbol timing estimation apparatus of the present invention is a symbol timing estimation apparatus that estimates a symbol start timing in packet communication using a preamble signal, and outputs a correlation value between an input preamble signal and a known preamble signal A matched filter that sequentially and synchronously adds correlation values output from the matched filter, and a multiplier that multiplies the correlation value output from the matched filter and a value calculated by the synchronous adder. And a symbol start detector for setting a start time of the symbol when a peak value of a value calculated by the multiplier is smaller than a predetermined value.

As a result, the synchronous adder can be configured to perform synchronous addition using a forgetting coefficient, for example, a fixed coefficient multiplier, so that the circuit scale can be reduced compared to a symbol timing estimation device that uses the forgetting coefficient accordingly. Can be
The symbol timing estimation apparatus of the present invention is a symbol timing estimation apparatus that estimates a symbol start timing in packet communication using a preamble signal, and outputs a correlation value between an input preamble signal and a known preamble signal A matched filter that sequentially and synchronously adds correlation values output from the matched filter, and a multiplier that multiplies the correlation value output from the matched filter and a value calculated by the synchronous adder. And a symbol start detector that sets a start time of the symbol when a peak value of a value calculated by the multiplier is smaller than a peak value before a predetermined time, and the synchronous adder uses a forgetting factor Thus, the synchronous addition may be performed so that the weight for the past correlation value becomes small.

  The symbol timing estimation apparatus of the present invention is a symbol timing estimation apparatus that estimates a symbol start timing in packet communication using a preamble signal, and outputs a correlation value between an input preamble signal and a known preamble signal A matched filter that sequentially and synchronously adds correlation values output from the matched filter, and a multiplier that multiplies the correlation value output from the matched filter and a value calculated by the synchronous adder. And a symbol start detector that takes a time when a peak value of the value calculated by the multiplier is smaller than a peak value before a predetermined time as a start timing of the symbol.

  According to the present invention, the level of the correlation peak of the matched filter is increased, and the output value of the multiplier near the start timing of the symbol is sharply attenuated, so that the output value of the multiplier during reception of the preamble signal is reduced. The difference between the peak value and the peak value of the multiplier output value in the vicinity of the symbol start timing can be increased. Thereby, the adjustment of the predetermined value (threshold value) in the symbol start detector can be facilitated.

  In addition, since the correlation peak level of the matched filter is increased and the output value of the multiplier near the symbol start timing is sharply attenuated, the preamble signal is affected by fading, noise, AGC circuit, etc. Even if distorted, it is possible to reduce the detection error of the symbol start timing. As a result, the received signal distortion tolerance can be increased.

  In addition, since the autocorrelator provided in the conventional symbol timing estimation apparatus is not required, the circuit scale and power consumption can be reduced accordingly.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a diagram schematically illustrating a symbol timing estimation apparatus according to an embodiment of the present invention. In addition, the same code | symbol is attached | subjected to the structure same as Fig.5 (a).
As shown in FIG. 1A, the symbol timing estimation apparatus 10 sequentially uses the matched filter 41 and the correlation values output from the matched filter 41 so that the weight for the past correlation value is reduced using the forgetting factor. A synchronous adder 11 with a forgetting factor (synchronous adder) that performs synchronous addition, a multiplier 12 that multiplies the correlation value calculated by the matched filter 41 and an output value of the synchronous adder 11 with a forgetting factor, Based on the comparison result between the output value and the threshold value, the symbol start detector 13 detects the timing at which data (image, audio, or document data following the preamble signal) starts and outputs a timing signal to that effect. And is configured. The symbol timing estimation apparatus 10 may be applied to a communication network such as a wireless LAN, a wired LAN, a mobile phone, or a wired ADSL, for example.

  1B shows the output signal of the synchronous adder 11 with a forgetting factor, FIG. 1C shows the output signal of the multiplier 12, and FIG. 1D shows the output signal of the symbol start detector 13. FIG. 1B to 1D, the horizontal axis indicates time, and the vertical axis indicates the amplitude value of the output signal.

Here, an example of synchronous addition using the forgetting factor in the synchronous adder 11 with forgetting factor is shown.
For example, the values of the four correlation peaks (see FIG. 4B) calculated by the matched filter 41 are all 1, the correlation value between correlation peaks calculated by the matched filter 41 is 0, and the correlation after the preamble Consider a case where the value is 0.1 and the forgetting factor is 0.9. The six peak values shown in FIG. 1B are P1, P2,..., P6 from the left.

Thereby, the peak value calculated by the synchronous adder 11 with a forgetting factor shown in FIG.
P1 = 1 + 0.9 × 0 = 1
P2 = 1 + 0.9 × 1 = 1.9
P3 = 1 + 0.9 × 1.9 = 1 + 0.9 + (0.9) ² = 2.71
P4 = 1 + 0.9 × 2.71 = 1 + 0.9 + (0.9) ² + (0.9) ³ = 3.439
P5 = 0.1 + 0.9 × 3.439 = 0.1 + 0.9 + (0.9) ² + (0.9) ³ + (0.9) ⁴ = 3.1951
P6 = 0.1 + 0.9 × 3.1951 = 0.1 + 0.9 + (0.9) ² + (0.9) ³ + (0.9) ⁴ + (0.9) ⁵ = 2.97559
It becomes. Since the value between the correlation peaks is defined as 0, the correlation waveform is a plurality of discrete impulse waveforms as shown in FIG.

Next, as shown in FIG. 1C, the multiplier 12 multiplies the correlation value calculated by the matched filter 41 and the output value of the synchronous adder 11 with a forgetting factor.
For example, the values of the four correlation peaks output from the matched filter 41 are all 1, the correlation value between correlation peaks calculated by the matched filter 41 is 0, the correlation value after the preamble is 0.1, and forgetting Consider the case where the six peak values calculated by the coefficient-added synchronous addition 11 are 1, 1.9, 2.71, 3.439, 3.1951, 2.975559, respectively. Note that the six peak values shown in FIG. 1C are denoted by M1, M2,..., M6 from the left in FIG.

As a result, the six peak values of the multiplier 12 shown in FIG.
M1 = 1 × 1 = 1
M2 = 1 × 1.9 = 1.9
M3 = 1 × 2.71 = 2.71
M4 = 1 × 3.439 = 3.439
M5 = 0.1 × 3.1951 = 0.31951
M6 = 0.1 × 2.975559 = 0.2975559
It becomes.

Then, as shown in FIG. 1 (d), the symbol start detector 13 uses the time when the peak value of the output value of the forgetting coefficient-added synchronous addition 11 is equal to or less than the threshold value B as the symbol start timing, and signals to that effect. Is output.
As described above, the level of the correlation peak of the matched filter 41 is increased by the synchronous adder 11 with a forgetting factor, and the symbol is obtained by multiplying the output value of the matched filter 41 by the output value of the synchronous adder 11 with a forgetting factor. Since the output value of the multiplier 12 near the start timing of the signal is sharply attenuated, the peak value of the output value of the multiplier 12 during reception of the preamble signal and the peak value of the output value of the multiplier 12 near the start time of the symbol And the difference can be increased. Thereby, the adjustment of the threshold value in the symbol start detector 13 can be facilitated.

  Further, since the level of the correlation peak of the matched filter 41 is increased and the output value of the multiplier 12 near the symbol start timing is sharply attenuated, it is affected by fading, noise, AGC circuit, or the like. Even if the preamble signal is distorted, the detection error of the symbol start timing can be reduced. As a result, the received signal distortion tolerance can be increased.

  In addition, since the symbol timing estimation apparatus 10 sequentially adds the correlation peaks of the matched filter 41 using the forgetting factor, the symbol timing estimation apparatus 10 performs synchronous addition of the correlation peaks of the matched filter 41 without using the forgetting factor. The peak value of the output value of the multiplier 12 near the symbol start timing can be reduced. As a result, the symbol timing estimation apparatus 10 has a peak value of the output value of the multiplier 12 during reception of the preamble signal and an output value of the multiplier 12 near the symbol start timing, as compared with the symbol timing estimation apparatus that does not use the forgetting factor. Since the difference from the peak value can be further increased, the received signal distortion resistance can be further improved.

  Next, the circuit scales of the symbol timing estimation device 10 shown in FIG. 1A and the conventional symbol timing estimation device 50 shown in FIG. 5A are compared. This comparison of circuit scales is based on the premise that the correlation filter 41 of each of the symbol timing estimation apparatuses 10 and 50 outputs a correlation peak at 16 sample periods (0.8 μs).

FIG. 2A is a diagram illustrating an example of functional blocks constituting the synchronous adder 11 with a forgetting factor illustrated in FIG.
As shown in FIG. 2A, the synchronous adder 11 with a forgetting factor is composed of an adder 110 and 16 registers, and a register unit 111 (registers) that delays the value output from the adder 110 by 16 samples. ) And a fixed coefficient multiplier 112 (forgetting coefficient multiplier) that multiplies the value delayed by the register unit 111 by a fixed coefficient (forgetting coefficient). For example, the fixed coefficient of the fixed coefficient multiplier 112 provided in the synchronous adder 11 with a forgetting coefficient is set to 0.9.

  The synchronous adder 11 with a forgetting factor adds the output value of the matched filter 41 and the value delayed by 16 samples in the register unit 111 in the adder 110, and the output value of the matched filter 41 and the register unit 111 Before adding the delayed value, the fixed coefficient multiplier 112 multiplies the value delayed by the register unit 111 by 0.9.

FIG. 2B is a diagram illustrating an example of functional blocks constituting the synchronous adder 51 illustrated in FIG. Note that the same components as those in FIG.
As illustrated in FIG. 2B, the synchronous adder 51 includes an adder 110 and a register unit 111.

The synchronous adder 51 adds the output value of the matched filter 41 and the value delayed by 16 samples in the register unit 111 in the adder 110.
FIG. 2C is a diagram illustrating an example of functional blocks constituting the autocorrelator 52 illustrated in FIG. Note that the same components as those in FIG.

  As shown in FIG. 2C, the autocorrelator 52 includes a multiplier 520, a register unit 111, an adder 110, a register unit 521 composed of one register, a fixed coefficient multiplier 522, and 523. For example, the fixed coefficient of the fixed coefficient multiplier 522 provided between the adder 110 and the register unit 521 is 15/16, and the fixed coefficient of the fixed coefficient multiplier 523 provided in the output stage of the autocorrelator 52 is used. Is 1/16.

  The autocorrelator 52 multiplies the output value of the matched filter 41 by the value obtained by delaying the output value of the matched filter 41 by 16 samples in the register unit 111 in the multiplier 520, and 1 sample in the register unit 521. A value obtained by multiplying the delayed value by 15/16 in fixed coefficient multiplier 522 is added in adder 110, and the added value is multiplied by 1/16 in fixed coefficient multiplier 523.

The table shown in FIG. 3A is a table showing the number of functional blocks of each of the synchronous adder 11 with forgetting factor, the synchronous adder 51, and the autocorrelator 52.
As described above, the adder 11 with a forgetting coefficient includes the register unit 111 including 16 registers, the fixed coefficient multiplier 112, and the adder 110. Thus, as shown in the table of FIG. 3A, the number of registers constituting the adder 11 with forgetting factor 11 is 16, the number of multipliers is 1, and the number of adders is 1.

The synchronous adder 51 includes a register unit 111 including 16 registers and an adder 110. Thus, as shown in the table of FIG. 3A, the number of registers constituting the synchronous adder 51 is 16, the number of multipliers is 0, and the number of adders is 1.
The autocorrelator 52 includes a register unit 111 including 16 registers, a register 521 including one register, a multiplier 520, a fixed coefficient multiplier 522, and a fixed coefficient multiplier 523. And an adder 110. As a result, as shown in FIG. 3A, the number of registers constituting the autocorrelator 52 is 17, the number of multipliers is 3, and the number of adders is 1.

The table shown in FIG. 3B is a table for comparing the circuit scales of the symbol timing estimation device 10 and the symbol timing estimation device 50. The comparison table shown in FIG. 3B shows a comparison excluding common parts such as the matched filter 41.
As shown in the table of FIG. 3B, the number of registers constituting the symbol timing estimation device 10 is 16 (register unit 111), the number of multipliers is 2 (multiplier 12, fixed coefficient multiplier 112), and the number of adders. Becomes 1 (adder 110). On the other hand, the number of registers constituting the symbol timing estimation device 50 is 33 (two register units 111 and 521), the number of multipliers is 3 (multiplier 520, fixed coefficient multiplier 522, fixed coefficient multiplier 523), The number of adders is 2 (two adders 110).

  As described above, the symbol timing estimation device 10 can be configured such that the number of registers and the number of adders are less than half the number of the symbol timing estimation device 50, respectively, and the number of multipliers is also the symbol timing estimation device. Compared to 50, it can be configured with a smaller number. Thus, the symbol timing estimation device 10 of the present embodiment can significantly reduce the circuit scale and power consumption as compared with the conventional symbol timing estimation device 50.

In addition, this invention is not limited to the said embodiment, A various structure is employable in the range described in each claim. For example, the following configuration changes are possible.
In the symbol timing estimation device 10 of the above embodiment, the output value of the matched filter 41 and the output value of the forgetting coefficient-added synchronous adder 11 are multiplied by the multiplier 12, and the multiplication result and threshold value are multiplied by the symbol start detector 13. However, instead of the synchronous adder 11 with a forgetting factor, a symbol adder that does not use a forgetting factor may be provided to constitute a symbol timing estimation device. As described above, even if the symbol timing estimation device that does not use the forgetting factor is configured, the level of the output value of the multiplier 12 during reception of the preamble signal is increased, and the output value of the multiplier 12 near the start timing of the symbol is steep. Can be attenuated.

  Further, since the symbol timing estimation device that does not use the forgetting factor does not require the fixed coefficient multiplier 112 in the symbol timing estimation device 10, the circuit scale and power consumption can be reduced as compared with the symbol timing estimation device 10. Can be small.

It is a figure which shows typically the symbol timing estimation apparatus of embodiment of this invention. It is a figure which shows an example of each functional block of a synchronous adder with a forgetting factor, a synchronous adder, and an autocorrelator. It is a figure which shows the comparison of the circuit scale of the symbol timing estimation apparatus of embodiment of this invention, and the conventional symbol timing estimation apparatus. It is a figure which shows typically an example of the existing symbol timing estimation apparatus. It is a figure which shows typically an example of the existing symbol timing estimation apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Symbol timing estimation apparatus 11 Synchronous adder with forgetting factor 12 Multiplier 13 Symbol start detector 40 Symbol timing estimation apparatus 41 Matched filter 42 Symbol start detector 50 Symbol timing estimation apparatus 51 Synchronous adder 52 Autocorrelator 53 Symbol start detection Unit 110 Adder 111 Register unit 112 Fixed coefficient multiplier 520 Multiplier 521 Register unit 522, 523 Fixed coefficient multiplier

Claims (5)

A symbol timing estimation device that estimates a symbol start timing in packet communication using a preamble signal,
A matched filter that outputs a correlation value between an input preamble signal and a known preamble signal;
A synchronous adder for sequentially synchronously adding correlation values output from the matched filter;
A multiplier that multiplies the correlation value output from the matched filter by a value calculated by the synchronous adder;
A symbol start detector having a time when a peak value of a value calculated by the multiplier is smaller than a predetermined value as a start timing of the symbol;
With
The symbol timing estimation apparatus, wherein the synchronous adder performs synchronous addition using a forgetting coefficient so that a weight for a past correlation value becomes small. The symbol timing estimation device according to claim 1,
The synchronous adder is
An adder;
A register for delaying a value output from the adder by a fixed period;
A forgetting factor multiplier for multiplying the value delayed by the register by the forgetting factor;
With
The adder adds a correlation value output from the matched filter and a value calculated by the forgetting factor multiplier. A symbol timing estimation device that estimates a symbol start timing in packet communication using a preamble signal,
A matched filter that outputs a correlation value between an input preamble signal and a known preamble signal;
A synchronous adder for sequentially synchronously adding correlation values output from the matched filter;
A multiplier that multiplies the correlation value output from the matched filter by a value calculated by the synchronous adder;
A symbol start detector having a time when a peak value of a value calculated by the multiplier is smaller than a predetermined value as a start timing of the symbol;
A symbol timing estimation apparatus comprising: A symbol timing estimation device that estimates a symbol start timing in packet communication using a preamble signal,
A matched filter that outputs a correlation value between an input preamble signal and a known preamble signal;
A synchronous adder for sequentially synchronously adding correlation values output from the matched filter;
A multiplier that multiplies the correlation value output from the matched filter by a value calculated by the synchronous adder;
A symbol start detector that sets a start time of the symbol when a peak value of a value calculated by the multiplier is smaller than a peak value of a predetermined time before;
With
The symbol timing estimation apparatus, wherein the synchronous adder performs synchronous addition using a forgetting coefficient so that a weight for a past correlation value becomes small. A symbol timing estimation device that estimates a symbol start timing in packet communication using a preamble signal,
A matched filter that outputs a correlation value between an input preamble signal and a known preamble signal;
A synchronous adder for sequentially synchronously adding correlation values output from the matched filter;
A multiplier that multiplies the correlation value output from the matched filter by a value calculated by the synchronous adder;
A symbol start detector that sets a start time of the symbol when a peak value of a value calculated by the multiplier is smaller than a peak value of a predetermined time before;
A symbol timing estimation apparatus comprising:

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