JP3699517B2 - Semiconductor switch control circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a control circuit for controlling an opening / closing operation of a switch circuit composed of semiconductor elements.
[0002]
In recent years, semiconductor elements have been used in switch circuits for opening and closing power supplied to a load such as an electromagnetic valve, and the range of use has been expanded. For this reason, a semiconductor switch circuit that can supply sufficient power to a load driven by a high voltage and a control circuit that controls opening and closing of the switch circuit are required.
[0003]
[Prior art]
FIG. 5 shows a conventional semiconductor switch control circuit. The power supply VA is supplied to the drain of the output transistor Tr1 formed of an N-channel MOS transistor, and the source of the output transistor Tr1 is connected to the load L.
[0004]
The power source VA is supplied to a charge pump 1 in which a bipolar transistor is used as an active element. The charge pump 1 outputs an output signal PO obtained by boosting the power supply VA to the gate of the output transistor Tr1 based on the input of the clock signal CLK. Accordingly, a voltage higher than the power source VA is input to the gate of the output transistor Tr1.
[0005]
The collector of the NPN transistor Tr2 is connected to the gate of the output transistor Tr1, the emitter of the transistor Tr2 is connected to the ground GND, and the control signal CS is input to the base.
[0006]
The current drive capability of the transistor Tr2 is superior to the load drive capability of the charge pump 1, and when the transistor Tr2 is turned on, the gate potential of the output transistor Tr1 is set to substantially the ground GND level.
[0007]
In the semiconductor switch control circuit configured as described above, when the power supply VA is supplied and the transistor Tr2 is turned off by the control signal CS, the output transistor Tr1 is turned on based on the output signal of the charge pump 1.
[0008]
At this time, since the gate voltage of the output transistor Tr1 is higher than the power supply VA by the threshold value of the transistor Tr1, the output voltage output from the source of the output transistor Tr1 is at the power supply VA level.
[0009]
Further, when the transistor Tr2 is turned on by the control signal CS, the gate voltage of the output transistor Tr1 is lowered to almost the ground GND level, and the output transistor Tr1 is turned off. Accordingly, power supply to the load L is stopped.
[0010]
[Problems to be solved by the invention]
In the semiconductor switch control circuit as described above, when a high voltage is required to drive the load L, a required high voltage is supplied as the power source VA. Then, the charge pump 1 needs to output an output voltage obtained by further boosting the power source VA, and the boosted output voltage of the charge pump 1 is applied to the collector of the transistor Tr2.
[0011]
Accordingly, it is necessary to secure a sufficient breakdown voltage for the transistor and the transistor Tr2 constituting the charge pump 1, but it is difficult to ensure a sufficient breakdown voltage for the charge pump 1 and the transistor Tr2 formed on the semiconductor device. .
[0012]
If the output transistor is composed of a P-channel MOS transistor, it is not necessary to boost the gate voltage of the transistor from the power source VA. It is not necessary to ensure the above breakdown voltage.
[0013]
However, the P-channel MOS transistor has a higher on-resistance than the N-channel MOS transistor, and it is difficult to ensure a sufficient breakdown voltage. Therefore, the P-channel MOS transistor has a problem that its characteristics are inferior to that of the N-channel MOS transistor as a switching element for supplying sufficient power to the load L while ensuring a sufficient breakdown voltage.
[0014]
An object of the present invention is to provide a semiconductor switch control circuit capable of supplying a sufficient voltage and sufficient power to a load.
[0015]
[Means for Solving the Problems]
In the first aspect, the first and second pulse signal generation circuits 15 and 16 output a pulse signal based on the supply of the first power source VB. One of the first and second pulse signal generation circuits 15 and 16 is activated based on the control signal CS. The output transistor Tr11 is an N-channel MOS transistor in which a second power source VA having a higher voltage than the first power source VB is supplied to the drain and the source is connected to the output terminal To. The first control circuit 17 includes a first diode having an anode connected to the first pulse signal generation circuit 15 via a first capacitor C1 and a cathode connected to the gate of the output transistor, and an anode There is constituted by a second diode having a cathode is connected to the source of the output transistor is connected to the anode of the first diode, the output voltage output from the output terminal T o, the first Is boosted based on the pulse signal output from the pulse signal generation circuit 15 and the capacitive coupling of the first capacitor C1 , and the boosted voltage is output to the gate of the output transistor Tr11 to turn on the output transistor Tr11. Let The second control circuit 18, from said second pulse signal generating circuit 16 based on the second pulse signal which is output via a capacitor C2, to connect the gate of the output transistor Tr11 to the output terminal To by lowering the gate voltage of the output transistor T r11 Te, turns off the output transistor Tr11.
[0016]
According to a second aspect of the present invention, the second control circuit intermittently connects the gate and the source of the output transistor based on an input signal from the second pulse signal generation circuit via capacitive coupling. Based on the ON operation of the output transistor, the gate of the output transistor and the control terminal of the first switching element are connected to thereby control the potential of the control terminal to the emitter of the first switching element. And a second switching element that turns off the first switching element by lowering the potential, and a control terminal of the second switching element is connected to an emitter of the first switching element. .
[0017]
According to a third aspect of the present invention, the first and second switching elements are constituted by first and second NPN transistors, and the second diode is constituted by a base and a collector of the second NPN transistor.
[0018]
According to a fourth aspect of the present invention, the first and second switching elements are composed of first and second N-channel MOS transistors.
In the present invention, the second switching element is formed of a diode.
[0019]
(Function)
According to the first aspect, when a pulse signal is output from the first pulse signal generation circuit 15, the pulse signal is input to the gate of the output transistor Tr11 via the first capacitor C1 and the first diode D2. . Then, the gate voltage of the output transistor Tr11 is boosted from the second power supply voltage VA and the output transistor Tr11 is turned on, so that the second power supply voltage VA is output from the output terminal To. When a pulse signal is output from the second pulse signal generation circuit 16, the gate voltage of the output transistor Tr11 becomes the same potential as the source voltage, and the output transistor Tr11 is turned off.
[0020]
According to claim 2, the second switching element, a second capacitor connected to the control terminal of the first switching element is charged. When the pulse signal is output from the second pulse signal generation circuit, the boost operation in the first control circuit is stopped, and the gate and source of the output transistor are intermittently connected by the first switching element, The output transistor is turned off.
[0021]
According to another aspect of the present invention, the base and collector of the second NPN transistor operate as a second diode.
According to a fourth aspect of the present invention, the first and second switching elements are composed of N-channel MOS transistors, so that it is easy to ensure a breakdown voltage.
[0022]
According to the fifth aspect, when the gate voltage of the output transistor is boosted, the capacitor connected to the control terminal of the first switching element via the diode is charged.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
FIG. 2 shows a first embodiment of a semiconductor switch control circuit embodying the present invention. The oscillation circuit 11 outputs a pulse signal having a constant frequency to the AND circuits 12a and 12b based on the supply of the power source VB.
[0024]
A control signal CS is input to the AND circuit 12a, and the control signal CS is input to the AND circuit 12b via an inverter circuit 13.
The output signal of the AND circuit 12a is output to the anode of the diode D2 via the capacitor C1. The anode of the diode D2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output terminal To. A load RL is connected to the output terminal To.
[0025]
The cathode of the diode D2 is connected to the gate of an output transistor Tr11 composed of an N-channel MOS transistor, the power transistor VA is supplied to the drain of the output transistor Tr11, and the source is connected to the output terminal To.
[0026]
The output signal of the AND circuit 12b is input to the base of the NPN transistor Tr12 via the capacitor C2, the collector of the transistor Tr12 is connected to the gate of the output transistor Tr11, and the emitter is connected to the output terminal To. .
[0027]
The collector of the NPN transistor Tr13 is connected to the gate of the output transistor Tr11, the emitter of the transistor Tr13 is connected to the base of the transistor Tr12, and the base of the transistor Tr13 is connected to the output terminal To.
[0028]
In the semiconductor switch control circuit configured as described above, when the control signal CS becomes H level, the output signal of the AND circuit 12a becomes a pulse signal based on the output signal of the oscillation circuit 11. The output signal of the AND circuit 12b is fixed at the L level, and the transistor Tr12 is turned off.
[0029]
Based on the output of the pulse signal from the AND circuit 12a, the gate voltage of the output transistor Tr11 gradually rises. When the output transistor Tr11 is turned on, the power VA is supplied from the output terminal To to the load RL.
[0030]
Then, since the supply voltage to the load RL is supplied to the anode of the diode D2 via the diode D1, the anode potential of the diode D2 is based on the pulse signal output from the AND circuit 12a and the capacitive coupling by the capacitor C1. The voltage is boosted above the voltage of the power supply VA. The boosted voltage becomes higher than the power source VA by the amplitude of the pulse signal output from the AND circuit 12a.
[0031]
At this time, the transistor Tr13 is turned on, the capacitor C2 is charged, and the base potential of the transistor Tr12 becomes a potential that is reduced by the voltage drop between the base and emitter of the transistor Tr13 from the supply voltage to the load RL. Further, the transistor Tr12 is not turned on because the emitter potential is higher than the base potential.
[0032]
By such an operation, the gate voltage of the output transistor Tr11 becomes higher than the power supply VA by the threshold value of the transistor Tr11, so that the voltage level of the power supply VA is supplied to the load RL.
[0033]
When the control signal CS becomes L level, the output signal of the AND circuit 12a is fixed to L level, and the output signal of the AND circuit 12b becomes a pulse signal based on the output signal of the oscillation circuit 11.
[0034]
Then, since the base potential of the transistor Tr12 was maintained at a potential lower than the supply voltage to the load RL by the voltage drop between the base and the emitter of the transistor Tr13, the base of the transistor Tr12 is capacitively coupled to the base by the capacitor C2. A pulse signal having the potential as the lower limit is input.
[0035]
Accordingly, the transistor Tr12 is intermittently turned on, the gate potential of the output transistor Tr11 is lowered, and the output transistor Tr11 is turned off. As a result, the supply of the power source VA to the load RL is stopped.
[0036]
In the semiconductor switch control circuit as described above, the following operational effects can be obtained.
(A) If the control signal CS is set to H level, the gate potential of the output transistor Tr11 can be boosted higher than the power supply VA by the threshold value of the output transistor Tr11. Can be supplied. Further, since the output transistor Tr11 is composed of an N-channel MOS transistor, it is easy to secure a withstand voltage, and since the on-resistance is small, sufficient power can be supplied to the load RL.
(B) Since the boosted voltage is supplied to the gate of the output transistor Tr11 by the pulse signal output from the AND circuit 12a, capacitive coupling by the capacitor C1, and rectification by the diodes D1 and D2, the AND circuit 12a and The power supply VB of the oscillation circuit 11 that supplies a pulse signal to the AND circuit 12a may be a power supply having a lower voltage than the power supply VA. The power supply for the AND circuit 12b and the inverter circuit 13 may be the power supply VB.
[0037]
Therefore, even if the power supply VA is increased in voltage, it is not necessary to increase the breakdown voltage of the AND circuit 12a and the oscillation circuit 11.
(C) A voltage difference between the boosted voltage and the ground GND is not applied between the collectors and emitters of the transistors Tr12 and Tr13, and a potential difference between the boosted voltage and the supply voltage to the load RL is applied. . Therefore, it is not necessary to increase the breakdown voltage of the transistors Tr12 and Tr13. Similarly, it is not necessary to increase the breakdown voltage of the diodes D1 and D2.
(D) Since the potential difference between the power supply VA and the ground GND level is applied to the capacitors C1 and C2, a sufficient breakdown voltage is required. However, if the capacitors C1 and C2 are external elements, the breakdown voltage is secured. It is also easy to do.
(E) The circuit operating with the power source VA and the circuit operating with the power source VB are connected via the capacitors C1 and C2 and the circuits are cut off in a direct current manner. There is no interference of the circuit.
(Second embodiment)
FIG. 3 shows a second embodiment. In this embodiment, the transistors Tr12 and Tr13 of the first embodiment are constituted by N-channel MOS transistors Tr14 and Tr15.
[0038]
With such a configuration, it is possible to obtain the same effects as those of the above-described embodiment. Further, since the transistors Tr14 and Tr15 are composed of N-channel MOS transistors, it is easy to secure a breakdown voltage. In particular, when the output transistor Tr11 is turned off, a potential difference between the boosted voltage and the ground GND is instantaneously applied between the drain and source of the transistor Tr14, so that it is easy to secure a withstand voltage against the potential difference.
(Third embodiment)
FIG. 4 shows a third embodiment. In this embodiment, the diode D1 of the first embodiment is deleted, and the collector of the transistor Tr13 is connected to the anode of the diode D2.
[0039]
With this configuration, when a pulse signal is output from the AND circuit 12a, the potential of the output transistor Tr11 rises and the output transistor Tr11 is turned on.
[0040]
When the supply voltage to the load RL rises and the base potential of the transistor Tr13 becomes higher than its collector potential, the supply voltage is supplied from the base of the transistor Tr13 to the collector.
[0041]
Accordingly, the base / collector of the transistor Tr13 is equivalent to the diode D1 of the first embodiment. With such a configuration, one diode can be reduced from the first embodiment.
[0042]
The transistors Tr13 and Tr15 in the first and second embodiments may be replaced with diodes.
The technical ideas other than the claims that can be grasped from the embodiment will be described below together with the effects thereof.
(1) In Claim 2, the first switching element is formed of an N-channel MOS transistor. It becomes easy to ensure the withstand voltage of the first switching element.
[0043]
【The invention's effect】
As described above in detail, the present invention can provide a semiconductor switch control circuit capable of supplying a sufficient voltage and sufficient power to a load.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating the principle of the present invention.
FIG. 2 is a circuit diagram showing a first embodiment.
FIG. 3 is a circuit diagram showing a second embodiment.
FIG. 4 is a circuit diagram showing a third embodiment.
FIG. 5 is a circuit diagram showing a conventional example.
[Explanation of symbols]
15 first pulse signal generation circuit 16 second pulse signal generation circuit 17 first control circuit 18 second control circuit VB first power supply VA second power supply CS control signal To output terminal Tr11 output transistors C1 and C2 capacity

Claims (5)

First and second pulse signal generation circuits for outputting a pulse signal based on the supply of the first power supply ;
An output transistor composed of an N-channel MOS transistor in which a second power source having a voltage higher than that of the first power source is supplied to a drain and a source is connected to an output terminal;
The anode is connected to the first pulse signal generation circuit through a first capacitor, the cathode is connected to the gate of the output transistor, and the anode is connected to the source of the output transistor. is constituted by a second diode having a cathode connected to the anode of the first diode with the output voltage output from the output terminal, a pulse signal outputted from the first pulse signal generator circuit and the first boosts on the basis of the capacitive coupling of the capacitor, and a first control circuit for turning on the output transistor and outputs the boosted voltage to the gate of said output transistor,
The second on the basis of the pulse signal generation circuit to the second pulse signal that is output via the capacitor, by lowering the gate voltage of the output transistor and connecting the gate of the output transistor to the output terminal And a second control circuit for turning off the output transistor , wherein one of the first and second pulse signal generation circuits is activated based on a control signal . The second control circuit includes a first switching element that intermittently connects a gate and a source of the output transistor based on an input signal from the second pulse signal generation circuit via capacitive coupling; Based on the ON operation of the output transistor, by connecting the gate of the output transistor and the control terminal of the first switching element, the potential of the control terminal is made lower than the potential of the emitter of the first switching element. And a second switching element for turning off the first switching element, and a control terminal of the second switching element is connected to an emitter of the first switching element. The semiconductor switch control circuit according to claim 1. The first and second switching elements are constituted by first and second NPN transistors, and the second diode is constituted by a base and a collector of the second NPN transistor. 3. The semiconductor switch control circuit according to 2. 3. The semiconductor switch control circuit according to claim 2, wherein the first and second switching elements are composed of first and second N-channel MOS transistors. 3. The semiconductor switch control circuit according to claim 2, wherein the second switching element is constituted by a diode.

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